EECE-21(B)

Course Code : EECE-106

Sub-Circuits using Net listing and Schematics and Three Phase Circuits.

Name : Abdullah Al Mahi

Roll : 202316127

Level/Term : L-1,T-2

Course : Electrical Circuits and Simulation Laboratory 2

Date of Submission : 04 .01 .2024

Name of the Experiment:
Sub-Circuits using Net listing and Schematics and Three Phase Circuits.

Objective:

The experiment's objective is to introduce, explore, and apply subcircuits within PSpice,
enabling learners to encapsulate circuit elements for reusability, enhance clarity, and simulate
practical scenarios, specifically emphasizing their use in three-phase circuits. Through this,
participants develop proficiency in subcircuit creation, invocation, and their application, bridging
theoretical understanding with practical circuit design.

Theory:

Subcircuits are fundamental in circuit design, acting as modular units that encapsulate multiple
elements into a single entity. This encapsulation streamlines complex circuitry, providing a
higher level of abstraction by hiding internal details. Picture a toolbox: each subcircuit is like a
specific tool, neatly organizing components for easy access and reuse.

They introduce a layer of abstraction by allowing us to focus on the broader functionality of a

circuit without being bogged down by the specifics of individual components. By defining
external nodes, subcircuits establish clear interfaces for connecting to the larger circuit, ensuring
seamless integration and enhancing overall modularity.

In practical terms, consider subcircuits as 'black boxes'—they maintain internal complexity while
presenting a simplified interface to the rest of the circuit. This simplification promotes efficient
design practices and enables the swift assembly of intricate systems.

Within three-phase circuits, subcircuits become invaluable tools for modeling and analyzing
loads or components. They facilitate the study of relationships between phase voltages and
currents, aiding in verifying theoretical expectations against simulated results. This capability
empowers engineers to design and optimize systems with a deep understanding of their behavior
under various conditions.

Problem Statement:

To define a RLC series circuit with R=100Ω, L=0.31H and C=31.83µF as a subcircuit. Use the
subcircuit in three different phases of a balanced three phase supply with f=50Hz and
amplitude=100V. Connect the sources and the loads in (Problem 1) YY, (Problem 2) Y∆,
(Problem 3) ∆∆ and check the relationships between line current and phase current and line
voltage and phase voltage.
YY : Netlist
code
.subckt Example_1 4 7
r1 4 5 100
l1 5 6 0.31H
c1 6 7 31.83uF
.ends
V1 1 0 dc 0 ac 0 sin 0 100 50 0 0 0
V2 2 0 dc 0 ac 0 sin 0 100 50 0 0 -120
V3 3 0 dc 0 ac 0 sin 0 100 50 0 0 120
X1 1 0 Example_1
X2 2 0 Example_1
X3 3 0 Example_1
.tran 0ns 75ms
.probe
.end

YY: Circuit in Schematics

Graphical representation :
Line Current and Phase Current :
2.0A

0A

-2.0A
0s 5ms 10ms 15ms 20ms 25ms 30ms 35ms 40ms 45ms 50ms
I(V1) I(V2) I(V3)
Time
 2.0A

0A

-2.0A
0s 5ms 10ms 15ms 20ms 25ms 30ms 35ms 40ms 45ms 50ms
I(Z1.R1) I(Z2.R1) I(Z3.R1)
Time

Line Voltage and Phase Voltage :

100V

0V

-100V
0s 5ms 10ms 15ms 20ms 25ms 30ms 35ms 40ms 45ms 50ms
V1(V1) V1(V2) V1(V3)
Time
200V

0V

-200V
0s 5ms 10ms 15ms 20ms 25ms 30ms 35ms 40ms 45ms 50ms
V1(V1) - V1(V2) V1(V2) - V1(V3) V1(V3) - V1(V1)
Time

Y Delta : Netlist
code
.subckt Example_1 4 7
r1 4 5 100
l1 5 6 0.31
c1 6 7 31.83uF
.ends
V1 1 0 dc 0 ac 0 sin 0 100 50 0 0 0
V2 2 0 dc 0 ac 0 sin 0 100 50 0 0 -120
V3 3 0 dc 0 ac 0 sin 0 100 50 0 0 120
X1 1 2 Example_1
X2 2 3 Example_1
X3 3 1 Example_1
.tran 20us 0.1s 0ms 10us
.probe
.end
Problem 2 : Schematics

Graphical representation :

Line Current and Phase Current :

4.0A

0A

-4.0A
0s 5ms 10ms 15ms 20ms 25ms 30ms 35ms 40ms 45ms 50ms
I(V1) I(V2) I(V3)
Time
2.0A

0A

-2.0A
0s 5ms 10ms 15ms 20ms 25ms 30ms 35ms 40ms 45ms 50ms
I(Z3.R1) I(Z2.R1) I(Z1.R1)
Time

Line Voltage and Phase Voltage :

 100V

0V

-100V
0s 5ms 10ms 15ms 20ms 25ms 30ms 35ms 40ms 45ms 50ms
V(1) V(2) V(3)
Time

200V

0V

-200V
0s 5ms 10ms 15ms 20ms 25ms 30ms 35ms 40ms 45ms 50ms
V(1) - V(2) V(2) - V(3) V(3) - V(1)
Time

Delta Delta : Netlist

code
.subckt Example_1 4 7
r1 4 5 100
l1 5 6 0.31
c1 6 7 31.83uF
.ends
r2 1 5 1u
r3 1 0 1Meg
r4 4 3 1u
r5 3 0 1Meg
r6 2 6 1u
r7 2 0 1Meg
V1 5 2 dc 0 ac 0 sin 0 100 50 0 0 0
V2 4 1 dc 0 ac 0 sin 0 100 50 0 0 -120
V3 6 3 dc 0 ac 0 sin 0 100 50 0 0 120
X1 1 2 Example_1
X2 2 3 Example_1
X3 3 1 Example_1
.tran 20us 0.1s 0ms 10us
.probe
.end

Delta Delta : Schematics

Graphical representation :

Line Current and Phase Current :

2.0A

0A

-2.0A
0s 5ms 10ms 15ms 20ms 25ms 30ms 35ms 40ms 45ms 50ms
I(Z1.R1) I(Z2.R1) I(Z3.R1)
Time

2.0A

0A

-2.0A
0s 5ms 10ms 15ms 20ms 25ms 30ms 35ms 40ms 45ms 50ms
I(Z3.R1) - I(Z1.R1) I(Z1.R1) - I(Z2.R1) I(Z2.R1) - I(Z3.R1)
Time

Line Voltage and Phase Voltage :

 100V

0V

-100V
0s 5ms 10ms 15ms 20ms 25ms 30ms 35ms 40ms 45ms 50ms
V(1) V(2) V(3)
Time

Discussion:
Subcircuits are essential components in circuit design, offering a structured approach to
managing complexity and promoting efficiency. They encapsulate groups of circuit elements into
modular units, enabling reusability and enhancing organization within larger circuits. By
providing a higher level of abstraction, subcircuits allow designers to focus on overall circuit
functionality without getting lost in individual component details. This abstraction fosters clarity,
reduces errors, and facilitates hierarchical design methodologies. In the context of three-phase
circuits, subcircuits aid in modeling loads and analyzing phase relationships, contributing to a
deeper understanding of power systems. While beneficial, clear documentation of subcircuit
interfaces and verification against theoretical models remain crucial for their effective utilization.
The future potential lies in advancing functionalities, integrating AI-driven optimization, and
fostering collaborative tools for streamlined circuit design processes.