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The National Institute of Engineering 2023-2024

THE NATIONAL INSTITUTE OF


ENGINEERING
An Autonomous Institution under Visvesvaraya Technological University, Belagavi,
Recognised by AICTE, New Delhi, Grant-in-Aid by Government of Karnataka,
Accredited by NAAC, New Delhi

Curriculum Structure
and Syllabus
2023-24
II Year B.E.
Electronics and
Communication
Engineering

Department of Electronics and Communication Engineering 1


The National Institute of Engineering 2023-2024

Department of Electronics and Communication


Engineering

Department Vision

Department of Electronics and Communication will be globally recognized that


imparts high quality education and enables innovation, research and teamwork
capabilities to students, whose graduates serve diverse needs of society.

Department Mission

 To design academic curricular and activities to produce competent Electronics


graduates
 To develop acumen to absorb emerging knowledge and to Life-Long Learning
 To provide group activities in the area of Electronics and Communication Engineering
that enable innovation and teamwork
 To interact with professional bodies and corporates in Electronics, Communication
and IT sectors

Program Educational Objectives

PEO1: Function professionally in an international and rapidly changing world due to


the advances in technologies and concepts.
PEO2: Attain technical competence with an aptitude to pursue higher education.

PEO3: Exhibit leadership qualities and professional integrity with social


responsibility in their profession.

Department of Electronics and Communication Engineering 2


The National Institute of Engineering 2023-2024

Programme Outcomes

Engineering Graduates will be able to:

PO1: Apply knowledge of computing, mathematics, science and engineering fundamentals


with emphasis to Electronics and Communication Engineering.

PO2: Develop an aptitude to design, analyze and implement Electronic and Communication
systems for engineering problems.

PO3: Design an Electronics and Communication system, component or process as per needs
and specifications within realistic constraints.

PO4: Design and verify the experimental results to analyze and interpret data.

PO5: Usage of modern tools as Proof of Concept (POC) for system modeling and synthesis as
applied to Electronics and Communication engineering.

PO6: Be aware of economic, health, safety and societal issues in professional engineering
practice.

P07: Understand societal and environmental impacts of engineering problems and provide
sustainable solutions for the same.

PO8: Practice appropriate professional responsibilities and ethics.

PO9: Perform effectively either as a member or a leader in diverse and multidisciplinary


activities.
PO10: Apply effective oral and written communication skills.

PO11: Adapt engineering and managerial skills in project environment.

PO12: Develop confidence for self-education, leading to life-long learning in the context of
ever-changing technology.

Department of Electronics and Communication Engineering 3


The National Institute of Engineering 2023-2024

Programme Specific Outcomes

Our Electronics and Communication Engineering graduates will have the ability to:

 PSO1: Mapping theoretical knowledge to real-world applications in areas like


Communication, Embedded systems, Signal processing, VLSI and related fields

 PSO2: Usage of latest hardware and software/open source tools to solve specific
problems.

 PSO3: To understand environmental, ethical and social responsibilities in career. Pursue


higher education, research or entrepreneurship.

Department of Electronics and Communication Engineering 4


The National Institute of Engineering 2023-2024

Department of Electronics and Communication Engineering 5


The National Institute of Engineering 2023-2024

The following is the blown-up Syllabus for 2nd year UG as per NEP was approved for students admitted in academic year 2023-24.
Scheme for II Year

III Semester
Ability enhancement course (AEC) /Skill enhancement course (SEC)Hours / Week
Teaching Examination Credits

Department (TD)

Question paper
Teaching Hours / Week Self-
Examination Credits

Department (TD)

setting Board
Question paper
setting Board

Teaching
Theory Practical/ study
Theory Practical/ Self-study
Tutorial

(PSB)
Teaching
Sl.
Course Tutorial Lecture Drawing Compon

(PSB)
Course Code Course Title Catego Category
No Course Title ry
Lecture Drawing Component ent
Code
CIE SEE Total SEE Total
L T LP T S P S CIE Marks
Marks Marks Marks Marks Marks
BEC358A
1 BEC301PCB Design Lab Mathematics ECEPCC 0 ECE 0 32 0 0 50 50 100
50 150 100 3
AEC/
BEC358B
2 BEC302 Digital Electronics
Introduction to Biomimicry SEC IPCC
ECE 1 ECE 0 30 0 2 50 50 50
100 150 100 4
3 BEC303 Network Analysis PCC ECE 3 2 0 50 50 100 4
4 BEC304 Analog Electronics PCC ECE 3 0 0 50 50 100 3
5 BECL305 Analog Electronics Laboratory PCCL ECE 0 0 2 50 50 100 1
6 BEC306A Electromagnetic Field Theory ESC ECE 3 0 0 50 50 100 3
7 BSCK307 Social Connect & Responsibility UHV ECE 0 0 2 100 _ 100 1
8 BEC358x Ability enhancement course (AEC) /Skill AEC/SEC ECE If the course is a Theory 50 50 100 1
enhancement course (SEC) 1 0 0
If the Course is a Laboratory
0 0 2
BNSK359 National Service Scheme (NSS) NSS Coordinator 0
BPEK359 Physical Education (PE) Sports & PED
9 MC 0 0 100 _ 100 0
Athletics
BYOK359 Yoga IV Semester
Yoga Teacher 0

Total 550 350 900 20


Teaching

Question

Department of Electronics and Communication Engineering 6


The National Institute of Engineering 2023-2024

Credit
Teaching Hours / Week Examination
s
Sl. Course Theory Tutoria Practical/ Self-study
Course Title Category
No Code Lecture l Drawing Component
CIE SEE Total
L T P S
Marks Marks Marks
1 BEC401 ARM Microcontroller PCC ECE 3 0 0 50 50 100 3
2 BEC402 Linear Integrated Circuits IPCC ECE 3 0 2 50 50 100 4
3 BEC403 Signals Systems PCC ECE 3 2 0 50 50 100 4
ARM Microcontroller PCCL ECE 3 0 0 50 50 100
4 BECL404 3
Laboratory
Hardware Description and ESC ECE 3 0 0 50 50 100
5 BEC405A 3
Verification Language
6 BEC456A ASIC Design Lab AEC/SEC ECE 0 0 2 50 50 100 1
7 BBOK407 Biology for Engineers BSC Chemistry 3 0 0 50 50 100 3
8 BUHK408 Universal Human Values Course UHV ECE 1 0 0 50 50 100 1
BNSK459 National Service Scheme (NSS) NSS Coordinator
BPEK459 Physical Education (PE) Sports & PED
9 Athletics MC 0 0 2 100 _ 100 0
BYOK459 Yoga Yoga Teacher

Total 500 400 900 20

Department of Electronics and Communication Engineering 7


The National Institute of Engineering 2023-2024

Course Code: BEC302 Course: Digital Electronics


Credits: 3:0:2 CIE: 50% Marks
SEE: 50% Marks SEE Hours: 100
Max. Marks:100

Prerequisites if any
Number Systems

Learning  Design various logic gates and simplify Boolean equations.


Objectives  Design various flip flops, shift registers and determining
outputs.
 Design different types of counters.
 Verifying the digital systems using Verilog HDL

Course Outcomes:
On successful completion of the course, the student will be able to:
CO Course Outcomes Bloom’s level
s
CO Apply algebraic and mapping techniques to minimize the Apply
1 hardware in implementation of combinational circuits.
CO Design, analyse and implement of sequential circuits with Analyze
2 timing diagram.
CO Describe the importance of constructing state diagram and Understand
3 state table in implementation of sequential machines.
CO Verify the design of combinational and sequential circuits Apply
4 using Verilog HDL

Mapping with POs and PSOs:


COs PO PO PO PO PO PO PO PO PO PO1 PO1 PO1 PSO PSO PSO
1 2 3 4 5 6 7 8 9 0 1 2 1 2 3
CO 3 2 1 3 2
1
CO 3 3 2 1 3 2
2
CO 3 3 2 1 3 2
3
CO 3 2 1 2 1
4
3 – Strong 2 – Medium 1 – Low
Course Structure
Module – 1 No. of No. of Self
Lectur Tutoria Learnin
e l Hours g

Department of Electronics and Communication Engineering 8


The National Institute of Engineering 2023-2024

Hours Hours
1.1 Revision on Gates and Combinational Circuits, 1 - -
1.2 SYNCHRONOUS SEQUENTIAL CIRCUITS: Flip flops – SR, JK, T, D, 2 - -
Master/Slave FF – operation and excitation tables.
1.3 Triggering of FF, Analysis, and design of clocked sequential circuits 1 - -
1.4 Design – Moore/Mealy models, state minimization, state assignment, 1 - -
circuit implementation
Design of Counters- Ripple Counters, Ring Counters, 2
Shift registers, Universal Shift Register. 1
Module – 2
2.1 ASYNCHRONOUS SEQUENTIAL CIRCUITS: Stable and Unstable 1 - -
states, output specifications, cycles and races, state reduction, race free
assignments,
2.2 Hazards, Essential Hazards, Pulse mode sequential circuits, Design of 1 - -
Hazard free circuits.
2.3 Design Procedure, Design of sequence detector. 3 - -
2.4 more complex design problems, Eliminations of redundant states and 1 - -
techniques.
2.5 Mealy and Moore outputs, design examples, 2
Module – 3
3.1 Basic memory structure – ROM, RAM, Programmable Logic Devices, 2 - -
Programmable Logic Array (PLA) – Programmable Array Logic (PAL) –
Field Programmable Gate Arrays (FPGA).
3.2 Implementation of combinational logic circuits using PLA, PAL and 1 - -
CLB.
3.3 Digital integrated circuits: Logic levels, propagation delay, power 1 - -
dissipation, fan-out and fan-in, noise margin.
3.4 Fundamentals of FPGA architectures: Introduction, FPGA and 1 - -
ASIC Design Flow, Design Methodologies
3.5 Examples for design methodologies, FPGA Architectures 1 - -
3.6 CLB Design for different logic circuits, Basics on IO design, Modules 1
3.7 PLI and FSM based design: Programming Language Interface 1
Module – 4
4.1 Introduction to Verilog and Dataflow descriptions: Program structure, 3 - -
Logic systems
4.2 Nets, Variables and Constants, Vectors and Operators, Arrays, Logical 2 - -
operators, and expressions
4.3 Dataflow Design elements: Continuous assignments, delay specification 1 - -
4.4 expressions, rise, fall, and turn-off delays, Structural description 1 - -
4.5 min, max, and typical delays. 1 - -
Module – 5 Behavioral and structural descriptions
5.1 Behavioral Design elements: Structured procedures, initial and always 1 - -
5.2 blocking and non-blocking statements, 1 - -
5.3 delay control, generate statement, event control 1 - -
5.4 conditional statements, multiway branching, loops, sequential and parallel 1 - -

Department of Electronics and Communication Engineering 9


The National Institute of Engineering 2023-2024

blocks, Simulation, Test benches


5.5 Synthesis and Programs on combinational and sequential circuits, 1 - -
5.6 ASM charts, FSM code development, 1 - -
5.7 Introduction – FSMD, Code development of an FSMD, Design examples, 1 - -
5.8 Example of Sequential circuit FSM synthesis. 1 - -
Total No. of Lecture Hours 40
Total No. of Tutorial Hours 0
Total No. of Self learning Hours 0

Text Books:

1. Mano, Morris. “Digital logic.” Computer Design. Englewood Cliffs Prentice-Hall (1979).
2. M. Morris Mano, Michael D. Ciletti, “Digital Design with an Introduction to the Verilog
HDL”, 5 th Edition.
3. Samir Palnitkar , “Verilog HDL”, Published by Pearson Education 2003.
4. Pong P. Chu, “FPGA Prototyping by Verilog Examples”, Wiley, 2008

Reference Books:
1. Kumar, A. Anand. Fundamentals Of Digital Circuits 2Nd Ed. PHI Learning Pvt. Ltd.,
2009.
2. Taub, Herbert, and Donald L. Schilling. Digital integrated electronics. New York:
McGraw-Hill, 1977.
3. Charles H. Roth, “Fundamentals of Logic Design”, Thomson books / Co. Publications,
5th Edition.
4. Digital Design (Verilog)-An Embedded Systems Approach Using Verilog, 1st Edition -
September 10, 2007.
5. James W. Bignel, Digital Electronics, Cengage learning, 5th Edition, 2007.
6. Comer “Digital Logic & State Machine Design, Oxford, 2012.

Online Resources:
NIL

Digital Design Lab


Simulation, Synthesis and Implementation using Vivado and Artix 7/Zynq 7 Developmental
Boards. Verifying and optimizing the design by analyzing the CLB’s and I/O’s for the given
FPGA board.
1. Logic gates in Structural, Dataflow and Behavioral
2. Combinational Circuits-Adders, Subtractors, MUX, DEMUX and Encoders etc.,
3. Sequential Circuits -F/F’s, Counters

Department of Electronics and Communication Engineering 10


The National Institute of Engineering 2023-2024

4. Sequential circuits-Shift registers


5. Sequential Circuits- FSM based design.
6. RAM/ROM configuration for an application.

Department of Electronics and Communication Engineering 11


The National Institute of Engineering

Sub. Code: BEC303 Course: Network Analysis


Credits:3 L: T: P: S: -3:2:0:0
SEE:50% CIE:50%
SEEHours:3 Max.Marks:100

Pre-requisites if any Basic Electronics & Communication Engineering and Laplace Transform
Learning objectives  Understand DC analysis, Transient Analysis, Sinusoidal Steady Analysis of
electric network.
 Analyse Electrical Network in Phasor-Domain
 Analyse Electrical Network in S-Domain
 Modelling of Two port Electrical Network

Course Outcomes:
On the successful completion of the course, the student will be able to:
Bloom’s
COs Course Outcomes
level
Apply the Nodal, Mesh methods and Network Theorems to understand
CO1 Apply
DC analysis.
CO2 Analyse Transient Behaviour of RC, RL and RLC circuits Analyse
CO3 Analyse RC, RL circuits by using Sinusoidal Steady-Analysis. Analyse
Apply Laplace transforms to perform transient analysis of RL, RC and
CO4 Apply
RLC circuits.
CO5 Analyse two port networks. Analyse

Mapping with Pos and PSOs:


COs PO1 PO2 PO3 PO4 PO5 PO6 PO7 PO8 PO9 PO10 PO11 PO12 PSO1 PSO2 PSO3
CO1 3 2 - - - 2 - - 1 - - 3 3 1 2
CO2 3 2 - - - 2 - - 1 - - 3 3 1 2
CO3 3 3 - - 3 2 - - 1 - - 3 3 1 2
CO4 3 3 - - - 2 - - 1 - - 3 3 1 2
CO5 3 3 - - - 2 - - 1 - - 3 3 1 2
Mapping Strength: Strong – 3 Medium– 2 Low–

Course Structure
No. of No. of
Module1 Lecture Tutorial
Hours Hours
1.1 DC Analysis: Introduction to Circuit Theory, Dependent and 1 0
Independent Sources.

1.2 Ohm’s Law, Kirchhoff’s Current and Voltage Laws, Series and 2 1
Parallel Connected Sources.

Department of Electronics and Communication Engineering 12


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1.3 Nodal and Mesh Analysis 4 2


Module 2
2.1 Superposition, Thevenin’s, Norton Theorem, Maximum Power 3 2
Transfer and Millman's Theorem.
2.2 Transient Analysis: First order Source Free and Source Driven 3 2
RC and RL circuits for DC and AC excitations.
Module 3
3.1 Sinusoidal Steady-Analysis: Phasor analysis or Sinusoidal
Steady-Analysis: Complex forcing function, The Phasor 3 2
relationships for R, L, and C, Impedance and Admittance. Nodal
and Mesh Analysis for RC and RL circuit.
3.2 Resonant circuits: Parallel resonance, frequency – response of 2 0
parallel circuits, Q-factor, Bandwidth.
Module 4
4.1 Circuit Analysis in the S-Domain: Definition of the Laplace
Transform, Laplace Transforms of Simple Time Functions. 1 0
Inverse Transform Techniques.
4.2 The Initial-Value and Final-Value Theorems. Solution of 1 1
networks to step, ramp and impulse functions, transformed
networks and their solution.
4.3 Modelling of Resistor, Inductor and Capacitor in S-Domain. 2 2
Nodal and Mesh Analysis in the s-Domain
Module 5
5.1 Two Port Network Parameters: Y-parameters, Z-parameters, 3 2
ABCD-parameters, h-parameters,
5.2 Relationship between parameters sets. 1 0
Total No.of Lecture Hours 26 -
Total No.of Tutorial Hours 14

Text Book:
1. W. H. Hayt Jr., J. E. Kemmerly, “Engineering Circuit Analysis”, TMH, 6th Edition.

Reference Books:
1. M.E. Van Valkenburg, “Network Analysis”, PHI, 2nd Edition
2. F. F. Kuo, “Network Analysis and Synthesis” Wiley Publications, 2nd Edition.

Department of Electronics and Communication Engineering 13


The National Institute of Engineering 2023-24
Sub. Code: BEC304 Course: Analog Electronics
Credits: 3 L: T: P: S: - 3:0:0:0
SEE: 50% CIE: 50%
SEE Hours: 3 Max. Marks: 100

Prerequisites if any Basic Electronics & Communication Engineering


Learning objectives  Explain the concepts of elementary semiconductor devices, power
electronic devices
 Apply the concepts to compute the DC analysis
 Analyse and design the circuit and comment on its performance
 Implement the specified circuit on simulators and observe its
performance

Course Outcomes:
On the successful completion of the course, the student will be able to

COs Course Outcomes Bloom’s level


CO1 Explain the concepts/ working principle of elementary analog devices, Understand
power electronic devices
CO2 Apply the concepts to compute the DC operating points Apply
CO3 Analyse the Amplifier circuit using the small signal models Analyse
CO4 Implement different amplifiers and determine the performance at different Analyse
frequencies, power efficiency.

Mapping with POs and PSOs:


COs PO1 PO2 PO3 PO4 PO5 PO6 PO7 PO8 PO9 PO10 PO11 PO12 PSO1 PSO2 PSO3
CO1 3 2 1 - 1 - - - 2 - - 2
CO2 3 2 - - - - - - - - - 2
CO3 3 3 3 - - - - - - - - 2
CO4 3 3 3 3 3 - - - - - - 2
Mapping Strength: Strong – 3 Medium – 2 Low – 1

Department of Electronics and Communication Engineering 14


The National Institute of Engineering 2023-24

Course Structure

No. of No. of
Module – 1 Lecture Tutorial
Hours Hours
1.1 Semiconductor Devices- Working principle of PN junction 6 0
diode, diode model, Applications - Clipping circuits, Clamping
circuits.
Bipolar Junction Transistors- working principle, Current
–voltage Characteristics, Different configurations, operating
regions, Field Effect Transistors - Current –voltage
Characteristics
1.2 MOSFET: Device structure and physical operation, operation 3 0
with VDS voltage, operating the MOS transistor in subthreshold
region, current voltage characteristics, MOSFET circuits at DC
conditions
Module 2
2.1 Biasing- Need for biasing, Different biasing circuits- 4 0
self-bias, voltage divider bias
2.2 MOSFET as an Amplifier: Basics for amplifier operation, 4 0
Large signal operation-transfer characteristics, operation as a
linear amplifier, small-signal operations and models,
Applications of MOSFET devices
3.1 Small Signal analysis – at different frequency- low, mid and 4 0
high MOS Amplifier Configurations and its Frequency
Response: The common source amplifier, The common source
amplifier with a source resistance, common Gate amplifier,
Common-Drain or source-follower amplifier.
3.2 Different BJT Amplifier configurations- CB, CC, CE. Applications 4 0
of BJT, Darlington pair
4.1 Feedback Amplifiers: 4 0
Negative Feedback: Voltage series, voltage shunt, current series,
current shunt, Parameters, Advantages and applications of negative
feedback.
4.2 Positive feedback: Oscillators- basic concept, types of oscillators, 4 0
AF oscillators and RF oscillators
5.1 Power Electronics: Basic working principle of SCR, DIAC and its 3 0
current voltage characteristics, applications
5.2 Power Amplifiers: Class of operations, Class A, Class B , push- 4 0
pull amplifier, Complementary symmetry push pull amplifier,
efficiency derivations

Department of Electronics and Communication Engineering 15


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Total No. of Lecture Hours 40
Total No. of Tutorial Hours 0

Text Books:
1. Fundamentals of Microelectronics, BehazadRazavi, John Wiley & Sons, 2021
2. Microelectronics Circuits Theory and applications, Adel S Sedra, Kenneth C Smith,
7th edition Oxford University Press.
3. Microelectronics Circuit Analysis and Design, Donald A. Neaman, 4th edition,
McGraw-Hill, 2010.
4. Power Electronics, P S Bimbra, Khanna Publishers

Reference Books:
1. “Integrated Electronics”, Millman and Halkias, Tata McGraw Hill publications,
New Delhi, 1991Edition
2. “Electronic Circuits”, Nashelsky and Boylested, Prentice hall India, 9th Edition,
2007.
3. “Design of Analog CMOS IC”, Behzad Razavi, McGraw Hill, 2nd Edition, 2017

Code: BECL305 Course: Analog Electronics lab


Credits: 1 L: T: P: S: - 0:0:2:0

Department of Electronics and Communication Engineering 16


The National Institute of Engineering 2023-24
SEE: 50% CIE: 50%
SEE Hours: 3 Max. Marks: 50

Prerequisites Basic Electronics & Communication Engineering, BES lab


if any
Learning 11. Apply the concepts to compute the DC analysis, AC analysis
objectives .and transient analysis

2. Analyse and design the circuit and comment on its


performance
3. Implement the specified circuit on simulators and compare the
simulation results with experiment results
Course Outcomes:
On the successful completion of the course, the student will be able to

COs Course Outcomes Bloom’s


level
CO1 Design, analyse and conduction of Experiments on applications of Analyse
diodes, MOSFET circuits, BJT Oscillators and power amplifiers

Mapping with POs and PSOs:

COs PO1 PO2 PO3 PO4 PO5 PO6 PO7 PO8 PO9 PO10 PO11 PO12 PSO1 PSO2 PSO3 PSO4
CO1 3 3 2 - 1 - - 1 3 1 - 2 3 2 2

Mapping Strength: Strong – 3 Medium – 2 Low – 1

Course Structure
List of Experiments

Department of Electronics and Communication Engineering 17


The National Institute of Engineering 2023-24
1 Design Regulated DC power supply.
2. Design and analyse the different clipping circuits (series, shunt) using PN junction diodes and
compare with the simulation results
3. Design and analyse the different clamping circuits using PN junction diodes and compare with
the simulation results
4. Design and analyse the transfer and drain characteristics of a n-Channel MOSFET and calculate
its drain resistance, mutual conductance and amplification factor
5. Design the voltage divider biasing circuit and analyse the operating point variations with respect
to design parameters
6. Design and analyse the single stage common source amplifier using n- Channel MOSFET for a
given gain & determine bandwidth, Zi, Zo and draw its frequency response.
7. Design and analyse the Hartley and Colpitts oscillator for a given frequency and gain
requirements
8. Design and analyse RC phase shift oscillator for a given frequency and gain requirements
9. Design and analyse the complementary symmetry class B push – pull power amplifier and
calculate the efficiency.
10. LAB Project

Department of Electronics and Communication Engineering 18


The National Institute of Engineering 2023-24
Course Code: BEC306A Course: Engineering Electromagnetics
Credits: 3 L:T:P:S – 3:0:0:0
CIE: 50% Marks SEE: 50% Marks
SEE Hours: 3 Hrs Max. Marks: 100
Vector Calculus
Prerequisites if any
1. To understand of Coulomb’s law, Gauss’s law to find Static electric
field and to understand current and capacitance
2. To understand the concept of potential and to find capacitance of
Learning objectives conductors.
3. To understand the steady magnetic field and magnetic force
4. To understand and analyze the time-varying fields, Maxwell’s
equations, and electromagnetic wave propagation in different media.

Course Outcomes:
On successful completion of the course, the student will be able to:

COs Course Outcomes Bloom’s level


Apply knowledge of Coulomb’s law, gauss law to find
CO1 Static electric field. Apply

Apply the knowledge of potential to find capacitance of


CO2 Apply
conductors.
Apply knowledge of Biot-Savarts law, Ampere’s circuital
CO3 Apply
law to find static magnetic field.
Analyse the effects of time varying electric and magnetic
CO4 field, understand the TEM wave propagation in different Analyze
media.

Mapping with POs and PSOs:

PO PO PO PO PO PO PO PO PO PO PO PO PSO PSO PSO


COs
1 2 3 4 5 6 7 8 9 10 11 12 1 2 3
CO1 3 3 2 2 3 2 3 2
CO2 3 3 2 2 3 2 3 2
CO3 3 3 2 2 3 2 3 2
CO4 3 3 2 2 3 2 3 2

Department of Electronics and Communication Engineering 19


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3 – Strong 2 – Medium 1 – Low

Course Structure

No. of No. of Self


Module – 1 : Static Electric Field, Current and Capacitance Lecture Tutorial Learning
Hours Hours Hours
Static Electric Field: Experimental law of Coulomb, Electric field
1.1 intensity, Electric flux density, Gauss’s law and its applications, 8 0 0
Divergence, Divergence theorem
Module – 2 : Energy and Potential
Energy expended in moving a point charge in an electric field, line
2.1 integral, definition of potential difference and potential, potential field of 7 0 0
point charge and systems of charges, potential gradient.
Module – 3 : Current, Conductors and Capacitance
Current: current and current density, continuity of current
3.1 2 0 0
Conductors: metallic conduction, conductor properties and boundary
3.2 2
conditions
Capacitance: Capacitance, Parallel-Plate Capacitor, Several Capacitance
3.3 4 0 0
Examples
Module – 4 : The Steady Magnetic Field and Magnetic Force
The steady magnetic field: Biot-Savart’s law, Ampere’s circuital law, curl,
4.1 Strokes theorem, magnetic flux and flux density. 4 0 0

Magnetic force: Force on a moving charge and differential current element,


4.2 force between differential current elements, force and Torque on a closed 5 0 0
circuit.
Module – 5 : Time Varying Fields and Electro Magnetic Waves
Faraday’s law, displacement current, Maxwell’s equation in point and integral
5.1 4 0 0
form.
Wave propagation in free space, dielectrics and good conductors. Poynting
5.2 4 0 0
Theorem.
Total No. of Lecture Hours 40
Total No. of Tutorial Hours 0
Total No. of Self learning Hours 0

Department of Electronics and Communication Engineering 20


The National Institute of Engineering 2023-24

Text Books:
1. William.H. Hayt Jr. and John A. Buck, “Engineering Electromagnetics”, Tata McGraw-Hill
publications, 8th edition, 2012.
Reference Books:
1. Mathew N O Sadiku, “Elements of Electromagnetics”, Oxford University Press.
2. John Krauss and David A, “Electromagnetic with applications”,. Fleisch McGrawHill, 5th

edition, 1999.

Department of Electronics and Communication Engineering 21


The National Institute of Engineering, Mysuru 2022-23

Code: BEC358A Course: PCB Design Lab


Credits: 1 L: T: P: S: 0:0:2:0
SEE: 50% CIE:50%
SEE Hours: 2 Max.Marks:50
Prerequisites if Knowledge of analog and digital circuits
any
Learning 1. The need for PCB Design and steps involved in PCB design and
objectives fabrication process.
2. To familiarize schematic and layout design flow using
Electronic Design Automation (EDA) Tools.

Course Outcomes:
On the successful completion of the course, the student will be able to
COs Course Outcomes Bloom’s
level
CO1 Understand the steps involved in schematic, layout, fabrication, and assembly Understand
process of PCB design.
CO2 Design (schematic and layout) PCB for analog circuits, and digital circuits. Analyze
CO3 Design (schematic and layout) and fabricate PCB for simple circuits. Analyze

Mapping with POs and PSOs:


P
PO PO PO PO PO PO PO PO PO1 PO1 PO1 PSO PSO PSO
COs O
2 3 4 5 6 7 8 9 0 1 2 1 2 3
1
CO1 3 2 3 1 1 1 3 3
CO2 3 3 3 3 3 1 1 1 3 3
CO3 3 3 3 3 3 1 1 1 3 3
Mapping Strength: Strong– 3 Medium – 2 Low – 1

Course Structure
No. of No. of No. of
Lectur Tutori Practical
e al Hours
Hours Hours
1 Introduction to PCB design steps of Schematic design, layout
2
design, create new schematic components and component footprint.
2 Regulator circuit using 7805 2

Department of Electronics and Communication Engineering 22


The National Institute of Engineering, Mysuru 2022-23

3 Full-wave Rectifier 2
4 Astable multivibrator using IC555 2
5 Monostable multivibrator using IC555 2
6 Full-Adder using half-adders. 2
7 Design an 8051-development board having serial communication 2
section consisting of Max232 capacitor, DB9 connector, jumper,
and LED.
8 Fabricate single-sided PCB, mount the components, and assemble 2
in a cabinet for any one of the circuits mentioned above. - 1
9 Fabricate single-sided PCB, mount the components, and assemble 2
in a cabinet for any one of the circuits mentioned above. - 2
10 Identification of various types of PCB and soldering techniques 2
Total No. of Tutorial Hours 0 -
Total No. of Practical Hours 20

Tools: OrCAD/NI Multisim/ Proteus 8/ TINAPRO/KiCad


Text books:

1. Printed Circuit Board by RS Khandpur, Tata McGraw Hill Education Pvt Ltd., New
Delhi
2. Electronic Product Design Volume-I by S D Mehta, S Chand Publications
3. Open source EDA Tool KiCad Tutorial: http://kicad-pcb.org/help/tutorials/
4. PCB Fabrication user guide page: http://www.wikihow.com/Create-Printed-Circuit-
Boards
5. PCB Fabrication at home(video): https://www.youtube.com/watch?v=mv7Y0A9YeUc,
6. https://www.youtube.com/watch?v=imQTCW1yWkg

Department of Electronics and Communication Engineering 23


The National Institute of Engineering, Mysuru 2022-23

Sub. Code: BEC358B Course: Introduction to Biomimcry


Credits: 3 L: T: P: S : 3:0:0
SEE: 50% CIE: 50%
SEE Hours: 3 Max. Marks: 100
Prerequisites if NIL
any
Learning 1. How to Learn from Nature
objectives 2. Build Sustainable solutions using Nature as a Teacher

Course Outcomes:
On the successful completion of the course, the student will be able to
CO Course Outcomes Bloom’s
s level
CO Understand the core principles and philosophy of Nature and how to learn from Understand
1 nature
CO Understand and be able to apply the Biomimicry approach in order to solve Apply
2 problems/innovate in especially in the fields of design, engineering and
business
CO Understand the concepts of nature’s deep patterns/life’s overarching principles Understand
3 & how these can inform the design of better and sustainable solutions

Mapping with POs and PSOs:


PO PO PO PO PO PO PO PO PO PO1 PO1 PO1 PSO PSO PSO
COs
1 2 3 4 5 6 7 8 9 0 1 2 1 2 3
CO 2 3 1 2 2 1 2 1 2 3
1
CO 2 3 1 2 2 1 2 1 2 3
2
CO 2 3 1 2 2 1 2 1 2 3
3
Mapping Strength: Strong– 3 Medium – 2 Low – 1

Course Structure
No. of No. of No. of
Lectur Tutoria Practical
e l Hours Hours
Hours

Department of Electronics and Communication Engineering 24


The National Institute of Engineering, Mysuru 2022-23

Module – 1
1. Introduction to Biomimicry - Overview of difference in Biomimicry, 1 - -
1 Biophilia, bio-morphism, bio-utilization. Principles and methodology,
1. Principles of Biomimicry- How to do Biomimicry?, Learning resources,
1 - -
2 skills attitude for Biomimicry
1. Examples and Inspirational Information
2 - -
3
1. Design Challenge and presentation by groups
2
4
1. UN Sustainability development goals
1
5
Module – 2
2. MIMIC – Motivate, Investigate, Match, Innovate and Communicate 1 - -
1
2. Collaborate to create a biomimicry solution, inspired by a biological model. 1
2
2. Demonstrate science and engineering practices and an understanding of 1
3 STEM
concepts.
2. Collaborate to present what they designed and how they designed it to an 3
4 authentic audience. Defend how their solution contributes to addressing
their respective chosen Sustainable Development Goal (SDG).
Total No. of Theory Hours 13
Total No. of Tutorial Hours 0 -
Total No. of Practical Hours 0

Suggested Learning Resources:

1. Biomimicry: - Innovation Inspired by Nature – Janine M. Benyus


2. https://biomimicry.org
3. https://asknature.org

Department of Electronics and Communication Engineering 25


The National Institute of Engineering, Mysuru 2022-23

Code: BEC401 Course: ARM Microcontrollers


Credits: 3 L: T: P: S: - 3:0:0:0
SEE: 50% CIE: 50%
SEE Hours:3 Max. Marks: 100

Prerequisites if any Digital Electronics & Computer Architecture


Learning objectives 1. Understand the basic hardware components and their selection
method based on the characteristics and attributes of an Embedded
System.
2. Describe the architectural features and instructions of 32-bit ARM
Cortex M3 microcontroller.
3. Understand the programming of different microcontrollers in
different programming languages using different software
development tools on different operating system platform
4. Understand various Sensors, Actuators & Interfacing Modules with
different processors and controllers Boards
5. Understand the development of embedded system applications
programming using ARM Cortex based Microcontrollers

Course Outcomes:
On the successful completion of the course, the student will be able to

COs Course Bloom’s


Outcomes level
CO1 Describe the ARM processor architecture features Understand

Department of Electronics and Communication Engineering 26


The National Institute of Engineering, Mysuru 2022-23

CO2 Develop assembly language programs to perform specific tasks using Analyze
ARM instructions.
CO3 Develop ARM microcontroller peripherals applications using Embedded Analyze
C language.
CO4 Develop ARM microcontroller communication protocols applications Analyze
using Embedded C language.
CO5 Design and develop program to interface external hardware with Apply
LPC17XX microcontroller.

Mapping with POs and PSOs:

COs PO PO PO PO PO PO PO PO PO PO1 PO1 PO1 PSO PSO PSO


1 2 3 4 5 6 7 8 9 0 1 2 1 2 3
CO1 3 2 1 - - - - - - - - - 3 1 1
CO2 1 2 3 2 2 - - - - - - - 3 2 2
CO3 1 2 3 2 2 - - - - - - 3 2 2
CO4 1 2 3 2 2 - - - - - 2 - 3 2 2
CO5 1 2 3 3 2 1 - - 3 2 2
Mapping Strength: Strong – 3 Medium – 2 Low – 1

No. of No. of
Module – 1 Lecture Tutor
Hours ial
Hours
1. ARM Embedded Systems and ARM Processor fundamentals:
Introduction to Microprocessors, Microcontrollers and Embedded 8 0
Systems, ARM Technology Overview and Design Philosophy,
ARM Processor Families, ARM Processor Embedded System
Hardware and Software, ARM Memory Mapping, ARM
Processor Modes, ARM Registers Set, ARM Core Data Flow
Model, Stack Operation, Pipeline-Characteristics, Exceptions,
Interrupts and Vector Table.
Module 2

Department of Electronics and Communication Engineering 27


The National Institute of Engineering, Mysuru 2022-23

2. ARM Processor Instruction Sets and Programming: Data


Processing Instructions, Data Transfer Instructions, Control Flow 8 0
Instructions, Conditional Execution, Introduction to THUMB,
Differences between ARM and THUMB, Bit-Banding, General
Structure of ARM Assembly Module and Assembler Directives,
ARM ALP Example Programs.

Module – 3
3 ARM Microcontroller Peripherals and Programming:GPIOs
. Configuration, Timers, SysTick Timers, Watch Dog Timers, NVIC 8 0
Controller, PWMs, RTC, PLL, DAC, ADC and Other System
Control Units, ARM Microcontroller Peripherals Embedded C
Example Programs
Module – 4
4 ARM Microcontroller Communication Protocols and
. Programming: UARTs, Wireless Technologies, I2C, SPI and 8 0
CAN Protocols Specification, Configuration, Peripherals and
Modules, ARM Microcontroller Communication Protocols
Embedded C Example Programs
Module – 5
5 ARM Microcontroller Interfacing and Programming:
. Interfacing IO devices and its type – LEDs, Switches, Buzzer, 8 0
Seven Segment Display, LCD (4 bit, 8 bit Mode), Keypad (4*4),
DC Motor, Stepper Motor, Servo motor, Relay, Analog Sensors
and its Types- Ultrasonic Sensor, Temperature, Humidity, Soil
Moisture Sensor, PIR sensor
Total No. of Lecture Hours
40
Total No. of Tutorial Hours 0

Text books:
1. The Definitive Guide to ARM Cortex M3, 2nd Edition by Joseph Yiu.
2. ARM System Developer’s Guide By Andrew N Sloss, Dominic Symes, Chris Wright
3. LPC17XX User Manual
Reference books:
1. ARM System-On-Chip Architecture by Steve Furber, Addison Wesley, Pearson
Education, 2nd edition.
2. ARM ASSEMBLY LANGUAGE Fundamentals and Techniques, William Hohl,
Christopher Hinds, 2nd Edition, CRC Press, 2015.

Department of Electronics and Communication Engineering 28


The National Institute of Engineering, Mysuru 2022-23

3. ARM Assembly Language an Introduction, Gibson Second Edition, 2007.

Department of Electronics and Communication Engineering 29


The National Institute of Engineering, Mysuru 2022-23

Course Code: BEC402 Course: Linear Integrated Circuits


Credits: 4 L: T: P: S – 3:0:2 :0
CIE: 50% Marks SEE: 50% Marks
SEE Hours: 3 Hrs Max. Marks: 100
Prerequisites if any Analog Electronics, Network Theory
1. To understand the design procedure of a MOSFET-based single-stage
and a two-stage differential amplifier.
Learning objectives 2. To understand the working of various Op Amp-based circuits.
3. To understand the working principle and applications of some special
function ICs.

Course Outcomes:
On successful completion of the course, the student will be able to:
COs Course Outcomes Bloom’s level
Understand and analyse single and two-stage differential
CO1 Analyse
amplifiers.
Understand and apply the concepts the of various
CO2 Apply
applications of Op Amp.
CO3 Acquire basic knowledge on several special function ICs. Understand
Verify the design of various linear & non-linear
CO4 applications of Op-Amps, Multivibrators, Voltage Apply
Regulators and Phase Locked Loop.

Mapping with POs and PSOs:

COs PO1 PO2 PO3 PO4 PO5 PO6 PO7 PO8 PO9 PO10 PO11 PO12 PSO1 PSO2 PSO3
CO
3 3 3 1 3 1
1
CO
3 3 3 1 3 1
2
CO
3 3 3 1 3 1
3
CO
3 2 1 2 1 1
4

3 – Strong 2 – Medium 1 – Low

Department of Electronics and Communication Engineering 30


The National Institute of Engineering, Mysuru 2022-23

Course Structure

No. of No. of
Module – 1 :CMOS Operational Amplifiers Lecture Tutoria
Hours l Hours
Basic Differential Amplifier– ID - VID Characteristics, DC
Gain, Input Common Mode Range (ICMR), Common Mode
1.1 5 0
Rejection Ratio (CMRR), Slew Rate, Output Voltage Swing,
Frequency response, Differential Amplifier with active loads.
Two stage Amplifier – DC Gain, ICMR, Slew Rate, Output
1.2 4 0
Voltage Swing, Frequency response.
Module – 2: Applications of Operational Amplifiers
2.1 741 Op-Amp – Pin diagram, Parameters 1 0
Applications – Integrator, Differentiator, Comparator,
2.2 Schmitt Trigger, Precision Rectifiers, Instrumentation 7 0
Amplifiers, Log and Antilog Amplifiers, Clippers, Clampers.
Module – 3 : Active Filters
3.1 First order Filters – Low Pass and High Pass Filters 2 0
Second order Filters – Low Pass and High Pass Filters
3.2 (Butterworth) 5 0
Narrow Band Pass Filter, Notch Filter, All Pass Filter,
3.3 Biquad Filter Topology 1 0
Module – 4: Data Converters
Fundamentals – Transfer Characteristics, Offset Error, Gain
4.1 Error, Integral Non-Linearity, Differential Non-Linearity, 4 0
Quantization Error, Signal to Noise Ratio, Dynamic Range
4.2 DAC Architectures – R-2R DAC, Charge Scaling DAC 2 0
4.3 ADC Architectures – Flash ADC, SAR ADC 2 0
Module – 5 :Special Function ICs
5.1 Multivibrators – Astable and Monostable using 555 IC 2 0
Voltage Regulators (78XX and 79XX) – Three terminal
5.2 2 0
fixed & adjustable voltage regulators.
Phase Locked Loop (565 IC) – Basic principle, Phase
5.3 detector/Comparator, Voltage Controlled Oscillator (566 IC), 3 0
Low Pass Filter, Lock-in Range, Capture Range.

Department of Electronics and Communication Engineering 31


The National Institute of Engineering, Mysuru 2022-23

Total No. of Lecture Hours 40


Total No. of Tutorial Hours 0

Text Books:

1. Adel S Sedra and Kenneth C Smith, “Microelectronics Circuits Theory and


Applications”, 7th edition, Oxford Publishers.
2. Ramakant A. Gayakwad, “Op-Amps and Linear Integrated Circuits”, 4th edition,
PHI.
3. Behzad Razavi, “Design of Analog CMOS Integrated Circuits”, McGrawHill, 2002.
Reference Books:
1. D. Roy Choudhury and Shail B. Jain, “Linear Integrated Circuits”, 4th edition, New
Age Techno Press.
2. Phillip E. Allen and Douglas R. Holberg, “CMOS Analog Circuit Design”, 2nd
edition, Oxford University Press.
3. R. Jacob Baker, Harry W. Li and David E. Boyce, “Principles of Data Conversion
System Design”, 1995.

Department of Electronics and Communication Engineering 32


The National Institute of Engineering, Mysuru 2022-23

Linear Integrated Circuits Laboratory

Laboratory Experiments:
1. Design and verify the working of an Op-Amp based Integrator and Differentiator.
2. Design and verify the working of an Op-Amp based Comparator and Schmitt Trigger.
3. Design and verify the working of an Op-Amp based Precision Rectifiers.
4. Design and verify the working of an Op-Amp based Instrumentation Amplifier.
5. Design and verify the frequency response of various Op-Amp based Filters.
6. Design and verify the transfer characteristics of Op-Amp based Flash ADC and R-2R
DAC.
7. Design and verify the working of various Op-Amp based Waveform Generators.
8. Design and verify the working of an Astable and a Monostable multivibrators using
555 timer IC.
9. Design and verify the regulation characteristics of Voltage Regulators (78XX. 79XX).
10. Design and verify the working of Phase Locked Loop (NE565 IC).
11. Implement a project based on any of these topics

Department of Electronics and Communication Engineering 33


The National Institute of Engineering, Mysuru 2022-23

Course Code: BEC403 Course: Signals and Systems


Credits: 4 L: T: P:S: 3:2:0:0
CIE: 50% Marks SEE: 50% Marks
SEE Hrs. 3 Hrs. Max. Marks: 100

Prerequisites if any None


Learning objectives 1. To understanding the basic characteristics of signals and
systems in both continuous time and discrete time.
2. To Develop mathematical skills to analyse and solve the
problems involving convolution, filtering, and sampling.
3. To provide insights into advanced subjects like digital signal
processing, Digital Image Processing, communication system
and control systems through different transformation
techniques (Fourier Transforms and Z-Transform).

Course Outcome:
On successful completion of the course, the students will be able to
CO Course Outcomes Bloom’s level
s
understand CT and DT signals and systems using
CO mathematical model. Understand
1

CO apply mathematical equations for the representation of LTI Apply


2 systems
apply various transformation technique to analyse and solve Analyse
CO an efficient signal processing and Linear Time Invariant (LTI) and apply
3 Systems.

Mapping with POs and PSOs:


COs PO1 PO2 PO3 PO4 PO5 PO6 PO7 PO8 PO9 PO10 PO11 PO12 PSO1 PSO2 PSO3
CO1 3 3 3 3 3 2
CO2 3 3 3 3 3 2
CO3 3 3 3 3 3 2
3 – Strong 2 – Medium 1 – Low
Course Structure

No. of No. of
Module – 1
Lecture Tutorial
Introduction to Signals: 8 Hrs
Hours Hours

Department of Electronics and Communication Engineering 34


The National Institute of Engineering, Mysuru 2022-23

1.1 Definitions of signal 1


1.2 classification of signals 2 2
1.3 Basic elementary signals 2
1.4 Basic operations on signals 3
Module – 2
Introduction to Systems: 8 Hrs
2.1 Definitions of system 1
2.2 Properties of systems 2
2
2.3 Systems viewed as interconnections of operations 1
2.4 Difference equations 2
2.5 Block diagram representations of a LTI system 2
Module 3:
LTI System: 8 Hrs
3.1 Introduction to Impulse response representation, 1
3.2 Convolution- convolution sum, 2
3.3 Properties of convolution sum 2
3
3.4 Properties of impulse response representation 2
3.5 Step Response of LTI system 1
Module 4:
Fourier and Z-transforms for Signals: 8 Hrs
4.1 Fourier representation: Fourier representations for four
signal classes, orthogonality of complex sinusoidal 1
signals
4.2 Properties of Fourier representations (Only DTFS) 1
4.3 Discrete-Time-Fourier-Series representations (DTFS) 1
4.4 Discrete-Time-Fourier-Transform representations
2 3
(DTFT)
4.5 Z-transform: Properties of ROC, Inverse Z-transform 2
4.6 2
transforms analysis of LTI systems, transfer function,
stability, and causality

Module 5:
Sampling and Reconstruction: 8 Hrs
5.1 Sampling of Continuous time signals and reconstruction
2
of Continuous time signals from samples
5.2 Sampling Theorem, Aliasing, and its effects. 2
5.3 Applications: Different Types of sensors for signal
2 2
processing applications,
5.4 Interfacing of the sensors and actuators, Biomedical
Signal (ECG) storage and its analysis using tools like 2
Arduino/Lab view/HRV/ELVIS/MATLAB.

Department of Electronics and Communication Engineering 35


The National Institute of Engineering, Mysuru 2022-23

Total no of lecture hours 40 -


Total no of Tutorial hours - 12

Textbook:
2. “Signals and Systems”, Simon Haskin and Barry Van Veen, John Wiley and Sons, Ed
-2, John Wiley, Indian Ed, 2008, Reprint 2012.

Reference Books:
1. “Signals and Systems: Analysis of signals through Linear Systems”, Michel J
Roberts, Tata McGraw Hill, 2004.
3. “Signals and Systems”, Alan V. Oppenheim, Alan S. Willsky and S. Hamid Nawab,
Pearson Education Asia, 2nd Edition, 2014.

Web Material:
1. NPTEL lecture Video on Signals and Systems by Prof. S. C. Dutt Roy,
http://www.satishkashyap.com/2012/04/iit-video-lectures-on-signals-and.html
2. http://www.scilab.org/
3. https://octave-online.net/ and http://www.gnu.org/software/octave/
4. http://www.vlab.co.in
5. http://www.arduino.cc

Department of Electronics and Communication Engineering 36


The National Institute of Engineering, Mysuru 2022-23

Code:BECL404 Course: ARM Microcontrollers lab


Credits:1 L: T: P: S: -0:0:2:0
SEE: 50% CIE: 50%
SEE Hours: 3 Max. Marks: 50

Prerequisites if any Digital Electronics, Computer Architecture and C Lab

Learning objectives 1. Understanding the set of the assembly language instructions and
assembly language programming structure.
2. Understanding the embedded C language program structure, analyse
and debugging the programming logic.

Course Outcomes:
On the successful completion of the course, the student will be able to
COs Course Bloom’s
Outcomes level

CO1 Develop and implement assembly level language programs for ARM Analyze
CortexM3 based LPC17xx microcontroller using Keil software tool.

CO2 Design and implement Embedded System applications using Embedded C Apply
language for ARM CortexM3 based LPC17xx microcontroller.

Mapping with PO’s and PSO’s:


Cos PO1 PO2 PO3 PO4 PO5 PO6 PO7 PO8 PO9 PO10 PO11 PO12 PSO1 PSO2 PSO3

CO1 1 2 3 2 2 - - 1 3 1 - 2 3 2 2

CO2 1 2 3 2 2 - - 1 3 1 - 2 3 2 2

Mapping Strength: Strong – 3 Medium – 2 Low – 1

Department of Electronics and Communication Engineering 37


The National Institute of Engineering, Mysuru 2022-23

Course Structure
PART-A

Sl. Develop and demonstrate the following operation with the help of a suitable program in ALP
No using ARM Cortex M3 Evaluation board and the required software tool

1 Data transfer operations

2 Arithmetic operations

3 Logical operations

4 Code Conversions

Part - B

Sl. Conduct the following experiments on an ARM CORTEX M3 evaluation board using
Embedded 'C' & Keil Micro vision (Keil µvision) tool / compiler.
No

1 Interface a simple Switch and display its status through Relay, Buzzer and LED.

2 Display the Hex digits 0 to F on a 7-segment LED interface, with an appropriate delay in
between.

3 Interface a 4x4 keyboard and display the key code on an LCD.

4 Interface DC Motors, Stepper Motor, and Servo Motor rotate clockwise, anticlockwise and
in angle (45o, 90o, 180o).

5 Generate different delay using Timers and count external pulses using counters

6 Generate an Interrupt process and demonstrate the use of an external interrupt to toggle an
LED On/Off.

7 Using the Internal PWM module of ARM controller generate PWM and vary its duty cycle
to Speed Control of DC motor and to change the intensity of Light.

8 Generate non-sinusoidal and sinusoidal waveforms with variable amplitude and frequency
using internal DAC.

9 Display output for given analog input using internal ADC. (Use of Analog Sensors like
Ultrasonic Sensor, Temperature, Humidity, Soil Moisture Sensor, PIR sensor)

10 Interface Bluetooth Module, GPS module, GSM module, RF module and RFID cards to
send & receive Data using internal UARTs.

Department of Electronics and Communication Engineering 38


The National Institute of Engineering, Mysuru 2022-23

Course Code: BEC405A Course: Hardware Description and Verification Language.


Credits: 3 L:T:P:S: 3:0:0:0
CIE: 50% Marks SEE: 50% Marks
SEE Hours: 100 Max. Marks:100

Prerequisites if any Number Systems

Learning 1.To know the basic language features of Verilog HDL and the role of
Objectives HDL in digital logic design.
2.To know the behavioral modeling of combinational and simple
sequential circuits.
3. To know the synthesis of combinational and sequential descriptions.
4. To know the architectural features of programmable logic devices.
5. To understand the verification of digital systems using System
Verilog.
6. To know the basic constructs of advanced HDL and HVL techniques.

Course Outcomes:
On successful completion of the course, the student will be able to:
CO Course Outcomes Bloom’s level
s
CO Design and verify the digital circuit by mean of Computer Analyze
1 Aided Engineering tools which involves programming with
the help of Verilog HDL.
CO Develop the System Verilog codes and test benches for Apply
2 digital system design and verification.
CO Construct the constrained random tests and functional Apply
3 coverage for verification.
CO Study the basic constructs of Chiesel, MyHDL and PyMTL. Understand
4

Mapping with POs and PSOs:


COs PO PO PO PO PO PO PO PO PO PO1 PO1 PO1 PSO PSO PSO
1 2 3 4 5 6 7 8 9 0 1 2 1 2 3
CO 3 3 2 2 1 2 2 3 2 1
1
CO 3 3 2 2 1 2 2 3 2 1
2
CO 3 3 2 2 1 2 2 3 2 1
3
CO 3 3 2 2 1 2 2 3 2 1
4
CO 2 2 1 1 1 1 1 1 1 1
5

Department of Electronics and Communication Engineering 39


The National Institute of Engineering, Mysuru 2022-23

3 – Strong 2 – Medium 1 – Low


Course Structure
No. of No. of Self
Lectur Tutoria Learnin
Module – 1: Verilog: Tasks and Functions
e l Hours g
Hours Hours
1.1 Review on Basics of Verilog, Tasks, Functions and Advanced constructs: 2 - -
Tasks,
1.2 Functions, Differences Between Tasks and Functions, 1 - -
1.3 Procedural Continuous Assignments, Overriding Parameters, 1 - -
1.4 Conditional Compilation and Execution 1 - -
1.5 Time Scales, Useful System Tasks 1 - -
1.6 Timing and delays, Verification of Gate-Level Netlist. 1 - -
1.7 The verification process, basic test bench functionality, test bench 1 - -
components
Module – 2: Introduction to System Verilog
2.1 Data Types: Built in Data types, fixed and dynamic arrays 1 - -
2.2 Queues, associative arrays, linked lists, array methods. 1 - -
2.3 choosing a storage type, Procedural statements, Tasks, Functions and void 2 - -
functions,
2.4 Routine arguments, returning from a routine, time values, 1 - -
2.5 Separating the test bench and design, the interface construct, Stimulus 2 - -
timing, Interface driving and sampling, Synthesis guidelines for interface
methods
2.6 System Verilog assertions. 1 - -
Module – 3: Randomization and IPC
3.1 Introduction, Randomization in System Verilog 1 - -
3.2 Constraint details, Solution probabilities, Valid constraints 1 - -
3.3 In-line constraints, Random number functions, Common randomization 2 - -
problems,
3.4 Iterative and array constraints, Random control. 1 - -
3.5 Working with threads, Disabling threads, Interprocess communication, 3
Building a test bench with threads and Interprocess Communication,
Module – 4:Coverage and complete Design Modeled with SV
4.1 Coverage types, Coverage strategies, Simple coverage example 2 - -
4.2 Anatomy of Cover group and Triggering a Cover group, Coverage 2 - -
options.
4.3 SV ATM example, Data abstraction, Interface encapsulation, Design top 4 - -
level, Receivers and transmitters, Testbench.
Module – 5: Advanced Hardware Description Languages
5.1 Chisel: Basic Components: Signal Types and Constants, building 3 - -
Combinational and Sequential Circuits, Structure with Bundle and Vec,
Wire, Reg, and IO, Chisel Generates Hardware, Writing simple examples
and testing.

Department of Electronics and Communication Engineering 40


The National Institute of Engineering, Mysuru 2022-23

5.2 MyHDL-Introduction to MyHDL, Signals and concurrency, Parameters, 2 - -


ports and hierarchy: create a higher-level function with four instances of
the lower-level functions.
5.3 PyMTL: Why PyMTL, The PyMTL Workflow, PyMTL basics which 3 - -
serve as the foundation for productive multi-level modeling and VLSI
design, hardware implementation of a variant of Fletcher's checksum
algorithm, Modeling Processors in PyMTL, Multi-Level Composition in
PyMTL.
Total No. of Lecture Hours 40
Total No. of Tutorial Hours 0
Total No. of Self learning Hours 0

Text Books:

1. Samir Palnitkar , “Verilog HDL”, Published by Pearson Education 2003.


2. Chris Spear, “System Verilog for Verification – A guide to learning the Test bench
language features”, 2nd Edition, Springer Publications, 2010.
3. Pong P. Chu, “FPGA Prototyping by Verilog Examples”, Wiley, 2008
4. Digital Design with Chisel, Martin Schoeberl, 3rd edition, Kindle Direct Publishing.
5. http://www.myhdl.org/
6. J. Decaluwe. MyHDL: A Python-based Hardware Description Language. Linux journal,
2004(127):5, Nov. 2004.
7. https://www.csl.cornell.edu/courses/ece4750/handouts/ece4750-tut3-pymtl.pdf
8. https://www.csl.cornell.edu/pymtl2019/

Reference Books:
1. Lattice Semiconductor Corporation, “A verilog HDL Testbench Primer”, 1999
2. Ming Bo Lin, “Advanced Digital Design using Verilog HDL”, TMH, 2008
3. Clive Maxfield, “The Design Warrior’s Guide to FPGAs”, Mentor Graphics-Xilinix,
Elsevier, 2004.
4. Stuart Sutherland, Simon Davidmann, Peter Flake, “System Verilog for Design A
guide to using system Verilog for Hardware design and modelling”, 2nd Edition,
Springer Publications, 2006.
5. Stuart Sutherland, “RTL modeling with System Verilog for simulation and synthesis:
using System Verilog for ASIC and FPGA design” Tualatin, 2017

Department of Electronics and Communication Engineering 41


The National Institute of Engineering, Mysuru 2022-23

Course Code: BEC456A Course: ASIC Design Lab


Credits: L:T:P:S: 0:0:2:0
CIE: 50% Marks SEE: 50% Marks
SET Hours: 2Hr Max. Marks:25

Prerequisites if any Number Systems

Learning To know the basic language features of different HDL/HVL and


Objectives the role of HDL/HVL in digital logic design.

Course Outcomes:
On successful completion of the course, the student will be able to:
COs Course Outcomes Bloom’s level
CO Understand the ASIC flow to Simulate, Synthesis and to Understand
1 Implement (Physical Design) for digital IC design.
CO Analyze the test benches using System Verilog codes for Analyze
2 digital system design.

Mapping with POs and PSOs:


COs PO PO PO PO PO PO PO PO PO PO1 PO1 PO1 PSO PSO PSO
1 2 3 4 5 6 7 8 9 0 1 2 1 2 3
CO 3 3 2 2 2 2 2 2 2 3 2
1
CO 3 3 2 2 2 2 2 2 2 3 2
2
3 – Strong 2 – Medium 1 – Low

Course Structure

No. of No. of Self


Lectur Tutoria Learnin
Part-A
e l Hours g
Hours Hours
Simulate, Synthesis and Implement(Physical Design) (using NC Sim, Genesis and Innovous tools) following circuit
by HDL based design entry using Cadence tool (ASIC/SoC flow).
Exp 1 Combinational Circuits- adders (min 8 bit) and multipliers (4 bit min). - - 2
Exp 2 Sequential Circuits- 4 bit Synchronous and Asynchronous Counter - - 2
Exp 3 Implementation of FSM based design for 4-way 2 line traffic light - - 2
controller
Part-B
Write the SV code for the following and execute using any EDA tool like CADENCE.
Exp 4 Write the test bench using SV for FSM based 4-way 2 line traffic light 2
controller DUT.
Exp 5 Evaluate the test vectors using randomization technique in SV for FSM 2
based 4-way 2 line traffic light controller DUT.

Department of Electronics and Communication Engineering 42


The National Institute of Engineering, Mysuru 2022-23

Exp 6 Design the interfaces in SV for FSM based 4-way 2 line traffic light 2
controller DUT.
Total No. of Lecture Hours 0
Total No. of Tutorial Hours 0
Total No. of Self learning Hours 12

Books:
1. Samir Palnitkar , “Verilog HDL”, Published by Pearson Education 2003.
2. Chris Spear, “System Verilog for Verification – A guide to learning the Test bench
language features”, 2nd Edition, Springer Publications, 2010.
3. JanickBergeron, “Writing Test Benches: Functional Verification of HDL Models”, 2nd
edition Kluwer Academic Publishers, 2003, ISBN 1-4020-7401-8.
4. T R. Padmanabhan, “Design through VERILOG HDL”, IEEE Press and John Wiley
and Sons, 2004

Department of Electronics and Communication Engineering 43

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