1) Calculate 1.666015625 X 10o (1.

9760 X 104 + -1,9744 X 104) by hand, assuming each of the

values are stored in the 16-bit half-precision format assume 1 guard, 1 round bit, and 2 sticky
bit and round to the nearest even. Show all the steps and write your answer in both the 16-
bit floating point format and in decimal.

Answer:

Consider the following sequence of instructions:

or r1, r2, r3
or r2, r1, r4
or r1, r1, r2
Also assume the following cycle times for each of the options related to forwarding
Without forwarding 250ps
With Full Forwarding 300ps
With ALU-ALU Forwarding Only 290ps

Answer
n a pipelined processor, data hazards may occur when an instruction depends on the result of a
previous instruction that has not yet been completed. Forwarding, also known as data forwarding
or data hazards forwarding, is a technique used to alleviate these hazards by forwarding the data
directly from the producer stage to the consumer stage without going through the memory.

Let's analyze the given sequence of instructions:

or r1, r2, r3
or r2, r1, r4
or r1, r1, r2
Assuming a 4-stage pipeline (IF - Instruction Fetch, ID - Instruction Decode, EX - Execute, WB -
Write Back), let's analyze the dependencies and forwarding possibilities for each instruction:

or r1, r2, r3:

No dependencies on previous instructions.

Cycle time: Without forwarding (250ps)
or r2, r1, r4:

Depends on the result of the first instruction (or r1, r2, r3).
Forwarding can be applied from EX stage of the first instruction to the ID stage of the second
instruction.
Cycle time: With Full Forwarding (300ps) or With ALU-ALU Forwarding Only (290ps)
or r1, r1, r2:

Depends on the result of the second instruction (or r2, r1, r4).
Forwarding can be applied from EX stage of the second instruction to the ID stage of the third
instruction.
Cycle time: With Full Forwarding (300ps) or With ALU-ALU Forwarding Only (290ps)
So, the overall cycle time for this sequence of instructions with forwarding would be determined
by the instructions with dependencies, and either Full Forwarding or ALU-ALU Forwarding Only can
be used depending on the nature of the forwarding paths available in the processor.

The cycle time would be 300ps with Full Forwarding and 290ps with ALU-ALU Forwarding Only.

Using a table, calculate 37 divided by 5. You should show the contents of each register on each
step. Assume both inputs are unsigned 5-bit integers.
| Step | A | Q | M | Q0 | Comment |
|------|--------|---------|---------|--------|-----------------------------|
| 0 | 00000 | 100101 | 00101 | | Initial values |
| 1 | 00000 | 10010 | 00101 | 1 | Subtract and shift (Q0 = 1) |
| 2 | 00001 | 00101 | 00101 | 0 | Subtract and shift (Q0 = 0) |
| 3 | 00001 | 00010 | 00101 | 1 | Subtract and shift (Q0 = 1) |
| 4 | 00010 | 01001 | 00101 | 0 | Subtract and shift (Q0 = 0) |
| 5 | 00010 | 00100 | 00101 | 1 | Subtract and shift (Q0 = 1) |
| 6 | 00011 | 00010 | 00101 | 0 | Subtract and shift (Q0 = 0) |
| 7 | 00011 | 00001 | 00101 | 1 | Subtract and shift (Q0 = 1) |
| 8 | 00100 | 10001 | 00101 | 0 | Subtract and shift (Q0 = 0) |
| 9 | 00100 | 01000 | 00101 | 1 | Subtract and shift (Q0 = 1) |
| 10 | 00101 | 00100 | 00101 | 0 | Subtract and shift (Q0 = 0) |

Here's a step-by-step explanation:

Initial values: A is initialized to 0, Q has the dividend (37), M has the divisor (5), and Q0 is initially
empty.

Subtract and shift (Q0 = 1): Subtract M from the partial remainder (Q) and shift Q to the left. Q0 is
set to 1 because the subtract operation was successful.

Subtract and shift (Q0 = 0): Continue the process - subtract M from the updated Q and shift Q to
the left. Q0 is set to 0 this time.

Repeat: Continue this process until 10 steps are completed. At the end, the contents of register A
represent the quotient (in binary, 00111, which is 7 in decimal), and the contents of register Q
represent the remainder (in binary, 00010, which is 2 in decimal).

So, 37 divided by 5 equals 7 with a remainder of 2.