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EEE 312 Assignment on Memory Design

Note: Submit the form before 17-Nov-23 11:59 PM

Full name *

vasu sain

Roll number *

210108059

Email *

v.sain@iitg.ac.in

Upload your Report. This report should contain the following elements: an
explanation of your approach, your circuit design, the netlist code, and the results
of your simulations. (Non-anonymous question ) *

ilovepdf_merged (2).pdf

Tasks completed (Out of 3) *

2
3

WhatsApp Contact number *

9001241826

Your assigned Lab TA *

RUSHIK PARMAR

BIPUL BORO

SUBHADIP PORIA

LAKSHMIKANTH NALLAGATLA

RAHUL PRAKASH

ABHYUDAY BHARDWAJ

VISHWANATH D TELAGADI

YOGESH AGGARWAL

RITIKA NEGI

SAI PRAVEEN DEVARAKONDA

SARAS MANI MISHRA

AKASH DEV ROSHAN

PARMITA ROY

SHIVANI ARYA

PASUNURU VAMSHI MOHAN


Task 1: Utilize MOS as a variable resistor and simulate it.
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Task 2: Implement and simulate MOS as a capacitor.


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Task 3: Design and simulate the DRAM and SRAM circuits.


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