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  • CO-1 DDCA - Home Assignment: Instructions

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    vvsudarsan.16
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    1. The document provides instructions for a home assignment in which students are asked to design a circuit with a PLA having three inputs and two outputs and illustrate the internal structures of CPLD and FPGA with diagrams. 2. Students must record their home assignment activities on paper and submit soft copies to the learning management system by February 15th. 3. Faculty are responsible for evaluating the assignments and notifying students.

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    CO-I_HA-1

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    1. The document provides instructions for a home assignment in which students are asked to design a circuit with a PLA having three inputs and two outputs and illustrate the internal structures of CPLD and FPGA with diagrams. 2. Students must record their home assignment activities on paper and submit soft copies to the learning management system by February 15th. 3. Faculty are responsible for evaluating the assignments and notifying students.

    Copyright:

    © All Rights Reserved
    Download as PDF, TXT or read online from Scribd
    Flag for inappropriate content
    5 views1 page

    CO-1 DDCA - Home Assignment: Instructions

    Uploaded by

    vvsudarsan.16
    1. The document provides instructions for a home assignment in which students are asked to design a circuit with a PLA having three inputs and two outputs and illustrate the internal structures of CPLD and FPGA with diagrams. 2. Students must record their home assignment activities on paper and submit soft copies to the learning management system by February 15th. 3. Faculty are responsible for evaluating the assignments and notifying students.

    Copyright:

    © All Rights Reserved
    Download as PDF, TXT or read online from Scribd
    Flag for inappropriate content
    of 1

    CO-1

    DDCA - Home Assignment


    Instructions:
    1. Students are required to record their Home Assignment activities on A4 paper or
    backside of their class notebooks.
    2. Each CO consists of 2 home assignment questions.
    3. Each Home Assignment is evaluated for 7 marks.
    4. We kindly request that faculty members take on the responsibility of evaluating students
    HA in their respective notebooks or on A4 paper and then promptly notifying the
    students to upload the soft copies (PDF File) of these assessments into the LMS system.
    5. Please make sure to complete these tasks on time and follow the guidelines provided
    above.

    CO_I: (Last Date of Submission is 15.02.2024)

    1. Design the circuit with a PLA having three inputs and two outputs.
    i) F1 (A, B, C) = ∑m (1, 2, 6, 7) ii) F2 (A, B, C) = ∑(1, 3, 5, 7)

    2. Illustrate the internal structure of CPLD & FPGA with necessary diagrams.

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