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E-Note 11919 Content Document 20231020033858PM
E-Note 11919 Content Document 20231020033858PM
UNIT II -TRANSISTORS
a) PNP CONSTRUCTION:
In PNP BJT, the N-type material is sandwiched between two P-type material.
PNP transistors can be formed by connecting cathodes of 2 diodes.
The cathode of two diodes is connected at a common point is known as base while the
anodes of the diodes on the opposite sides are known as collector and emitter.
The emitter-base junction is forward biased while collector-base junction is reverse
biased. Hence in PNP current flows from emitter to collector.
So, in PNP type, current flows from emitter to collector.
b) NPN CONSTRUCTION
In NPN BJT, the P-type material is sandwiched between two N-type material.
PNP transistors can be formed by connecting anodes of 2 diodes.
The anode of two diodes is connected at a common point is known as base while the
cathodes of the diodes on the opposite sides are known as collector and emitter.
The emitter-base junction is forward biased while collector-base junction is reverse
biased. Hence in PNP current flows from collector to emitter.
So, in NPN type, current flows from collector to emitter.
• In either NPN or PNP, the emitter I heavily dopped, base is lightly dopped and the collector
is moderately doped.
TRANSISTOR OPERATION
Working of PNP transistor:
• Emitter-base p-n junction of a transistor is forward biased, while the Collector-base is reverse
biased.
When FB:
• The depletion region has been reduced in width due to the applied bias, resulting in a heavy
flow of majority carriers from the p- to the n-type material.
When RB:
• The flow of majority carriers is zero, resulting in only a minority- carrier flow.
• The sandwiched n-type material is very thin and has a low conductivity, a very small number
of these carriers will take this path of high resistance to the base terminal.
• The magnitude of the base current is typically in the order of microamperes as compared to
milliamperes for the emitter and collector currents.
• The larger number of these majority carriers will diffuse across the reverse- biased junction
into the p-type material connected to the collector terminal.
• Minority carriers in the depletion region will cross the reverse-biased junction of a diode
causing minority current flow.
Applying Kirchhoff’s current law to the transistor
•
• The emitter current is the sum of the collector and base currents.
• In this configuration, input is applied between emitter and base & output is taken from the collector
and base.
• Here, the base is common to both input and output circuits hence the name is common base
configuration.
Curve is plotted between an input voltage VBE and input current IE at constant collector-base voltage VCB.
1.After the cut-in-voltage (0.7 for Si.0.3 for Ge), the IE increases rapidly with small increase in VBE. Thus,
the input resistance is very small.
2.There is slight increase in IE with increase in VCB. This is due to change in the width of the depletion
region in the base region under reverse biased condition.
3. For fixed values of collector voltage (VCB), as the base-to-emitter voltage increases, the emitter current
increases in a manner that closely resembles the diode characteristics.
4. Voltages VBE and VCB are positive for NPN transistors & they are negative for PNP transistors.
The curve is obtained by plotting the output current against the output voltage, keeping input current
constant.
Output curve is plotted between Collector current IC and Collector-base voltage VCB at constant emitter
current IE.
The output characteristics has 3 basic regions,
➢ Active region
➢ Saturation region
➢ Cutoff region
i)Active region:
• In the active region the collector-base junction is reverse-biased, while the base-emitter
junction is forward-biased.
• In this region, Collector current IC is approximately equal to the emitter current IE and transistor
works as an amplifier.
•
• In active region, IE is almost constant. Hence transistors work as a constant current source.
• In the saturation region both the collector-base and base-emitter junctions are forward-biased.
• In the cutoff region both the collector-base and base-emitter junctions are reverse-biased.
• The region below the curve IE=0 is known as the cut-off region where the IC is nearly zero.
In the dc mode the levels of IC and IE due to the majority carriers are related by a quantity called
alpha.
The level of alpha typically extends from 0.90 to 0.998
In this configuration, input is applied between base and emitter and output is taken from collector and
emitter. Here, emitter is common to both input and output circuits hence the name is common-emitter
configuration.
• The input characteristics are a plot of the input current IB verses the input voltage VBE for a
constant output voltage VCE.
Input or driving point characteristics:
1.After the cut-in-voltage (0.7 for Si.0.3 for Ge), the IB increases rapidly with small increase in VBE.
Thus, the input resistance is very small.
3. Voltages VBE and VCE are positive for NPN transistors & they are negative for PNP transistors.
The output characteristics are a plot of the output current (IC) versus output voltage (VCE) for
a constant values of input current (IB).
➢ Active region
➢ Saturation region
➢ Cutoff region
i)Active region:
• In the active region the collector-base junction is reverse-biased, while the base-emitter
junction is forward-biased.
• The collector current IC rises more sharply with increasing VCE in the active(linear) region.
• In the saturation region both the collector-base and base-emitter junctions are forward-biased.
• In the cutoff region both the collector-base and base-emitter junctions are reverse-biased.
• The region below the curve IB=0 is known as the cut-off region where the IB is nearly zero.
Beta (β): Common Emitter Current Gain
• In the dc mode the levels of IC and IB are related by a quantity called beta.
• It is usually included as hFE with the h derived from an ac hybrid equivalent circuit [large
signal (dc) forward current gain].
Problem solving
Q1) If α for a transistor is 0.99, the base current is 100uA, estimate the collector current.
Q2) If a transistor collector current is 1mA and base current is 10uA, determine its α and β.
Q3) A transistor amplifier connected in CE mode has β =100 & IB=50uA. Compute the values of IC, IE & α.
Q4) In a common base connection, the current amplification factor is 0.9. If the emitter current is 1mA,
determine the value of base current.
Q5)In a common base connection, IC = 0.95 mA and IB = 0.05 mA. Find the value of α.
TRANSISTOR AS SWITCH
A transistor can be used as a solid-state switch.
If the transistor is operated in saturation region it acts as closed switch and if the
transistor is operated in cut-off region it is acting as open switch.
TRANSISTOR BIASING
Biasing:
The dc voltages are applied to the transistor in order to turn it on so that it can amplify the
ac signal.
Application: Amplification (raise the strength or amplitude of the weak signal without
any change in its original shape)
For proper amplification two necessary criteria are
i) The transistor must operate in the active region
• Emitter Base junction is Forward Biased (forward-bias voltage of about 0.6 to 0.7 V)
and Collector Base junction is Reverse Biased.
• Amplification is a linear process, and the transistor operates linearly only in the active
region.
ii) Should have a fixed dc collector current at a fixed dc collector voltage
• Fixed values of dc collector current and dc collector voltage is expressed by a term
called operating point or quiescent point or Q-point. The operating point defines
where the transistor will operate on its characteristic’s curves under dc conditions.
• For linear (minimum distortion) amplification, the dc operating point should not be
too close to the maximum power, voltage, or current rating and should avoid the
regions of saturation and cut-off.
Various operating points within the limits of operation of a transistor
DC analysis:
a) Input circuit (Base-Emitter Loop):
Also, IC is given by
b) Output circuit (Collector-Emitter Loop):
In the emitter bias circuit, the fixed bias circuit is modified to include a small resistance RE in
the emitter.
DC analysis:
a) Input circuit (Base-Emitter Loop):
VCE=VCC-IC(RC+RE)
• The addition of the emitter resistor to the dc bias of the BJT provides improved
stability.
• The dc bias currents and voltages remain closer to where they were set by the circuit when
outside conditions, such as temperature, and transistor 𝛽, change.
3) VOLTAGE DIVIDER BIAS CONFIGURATION:
In this circuit, biasing is provided by 3 resistors R1, R2 & RE. R1 and R2 are acting as a
potential divider giving a fixed voltage to point B which is base. This circuit provides improved
stability against variation in the temperature and transistor gain.
i)Exact Analysis:
• This method uses Thevenin’s equivalent theorem.
The input section of the circuit can be redrawn Thevenin’s equivalent circuit of input
section as below. can be redrawn as below,
IC= βIB
b) Output circuit (Collector-Emitter Loop):
Applying KVL to collector-emitter loop
VCC-ICRC-VCE-IERE=0
VCE=VCC-IC(RC+RE)
An N-channel DE-MOSFE is consists of a lightly doped P-type substrate into which two
blocks of heavily doped N-type material are diffused forming the source and drain.
An N-channel is formed by diffusion between the source and drain.
The type of impurity for the channel is the same as for the source and drain.
Now a thin layer of SiO2 dielectric is grown over the entire surface and holes are cut
through the SiO2 (silicon dioxide) layer to make contact with the N-type blocks (Source and
Drain).
Metal is deposited through the holes to provide drain and source terminals, and on
the surface area between drain and source, a metal plate is deposited.
This layer constitutes the gate. SiO2 layer results in an extremely high input impedance
of the order of 1010 to 1015 Ω for this device.
The chip area of a MOSFET is typically 0.003 μm2 or less which is about only 5% of the
area required by a BJT.
BASIC OPERATION AND CHARACTERISTICS
Characteristics
• The graph shows that the current ID will flow for both positive and negative values
of VGS.
• We can see from the graph that the drain current is less than the saturation current
for the negative value of gate voltage, whereas for the positive value of gate voltage,
the drain current exceeds the saturation current.
• VGS = VP is also represented in this graph for which drain current is zero irrespective
of drain to source voltage.