GUJARAT TECHNOLOGICAL UNIVERSITY

Affiliated
S. N. PATEL INSTITUTE OF TECHNOLOGY & RESEARCH
CENTRE, UMRAKH

Course Name : Analog & Digital Electroics (31309087)

Course Code : C207
Branch : Electrical Engineering
Semester : 3rd
Prof. Mayank Patel, Prof. Virang Patel, Prof. Brijesh Parmar, Prof. Kinjal
Subject Teacher :
Chaudhary.

ASSIGNMENT 1 [CO 1][CH1]

CO1: Describe the functioning and selection of OP-AMP as per application.

Sketch the block schematic of a typical operational amplifier and

Q.1. briefly explain the function of each block. (s-23) (w-22)
OR
Draw block diagram of an op-amp. (W-20)
Q.2. Draw and explain the equivalent circuit of OP-Amp. (W-21)
Define:
1.Slew Rate (s-23) (W-21) (W-20)
Q.3. 2.CMRR(S-23), (W-22), (W21), (W20)
3.Input Offset Voltage (s-23) (W-21) (W-20)
4.Input Bias Current, (W-22
5. Input Offset Current (w-22), PSRR(W-21)
Q.4. List out and discuss all the ideal characteristics of an op-amp. (W-20)

Q.5. Explain the ideal voltage transfer characteristics of Op-Amp (w-22)

Q.6. Explain the procedure of offset voltage compensation in an op amp (w-22)

Q.7. Define Slew Rate. Also mention about causes of slew rate. (W-21)

Calculate maximum frequency for a sine wave, output voltage of 12 V peak with
Q.8.
an OPAMP having slew rate 1 V/µS. (W-19)
Q.9. What is ideal differential amplifier? (W-20)

Q.10. Compare different types of power amplifiers. (W-19)

Q.11. What is cross over distortion in power amplifier? (S-23, W-21)

 GUJARAT TECHNOLOGICAL UNIVERSITY
Affiliated
S. N. PATEL INSTITUTE OF TECHNOLOGY & RESEARCH
CENTRE, UMRAKH

Course Name : Analog & Digital Electroics (31309087)

Course Code : C207
Branch : Electrical Engineering
Semester : 3rd
Prof. Mayank Patel, Prof. Virang Patel, Prof. Brijesh Parmar, Prof. Kinjal
Subject Teacher :
Chaudhary.

ASSIGNMENT 2 [CO 2][CH2,CH3]

CO2: Design and testing of OP-AMP based circuits.

Q.1. Compare inverting and non-inverting op-amps. (W-20)

Derive an expression for the output of an Inverting Summing amplifier with three input and
Q.2.
Average amplifiers.
Q.3. Explain voltage follower with its application. (W-22)

Q.4. For an inverting amplifier, V1 = 1V, V2 = 3V, V3 = 2V with R1 = R2 = R3 = 2KΩ and RF = 3KΩ.
Determine the output voltage. (S-23) (W-20)
Draw integrator circuit with example of input and output Waveforms. Derive expression for
output voltage. (S-23) (W-21) (W-19)
OR
Q.5. With neat circuit diagram explain the working of an Integrator with relevant waveforms. (W-
22)
OR
Explain the application of an op-amp as an integrator. (W-20)
Q.6. Explain the working of Zero crossing Detector. (S-23) (W-21) (W-20) (W-19(

Draw the peak detector circuit using Op-amp and explain its operation(S-23) (W-
21)
OR
Q.7.
Explain the circuit diagram of op-amp as a Peak detector. (W-20)
OR
Explain positive peak detector circuit using OPAMP.
 GUJARAT TECHNOLOGICAL UNIVERSITY
Affiliated
S. N. PATEL INSTITUTE OF TECHNOLOGY & RESEARCH
CENTRE, UMRAKH

Course Name : Analog & Digital Electroics (31309087)

Course Code : C207
Branch : Electrical Engineering
Semester : 3rd
Prof. Mayank Patel, Prof. Virang Patel, Prof. Brijesh Parmar, Prof. Kinjal
Subject Teacher :
Chaudhary.

Q.8. Write a short note on Precision rectifier.

Draw and explain working of Op-amp base Wien Bridge oscillator with its
advantages and application. (W-22)
Q.9.
OR
Write short note on Wien bridge oscillator using OPAMP. (W-19)
Q.10. Compare RC phase shift and Wien bridge oscillator. (S-23) (W-21)

Q.11.
Design an R-C phase shift oscillator to produce a sinusoidal output at 1KHz, using
capacitor value 0.1 μF. (S-23) (W-20)
Q.12. Explain how to generate triangular wave using OPAMP.

Q.13. Explain window comparator.

Q.14. Draw Schmitt trigger circuit. Plot input and output waveforms.

Q.15. Write a short note on instrumentation amplifier using op-amp. (W-20)

Q.16. List applications of instrumentation amplifier. (S-23)

Q.17.
Discuss the classification of active filter and explain the frequency response of
each type.
Define following:
a) Attenuation (S-23) (W-21)
Q.18.
b) Pass Band (S-23) (W-21)
c) Cut of frequency (S-23) (W-21)
Q.19. Explain first order Butterworth low-pass filter. Derive expression of filter gain.

Q.20. Draw and explain the block diagram of basic three terminal IC Regulator.
 GUJARAT TECHNOLOGICAL UNIVERSITY
Affiliated
S. N. PATEL INSTITUTE OF TECHNOLOGY & RESEARCH
CENTRE, UMRAKH

Course Name : Analog & Digital Electroics (31309087)

Course Code : C207
Branch : Electrical Engineering
Semester : 3rd
Prof. Mayank Patel, Prof. Virang Patel, Prof. Brijesh Parmar, Prof. Kinjal
Subject Teacher :
Chaudhary.

ASSIGNMENT 3 [CO 3][CH4,CH5]

CO3: Design and implement Combinational and Sequential logic circuits.

Q.1. Differentiate between combinational logic circuit and sequential logic circuit. (W-22) (W-20)

Q.2. State the difference between Asynchronous and Synchronous counters. (W-22)

Q.3. Classify digital logic gates. Draw truth table and symbols of basic logic gates. (W-22)

Q.4. Prove that NAND and NOR gates are universal gates. (S-23)
Implement the following function using 8:1 Multiplexer. F (A, B, C, D) =ABD+ACD +BCD+ACD .
Q.5.
(S-23)

Q.6. Write short note on Gray code. . (S-23)

Q.7. Realize expression using minimum NAND gates only Y = AB+ AC+ C +AD + ABC + ABC(W-21)

Q.8. Simplify ABCD+BCD+BCD+BCD. . (S-23) (W-21)

Simplify the Boolean function F= ABC+ABD + ABCD using don’t care conditions d=
ABC +A BDin
1) Sum of products (SOP) and
Q.9.
2) Product of sums (POS) by means of K Map and implement it with no more than
two NOR gates. Assume that both the normal and complement inputs are
available. (W-22)
 GUJARAT TECHNOLOGICAL UNIVERSITY
Affiliated
S. N. PATEL INSTITUTE OF TECHNOLOGY & RESEARCH
CENTRE, UMRAKH

Course Name : Analog & Digital Electroics (31309087)

Course Code : C207
Branch : Electrical Engineering
Semester : 3rd
Prof. Mayank Patel, Prof. Virang Patel, Prof. Brijesh Parmar, Prof. Kinjal
Subject Teacher :
Chaudhary.

Given a logic function: Z = ABC + BC’D + A’BC. a) Make a truth table. b) Simplify
Q.10.
using K-map. c) Realize simplified function using NAND gates only (W-21)

Explain Half Adder circuit. Explain Full adder circuit with the help of two Half
Q.11.
adder. (S-23) (W-21)

Q.12. Design half subtractor logic circuit. . (S-23)

Derive full subtractor with the help of necessary truth table and K –map. Also
Q.13.
express in terms of logic diagram. (W-22)

Minimize following Boolean function using K-map: Y (A, B, C, D) = Σ m(0, 3, 5, 6, 9,

Q.14.
10, 12, 15)

Simplify the Boolean function with K map F(a, b, c, d) =

Q.15.
Σ(0,1,2,4,5,6,8,9,12,13,14)(W-21)

For the following function implement the SOP and POS circuit F(A,B,C,D ) = Σm
Q.16.
(2,3,5,7,12) + Σd (6,13,14,15)(W-21)

Q.17. Define 3- bit parity generator circuit using even parity bit. (W-22)

Minimize the following expression and realize using basic gates. Y=Σ
Q.18.
m(0,2,5,6,7,8,10,13,15) (W-22)

Simplify the Boolean function F(A,B,C,D) = Σm (1,5,6,12,13,14), Σd=(2,4) using K-

Q.19.
map method. Implement using basic logic gates. (S-23)
 GUJARAT TECHNOLOGICAL UNIVERSITY
Affiliated
S. N. PATEL INSTITUTE OF TECHNOLOGY & RESEARCH
CENTRE, UMRAKH

Course Name : Analog & Digital Electroics (31309087)

Course Code : C207
Branch : Electrical Engineering
Semester : 3rd
Prof. Mayank Patel, Prof. Virang Patel, Prof. Brijesh Parmar, Prof. Kinjal
Subject Teacher :
Chaudhary.

Minimize following Boolean function using K-map: F(A,B,C,D) = Π M(1, 2, 3, 8, 9,

Q.20.
11, 14) • d(7, 15)

Q.21. Explain how Demultiplexer can be used as a 3:8 Decoder. (W-22)

Q.22. Design full adder logic circuit using 3 x 8 decoder and OR gates. (W-20)

Q.23. Compare Multiplexer and Demultiplexer. (W-22)

Implement the following logic function using the 8:1 multiplexer. F(A,B,C)
Q.24.
=ΠM(0,1,3,5,7) (W-22)

Implement the following logic function using 8:1 multiplexer: F(A, B, C, D) = ∑

Q.25.
m(0, 1, 3, 4, 8, 9, 15)(W-20)

Implement the following function using 8:1 Multiplexer. F(A,B,C,D) =ABD+ACD

Q.26.
+BCD+ACD (W-21)

Q.27. Explain the different types of triggering methods used for flip flops. (W-20)

What are Preset and Clear inputs with flip flop? Why are they provided with flip
Q.28.
flop? (W-22)

Explain S R flip flop with its working operation. (W-22)

OR
Q.29.
Draw & explain in detail the logic diagram & the truth table of clocked SR flip-flop
(W-20)
 GUJARAT TECHNOLOGICAL UNIVERSITY
Affiliated
S. N. PATEL INSTITUTE OF TECHNOLOGY & RESEARCH
CENTRE, UMRAKH

Course Name : Analog & Digital Electroics (31309087)

Course Code : C207
Branch : Electrical Engineering
Semester : 3rd
Prof. Mayank Patel, Prof. Virang Patel, Prof. Brijesh Parmar, Prof. Kinjal
Subject Teacher :
Chaudhary.

Q.30. Explain Master-Slave J-K flip-flop configuration. (S-23) (W-22)

Q.31. Design D FF using SR FF. Write truth table of D FF. (S-23) (W-20)

Q.32. Classify the various modes of operation of shift register (W-22)

Q.33. Write a short note on Parallel in serial out shift register. (W-22)

Q.34. Draw and explain the working of 4-bit Ring counter. (W-21)

Q.35. Design a 4-bit synchronous down counter using T flip-flops. (W-20)

Q.36. Draw the logic diagram of 4-bit ripple up counter using JK FFs. (W-20)
 GUJARAT TECHNOLOGICAL UNIVERSITY
Affiliated
S. N. PATEL INSTITUTE OF TECHNOLOGY & RESEARCH
CENTRE, UMRAKH

Course Name : Analog & Digital Electroics (31309087)

Course Code : C207
Branch : Electrical Engineering
Semester : 3rd
Prof. Mayank Patel, Prof. Virang Patel, Prof. Brijesh Parmar, Prof. Kinjal
Subject Teacher :
Chaudhary.

ASSIGNMENT 4 [CO 4] [CH6]

C04: Describe the process of Analog to Digital conversion and Digital to Analog conversion.

Write the following:

Q.1. Compare various D/A converters

Explain R-2R ladder DAC with necessary diagram. (S-23) (W-22)

Q.2. OR
Draw & explain R-2R ladder D/A converter with necessary equations. (W-20)

Define following specification of DAC

a) Accuracy (W-21)
Q.3.
b) Resolution (W-21)

c) Setting time (W-21)

Q.4. Explain the Binary Weighted register technique of D/A converter. (W-21) (W-19)

Define following specification of ADC

1)Conversion Time (W-22)
Q.5.
2)Resolution (W-22)

3)Quantization (W-22)

List out various commonly used A/D converters. Draw & explain Flash A/D converter with
Q.6.
necessary decoding table. Also mention pros & cons of the same. (S-23) (W-20)
 GUJARAT TECHNOLOGICAL UNIVERSITY
Affiliated
S. N. PATEL INSTITUTE OF TECHNOLOGY & RESEARCH
CENTRE, UMRAKH

Course Name : Analog & Digital Electroics (31309087)

Course Code : C207
Branch : Electrical Engineering
Semester : 3rd
Prof. Mayank Patel, Prof. Virang Patel, Prof. Brijesh Parmar, Prof. Kinjal
Subject Teacher :
Chaudhary.

OR
Which are the different methods for A/D conversion? (W-21)

Q.7. Explain working of Successive approximation type ADC

Q.8. Write a brief note on quantization and encoding. (W-20)