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In this article, you will learn about this differential switch’s capabilities.
Once the pressure or voltage differences are noticed, the switch helps to balance the
differences by switching to the channel that follows the predefined value.
Multi-Interface Support
It is because of the common package footprint, optimized into the small 3.5-mm x
9.0-mm, 42-pin WQFN package.
This package is also available in a common footprint, shareable among many vendors.
Conducting the signals from one channel to the other might not always be simple.
Therefore, using a mechanism to regulate that is very essential. That is the reason for
integrating a Single Control Line (SEL pin) inside HD3SS3412RUAR. This pin aids
the control and conduction of signals from one path or channel to the other. It can also
be used to conduct the signals backwards.
HD3SS3412RUAR also supports the temperature use from a single supply voltage of
3.3 volts up to a full operating temperature of 85˚C.
Technical Attributes
The table below represents the technical attributes of this differential switch:
Attributes Description
Mounting Style Surface Mount Technology (SMT)
Typical Application PCI Express (PCIe)
Core Feature Bi-Directional
Number of Channels 4
Package/Case 42-WFQFN Exposed Pad
Operating Temperature (minimum to maximum) Between 0˚C and 70˚C
Multiplexer/Demultiplexer Circuit 2:1
-3db Bandwidth 8GHz
On-State Resistance (Maximum) 80hm
Voltage – Supply, Single (V+) Between 3 volts and 3.6 volts
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HD3SS3412RUAR is ideal for the PCI Express (PCIe) Gen III applications; examples
being the following:
However, there are more applications or use cases for this differential switch. It can
also be used with other high-speed data protocols, especially if those protocols have
up to <1800 mVpp of differential amplitude and a common-mode voltage of <2.0
volts.
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It also supports the DisplayPort 1.2 and the USB 3.0 applications.
You must avoid using the C-packs or the 0805 size capacitors, but stick to the above.
With that being said, optimizing the capacitors involves setting and matching the
value of the 0.1 µF capacitor with the ± signal pair.
Although the above is one of the best ways to place the capacitors, there are a number
of other options worth exploring. See them below:
Doing this is required only when the common-mode voltage on the system board is
above 2 volts.
As a way of balancing the performance, the less than 2-volts biasing voltage is to be
used alongside the common-mode voltage.
The placement has to be balanced with the biasing of the switch by either the host
controller or the system.
The performance is further balanced with the biasing of the lower switch with the host
controller and that of the upper switch by the endpoint.
Lastly, take note to use the accurate AC Coupling Capacitors’ placement so you don’t
distort the signal routing process.
Related Posts:
https://www.raypcb.com/hd3ss3412ruar/