DRAM

Dynamic RAMs (DRAMs) store their contents as charge on a capacitor rather than in a feedback loop.
A 1-transistor (1T) dynamic RAM cell consists of a transistor and a capacitor.

The cell is accessed by asserting the wordline to connect the capacitor to the bitline.
READ OPERATION :
1. The bitline is first precharged to VDD/2.
2. When the wordline rises, the capacitor shares its charge with the bitline, causing a voltage
change dV
3. The read disturbs the cell contents at x, so the cell must be rewritten after each read.

VDD Ccell
V 
2 Ccell  Cbit
4. If bitline goes down by DV, then bit = 0
5. If bitline goes up by DV, then bit =1
WRITE OPERATION :
1. The word line is asserted.
2. The bitline is driven high or low.
3. The voltage is forced onto the capacitor.
Some DRAMs drive the wordline to VDDP = VDD + Vt to avoid a degraded level when writing a ‘1.’
 ROM
Read-Only Memory (ROM) cells can be built with only one transistor per bit of storage. A ROM is a
nonvolatile memory structure in that the state is retained indefinitely—even without power. Retain their
contents even if power is turned off.
1. Masked ROM : Mask-programmed ROMs can be configured by the presence or absence of a
transistor or contact. The contents are hardwired during fabrication and cannot be changed.
a. Presence of transistor  1
b. Absence of transistor  0
2. Programmable ROM(PROM) : Programmable ROMs can be fabricated as ordinary ROMs fully
populated with pulldown transistors in every position. These can be Programmed once after
fabrication by blowing on-chip fuses with special high programming voltage. It cannot be erased
or modified the data. PROMs are also referred to as “one-time programmable memories”.
3. EPROM (Erasable Programmable ROM) : As technology has improved, reprogrammable
nonvolatile memory has largely displaced Proms, one such is EPROM (Others are EEPROM,
Flash). EPROM is programmed electrically, but it is erased through exposure to ultraviolet light,
but it is inconvenient to erase and reprogram.
4. EEPROM (Electrically Erasable Programmable ROM) : These are similar to EPROM but erased
with on-chip circuitry. EEPROM can be erased electrically without being removed from the
system. EEPROM’s are not economical, they are costlier as compared to Flash ROM.
5. Flash ROM : These are the variants of EEPROM and can erase entire block of memory rather than
individual bits. Because of Good density, easy in-system programmability, and reduced area
these replaced other nonvolatile memories. Flash memory uses the NAND architecture to
minimize bit cell size and cost.
 SAM
• Serial access memory (SAM) can be accessed serially, and no address is needed. Using the basic
SRAM cell and/or registers, we can construct a variety of serial access memories including shift
registers and queues.

1. Shift Registers : shift register is commonly used in signal-processing applications to store and delay
data. The “tapped delay line” is a shift register variant that offers a variable number of stages of
delay( Write about PISO and SIPO)
2. Queue : Queues allow data to be read and written at different rates. Read and write each use their
own clock, data.

• Queue indicates whether it is FULL or EMPTY

• FULL flag when no more space to write data.

• EMPTY flag when no more data to read.

A. First In First Out (FIFO) queues are commonly used to buffer data between two asynchronous
streams.
B. Last In First Out (LIFO) queues, also known as stacks, are used in applications such as subroutine
or interrupt stacks in microcontrollers.
(Write about FIFO and LIFO)