Department of Computer Science University of Chakwal

Experiment No. 1
VERIFICATION OF TRUTH TABLES OF ALL LOGIC GATES

OBJECTIVE
 Familiarization with MULTISIM and ICs of all logic gates
 Verification of truth tables of all logic gates

EQUIPMENT
 Breadboard, TTL IC’s
 Gate ICs; AND (7408), OR (7432), NAND (7400), NOR (7402), NOT (7404), XOR
(74136), XNOR (74266)
 2 resisters 1K ohm
 Connecting wires

COMPONENTs
 IC Type 7400 Quadruple 2-input
NAND gates
 IC Type 7402 Quadruple 2-input
NOR gates
 IC Type 7404 Hex NOT Gates
(Inverters)
 IC Type 7408 Quadruple 2-input
AND gates
 IC Type 7432 Quadruple 2-input OR
gates
 IC Type 7486 Quadruple 2-input
XOR gate
 IC Type 74266 Quadruple 2-input
XNOR gate

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Department of Computer Science University of Chakwal

THEORY
An integrated circuit (IC) is a small electronic device made out of a semiconductor material. A
semiconductor material is a one which is neither a good conductor of electricity nor a good
insulator. Semiconductors make it possible to miniaturize electronic components, such as
transistors. Not only does miniaturization mean that the components take up less space, it also
means that they are faster and require less energy.
Logic gates are idealized or physical devices implementing a Boolean function, which it
performs a logical operation on one or more logical inputs and produce a single output.
Depending on the context, the term may refer to an ideal logic gate, one that has for instance zero
rise time and unlimited fan out or it may refer to anon-ideal physical device.
The main hierarchy is as follows:-
1. Basic Gates
2. Universal Gates
3. Advanced Gates
Logic gates are the digital circuits with one output and one or more inputs. They are the basic
building blocks of any logic circuit.
Different logic gates are: AND, OR, NOT, NAND, NOR, EX-OR. There logic is briefly
explained below.
1. Basic Gates
AND: Logic eqn. Y = A.B
The output of AND gate is true when the inputs A and B are True.
OR: Logic eqn. Y = A+B.
The output of OR gate is true when one of the inputs A and B or both the inputs are true.
NOT: Logic eqn. Y = Ā.
The output of NOT gate is complement of the input.
2. Universal Gates
NAND: Logic eqn. Y = A.B
The output of NAND gate is true when one of the inputs or both the inputs are low level.
NOR: Logical eqn. Y = A+B.
The output of NOR gate is true when both the inputs are low.
3. Advanced Gates
EX-OR: Logic eqn. Y=AB+AB.
The output of EX-OR gate is true when both the inputs are different.
EX-NOR: Logic eqn.

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The output of EX-NOR is true when both inputs are same.

Fig. 1.1 Symbol for digital logic gates

In a circuit, logic variables (values 0 and 1) can be represented as levels of voltage. The most
obvious way of representing two logic values as voltage levels is to define a threshold voltage;
any voltage below the threshold represents one logic value and voltages above the threshold
Correspond to the other logic value.
To implement the threshold – voltage concept, a range of low and high voltage levels is defined,
as shown in Fig. 1.2. This figure indicates that voltages in the range Gnd to Vo, max represent
logic value 0. Similarly, the range from V1, min to Vcc corresponds to logic value 1. Logic
signals do not normally assume voltages in undefined range except in transition from one logic
value to the other.

Fig. 1.2 Representation of logic values by voltage levels

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CONNECTION DIAGRAM

Figure 1.3 IC 74LS00 (NAND Gate)

Figure 1.4 IC 74LS02 (NOR Gate)

Figure 1.5 IC 74LS04 (NOT Gate)

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Figure 1.6 IC 74LS08 (AND Gate)

Figure 1.7 IC 74LS32 (OR Gate)

Figure 1.8 IC 74LS00 (XOR Gate)

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Figure 1.9 IC 74266 (XNOR Gate)

PROCEDURE
1. First get above mentioned apparatus and component from the lab staff.
2. Make the circuit on breadboard using gate ic, wires, inputs Vcc and Output LED etc.
3. Take IC 74LS00 and place it on bread board. Apply Vcc and GND to the specified pins
as shown in the pin configuration below. Apply four combination of input to each gate
of the IC and fill the following table 1.1. And compare your result with truth table and
compare your practical results with MULTISIM results.
4. Take IC 74LS02 and place it on bread board. Apply Vcc and GND to the specified pins
as shown in the pin configuration below. Apply four combination of input to each gate
of the IC and fill the following table 1.2. And compare your result with truth table and
compare your practical results with MULTISIM results.
5. Take IC 74LS04 and place it on bread board. Apply Vcc and GND to the specified pins
as shown in the pin configuration below. Apply four combination of input to each gate
of the IC and fill the following table 1.3. And compare your result with truth table and
compare your practical results with MULTISIM results.
6. Take IC 74LS08 and place it on bread board. Apply Vcc and GND to the specified pins
as shown in the pin configuration below. Apply four combination of input to each gate
of the IC and fill the following table 1.4. And compare your result with truth table and
compare your practical results with MULTISIM results.
7. Take IC 74LS32 and place it on bread board. Apply Vcc and GND to the specified pins
as shown in the pin configuration below. Apply four combination of input to each gate
of the IC and fill the following table 1.5. And compare your result with truth table and
compare your practical results with MULTISIM results.
8. Take IC 74LS86 and place it on bread board. Apply Vcc and GND to the specified pins
as shown in the pin configuration below. Apply four combination of input to each gate
of the IC and fill the following table 1.6. And compare your result with truth table and
compare your practical results with MULTISIM results.
9. Take IC 74266 and place it on bread board. Apply Vcc and GND to the specified pins
as shown in the pin configuration below. Apply four combination of input to each gate
of the IC and fill the following table 1.7. And compare your result with truth table and
compare your practical results with MULTISIM results.

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RESULTS & CALCULATIONS

Table 1.1
IN OUT
A B Gate 1 (V) Gate 1 (H/L) Gate 2 (V) Gate 2 (H/L) Gate 3 (V) Gate 3 (H/L) Gate 4 (V) Gate 4 (H/L)
L L
L H
H L
H H

Also attach Screenshots using MULTISIM:

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Table 1.2

IN OUT
A B Gate 1 (V) Gate 1 (H/L) Gate 2 (V) Gate 2 (H/L) Gate 3 (V) Gate 3 (H/L) Gate 4 (V) Gate 4 (H/L)
L L
L H
H L
H H
Also attach Screenshots using MULTISIM:

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Table 1.3
IN OUT
A B Gate 1 (V) Gate 1 (H/L) Gate 2 (V) Gate 2 (H/L) Gate 3 (V) Gate 3 (H/L) Gate 4 (V) Gate 4 (H/L)
L L
L H
H L
H H

Also attach Screenshots using MULTISIM:

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IN OUT
A B Gate Gate 1 Gate Gate 2 Gate Gate 3 Gate Gate 4 Gate Gate 5 Gate Gate 6
1 (V) (H/L) 2 (V) (H/L) 3 (V) (H/L) 4 (V) (H/L) 5 (V) (H/L) 6 (V) (H/L)
L L
L H
H L
H H
Table 1.4
.
Also attach Screenshots using MULTISIM:

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Table 1.5
IN OUT
A B Gate 1 (V) Gate 1 (H/L) Gate 2 (V) Gate 2 (H/L) Gate 3 (V) Gate 3 (H/L) Gate 4 (V) Gate 4 (H/L)
L L
L H
H L
H H

Also attach Screenshots using MULTISIM:

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Table 1.6
IN OUT
A B Gate 1 (V) Gate 1 (H/L) Gate 2 (V) Gate 2 (H/L) Gate 3 (V) Gate 3 (H/L) Gate 4 (V) Gate 4 (H/L)
L L
L H
H L
H H

Also attach Screenshots using MULTISIM:

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Table 1.7
IN OUT
A B Gate 1 (V) Gate 1 (H/L) Gate 2 (V) Gate 2 (H/L) Gate 3 (V) Gate 3 (H/L) Gate 4 (V) Gate 4 (H/L)
L L
L H
H L
H H

Also attach Screenshots using MULTISIM:

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Pre Experiment Questions:-

1. What is a logic gate?

Ans:

2. What are universal gates?

Ans:

3. What are basic gates?

Ans:

4. State De-Morgan’s theorem.

Ans:

5. What is the primary motivation for using Boolean algebra to simplify logic expressions?
Ans:

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Relevant Rubrics:

Marks
Sr. Exceeds expectation Meets expectation Doesn’t meet expectation
Rubrics
No. (3) (2) (0-1)
Student needed guidance to
Student has made correct make correct Student was unable to make
Conduction of Experiment (Hardware)

Equipment equipment/component equipment/component correct equipment/component

1.
Connection connections as per standard connections as per standard connections as per standard
circuit diagrams. circuit diagrams. circuit diagrams.

Data Student has correctly Student has performed Student was unable to
2. Recording/ measured the relevent incorrect measurement of identify/measeure relevent
Collection parameters. relevant parameters. parameters..

Troubleshoot Student has ability to detect Student can detect the error Student was unable to detect
3.
ing and correct the errors. but unable to correct it. the error.

The achieved results are not No results are achieved OR the

Accurate results have been
4. Results accurate but are within achieved results are
achieved
tolerance range. meaningless.
Studnet carefully observes Student observes safety rules
Studnet does not care about
the safety rules and and procedures with minor
5. Safety safety rules during practical
procedures during practical deviation during practical
work.
work. work.
Student was on time but
Student was on time and
wasted time outside the Student was not on time and
Ethics

6. Punctuality stayed till the completion of

workplace during the left class before time.
task.
experument.
The student has shown
The student uses the The student has shown
irresponsibility using the
equipment responsibly and responsibility towards using
Workplace equipment and didn’t clear the
7. clears the leftovers at the the equipment while he didn’t
Clearance leftovers at the workplace on
workplace on completion of care about the cleanliness of
completion of lab work.
lab work. workplace.

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