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Quanta ZRT Zrta Da0zrtmb6d0 Rev 3a
Quanta ZRT Zrta Da0zrtmb6d0 Rev 3a
BOM
ZRT/ZRTA_GDDR3 BWD ULT SYSTEM BLOCK DIAGRAM 15@ : For 15W CPU
28@ : For 28W CPU
6515@ : For 6515 stuff
Dual Channel DDR III VRAM AC@ : For IOAC
DDR3L-SODIMM CHA 1066/1333/1600 MHZ GPU DDR3 DM@ : Dual MIC
BRODWELL ULT 15W N16S-GT P20,P21 DR@ : For Dual Rank
P14 PCIE-5
N16V-GM
PCI-E x4 EV@ : Optimus
D MCP 1168pins TX/RX D
GM@ :N16V-GM /WO GC6
DDR3L-SODIMM CHB IMC
DC+GT3 X'TAL 27MHz
GS@ : G sensor
P15
40 mm X 24 mm
CLK GT@ :N16S-GT /GC6
SATA0 P16~P19 IV@ : iGPU
SATA - HDD EDP KBL@ : Keyboard backlight
P27 SATA eDP Conn. P23 NAC@ : Non IOAC
eDP
SATA ODD SATA1 NGS@ : Non G sensor
P27 NTPM@ : Non TPM
DDI2
S28@ : 28W Change BOM
ITE6515
VGA Conn. P23
SM@ : Single MIC
P22 SP@ : Special
DP
SR@ : Single Rank
DDI1
HDMI Conn. TPM@ : TPM
Cardreader P24
USB2-7 Integrated PCH TPN_N@ : For TPM 2.0
CONN. 2in 1 RTS5170 USB3-1,-2
P27 (cardreader) P27
TPN_S@ : For TPM 1.2
USB3.0/2.0
USB2-6 USB2-0,-1 USB3 Port*2
CCD(Camera) MB side
P22 P30
C
USB2.0 C
USB2-5 CLK
Touch Screen
P22
PCI-E x1 PCIE-4
USB2-4
Blue Tooth NGFF CARD
P24 WLAN+BT
X'TAL P28
32.768KHz
PCIE-3
RTL8111H RJ45
P25
I/O board X'TAL 24MHz
USB2-2 10/100/1G P25
EC
B Int. D-MIC ALC255 TPM(option) B
D-MIC BQ24737RGRR TPS51216RUKR Thermal Protection
AUDIO CODEC IT8987 P27 Batery Charger P31 +1.35V_SUS P35 P36
P28 P28 P31
Discharger
TPS51225RUKR TPS54318RTER
+3V/+5V P32 +1.5V P36
D-MIC
TPS51624RSM UP1658RQKF
P28 +VCCIN P33 +VGPU_CORE P37
BACKLIGHT
(OPTION) P29
A A
eDP Panel
[24] INT_HDMITX0N C54 C45 EDP_TXN0 EDP_TXN0 [23]
C55 DDI1_TXN0 EDP_TXN0 B46 EDP_TXP0
D [24] INT_HDMITX0P EDP_TXP0 [23] D
B58 DDI1_TXP0 EDP_TXP0 A47 EDP_TXN1
HDMI
C C
+3V
HSW_ULT_DDR3L
U37I
PCI_PIRQA# R316 10K_4
PCI_PIRQB# R635 10K_4
PCI_PIRQC# R328 10K_4
PCI_PIRQD# R640 10K_4
[23] PCH_BRIGHT PCH_BRIGHT B8 B9 HDMI_DDCCLK_SW [24] DGPU_SELECT# R653 10K_4
PCH_BLON A9 EDP_BKLCTL DDPB_CTRLCLK C9 CRT_CLK R365 2.2K_4
[23] PCH_BLON EDP_BKLEN DDPB_CTRLDATA HDMI_DDCDATA_SW [24]
[23] EDP_VDD_EN C6 eDP SIDEBAND D9 CRT_CLK CRT_DATA R363 2.2K_4
EDP_VDDEN DDPC_CTRLCLK D11 CRT_DATA TPD_INT#_D R327 100K_4
DDPC_CTRLDATA
PCI_PIRQA# U6 +3V
PCI_PIRQB# P4 PIRQA/GPIO77 C5
PIRQB/GPIO78 +3V DDPB_AUXN
PCI_PIRQC# N4 +3V B6 CRT_AUXN CRT_AUXN [22]
PCI_PIRQD# N2 PIRQC/GPIO79 DISPLAY DDPC_AUXN B5
PIRQD/GPIO80 +3V DDPB_AUXP +3V
PCI_PME# AD4 +3V_S5 A6 CRT_AUXP CRT_AUXP [22]
TP87 PME PCIE DDPC_AUXP
TPD_INT#_D U7 +3V
DGPU_SELECT# L1 GPIO55 CRT_AUXN R691 *100K_4
GPIO52 +3V
BOARD_ID4 L3 +3V C8 INT_HDMI_HPD [24]
[10] BOARD_ID4 GPIO54 DDPB_HPD
BOARD_ID1 R5 +3V A8 CRT_HPD [22] CRT_AUXP R692 *100K_4
[10] BOARD_ID1 GPIO51 DDPC_HPD
BOARD_ID2 L4 +3V D6 EDP_HPD [23]
[10] BOARD_ID2 GPIO53 EDP_HPD
B B
R360 R686
4.7K_4
9 OF 19 100K_4
+3V
2
3 1 TPD_INT#_D
[29,31] TPD_INT#
Q23
2N7002K
A A
B B
3 OF 19 4 OF 19
A A
H_PECI (50ohm)
Haswell ULT (SIDEBAND)
Route on microstrip only
Spacing >18 mils
D D
Trace Length: 0.4~6.125 iches
H_PWRGOOD (50ohm)
Trace Length: 1~11.25 inches HSW_ULT_DDR3L
U37B
CPU_PLTRST# (50ohm)
Trace Length: 10~17 inches PROC_DETECT D61
TP106 K61 PROC_DETECT
CATERR# MISC
TP99 CATERR
[31] H_PECI H_PECI N62 J62 XDP_PRDY# XDP_PRDY# [13]
PECI PRDY K62 XDP_PREQ#
PREQ E60 XDP_PREQ# [13]
XDP_TCK0 TCK,TMS
PROC_TCK XDP_TCK0 [8,13]
E61 XDP_TMS_CPU Trace Length < 9000mils
H_PROCHOT# R662 56_4 H_PROCHOT#_R K63 JTAG PROC_TMS E59 XDP_TRST# XDP_TMS_CPU [13]
[31,32,36] H_PROCHOT# PROCHOT PROC_TRST XDP_TRST# [8,13]
THERMAL F63 XDP_TDI_CPU
PROC_TDI F62 XDP_TDO_CPU XDP_TDI_CPU [13]
PROC_TDO XDP_TDO_CPU [13]
H_PWRGOOD_R C61
PROCPWRGD PWR
J60 XDP_BPM#0
BPM#0 XDP_BPM#0 [13]
H60 XDP_BPM#1
BPM#1 H61 XDP_BPM#1 [13]
SM_RCOMP[0:2] XDP_BPM#2 BPM#[0:7]
BPM#2 TP103
Trace length < 500 mils H62 XDP_BPM#3 Trace Length 1~6 inches
AU60 BPM#3 K59 TP102
Trace width = 12~15 mils SM_RCOMP_0 XDP_BPM#4 Length match < 300 mils
SM_RCOMP0 DDR3L BPM#4 TP46
SM_RCOMP_1 AV60 H63 XDP_BPM#5
Trace spacing = 20 mils SM_RCOMP_2 AU61 SM_RCOMP1 BPM#5 K60 XDP_BPM#6
TP104
C TP100 C
CPU_DRAMRST# AV15 SM_RCOMP2 BPM#6 J61 XDP_BPM#7
SM_DRAMRST DSW BPM#7 TP47
DDR_PG_CTRL AV61
SM_PG_CNTL1
2 OF 19
B B
1
R250 120/F_4 SM_RCOMP_1
1
XDP_TCK0 R340 51_4
XDP_TRST# R578 *51_4 R164 R162 C152 2 R167 *short_4 DDR_PG_CTRL
R260 100/F_4 SM_RCOMP_2 220K/F_4 *220K/F_4 0.1u/10V_4 A
2
2
2
[35] DDR_VTTT_PG_CTRL 4 3
Y GND
+1.35V_SUS 74AUP1G07GW
3
+1.35V_SUS R87 66.5/F_4
+VCCIO_OUT M_A_ODT0_DIMM [14]
2 Q8
2N7002K R86 66.5/F_4 M_A_ODT1_DIMM [14]
1
1
A R85 66.5/F_4 A
M_B_ODT1_DIMM [15]
R664 62_4
CPU DRAM
2
C465 74AUP1G07GW
+1.35V_SUS *0.1u/10V_4
+ C556
*470u/2V_7343 R489 *0_4 HWPG_1.05V_EC
R208 *short_1206 +1.35V_CPU
3
R209 *short_1206 U37L HSW_ULT_DDR3L
+1.35V_CPU 1.4A Reserve from EC
+VCCIN 32A Q43
L59 C36 +VCCIN
+1.35V_CPU J58 RSVD VCC C40 2
RSVD VCC HWPG_1.05V_EC# [31]
C44
AH26 VCC C48 C256 C329 C312 C289 C279 C335
C190 C187 C226 C220 C188 C191 AJ31 VDDQ VCC C52 22u/6.3V_8 22u/6.3V_8 22u/6.3V_8 22u/6.3V_8 22u/6.3V_8 22u/6.3V_8 *2N7002K
10u/6.3V_6 10u/6.3V_6 10u/6.3V_6 10u/6.3V_6 10u/6.3V_6 10u/6.3V_6 AJ33 VDDQ VCC C56
1
AJ37 VDDQ VCC E23
AN33 VDDQ VCC E25
AP43 VDDQ VCC E27
AR48 VDDQ VCC E29 R107 *short_4
VDDQ VCC PCH_PWROK [7,31]
+ AY35 E31 VCCST_PWRGD_EN R108 *0_4 EC_PWROK [7,31]
C489 C217 C227 C181 C219 AY40 VDDQ VCC E33 C270 C245 C552 C275 C240 C259
*470u/2V_7343 2.2u/6.3V_6 2.2u/6.3V_6 2.2u/6.3V_6 2.2u/6.3V_6 AY44 VDDQ VCC E35 22u/6.3V_8 22u/6.3V_8 22u/6.3V_8 22u/6.3V_8 22u/6.3V_8 22u/6.3V_8
VDDQ VCC
1A-6 2013/10/21 Del APWORK.
AY50 E37
VDDQ VCC E39
F59 VCC E41
+VCCIN VCC VCC
N58 E43
R666 100/F_4 AC58 RSVD VCC E45
+VCCIN RSVD VCC
C E47 C
R676 *short_4 VCC_SENSE_R E63 VCC E49 C548 C252 C260 C339 C550 C261
[36] VCC_SENSE VCC_SENSE VCC
AB23 E51 22u/6.3V_8 22u/6.3V_8 22u/6.3V_8 22u/6.3V_8 22u/6.3V_8 22u/6.3V_8
A59 RSVD VCC E53
300mA +VCCIO_OUT VCCIO_OUT VCC
300mA E20 E55 +1.05V +VCCIO_OUT
+VCCIOA_OUT VCCIOA_OUT VCC
AD23 E57
AA23 RSVD VCC F24 R351 *0_8
AE59 RSVD VCC F28
R332 *10K_4 RSVD VCC F32
+1.05V_VCCST VCC
H_CPU_SVIDART# L62 F36 C283 C246 C250 C251 C337 C554 C263
VRON_CPU R333 10K_4 IMVP_PWRGD H_CPU_SVIDCLK N63 VIDALERT HSW ULT POWER VCC F40 22u/6.3V_8 22u/6.3V_8 22u/6.3V_8 22u/6.3V_8 22u/6.3V_8 22u/6.3V_8 *4.7u/10V_6
H_CPU_SVIDDAT L63 VIDSCLK VCC F44
VCCST_PWRGD B59 VIDSOUT VCC F48
[13] VCCST_PWRGD VCCST_PWRGD VCC
VRON_CPU F60 F52
[36] VRON_CPU VR_EN VCC
[10,36] IMVP_PWRGD IMVP_PWRGD C59 F56
VR_READY VCC G23
D63 VCC G25
R319 *short_4 PWR_DEBUG_R H59 VSS VCC G27 C549 C253 C334 C236 C545 C234
[13] PWR_DEBUG PWR_DEBUG VCC
P62 G29 *22u/6.3V_8 *22u/6.3V_8 *22u/6.3V_8 *22u/6.3V_8 *22u/6.3V_8 *22u/6.3V_8
R323 150_6 ULT_RVSD_69 P60 VSS VCC G31
+1.05V_VCCST TP43 RSVD_TP VCC
ULT_RVSD_70 P61 G33 Layout note: need routing together
TP44
TP49 ULT_RVSD_71 N59 RSVD_TP
RSVD_TP
VCC
VCC
G35 SVID and ALERT need between CLK and DATA.
TP97 ULT_RVSD_72 N61 G37
T59 RSVD_TP VCC G39
1006 add RSVD VCC
AD60 G41
AD59 RSVD VCC G43 +VCCIO_OUT +1.05V_VCCST
RSVD VCC VCC Output Decoupling Recommendations
AA59 G45
AE60 RSVD VCC G47
RSVD VCC 470uFx4 7343 TOP socket side
B
AC59 G49 B
AG58 RSVD VCC G51
RSVD VCC 22uFx8 0805 4 on TOP, 4 on BOT near socket edge
U59 G53 R651 R652
V59 RSVD VCC G55 *130/F_4 130/F_4
1006 Del RSVD VCC 22uFx11 0805 TOP, inside socket cavity
G57
AC22 VCC H23 H_CPU_SVIDDAT R650 *short_4
VCCST VCC 10uFx11 0805 BOT, inside socket cavity VR_SVID_DATA [36]
+1.05V +1.05V_VCCST AE22 J23
AE23 VCCST VCC K23
+1.05V_VCCST VCCST VCC Place PU resistor
R345 *short_8 K57 close to CPU
AB57 VCC L22 +1.05V_VCCST +VCCIO_OUT
AD57 VCC VCC M23
C235 AG57 VCC VCC M57
*4.7u/10V_6 C24 VCC VCC P57
C28 VCC VCC U57
VCC VCC Place PU resistor
+VCCIN C32 W57 close to CPU R637 R636
VCC VCC 75_4 *75_4
12 OF 19
H_CPU_SVIDART# R631 43_4 VR_SVID_ALERT# [36]
+3V
HWPG_1.05V for DDR=1.5V
H_CPU_SVIDCLK R628 *short_4 VR_SVID_CLK [36]
+3V
R78
*4.7K_4
A A
R94
HWPG_1.05V [31]
*4.7K_4
3
3
R77
R99 *4.7K_4 2 2 *100K/F_4
+1.05V
Q9
Quanta Computer Inc.
1
Processor Strapping
1 0
CFG0 CFG0 R289 *1K_4
EAR-STALL/NOT STALL RESET SEQUENCE (DEFAULT) NORMAL OPERATION; NO STALL STALL
AFTER PCU PLL IS LOCKED
CFG1 CFG1
(DEFAULT) NORMAL OPERATION PCH-LESS MODE R606 *1K_4
PCH/ PCH LESS MODE SELECTION
B B
A A
CFG10 POWER FEATURES ACTIVATED POWER FEATURES (ESPECIALLY CLOCK CFG10 R295 *1K_4
SAFE MODE BOOT DURING RESET GATINE ARE NOT ACTIVATED
Quanta Computer Inc.
PROJECT : ZRT/ZRTA
Size Document Number Rev
3A
Haswell 5/5 (CFG/GND)
Date: Wednesday, February 11, 2015 Sheet 6 of 44
5 4 3 2 1
5 4 3 2 1
8 OF 19
C C
Power Sequence R285 *short_4 APWROK_R
[31] APWORK
[5,31] PCH_PWROK R559 *short_4 EC_PWROK_R
100K_4
RSMRST# R549 *short_4 DPWROK_R for EC power on 250 ms 10K_4
Non Deep Sx
2
SYS_PWROK R277 *10K_4 U15 *0.33u/10V_6
3
R211
*0_6
+3V_S5
3
PCH_SUSPWRACK R590 *10K_4
GPIO61 R603 *10K_4 SYSPWOK
1C-5 2014/01/16 Change R264 from 10k to 1k +3V_S5 PCH_SLP_SUS# 2
for wake on lan issue.
+3V_S5 C249 *0.1u/10V_4 Q16
*2N7002K
PCH_ACPRESENT R287 10K_4
1
5
U17
3
1
Y2 R577
Haswell ULT PCH(LPC,SPI,SMBUS,C-LINK,THERMAL)
32.768KHZ 10M_4
U37E HSW_ULT_DDR3L
C498 15p/50V_4 RTC_X2
2
RTC_X1 AW5
RTC_X2 AY5 RTCX1
1B-1 R562 1M_4 SM_INTRUDER# AU6 RTCX2 J5 U37G HSW_ULT_DDR3L
RTC Circuitry (RTC) +3V_RTC
+3V_RTC
PCH_INTVRMEN AV7 INTRUDER SATA_RN0/PERN6_L3 H5 SATA_RXN0 [27]
D
AV6 INTVRMEN SATA_RP0/PERP6_L3 B15 SATA_RXP0 [27] AU14 AN2 D
SRTC_RST# RTC HDD +3V_S5 SMBALERT/GPIO11 SMBALERT#
D25 +3V_RTC
Trace width = 30 mils RTC_RST# AU7 SRTCRST SATA_TN0/PETN6_L3 A15
SATA_TXN0 [27] [27,28,31] LPC_LAD0
AW12 LAD0 AP2 SMB_PCH_CLK
[13] RTC_RST# RTCRST SATA_TP0/PETP6_L3 SATA_TXP0 [27] [27,28,31] LPC_LAD1 LAD1 +3V_S5 SMBCLK
R528 *Short_6 +3V_RTC_2 R219 AY12 LPC +3V_S5 AH1 SMB_PCH_DAT
+3VPCU [27,28,31] LPC_LAD2 LAD2 SMBUS SMBDATA
RTC_RST# J8 AW11 +3V_S5 AL2 SMB0ALERT#
SATA_RN1/PERN6_L2 SATA_RXN1 [27] [27,28,31] LPC_LAD3 LAD3
VCCRTC_2 R525 1K_4 +3V_RTC_1 H8
SATA_RXP1 [27] [27,28,31] LPC_LFRAME#
AV12 +3V_S5 SML0ALERT/GPIO60 AN1 VGA_MBCLK
1
20K/F_4 SATA_RP1/PERP6_L2 A17 LFRAME SML0CLK AK1 VGA_MBDATA
BAT54C SATA_TN1/PETN6_L2 B17
SATA_TXN1 [27] ODD +3V_S5 SML0DATA AU4 SMB1ALERT#
SATA_TP1/PETP6_L2 SATA_TXP1 [27] +3V_S5 SML1ALERT/PCHHOT/GPIO73 SMB1ALERT# [29]
C182 J1 +3V_S5 AU3 SMB_ME1_CLK
2.2u/6.3V_4 *JUMP HDA_BCLK_R AW8 J6 SML1CLK/GPIO75 AH3 SMB_ME1_DAT
+3V_RTC_[0:2] +3V_S5
2
HDA_SYNC_R AV11 HDA_BCLK/I2S0_SCLK SATA_RN2/PERN6_L1 H6 PCH_SPI_CLK AA3 SML1DATA/GPIO74
Trace width = 20 mils R214 HDA_RST#_R AU8 HDA_SYNC/I2S0_SFRM SATA_RP2/PERP6_L1 B14 PCH_SPI_CS0# Y7 SPI_CLK AF2 CL_CLK
HDA_RST/I2S_MCLK SATA_TN2/PETN6_L1 SPI_CS0 CL_CLK TP83
1
W25Q64FW -- 8MB 2
B B
SMB_PCH_CLK 6 1
ULT Strapping Table CLK_SCLK [13,14,15,29]
Pin Name Strap description Sampled Configuration note PCH_XDP_WLAN/S5 2N7002DW DDR_TP/S0
0 = Default enable (iPD 20K) SPKR
GPIO81(SPKR) No reboot on TCO Timer PWROK +3V R304 *1K_4 SPKR [10,26]
expiration 1 =Disable No-Reboot mode
0 = Default can program ME (iPD 20K) [31] PCH_SPI_CLK_EC PCH_SPI_CLK_EC R593 15_4 SMBus(EC) +3V_S5
HDA_SDO Flash Descriptor Security HDA_SDO_R R573 *short_4
PWROK ME_WR# [31]
Override / Intel ME Debug Mode 1 =can't program ME PCH_SPI_CLK R602 15_4 SPI_CLK_8M
INTVRMEN Integrated 1.05V VRM enable ALWAYS 1=Should be always pull-up +3V_RTC R545 330K_4 PCH_INTVRMEN R558 *330K_4 C522 *22p/50V_4 R241 R259
*2.2K_4 *2.2K_4
Q19
0 = Default disable (iPD 20K) PCH_SPI_SI_EC R598 15_4 5
[10] GPIO66 [31] PCH_SPI_SI_EC
GPIO66 Top-Block Swap override 3 4
1 = Enable TBS function +3V R356 *1K_4 GPIO66 R361 *1K_4 [19,31] 2ND_MBCLK SMB_ME1_CLK
PCH_SPI_SI R604 15_4 SPI_SI_8M
0 = Default SPI (iPD 20K) [10] GPIO86
2
GPIO86 Boot BIOS Strap Bit GPIO86
1 =LPC +3V R343 *1K_4 R346 *1K_4 +3V_PCH_ME R605 *1K_4
[19,31] 2ND_MBDATA 6 1 SMB_ME1_DAT
0 = Default enable w/o PCH_SPI_IO3 R600 15_4 SPI_HOLD_IO3_ME
confidentiality(iPD 20K)
[10] GPIO15 +3V_PCH_ME R648 *1K_4 EC/S5 *2N7002DW PCH/S5
GPIO15 TLS(Transport layer security)
A
1 =Default enable with +3V_S5 R317 8.2K_4 GPIO15 R307 *1K_4 PCH_SPI_IO2 R657 15_4 SPI_WP_IO2_ME A
2ND_MBCLK R240 *short_4SMB_ME1_CLK
confidentiality 2ND_MBDATA R263 *short_4SMB_ME1_DAT
Haswell ULT PCH (PCIE,USB3.0,USB2.0) Haswell ULT PCH (CLOCK) XTAL24_IN C539 12p/50V_4
3
4
1A-6 2013/10/21 reversal PEG lan for layout.
1A-8 2013/10/21 Swap PEG to nomroal mode. U37K HSW_ULT_DDR3L 1A-1 2013/10/15 following up acer define and swap USB3 and USB2 R707 Y3
USB2 port. 1M_4 24MHz
1
2
E10 PERN5_L0 USB2N0 AM8
[16] PEG_RX0 PERP5_L0
DSW USB2P0 USBP0+ [30] MB USB3.0
D XTAL24_OUT D
C532 EV@0.22u/10V_4 C_PEG_TX#0 C23 DSW AR7 C541 12p/50V_4
[16] PEG_TX#0 PETN5_L0 USB2N1 USBP1- [30] HSW_ULT_DDR3L
[16] PEG_TX0 C533 EV@0.22u/10V_4 C_PEG_TX0 C22 DSW AT7 USBP1+ [30] MB USB3.0 U37F
PETP5_L0 USB2P1
[16] PEG_RX#1 F8 DSW AR8
E8 PERN5_L1 USB2N2 AP8
[16] PEG_RX1 PERP5_L1 DSW USB2P2 DB USB2.0
PEG x4
C525 EV@0.22u/10V_4 C_PEG_TX#1 B23 DSW AR10 TP111 CLK_PCIE_N0 C43 A25 XTAL24_IN
[16] PEG_TX#1 PETN5_L1 USB2N3 USBP3- [30] CLKOUT_PCIE_N0 XTAL24_IN
[16] PEG_TX1 C526 EV@0.22u/10V_4 C_PEG_TX1 A23 DSW AT10 DB USB2.0 TP108 CLK_PCIE_P0 C42 B25 XTAL24_OUT
PETP5_L1 USB2P3 USBP3+ [30] CLKOUT_PCIE_P0 XTAL24_OUT
TP96 CLK_PCIE_REQ0# U2 +3V
H10 AM15 PCIECLKRQ0/GPIO18 K21
[16] PEG_RX#2 PERN5_L2 DSW USB2N4 USBP4- [28] RSVD
[16] PEG_RX2
G10 DSW AL15 USBP4+ [28] BT B41 M21
PERP5_L2 USB2P4 A41 CLKOUT_PCIE_N1 RSVD C26 ICLK_BIAS R382 3.01K/F_4
CLKOUT_PCIE_P1 DIFFCLK_BIASREF +V1.05S_AXCK_LCPLL
C530 EV@0.22u/10V_4 C_PEG_TX#2 B21 DSW AM13 TP42 CLK_PCIE_REQ1# Y5 +3V
[16] PEG_TX#2 PETN5_L2 USB2N5 USBP5- [23] PCIECLKRQ1/GPIO19
[16] PEG_TX2 C531 EV@0.22u/10V_4 C_PEG_TX2 C21 DSW AN13 USBP5+ [23] Touch screen C35 TESTLOW_C35
PETP5_L2 USB2P5 C41 CLOCK TESTLOW_C35 C34 TESTLOW_C34
+3V
B B
11 OF 19
CLK_PCIE_REQ4# R341 10K_4
R334 *1K_4
A A
3
DGPU_PWROK PD on GPU side +3V_S5
R642 SR@10K_4 BOARD_ID0 R632 DR@10K_4
LAN_DISABLE# R224 10K_4
[2] BOARD_ID1 IMVP_PWRGD_3V 2 Q22
GPIO8 R243 10K_4
B R325 GS@10K_4 BOARD_ID1 R324 NGS@10K_4 FDV301N ACCEL_INTA R303 *10K_4 B
[2] BOARD_ID2 GPIO24 R315 10K_4
GPIO28 R609 10K_4
1
GPIO47 R617 10K_4
R645 NAC@10K_4 BOARD_ID2 R644 AC@10K_4 +1.05V_VCCST GPIO57 R588 10K_4
R292 GPIO56 R310 10K_4
R687 NTPM@10K_4 BOARD_ID3 R684 TPM@10K_4 1K_4 GPIO59 R226 10K_4
GPIO26 R262 10K_4
[2] BOARD_ID4 R281 GPIO58 R288 10K_4
GPIO44 R599 10K_4
2
R656 10K_4 BOARD_ID4 R655 *10K_4 1K_4 GPIO13 R582 10K_4
GPIO14 R302 10K_4
THRMTRIP# 1 3 GPIO9 R261 10K_4
SYS_SHDN# [33,37]
Q21 MMBT3904-7-F GPIO10 R272 10K_4
+3V GPIO45 R309 10K_4
SKU ID R275 10K_4
R244 *10K_4
Low High R624 IV@10K_4 SKU_ID0 R623 EV@10K_4
U18 +1.05V_VCCST +3V +3VPCU
R331 IV@10K_4 SKU_ID1 R330 EV@10K_4 GPIO25 R278 *10K_4
BOARD_ID0 single rank SKU Dual rank SKU 1 5 R251 *10K_4
NC VCC WK_GPIO27 R245 10K_4
1
R301
2 C255
BOARD_ID1 Reserved Reserve SKU_ID1 SKU_ID0 VGA H/W Setup [5,36] IMVP_PWRGD A 0.1u/10V_4
10K_4
1B-7 20131220 Change +3VPCU to +3V_S5
(Default)
2
Signal Menu non deep sx
A 3 4 GPIO27 : If not used then use A
GND Y IMVP_PWRGD_3V [7]
UMA Only 0 0 UMA Hidden UMA boot 8.2-kΩ to 10-kΩ pull-down to GND.
BOARD_ID2 74AUP1G07GW
No IOAC IOAC dGPU Only 0 1 GPU Hidden GPU boot
Quanta Computer Inc.
Switchable
1 0 UMA+GPU dGPU/SG UMA boot
BOARD_ID3 No TPM TPM (Mux) PROJECT : ZRT/ZRTA
Non-Dolly Optimize Size Document Number Rev
1 1 UMA UMA/SG UMA boot 3A
BOARD_ID4 (Default) Dolly (Muxless) LPT 4/6 (GPIO/MISC)
Date: Wednesday, February 11, 2015 Sheet 10 of 44
5 4 3 2 1
5 4 3 2 1
C243
C268 *1u/6.3V_4 1u/6.3V_4
C265 1u/6.3V_4
C262 1u/6.3V_4 U37M HSW_ULT_DDR3L
1.838A K9
1mA
+1.05V +1.05V_MODPHY VCCHSIO
L10 +3V_RTC
M9 VCCHSIO
R397 *short_8
1.741A +V1.05S_AIDLE N8 VCCHSIO HSIO RTC AH11
P9 VCC1_05 VCCSUS3_3 AG10 C184 C487 C183
D B18 VCC1_05 VCCRTC AE7 +VCCRTCEXT 0.1u/10V_4 0.1u/10V_4 1u/6.3V_4 D
+V1.05S_AUSB3PLL VCCUSB3PLL DCPRTC
C284 +V1.05S_ASATA3PLL B11
*1u/6.3V_4 VCCSATA3PLL
18mA C257
Y20 SPI Y8 +V3.3M_PSPI 0.1u/10V_4
AA21 RSVD VCCSPI R320 *Short_6
R377 *0_6
10mA +V1.05S_APLLOPI
W21 VCCAPLL
OPI +3V_S5
+1.05V_S5 VCCAPLL AG14 R318 *0_6
VCCASW +3V
AG13 PCH_VCC_1_1_21
C278 C271 VCCASW
10u/6.3V_6 1u/6.3V_4 +1.05V_DCPSUS3 J13 USB3 C258
DCPSUS3 +1.05V
J11 +V1.05S_CORE_PCH R335 *Short_6 +1.05V 0.1u/10V_4
VCC1_05 H11
AH14 HDA VCC1_05 H15
25mA +V3.3DX_1.5DX_1.8DX_AUDIO VCCHDA VCC1_05 AE8
2.063A
+1.05V_S5 R286 *0_4 +1.05V_DCPSUS2
VCC1_05
R299 *short_8 +1.05V
AF22
AH13 VRM VCC1_05 AG19
Deep Sx 0.114A DCPSUS2 DCPSUSBYP
C238 +3VPCU R565 *0_6 CORE AG20 C233 C232 C239
1u/6.3V_4 C197 22u/6.3V_8 DCPSUSBYP AE9 1u/6.3V_4 1u/6.3V_4 10u/6.3V_6
R566 *Short_6 VCCASW AF9
+3V_S5 VCCASW
AC9 AG8
+3VCC_S5 VCCSUS3_3 VCCASW
Non Deep Sx AA9 GPIO/LPC AD10 +1.05V_DCPSUS1 +PCH_VCCDSW
C494 +VCCPDSW AH10 VCCSUS3_3 DCPSUS1 AD8
1u/6.3V_4 +V3.3S_VCCPCORE V8 VCCDSW3_3 DCPSUS1
W9 VCC3_3 C230
VCC3_3 J15 1u/6.3V_4
R380 *short_8
41mA THERMAL SENSOR VCCTS1_5 K14
+3V VCC3_3 +V1.05M_VCCASW
K16
VCC3_3
C274 +V1.05M_VCCASW
658mA R314 *short_8 +1.05V
C 22u/6.3V_8 +V1.05S_AXCK_DCB
J18 109mA C
K19 VCCCLK SERIAL IO U8
A20 VCCCLK VCCSDIO T9 R290 *0_4 C248 C247
+V1.05S_AXCK_LCPLL VCCACLKPLL VCCSDIO
+1.05V
J17 +1.05V_S5 1u/6.3V_4 22u/6.3V_8
R21 VCCCLK
+1.05V VCCCLK
C242 1u/6.3V_4 T21 LPT LP POWER C241
C276 1u/6.3V_4 K18 VCCCLK SUS OSCILLATOR AB8 1u/6.3V_4
M20 RSVD DCPSUS4
WW15 4/10 Intel VCCDSW3 RSVD
63mA V21 3mA
G3 can't boot issue. AE20 RSVD AC20 +V1.5S_VCCATS R378 *Short_6
C492 +3VCC_S5 VCCSUS3_3 RSVD +1.5V
AE21 AG16 41mA
+VCCPDSW +PCH_VCCDSW VCCSUS3_3 USB2 VCC1_05 AG17 +V3.3S_VCCPTS R379 *Short_6
VCC1_05 +3V
0.47u/25V_6 C272
13 OF 19 1u/6.3V_4
+V3.3S_VCCSDIO
17mA R364 *Short_6 +3V
PCH VCCHSIO Power +1.05V_DCPSUS4 R300 *0_4 +1.05V_S5
C266
1u/6.3V_4
C244
1u/6.3V_4
L21 2.2uH/210mA_8
57mA
C311 C319 C273
47u/6.3V_8 47u/6.3V_8 1u/6.3V_4
+1.05V +V1.05S_AXCK_LCPLL
R222 *Short_6
C543 C542 C524 C534 C540 C529
47u/6.3V_8 47u/6.3V_8 1u/6.3V_4 47u/4V_8 47u/4V_8 1u/6.3V_4
C199
0.1u/10V_4 Quanta Computer Inc.
Place close to ball PROJECT : ZRT/ZRTA
2013/10/31 PN change to H=0.85.L17 H=0.9 Size Document Number Rev
3A
LPT 5/6 (POWER)
Date: Wednesday, February 11, 2015 Sheet 11 of 44
5 4 3 2 1
5 4 3 2 1
14 OF 19
HSW_ULT_DDR3L
U37Q
+3V_S5
+3V
NOA_STBP_0
[4] XDP_PREQ# TP98 TP79 NOA_STBP_0 [6]
XDP_DBRESET_N R613 *1K_4 NOA_STBN_0
[4] XDP_PRDY# TP101 TP75 NOA_STBN_0 [6]
D D
CFG0 CFG8
[6] CFG0 TP33 TP84 CFG8 [6]
CFG1 CFG9
[6] CFG1 TP73 TP86 CFG9 [6]
CFG2 CFG10
[6] CFG2 TP80 TP34 CFG10 [6]
CFG3 CFG11
[6] CFG3 TP78 TP41 CFG11 [6]
NOA_STBP_1
[4] XDP_BPM#0 TP48 TP89 NOA_STBP_1 [6]
NOA_STBN_1
[4] XDP_BPM#1 TP105 TP90 NOA_STBN_1 [6]
CFG4 CFG12
[6,8] CFG4 TP81 TP94 CFG12 [6]
CFG5 CFG13
[6] CFG5 TP82 TP92 CFG13 [6]
CFG6 CFG14
[6] CFG6 TP38 TP93 CFG14 [6]
CFG7 CFG15
[6] CFG7 TP37 TP95 CFG15 [6]
R125 *1K_4 VCCST_PWRGD_XDP CK_XDP_P_R R721 *0_4 CLK_PCIE_XDPP [9]
[31,34] HWPG_1.05V_S5 TP64 TP122
NBSWON# CK_XDP_N_R R720 *0_4 CLK_PCIE_XDPN [9]
TP12 TP127
+3V
C180
*0.1u/10V_4
U13
14
VCC
B XDP_TDO 2 3 B
[8] XDP_TDO 1A 1B XDP_TDO_CPU [4]
1
APS1 R137 *0_6 APS3 R136 *0_6 APS7 1OE
[8] XDP_TDI XDP_TDI 5 6
2A 2B XDP_TDI_CPU [4]
APS 4
2OE
[8] XDP_TMS XDP_TMS 9 8
+3VCC_S5 3A 3B XDP_TMS_CPU [4]
CN2 10
1 APS1 R133 *0_6 3OE
1 2 R130 *0_4 XDP_TRST_N 12 11
2 SUSB# [7,31] 4A 4B XDP_TRST# [4,8]
3 APS3 R132 *0_6 +3VPCU
3 4 R138 *0_4 13
4 5 R139 *0_4 PCH_SLP_S5# [7] 4OE 15
5 6 R142 *0_4 SUSC# [7,31] DPAD
6 7 APS7 R131 *0_6 PCH_SLP_A# [7] 7
7 +3VPCU GND
8
8 9 R144 *0_4 *74CBTLV3126
9 10 RTC_RST# [8]
10 11 R146 *0_4
11 12 NBSWON# [29,31] +1.05V +3V
12 13 R149 *0_4 SYS_RESET# U14
13 14 SYS_RESET# [7]
A 14 15 1 5 A
15 16 NC VCC R216
16
1
17 *10K_4
17 18 2 C198
18 [5] VCCST_PWRGD A *0.1u/10V_4 Quanta Computer Inc.
2
*ACES_88511-180N
3 4
GND Y PROJECT : ZRT/ZRTA
Size Document Number Rev
*74AUP1G07GW 3A
CPU/PCH XDP
Date: Wednesday, February 11, 2015 Sheet 13 of 44
5 4 3 2 1
1 2 3 4 5 6 7 8
+1.35V_SUS
[3] M_A_A[15:0] JDIM1A JDIM1B
M_A_A0 98 5 M_A_DQ2 [3] 75 44
M_A_A1 97 A0 DQ0 7 76 VDD1 VSS16 48
A1 DQ1 M_A_DQ6 [3] VDD2 VSS17
M_A_A2 96 15 M_A_DQ7 [3]
81 49
M_A_A3 95 A2 DQ2 17 82 VDD3 VSS18 54
A3 DQ3 M_A_DQ3 [3] VDD4 VSS19
M_A_A4 92 4 M_A_DQ0 [3]
87 55
M_A_A5 91 A4 DQ4 6 88 VDD5 VSS20 60
A5 DQ5 M_A_DQ1 [3] VDD6 VSS21
M_A_A6 90 16 M_A_DQ5 [3] 93 61
M_A_A7 86 A6 DQ6 18 94 VDD7 VSS22 65
A7 DQ7 M_A_DQ4 [3] VDD8 VSS23
M_A_A8 89 21 99 66
M_A_A9 85 A8 DQ8 23
M_A_DQ9 [3] 2.48A 100 VDD9 VSS24 71
A9 DQ9 M_A_DQ8 [3] VDD10 VSS25
M_A_A10 107 33 M_A_DQ15 [3]
105 72
A M_A_A11 84 A10/AP DQ10 35 106 VDD11 VSS26 127 A
(204P)
116 DQ35 130 9 VSS3 VSS51 196
[4] M_A_ODT0_DIMM ODT0 DQ36 M_A_DQ36 [3] VSS4 VSS52
120 132 M_A_DQ37 [3]
13
[4] M_A_ODT1_DIMM ODT1 DQ37 VSS5
140 M_A_DQ39 [3]
14
1A-8 2013/10/23 Change DIMM1_SA0/SA1 11 DQ38 142 19 VSS6
B M_A_DQ38 [3] B
to DIMM0_SA0/SA1. 28 DM0 DQ39 147 20 VSS7
DM1 DQ40 M_A_DQ46 [3] VSS8
46 149 M_A_DQ44 [3]
25
(204P)
63 DM2 DQ41 157 26 VSS9 203
DM3 DQ42 M_A_DQ41 [3] VSS10 VTT1 +DDR_VTT_RUN
136 159 M_A_DQ45 [3]
31 204
153 DM4 DQ43 146 32 VSS11 VTT2
DM5 DQ44 M_A_DQ40 [3] VSS12
170 148 M_A_DQ42 [3]
37 205
187 DM6 DQ45 158 38 VSS13 GND 206
DM7 DQ46 M_A_DQ43 [3] VSS14 GND
160 M_A_DQ47 [3] 43
M_A_DQS0 12 DQ47 163 VSS15
DQS0 DQ48 M_A_DQ49 [3]
M_A_DQS1 29 165 M_A_DQ52 [3]
M_A_DQS2 47 DQS1 DQ49 175 DDR3-DIMM1_H=4.0_STD
DQS2 DQ50 M_A_DQ54 [3]
M_A_DQS3 64 177 M_A_DQ53 [3]
M_A_DQS4 137 DQS3 DQ51 164
DQS4 DQ52 M_A_DQ48 [3]
M_A_DQS5 154 166 M_A_DQ55 [3]
M_A_DQS6 171 DQS5 DQ53 174
DQS6 DQ54 M_A_DQ51 [3]
M_A_DQS7 188 176 M_A_DQ50 [3] M1 solution
[3] M_A_DQS[7:0] DQS7 DQ55
M_A_DQS#0 10 181 M_A_DQ56 [3]
M_A_DQS#1 27 DQS#0 DQ56 183 +1.35V_SUS
DQS#1 DQ57 M_A_DQ60 [3]
M_A_DQS#2 45 191 M_A_DQ58 [3]
M_A_DQS#3 62 DQS#2 DQ58 193
DQS#3 DQ59 M_A_DQ62 [3]
M_A_DQS#4 135 180
M_A_DQS#5 152 DQS#4 DQ60 182
M_A_DQ57
M_A_DQ61
[3]
[3] R90 Vref_CA
M_A_DQS#6 169 DQS#5 DQ61 192 1.8K/F_4
DQS#6 DQ62 M_A_DQ63 [3] +SMDDR_VREF_DIMM
M_A_DQS#7 186 194 M_A_DQ59 [3]
[3] M_A_DQS#[7:0] DQS#7 DQ63
+VREF_CA_CPU R80 *Short_6 R81 2/F_6
1A-2 2013/10/16 Chage net name M_B_DQS#[7:0] to DDR3-DIMM1_H=4.0_STD
2
M_A_DQS#[7:0].
C M3 solution C69 R79 C66
C
1
+1.35V_SUS Place these Caps near SO-DIMM R89
+SMDDR_VREF_DIMM +SMDDR_VREF_DQ0 24.9/F_4
C111 C75 C110 C113 C79
10u/6.3V_6 10u/6.3V_6 10u/6.3V_6 0.1u/10V_4 0.1u/10V_4
+3V +DDR_VTT_RUN
R127 Vref_DQ
1.8K/F_4
+SMDDR_VREF_DQ0
C81 C82 C103 C109 C98 C84 C88
C106 C101 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 1u/6.3V_4 +VREFDQ_SA_M3 R129 *Short_6 R118 2/F_6
2.2u/6.3V_6 0.1u/10V_4 4.7u/10V_6 4.7u/10V_6 4.7u/10V_6
M3 solution 2
C104 R128 C105
0.022u/16V_4 1.8K/F_4 470p/50V_4
1
D D
R126
24.9/F_4
+1.35V_SUS
[3] M_B_A[15:0] JDIM2A JDIM2B
M_B_A0 98 5 75 44
A0 DQ0 M_B_DQ23 [3] VDD1 VSS16
M_B_A1 97 7 76 48
A1 DQ1 M_B_DQ22 [3] VDD2 VSS17
M_B_A2 96 15 M_B_DQ19 [3]
81 49
M_B_A3 95 A2 DQ2 17 82 VDD3 VSS18 54
A3 DQ3 M_B_DQ20 [3] VDD4 VSS19
M_B_A4 92 4 M_B_DQ16 [3]
87 55
M_B_A5 91 A4 DQ4 6 88 VDD5 VSS20 60
A5 DQ5 M_B_DQ17 [3] VDD6 VSS21
M_B_A6 90 16 M_B_DQ21 [3]
93 61
M_B_A7 86 A6 DQ6 18 94 VDD7 VSS22 65
A7 DQ7 M_B_DQ18 [3] VDD8 VSS23
M_B_A8 89 21 99 66
D
M_B_A9 85 A8 DQ8 23
M_B_DQ4 [3] 2.48A 100 VDD9 VSS24 71
D
A9 DQ9 M_B_DQ2 [3] VDD10 VSS25
M_B_A10 107 33 105 72
A10/AP DQ10 M_B_DQ7 [3] VDD11 VSS26
M_B_A11 84 35 106 127
(204P)
C DQ35 VSS3 VSS51 C
116 130 9 196
[4] M_B_ODT0_DIMM ODT0 DQ36 M_B_DQ33 [3] VSS4 VSS52
120 132 13
[4] M_B_ODT1_DIMM ODT1 DQ37 M_B_DQ32 [3] VSS5
140 14
DQ38 M_B_DQ35 [3] VSS6
11 142 M_B_DQ39 [3]
19
28 DM0 DQ39 147 20 VSS7
DM1 DQ40 M_B_DQ42 [3] VSS8
46 149 M_B_DQ43 [3]
25
63 DM2
DM3
(204P) DQ41
DQ42
157 M_B_DQ45 [3]
26 VSS9
VSS10 VTT1
203 +DDR_VTT_RUN
136 159 M_B_DQ47 [3]
31 204
153 DM4 DQ43 146 32 VSS11 VTT2
DM5 DQ44 M_B_DQ41 [3] VSS12
170 148 M_B_DQ40 [3]
37 205
187 DM6 DQ45 158 38 VSS13 GND 206
DM7 DQ46 M_B_DQ44 [3] VSS14 GND
160 43
DQ47 M_B_DQ46 [3] VSS15
M_B_DQS2 12 163
DQS0 DQ48 M_B_DQ55 [3]
M_B_DQS0 29 165
DQS1 DQ49 M_B_DQ51 [3]
M_B_DQS1 47 175 DDR3-DIMM1_H=4.0_RVS
DQS2 DQ50 M_B_DQ48 [3]
M_B_DQS3 64 177
DQS3 DQ51 M_B_DQ54 [3]
M_B_DQS4 137 164 M_B_DQ52 [3]
M_B_DQS5 154 DQS4 DQ52 166
DQS5 DQ53 M_B_DQ49 [3]
M_B_DQS6 171 174 M_B_DQ53 [3]
M_B_DQS7 188 DQS6 DQ54 176
[3] M_B_DQS[7:0] DQS7 DQ55 M_B_DQ50 [3]
M_B_DQS#2 10 181 M_B_DQ56 [3]
M_B_DQS#0 27 DQS#0 DQ56 183
DQS#1 DQ57 M_B_DQ61 [3]
M_B_DQS#1 45 191 M_B_DQ58 [3]
M_B_DQS#3 62 DQS#2 DQ58 193
DQS#3 DQ59 M_B_DQ60 [3]
M_B_DQS#4 135 180
DQS#4 DQ60 M_B_DQ57 [3]
M_B_DQS#5 152 182
DQS#5 DQ61 M_B_DQ62 [3]
M_B_DQS#6 169 192
B DQS#6 DQ62 M_B_DQ59 [3] B
M_B_DQS#7 186 194
[3] M_B_DQS#[7:0] DQS#7 DQ63 M_B_DQ63 [3]
M1 solution
1A-22013/10/16 Swap M_B_DQS2/M_B_DQS3 and swap DDR3-DIMM1_H=4.0_RVS +1.35V_SUS
M_B_DQS#2/M_B_DQS#3.
R154 Vref_DQ
1.8K/F_4
+1.35V_SUS Place these Caps near SO-DIMM +SMDDR_VREF_DQ1
+SMDDR_VREF_DIMM +SMDDR_VREF_DQ1
C138 C122 C124 C133 C119 +VREFDQ_SB_M3 R158 *Short_6 R156 2/F_6
10u/6.3V_6 10u/6.3V_6 10u/6.3V_6 0.1u/10V_4 0.1u/10V_4
2
C137 + C108 C120 C123 C146 C145
M3 solution C140 R155 C144
330u/2V_7343 0.022u/16V_4 1.8K/F_4 470p/50V_4
1
10u/6.3V_6 0.1u/10V_4 0.1u/10V_4
+3V +DDR_VTT_RUN
SA1 SA0
CHA 0 0 Quanta Computer Inc.
PROJECT : ZRT/ZRTA
CHB 1 0 Size Document Number Rev
3A
DDRIII Memory SO-DIMM B
Date: Wednesday, February 11, 2015 Sheet 15 of 44
5 4 3 2 1
1 2 3 4 5 6 7 8
+1.05V_GFX
U39A
Near GPU 1/14 PCI_EXPRESS
C588 EV@22U/6.3VS_6
C379 EV@22U/6.3VS_6 NVDD = 32.22 ~ 26.66 A +VGPU_CORE
C373 EV@10U/6.3VS_6 PEX_WAKE AB6 C310 *0.1U/10V_4
C340 EV@10U/6.3VS_6 Under GPU U39E
C388 EV@4.7u/10V_6 AA22 PEX_IOVDD 11/14 NVVDD
AB23 PEX_IOVDD PEX_RST AC7 VGA_RST# R400 *short_4 PEGX_RST# [19] C363 EV@1U/6.3V_4 K10 VDD
AC24 C318 EV@1U/6.3V_4 K12
C354 EV@1U/6.3V_4 AD25
PEX_IOVDD
PEX_IOVDD PEX_CLKREQ AC6 PEX_CLKREQ# R395 EV@10K/F_4 +3V_GFX C322 EV@1U/6.3V_4 K14
VDD
VDD U39C VDD33 = 56mA
A C361 EV@1U/6.3V_4 AE26 PEX_IOVDD C316 EV@1U/6.3V_4 K16 VDD 14/14 XVDD/VDD33
A
AE27 PEX_IOVDD PEX_REFCLK AE8 CLK_PCIE_VGA [9] C336 EV@4.7u/10V_6 K18 VDD
Under GPU PEX_REFCLK AD8 CLK_PCIE_VGA# [9] C365 EV@4.7u/10V_6 L11 VDD AD10 NC VDD33 G10 +3V_GFX
C330 EV@4.7u/10V_6 L13 VDD AD7 NC VDD33 G12
AC9 PEG_RXP0_C C557 EV@0.22U/10V_4 C338 EV@4.7u/10V_6 L15 B19 C331 EV@0.1U/10V_4Under GPU
PEX_IOVDD + PEX_IOVDDQ = 1.042A PEX_TX0
PEX_TX0 AB9 PEG_RXN0_C C555 EV@0.22U/10V_4
PEG_RX0 [9]
C327 EV@4.7u/10V_6 L17
VDD
VDD
NC
PEG_RX#0 [9]
C357 EV@4.7u/10V_6 M10 VDD
+1.05V_GFX PEX_RX0 AG6 PEG_TX0 [9] C342 EV@4.7u/10V_6 M12 VDD F11 3V3AUX_NC C300 EV@4.7u/10V_6Near GPU
TP57
C387 EV@22U/6.3VS_6 AA10 PEX_IOVDDQ PEX_RX0 AG7 PEG_TX#0 [9] C332 EV@4.7u/10V_6 M14 VDD C3071 2 EV@1U/10V_6
C364 *22U/6.3VS_6 AA12 PEX_IOVDDQ C321 EV@4.7u/10V_6 M16 VDD V5 FERMI_RSVD1_NC
C386 *10U/6.3VS_6 AA13 PEX_IOVDDQ PEX_TX1 AB10 PEG_RXP1_C C566 EV@0.22U/10V_4 C323 EV@4.7u/10V_6 M18 VDD V6 FERMI_RSVD2_NC
PEG_RX1 [9]
C359 EV@10U/6.3VS_6 AA16 PEX_IOVDDQ PEX_TX1 AC10 PEG_RXN1_C C564 EV@0.22U/10V_4 N11 VDD VDD33 G8 +3V_MAIN
PEG_RX#1 [9]
C590 EV@4.7u/10V_6 AA18 PEX_IOVDDQ N13 VDD VDD33 G9
AA19 PEX_IOVDDQ PEX_RX1 AF7 PEG_TX1 [9] 2 1 N15 VDD
Near GPU AA20 AE7 C366 N17
+
PEX_IOVDDQ PEX_RX1 PEG_TX#1 [9] VDD
AA21 PEX_IOVDDQ EV@330u_2.5V_3528 P10 VDD CONFIGURABLE C301 EV@4.7u/10V_6
AB22 PEX_IOVDDQ PEX_TX2 AD11 PEG_RXP2_C C567 EV@0.22U/10V_4 P12 VDD POWER CHANNELS C3081 2 EV@1U/10V_6
PEG_RX2 [9]
AC23 PEX_IOVDDQ PEX_TX2 AC11 PEG_RXN2_C C583 EV@0.22U/10V_4 P14 VDD * nc on substrate
PEG_RX#2 [9]
Under GPU AD24 PEX_IOVDDQ P16 VDD
C328 EV@1U/6.3V_4 AE25 PEX_IOVDDQ PEX_RX2 AE9 PEG_TX2 [9] P18 VDD G1 XPWR_G1 C324 EV@0.1U/10V_4
C325 EV@1U/6.3V_4 AF26 PEX_IOVDDQ PEX_RX2 AF9 PEG_TX#2 [9] R11 VDD G2 XPWR_G2 C320 EV@0.1U/10V_4
AF27 PEX_IOVDDQ C287 EV@22U/6.3V_8 R13 VDD G3 XPWR_G3
PEX_TX3 AC12 PEG_RXP3_C C584 EV@0.22U/10V_4 C294 EV@47u/6.3V_8 R15 VDD G4 XPWR_G4 Under GPU
PEG_RX3 [9]
PEX_TX3 AB12 PEG_RXN3_C C586 EV@0.22U/10V_4 R17 VDD G5 XPWR_G5
PEG_RX#3 [9]
C286 EV@4.7U/6.3VS_6 T10 VDD G6 XPWR_G6
PEX_RX3 AG9 PEG_TX3 [9] C305 EV@4.7U/6.3VS_6 T12 VDD G7 XPWR_G7
PEX_RX3 AG10 PEG_TX#3 [9] C299 EV@4.7U/6.3VS_6 T14 VDD
C296 EV@4.7U/6.3VS_6 T16
PEX_PLL_HVDD + PEX_TX4 AB13 C281 EV@4.7U/6.3VS_6 T18
VDD
VDD V1 XPWR_V1
B
PEX_SVDD_3V3 = 143mA PEX_TX4 AC13 U11
U13
VDD V2 XPWR_V2
B
Near GPU VDD
PEX_RX4 AF10 U15 VDD
+3V_GFX PEX_RX4 AE10 U17 VDD
V10 VDD
PEX_TX5 AD14 V12 VDD W1 XPWR_W1
AA8 PEX_PLL_HVDD PEX_TX5 AC14 +3V V14 VDD W2 XPWR_W2
C314 EV@0.1U/10V_4 AA9 PEX_PLL_HVDD V16 VDD W3 XPWR_W3
C309 EV@4.7u/10V_6 PEX_RX5 AE12 V18 VDD W4 XPWR_W4
C315 EV@4.7u/10V_6 PEX_RX5 AF12
Near GPU AB8 PEX_SVDD_3V3
AC15 bga595-nvidia-n13p-gv2-s-a2 bga595-nvidia-n13p-gv2-s-a2 COMMON
PEX_TX6
AB15 C264 COMMON
PEX_TX6
U19 EV@0.1U/10V_4
PEX_RX6 AG12 EV@MC74VHC1G08DFT2G
5
PEX_RX6 AG13
2
PEX_TX7 AB16
[7,13,25,27,28,31] PLTRST#
4SYS_PEX_RST R354 *short_4 SYS_PEX_RST_MON# Power up
AC16 1
PEX_TX7 [10] DGPU_HOLD_RST#
sequence
PEX_RX7 AF13
3
PEX_RX7 AE13 ALL 3.3V
R355
PEX_TX8 AD17 GT@100K/F_4 +3VGFX & +3V3_AON
NC
NC PEX_TX8 AC17
NC PEX_RX8 AE15
NC PEX_RX8 AF15
SYS_PEX_RST_MON# [19]
F2 VDD_SENSE NC PEX_TX9 AC18 NVVDD t>0
[38] VGA_VCCSENSE PEX_TX9 AB18 +3V
NC
C +VGACORE C
F1 GND_SENSE PEX_RX9 AG15
[38] VGA_VSSSENSE NC
PEX_RX9 AG16
NC
AB19
NC PEX_TX10
AC19 C269
PEX_VDD
PEX_TX10
NC
U21 GT@0.1U/10V_4 +1.05V_GFX
NC PEX_RX10 AF16 GT@MC74VHC1G08DFT2G t>=0
5
NC PEX_RX10 AE16
SYS_PEX_RST_MON# 2
NC PEX_TX11 AD20 4 PEGX_RST# FBVDDQ
AC20 GPU_PEX_RST_HOLD# 1
NC PEX_TX11 [19] GPU_PEX_RST_HOLD# +1.5V_GFX Power down
AE18
NC PEX_RX11
sequence
3
PEX_RX11 AF18
NC
R374
PEX_TX12 AC21 EV@100K/F_4
NC
NC PEX_TX12 AB21
NC PEX_RX14 AF21
EV@10K/F_4 R408 TESTMODE AD9 TESTMODE
NC PEX_TX15 AG24 PEX_CLKREQ# 1 3 CLK_PEGA_REQ# [9]
NC PEX_TX15 AG25
Q31 PU at page 9
NC PEX_RX15 AG21
AG22
EV@2N7002K Quanta Computer Inc.
NC PEX_RX15
U39B
2/14 FBA VMA_DQ[63:0]
VMA_DQ[63:0] [20,21]
R696 EV@10K/F_4 PS_FB_CLAMP F3 NC GF119 FBA_D0 E18 VMA_DQ0
FBA_D1 F18 VMA_DQ1
FB_CLAMP GF117 FBA_D2 E16 VMA_DQ2
F17 VMA_DQ3
FBA_D3
FBA_D4 D20 VMA_DQ4 FBVDDQ + FBVDD = 3.116A U39F
FBA_D5 D21 VMA_DQ5 13/14 GND
FBA_D6 F20 VMA_DQ6 +1.5V_GFX U39D A2 GND GND M13
FBA_D7 E21 VMA_DQ7 12/14 FBVDDQ AB17 GND GND M15
FBA_D8 E15 VMA_DQ8 AB20 GND GND M17
FBA_D9 D15 VMA_DQ9 C380 EV@0.1U/10V_4 B26 FBVDDQ AB24 GND GND N10
FBA_ODT_L FBA_CMD0 R424 EV@10K/F_4 FBA_D10 F15 VMA_DQ10 C367 EV@0.1U/10V_4 C25 FBVDDQ AC2 GND GND N12
FBA_D11 F13 VMA_DQ11 E23 FBVDDQ AC22 GND GND N14
A FBA_CKE_L FBA_CMD3 R423 EV@10K/F_4 FBA_D12 C13 VMA_DQ12 E26 FBVDDQ AC26 GND GND N16 A
FBA_D13 B13 VMA_DQ13 C3561 2 EV@1U/10V_6 F14 FBVDDQ AC5 GND GND N18
FBA_ODT_H FBA_CMD16 R433 EV@10K/F_4 FBA_D14 E13 VMA_DQ14 C3781 2 EV@1U/10V_6 F21 FBVDDQ AC8 GND GND P11
FBA_D15 D13 VMA_DQ15 C377 EV@4.7u/10V_6 G13 FBVDDQ AD12 GND GND P13
FBA_CKE_H FBA_CMD19 R439 EV@10K/F_4 FBA_D16 B15 VMA_DQ16 C382 EV@4.7u/10V_6 G14 FBVDDQ AD13 GND GND P15
FBA_D17 C16 VMA_DQ17 C368 EV@10U/6.3V_6 G15 FBVDDQ A26 GND GND P17
FBA_RST# FBA_CMD20 R758 EV@10K/F_4 FBA_D18 A13 VMA_DQ18 C369 EV@22U/6.3V_8 G16 FBVDDQ AD15 GND GND P2
FBA_D19 A15 VMA_DQ19 G18 FBVDDQ AD16 GND GND P23
FBA_D20 B18 VMA_DQ20 G19 FBVDDQ AD18 GND GND P26
FBA_D21 A18 VMA_DQ21 G20 FBVDDQ AD19 GND GND P5
FBA_D22 A19 VMA_DQ22 G21 FBVDDQ AD21 GND GND R10
FBA_D23 C19 VMA_DQ23 H24 FBVDDQ AD22 GND GND R12
FBA_D24 B24 VMA_DQ24 H26 FBVDDQ AE11 GND GND R14
FBA_D25 C23 VMA_DQ25 J21 FBVDDQ AE14 GND GND R16
FBA_D26 A25 VMA_DQ26 K21 FBVDDQ AE17 GND GND R18
FBA_D27 A24 VMA_DQ27 L22 FBVDDQ AE20 GND GND T11
FBA_D28 A21 VMA_DQ28 L24 FBVDDQ AB11 GND GND T13
FBA_D29 B21 VMA_DQ29 L26 FBVDDQ AF1 GND GND T15
FBA_D30 C20 VMA_DQ30 M21 FBVDDQ AF11 GND GND T17
FBA_D31 C21 VMA_DQ31 N21 FBVDDQ AF14 GND GND U10
FBA_D32 R22 VMA_DQ32 R21 FBVDDQ AF17 GND GND U12
[20,21] FBA_CMD0 C27 FBA_CMD0 FBA_D33 R24 VMA_DQ33 T21 FBVDDQ AF20 GND GND U14
[21] FBA_CMD1 C26 FBA_CMD1 FBA_D34 T22 VMA_DQ34 V21 FBVDDQ AF23 GND GND U16
[20] FBA_CMD2 E24 FBA_CMD2 FBA_D35 R23 VMA_DQ35 W21 FBVDDQ AF5 GND GND U18
[20,21] FBA_CMD3 F24 FBA_CMD3 FBA_D36 N25 VMA_DQ36 AF8 GND GND U2
[20,21] FBA_CMD4 D27 FBA_CMD4 FBA_D37 N26 VMA_DQ37 AG2 GND GND U23
[20,21] FBA_CMD5 D26 FBA_CMD5 FBA_D38 N23 VMA_DQ38 AG26 GND GND U26
[20,21] FBA_CMD6 F25 FBA_CMD6 FBA_D39 N24 VMA_DQ39 AB14 GND GND U5
[20,21] FBA_CMD7 F26 FBA_CMD7 FBA_D40 V23 VMA_DQ40 B1 GND GND V11
[20,21] FBA_CMD8 F23 FBA_CMD8 FBA_D41 V22 VMA_DQ41 B11 GND GND V13
B
[20,21] FBA_CMD9 G22 FBA_CMD9 FBA_D42 T23 VMA_DQ42 B14 GND GND V15 B
[20,21] FBA_CMD10 G23 FBA_CMD10 FBA_D43 U22 VMA_DQ43 B17 GND GND V17
[20,21] FBA_CMD11 G24 FBA_CMD11 FBA_D44 Y24 VMA_DQ44 B20 GND GND Y2
[20,21] FBA_CMD12 F27 FBA_CMD12 FBA_D45 AA24 VMA_DQ45 B23 GND GND Y23
[20,21] FBA_CMD13 G25 FBA_CMD13 FBA_D46 Y22 VMA_DQ46 B27 GND GND Y26
[20,21] FBA_CMD14 G27 FBA_CMD14 FBA_D47 AA23 VMA_DQ47 B5 GND GND Y5
[20,21] FBA_CMD15 G26 FBA_CMD15 FBA_D48 AD27 VMA_DQ48 B8 GND
[20,21] FBA_CMD16 M24 FBA_CMD16 FBA_D49 AB25 VMA_DQ49 E11 GND
[21] FBA_CMD17 M23 FBA_CMD17 FBA_D50 AD26 VMA_DQ50 E14 GND
[20] FBA_CMD18 K24 FBA_CMD18 FBA_D51 AC25 VMA_DQ51 E17 GND
[20,21] FBA_CMD19 K23 FBA_CMD19 FBA_D52 AA27 VMA_DQ52 E2 GND
[20,21] FBA_CMD20 M27 FBA_CMD20 FBA_D53 AA26 VMA_DQ53 E20 GND
[20,21] FBA_CMD21 M26 FBA_CMD21 FBA_D54 W26 VMA_DQ54 E22 GND
[20,21] FBA_CMD22 M25 FBA_CMD22 FBA_D55 Y25 VMA_DQ55 E25 GND
[20,21] FBA_CMD23 K26 FBA_CMD23 FBA_D56 R26 VMA_DQ56 E5 GND
[20,21] FBA_CMD24 K22 FBA_CMD24 FBA_D57 T25 VMA_DQ57 E8 GND
[20,21] FBA_CMD25 J23 FBA_CMD25 FBA_D58 N27 VMA_DQ58 H2 GND
[20,21] FBA_CMD26 J25 FBA_CMD26 FBA_D59 R27 VMA_DQ59 H23 GND
[20] FBA_CMD27 J24 FBA_CMD27 FBA_D60 V26 VMA_DQ60 H25 GND
[20,21] FBA_CMD28 K27 FBA_CMD28 FBA_D61 V27 VMA_DQ61 FB_CAL_PD_VDDQ D22 FB_CAL_PD_VDDQ R402 EV@40.2/F_4 +1.5V_GFX H5 GND
[20,21] FBA_CMD29 K25 FBA_CMD29 FBA_D62 W27 VMA_DQ62 K11 GND
VMA_DM[7:0] [20,21]
[21] FBA_CMD30 J27 FBA_CMD30 FBA_D63 W25 VMA_DQ63 K13 GND
J26 FBA_CMD31 FB_CAL_PU_GND C24 FB_CAL_PU_GND R413 EV@42.2/F_4 K15 GND
K17 GND
FBA_DQM0 D19 VMA_DM0 L10 GND
FBA_DQM1 D14 VMA_DM1 FB_CALTERM_GND B25 FB_CAL_TERM_GND R415 EV@51.1/F_4 L12 GND
FBA_DQM2 C17 VMA_DM2 L14 GND
FBA_DQM3 C22 VMA_DM3 L16 GND
P24 VMA_DM4 bga595-nvidia-n13p-gv2-s-a2 L18
FBA_DQM4 GND
W24 VMA_DM5 COMMON L2
+1.5V_GFX FBA_DQM5 GND
C FBA_DQM6 AA25 VMA_DM6 L23 GND C
R405 *60.4_4 F22 FBA_DEBUG0 FBA_DQM7 U25 VMA_DM7 L25 GND
R399 *60.4_4 J22 FBA_DEBUG1 L5 GND GND AA7
M11 GND GND AB7
VMA_WDQS[7:0] [20,21]
FBA_DQS_WP0 E19 VMA_WDQS0
FBA_DQS_WP1 C15 VMA_WDQS1
[20,21] VMA_CLK0 D24 FBA_CLK0 FBA_DQS_WP2 B16 VMA_WDQS2
D25 B22 VMA_WDQS3 bga595-nvidia-n13p-gv2-s-a2 COMMON
[20,21] VMA_CLK0# FBA_CLK0 FBA_DQS_WP3
[20,21] VMA_CLK1 N22 FBA_CLK1 FBA_DQS_WP4 R25 VMA_WDQS4
[20,21] VMA_CLK1# M22 FBA_CLK1 FBA_DQS_WP5 W23 VMA_WDQS5
FBA_DQS_WP6 AB26 VMA_WDQS6
T26 VMA_WDQS7 +1.5V_GFX
FBA_DQS_WP7 For support GC6 2.0
VMA_RDQS[7:0] [20,21] +3V
D18 FBA_WCK01 FBA_DQS_RN0 F19 VMA_RDQS0
C18 FBA_WCK01 FBA_DQS_RN1 C14 VMA_RDQS1
D17 FBA_WCK23 FBA_DQS_RN2 A16 VMA_RDQS2 EV@100/F_4 R752 FBA_CMD4 EV@100/F_4 R753
D16 FBA_WCK23 FBA_DQS_RN3 A22 VMA_RDQS3 EV@100/F_4 R750 FBA_CMD5 EV@100/F_4 R751 C267
T24 FBA_WCK45 FBA_DQS_RN4 P25 VMA_RDQS4 EV@100/F_4 R435 FBA_CMD6 EV@100/F_4 R436 [19,31] EC_FB_CLAMP R358 *0_4 GT@0.1U/10V_4
5
U24 FBA_WCK45 FBA_DQS_RN5 W22 VMA_RDQS5 EV@100/F_4 R431 FBA_CMD7 EV@100/F_4 R432
V24 FBA_WCK67 FBA_DQS_RN6 AB27 VMA_RDQS6 EV@100/F_4 R763 FBA_CMD8 EV@100/F_4 R764 [10,19] GC6_FB_EN R357 GT@0_4 2
V25 FBA_WCK67 FBA_DQS_RN7 T27 VMA_RDQS7 EV@100/F_4 R440 FBA_CMD9 EV@100/F_4 R441 4
FBVDDQ_EN [39]
FB_PLLAVDD = 55mA EV@100/F_4 R462 FBA_CMD10 EV@100/F_4 R463 [38] GPU_PWR_GD 1
EV@100/F_4 R422 FBA_CMD11 EV@100/F_4 R421
EV@100/F_4 R756 FBA_CMD12 EV@100/F_4 R757
3
+1.05V_GFX L22 EV@PBY160808T-300Y-N +FB_PLLAVDD F16 FB_PLLAVDD EV@100/F_4 R458 FBA_CMD13 EV@100/F_4 R459 U20
EV@100/F_4 R759 FBA_CMD14 EV@100/F_4 R760 GT@NL17SZ32DFT2G R362
C372 EV@22U/6.3VS_6 P22 FB_PLLAVDD EV@100/F_4 R420 FBA_CMD15 EV@100/F_4 R419 EV@100K/F_4
C375 EV@0.1U/10V_4 EV@100/F_4 R465 FBA_CMD21 EV@100/F_4 R464
C362 EV@0.1U/10V_4 H22 FB_DLLAVDD GF119 EV@100/F_4 R451 FBA_CMD22 EV@100/F_4 R450 R359 GM@0_4
D C374 EV@0.1U/10V_4 EV@100/F_4 R468 FBA_CMD23 EV@100/F_4 R467 D
EV@100/F_4 R442 FBA_CMD24 EV@100/F_4 R443
FB_PLLAVDD GF117 EV@100/F_4 R427 EV@100/F_4 R428
FBA_CMD25
EV@100/F_4 R457 FBA_CMD26 EV@100/F_4 R456
EV@100/F_4 R452 FBA_CMD27 EV@100/F_4 R453
FB_DLLAVDD = 15mA EV@100/F_4 R426 FBA_CMD28 EV@100/F_4 R425
EV@100/F_4 R430 FBA_CMD29 EV@100/F_4 R429
D23
EV@100/F_4 R446 FBA_CMD30 EV@100/F_4 R447 Quanta Computer Inc.
FB_VREF_PROBE TP60
INT PROJECT :ZRT/ZRTA
bga595-nvidia-n13p-gv2-s-a2 COMMON Size Document Number Rev
3A
N16S-GT (MEMORY/GND)
Date: Wednesday, February 11, 2015 Sheet 17 of 44
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
U39G U39J
4/14 IFPAB
7/14 IFPEF U39K
GF117 GF119 GF119 3/14 DACA
AC4 GF117
NC IFPA_TXC
AC3 DVI-DL DVI-SL/HDMI DP GF119 GF117
NC IFPA_TXC GF117 GF119
GF119 GF117 J3 W5 B7 I2CA_SCL R700 EV@2.2K_4
NC I2CY_SDA I2CY_SDA IFPE_AUX TP115 DACA_VDD NC NC I2CA_SCL
AA6 GF119 GF117 J2 A7 I2CA_SDA R716 EV@2.2K_4
IFPAB_RSET NC NC I2CY_SCL I2CY_SCL IFPE_AUX NC I2CA_SDA
IFPA_TXD0 Y3 J7 IFPEF_PLLVDD AE2 DACA_VREF
NC TP51 NC TP128 TSEN_VREF
NC IFPA_TXD0 Y4
IFPE_L3 J1 AF2 DACA_RSET DACA_HSYNC AE3
NC TXC TXC NC NC
V7 IFPAB_PLLVDD IFPE_L3 K1 DACA_VSYNC AE4
TP114 NC NC TXC TXC NC
IFPA_TXD1 AA2 K7 IFPEF_PLLVDD
NC TP119 NC
W7 IFPAB_PLLVDD IFPA_TXD1 AA3 IFPE_L2 K3
TP117 NC NC NC TXD0 TXD0
A IFPE_L2 K2 DACA_RED AG3 A
NC TXD0 TXD0 NC
AB4
NC IFPB_TXC
IFPB_TXC AB5
3V MAIN POWER
NC
NC HPD_E HPD_E GPIO18 C2
GF119 GF117 +3V_GFX +3V_GFX
W6 IFPA_IOVDD IFPB_TXD4 AB2
TP121 NC NC
NC IFPB_TXD4 AB3
Y6 GF119 GF117
TP120 IFPB_IOVDD NC
H6 IFPE_IOVDD NC
TP125 +3V_GFX
NC IFPB_TXD5 AD2 GF119 R371 C277 60mil
IFPB_TXD5 AD3 J6 IFPF_IOVDD GF117 GT@10K_4
NC TP124 NC
1
DVI-DL DVI-SL/HDMI DP GT@0.022U/25V_4
NC IFPF_AUX H4 R390
I2CZ_SDA
NC IFPB_TXD6 AD1 NC I2CZ_SCL IFPF_AUX H3 GM@0_8
NC IFPB_TXD6 AE1 R369 R370 GT@200K_4 2 Q30
EV@10K_4 GT@AO3413
NC TXC IFPF_L3 J5
3
IFPB_TXD7 AD5 NC TXC IFPF_L3 J4 60mil
NC +3V_MAIN
NC IFPB_TXD7 AD4
3
NC TXD3 TXD0 IFPF_L2 K5 C280
NC IFPF_L2 K4 [19] +3V_MAIN_EN 2
TXD3 TXD0
B GT@0.022U/25V_4 B
NC TXD4 TXD1 IFPF_L1 L4 Q24 N15V stuff not support GC6.
IFPF NC TXD4 TXD1 IFPF_L1 L3 GT@2N7002K 1A-7
NC GPIO14 B3
1
IFPAB NC
NC
TXD5
TXD5
TXD2
TXD2
IFPF_L0
IFPF_L0
M5
M4
bga595-nvidia-n13p-gv2-s-a2 COMMON +3V_GFX
U39H
5/14 IFPC
IFPC NC HPD_F GPIO19 F7 +3V
GF119 GF117 R396
T6 IFPC_RSET NC GF117 GF119 EV@1.5K/F_4
3
M7 N5 bga595-nvidia-n13p-gv2-s-a2 COMMON
TP53 IFPC_PLLVDD NC NC I2CW_SDA IFPC_AUX
N7 IFPC_PLLVDD NC I2CW_SCL IFPC_AUX N4 R398
TP126 NC
2 *100K/F_4
3
NC TXC IFPC_L3 N3 PLLVDD = 38mA +3V_MAIN R385 EV@4.7K_4 2
NC IFPC_L3 N2 C298 Q35
TXC
1
+1.05V_GFX L18 EV@PBY160808T-300Y-N NV_PLLVDD Q33 EV@1000p/50V_4 EV@DTC144EU
1
IFPC_L2 R3 C313 EV@0.1U/10V_4 C285 EV@MMBT3904-7-F
NC TXD0
IFPC_L2 R2 C291 EV@22U/6.3VS_6 *1000p/50V_4 +1.05V_GFX and GPU core power EN
NC TXD0
TXD1 IFPC_L1 R1
NC
NC TXD1 IFPC_L1 T1
U39M
T3
SP_PLLVDD = 17mA
NC IFPC_L0 9/14 XTAL_PLL
TXD2
C IFPC_L0 T2 +1.05V_GFX L17 EV@HCB1005KF-181T15(180,1500MA) SP_PLLVDD C
NC TXD2
C317 EV@0.1U/10V_4 L6 PLLVDD
C290 EV@0.1U/10V_4 M6 SP_PLLVDD
C295 EV@4.7u/10V_6
P6 IFPC_IOVDD NC GPIO15 C3 C302 EV@22U/6.3VS_6 N6 VID_PLLVDD
TP116 NC GF119
bga595-nvidia-n13p-gv2-s-a2 COMMON
NC GF117
VID_PLLVDD = 41mA
U39I
6/14 IFPD R703 EV@10K/F_4 XTAL_SSIN A10 XTALSSIN XTALOUTBUFF C10 BXTALOUT R718 EV@10K/F_4
GF119 GF117
U6 IFPD_RSET
GF117 GF119
27M_XTAL_IN_R C11 XTALIN XTALOUT B10 27M_XTAL_OUT
DB-->SI change 10/25
NC
DVI/HDMI DP bga595-nvidia-n13p-gv2-s-a2 COMMON
Use G-CLK
T7 IFPD_PLLVDD I2CX_SDA IFPD_AUX P4
DB-->SI change 10/25
TP118 NC NC
NC I2CX_SCL IFPD_AUX P3 Use G-CLK
R7 IFPD_PLLVDD C546
TP54 NC +3V_GFX
IFPD_L3 R5
NC TXC
4
3
NC TXC IFPD_L3 R4 EV@12p/50V_4
DGPU_PGOK-1 27M_XTAL_IN_R Y4
IFPD_L2 T5 +3V R381 27M_XTAL_OUT EV@27MHZ +-10PPM
NC TXD0
TXD0 IFPD_L2 T4 EV@4.7K_4
NC
C544
1
2
NC TXD1 IFPD_L1 U4
IFPD NC TXD1 IFPD_L1 U3 R403
DGPU_PWROK [10]
EV@4.7K_4 EV@12p/50V_4
D IFPD_L0 V4 D
NC TXD2
3
NC TXD2 IFPD_L0 V3
2 Q29 R386
3
EV@100K/F_4
R6 IFPD_IOVDD GPIO17 D4 R401 EV@4.7K_4
DGPU_POK2 2 Q34 EV@DTC144EUA
TP52 GF119 NC [39] HWPG_1.5VGFX
EV@METR3904-G
Quanta Computer Inc.
1
GF117 C304
NC
1
C306 EV@1000P/50V_4
*1000P/50V_4
PROJECT :ZRT/ZRTA
Size Document Number Rev
bga595-nvidia-n13p-gv2-s-a2 COMMON 3A
N16S-GT (DISPLAY)
Date: Wednesday, February 11, 2015 Sheet 18 of 44
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
U39L R3626
10/14 MISC2
+3V_MAIN GM 45.3k pull up +3V_GFX
GT 49.9K pull up
2
GF119 GF117
+3V_GFX R729 R730 R728
C1 STRAP5_NC SP@4.99K/F_4 GT@4.99K/F_4 GT@4.99K/F_4 R694 R697 R695 R693 R698
NC
R767 *10K/F_4 BUFRST D11 *24.9K/F_4 GM@4.99K/F_4 *15K/F_4 GM@4.99K/F_4 GM@45.3K/F_4
1
R709 EV@40.2K/F_4 F6 MULTISTRAP_REF0_GND PGOOD D10
GF119 GF117
R391 EV@10K/F_4 +3V_GFX
F4 MULTISTRAP_REF1_GND NC
CEC E9 SYS_PEX_RST_MON#
SYS_PEX_RST_MON# [16]
F5 MULTISTRAP_REF2_GND NC
+3V_MAIN
bga595-nvidia-n13p-gv2-s-a2 COMMON
Q28
Dual 5
2ND_MBDATA 3 4 GPUT_DATA_L
[8,31] 2ND_MBDATA
U39N
8/14 MISC1 R387 EV@4.7K_4 +3V_GFX
I2CS_SCL D9 GPUT_CLK_L 2 R388 EV@4.7K_4 +3V_GFX
I2CS_SDA D8 GPUT_DATA_L
2ND_MBCLK 6 1 GPUT_CLK_L
[8,31] 2ND_MBCLK
I2CC_SCL A9 DGPU_EDIDCLK R719 EV@2.2K_4
I2CC_SDA B9 DGPU_EDIDDATA R702 EV@2.2K_4
Dual EV@2N7002DW
B TP58 THERM- E12 GF117 GF119 B
THERMDN
NC I2CB_SCL C9 N12E_SCL R701 EV@2.2K_4
TP59 THERM+ F12 THERMDP I2CB_SDA C8 N12E_SDA R717 EV@2.2K_4
NC EC_FB_CLAMP [17,31]
GC6_FB_EN [10,17]
TP130 JTAG_TCK AE5 JTAG_TCK R372 EV@0_4
TP129 JTAG_TMS AD6 JTAG_TMS +3V_GFX
TP131 JTAG_TDI AE6 JTAG_TDI
TP132 JTAG_TDO AF6 JTAG_TDO 1 3 R368 *0_4
JTAG_TRST# AG4 JTAG_TRST GPIO0 C6 FB_CLAMP_MON R367 EV@0_4
GPIO1 B2 Q27 R373
GPIO2 D6 *2N7002K EV@10K/F_4 R384 GT@0_4 R389
2
GPIO3 C7 *10K/F_4
GPIO4 F9 +3V_GFX
GPIO5 A3 +3V_MAIN_EN R375 *0_4
+3V_MAIN_EN [18] FB_CLAMP_REQ# [31]
GPIO6 A4 GPU_EVENT# 1 3 R383 GT@0_4
DGPU_EVENT# [10]
GPIO7 B6
OVERT A6 VGA_OVT# Q26
GPIO9 F8 ALERT *2N7002K
2
GPIO10 C5
GPIO11 E7
PWM-VID [38]
GPIO12 D7 GPIO12_ACIN
GPIO13 B4 DGPU_PSI [38] N15S -> GPIO0 un-stuff Q3013 and R3183
GPIO6 un-stuff Q3012 \ R3181 and R3166
+3V_GFX
GF117 GF119
N15V -> GPIO0 stuff Q3013 and R3183, un-stuff R3180 \ R3188
NC GPIO16 D5 GPU_GPIO16 TP123 GPIO6 stuff Q3012 \ R3181 and R3162, un-stuff R3177,R3166.
NC GPIO20 E6
NC GPIO21 C4 GPU_PEX_RST_HOLD# GPU_PEX_RST_HOLD# [16]
Logical Strap Bit Mapping
C PU-VDD PD C
bga595-nvidia-n13p-gv2-s-a2 COMMON +3V_GFX
Resistor P/N
4.99K---> CS24992FB26 4.99K 1000 0000
GPIO12_ACIN R392 EV@10K/F_4
[16] PEGX_RST# 10K ---> CS31002FB26 10K 1001 0001
N16S-GS/N16V-GM Straping table15K ---> CS31502FB24 15K 1010 0010
DGPU_PSI R699 EV@10K/F_4
20K ---> CS32002FB29
2
C K1 A1 FBA_CMD0 K1 A1 K1 A1 FBA_CMD16 K1 A1 C
[17,21] FBA_CMD0 ODT VDDQ#A1 +1.5V_GFX ODT VDDQ#A1 +1.5V_GFX [17,21] FBA_CMD16 ODT VDDQ#A1 +1.5V_GFX ODT VDDQ#A1 +1.5V_GFX
L2 A8 FBA_CMD2 L2 A8 L2 A8 FBA_CMD18 L2 A8
[17] FBA_CMD2 CS VDDQ#A8 CS VDDQ#A8 [17] FBA_CMD18 CS VDDQ#A8 CS VDDQ#A8
J3 C1 EV@4.7u/10V_6 C399 FBA_CMD11 J3 C1 EV@4.7u/10V_6 C411 FBA_CMD11 J3 C1 EV@4.7u/10V_6 C611 FBA_CMD11 J3 C1 EV@4.7u/10V_6 C397
[17,21] FBA_CMD11 RAS VDDQ#C1 RAS VDDQ#C1 RAS VDDQ#C1 RAS VDDQ#C1
K3 C9 FBA_CMD15 K3 C9 FBA_CMD15 K3 C9 FBA_CMD15 K3 C9
[17,21] FBA_CMD15 CAS VDDQ#C9 CAS VDDQ#C9 CAS VDDQ#C9 CAS VDDQ#C9
L3 D2 EV@0.1U/10V_4 C579 FBA_CMD28 L3 D2 EV@0.1U/10V_4 C390 FBA_CMD28 L3 D2 EV@0.1U/10V_4 C559 FBA_CMD28 L3 D2 EV@0.1U/10V_4 C636
[17,21] FBA_CMD28 WE VDDQ#D2 WE VDDQ#D2 WE VDDQ#D2 WE VDDQ#D2
E9 EV@0.1U/10V_4 C578 E9 EV@0.1U/10V_4 C381 E9 EV@0.1U/10V_4 C613 E9 EV@0.1U/10V_4 C437
VDDQ#E9 F1 VDDQ#E9 F1 VDDQ#E9 F1 VDDQ#E9 F1
F3 VDDQ#F1 H2 GND F3 VDDQ#F1 H2 GND F3 VDDQ#F1 H2 GND F3 VDDQ#F1 H2 GND
[17,21] VMA_WDQS1 DQSL VDDQ#H2 [17,21] VMA_WDQS0 DQSL VDDQ#H2 [17,21] VMA_WDQS4 DQSL VDDQ#H2 [17,21] VMA_WDQS5 DQSL VDDQ#H2
G3 H9 G3 H9 G3 H9 G3 H9
[17,21] VMA_RDQS1 DQSL VDDQ#H9 [17,21] VMA_RDQS0 DQSL VDDQ#H9 [17,21] VMA_RDQS4 DQSL VDDQ#H9 [17,21] VMA_RDQS5 DQSL VDDQ#H9
E7 A9 E7 A9 E7 A9 E7 A9
[17,21] VMA_DM1 DML VSS#A9 [17,21] VMA_DM0 DML VSS#A9 [17,21] VMA_DM4 DML VSS#A9 [17,21] VMA_DM5 DML VSS#A9
D3 B3 D3 B3 D3 B3 D3 B3
[17,21] VMA_DM2 DMU VSS#B3 [17,21] VMA_DM3 DMU VSS#B3 [17,21] VMA_DM7 DMU VSS#B3 [17,21] VMA_DM6 DMU VSS#B3
E1 E1 E1 E1
VSS#E1 G8 VSS#E1 G8 VSS#E1 G8 VSS#E1 G8
C7 VSS#G8 J2 C7 VSS#G8 J2 C7 VSS#G8 J2 C7 VSS#G8 J2
[17,21] VMA_WDQS2 DQSU VSS#J2 [17,21] VMA_WDQS3 DQSU VSS#J2 [17,21] VMA_WDQS7 DQSU VSS#J2 [17,21] VMA_WDQS6 DQSU VSS#J2
B7 J8 B7 J8 B7 J8 B7 J8
[17,21] VMA_RDQS2 DQSU VSS#J8 [17,21] VMA_RDQS3 DQSU VSS#J8 [17,21] VMA_RDQS7 DQSU VSS#J8 [17,21] VMA_RDQS6 DQSU VSS#J8
M1 M1 M1 M1
VSS#M1 M9 VSS#M1 M9 VSS#M1 M9 VSS#M1 M9
VSS#M9 P1 VSS#M9 P1 VSS#M9 P1 VSS#M9 P1
T2 VSS#P1 P9 FBA_CMD20 T2 VSS#P1 P9 FBA_CMD20 T2 VSS#P1 P9 FBA_CMD20 T2 VSS#P1 P9
[17,21] FBA_CMD20 RESET VSS#P9 RESET VSS#P9 RESET VSS#P9 RESET VSS#P9
T1 T1 T1 T1
FBA_ZQ0 L8 VSS#T1 T9 FBA_ZQ1 L8 VSS#T1 T9 FBA_ZQ4 L8 VSS#T1 T9 FBA_ZQ5 L8 VSS#T1 T9
GND ZQ VSS#T9 GND ZQ VSS#T9 GND ZQ VSS#T9 GND ZQ VSS#T9
EV@243_4
R733 EV@243_4
R734 EV@243_4
R747 EV@243_4
R738
B1 GND B1 GND B1 GND B1 GND
VSSQ#B1 B9 VSSQ#B1 B9 VSSQ#B1 B9 VSSQ#B1 B9
VSSQ#B9 D1 VSSQ#B9 D1 VSSQ#B9 D1 VSSQ#B9 D1
VSSQ#D1 D8 VSSQ#D1 D8 VSSQ#D1 D8 VSSQ#D1 D8
VSSQ#D8 E2 VSSQ#D8 E2 VSSQ#D8 E2 VSSQ#D8 E2
B J1 VSSQ#E2 E8 J1 VSSQ#E2 E8 J1 VSSQ#E2 E8 J1 VSSQ#E2 E8 B
L1 NC#J1 VSSQ#E8 F9 L1 NC#J1 VSSQ#E8 F9 L1 NC#J1 VSSQ#E8 F9 L1 NC#J1 VSSQ#E8 F9
J9 NC#L1 VSSQ#F9 G1 J9 NC#L1 VSSQ#F9 G1 J9 NC#L1 VSSQ#F9 G1 J9 NC#L1 VSSQ#F9 G1
L9 NC#J9 VSSQ#G1 G9 L9 NC#J9 VSSQ#G1 G9 L9 NC#J9 VSSQ#G1 G9 L9 NC#J9 VSSQ#G1 G9
NC#L9 VSSQ#G9 NC#L9 VSSQ#G9 NC#L9 VSSQ#G9 NC#L9 VSSQ#G9
96-BALL 96-BALL 96-BALL 96-BALL
SDRAM DDR3 SDRAM DDR3 SDRAM DDR3 SDRAM DDR3
EV@VRAM _DDR3_HYNIX_256MX16 EV@VRAM _DDR3_HYNIX_256MX16 EV@VRAM _DDR3_HYNIX_256MX16 EV@VRAM _DDR3_HYNIX_256MX16
+1.5V_GFX +1.5V_GFX +1.5V_GFX 162_1% ohm CS11622FB07 RES CHIP 162 1/16W +-1%(0402) +1.5V_GFX
CS11622FB15 RES CHIP 162 1/16W +-1%(0402)
C615 EV@10U/6.3V_6
FOR EMI Request C634 EV@10U/6.3V_6
R743 R411
A C568 EV@10U/6.3V_6 EV@1.33K/F_4 EV@1.33K/F_4 +1.5V_GFX C404 EV@10U/6.3V_6 A
U24
U22 U25
U23 VREFC_VMA3 M8 E3
VREFCA DQL0 VMA_DQ43 [17,20]
VREFC_VMA1 M8 E3 VREFC_VMA3 M8 E3 VREFD_VMA3 H1 F7
VREFCA DQL0 VMA_DQ1 [17,20] [20] VREFC_VMA3 VREFCA DQL0 VMA_DQ39 [17,20] VREFDQ DQL1 VMA_DQ44 [17,20]
VREFC_VMA1 M8 E3 VREFD_VMA1 H1 F7 VREFD_VMA3 H1 F7 F2
[20] VREFC_VMA1 VREFCA DQL0 VMA_DQ12 [17,20] VREFDQ DQL1 VMA_DQ4 [17,20] [20] VREFD_VMA3 VREFDQ DQL1 VMA_DQ32 [17,20] DQL2 VMA_DQ40 [17,20]
D VREFD_VMA1 H1 F7 F2 F2 FBA_CMD9 N3 F8 D
[20] VREFD_VMA1 VREFDQ DQL1 VMA_DQ11 [17,20] DQL2 VMA_DQ0 [17,20] DQL2 VMA_DQ38 [17,20] A0 DQL3 VMA_DQ45 [17,20]
F2 FBA_CMD9 N3 F8 FBA_CMD9 N3 F8 FBA_CMD24 P7 H3
DQL2 VMA_DQ15 [17,20] A0 DQL3 VMA_DQ5 [17,20] A0 DQL3 VMA_DQ34 [17,20] A1 DQL4 VMA_DQ41 [17,20]
N3 F8 FBA_CMD24 P7 H3 FBA_CMD24 P7 H3 FBA_CMD10 P3 H8
[17,20] FBA_CMD9 A0 DQL3 VMA_DQ10 [17,20] A1 DQL4 VMA_DQ3 [17,20] A1 DQL4 VMA_DQ36 [17,20] A2 DQL5 VMA_DQ46 [17,20]
P7 H3 FBA_CMD10 P3 H8 FBA_CMD10 P3 H8 FBA_CMD13 N2 G2
[17,20] FBA_CMD24 A1 DQL4 VMA_DQ13 [17,20] A2 DQL5 VMA_DQ7 [17,20] A2 DQL5 VMA_DQ35 [17,20] A3 DQL6 VMA_DQ42 [17,20]
P3 H8 FBA_CMD13 N2 G2 FBA_CMD13 N2 G2 FBA_CMD26 P8 H7
[17,20] FBA_CMD10 A2 DQL5 VMA_DQ9 [17,20] A3 DQL6 VMA_DQ2 [17,20] A3 DQL6 VMA_DQ37 [17,20] A4 DQL7 VMA_DQ47 [17,20]
N2 G2 FBA_CMD26 P8 H7 FBA_CMD26 P8 H7 FBA_CMD22 P2
[17,20] FBA_CMD13 A3 DQL6 VMA_DQ14 [17,20] A4 DQL7 VMA_DQ6 [17,20] A4 DQL7 VMA_DQ33 [17,20] A5
P8 H7 FBA_CMD22 P2 FBA_CMD22 P2 FBA_CMD21 R8
[17,20] FBA_CMD26 A4 DQL7 VMA_DQ8 [17,20] A5 A5 A6
P2 FBA_CMD21 R8 FBA_CMD21 R8 FBA_CMD5 R2 D7
[17,20] FBA_CMD22 A5 A6 A6 A7 DQU0 VMA_DQ51 [17,20]
R8 FBA_CMD5 R2 D7 FBA_CMD5 R2 D7 FBA_CMD8 T8 C3
[17,20] FBA_CMD21 A6 A7 DQU0 VMA_DQ25 [17,20] A7 DQU0 VMA_DQ62 [17,20] A8 DQU1 VMA_DQ52 [17,20]
R2 D7 FBA_CMD8 T8 C3 FBA_CMD8 T8 C3 FBA_CMD23 R3 C8
[17,20] FBA_CMD5 A7 DQU0 VMA_DQ23 [17,20] A8 DQU1 VMA_DQ26 [17,20] A8 DQU1 VMA_DQ57 [17,20] A9 DQU2 VMA_DQ50 [17,20]
T8 C3 FBA_CMD23 R3 C8 FBA_CMD23 R3 C8 FBA_CMD28 L7 C2
[17,20] FBA_CMD8 A8 DQU1 VMA_DQ17 [17,20] A9 DQU2 VMA_DQ30 [17,20] A9 DQU2 VMA_DQ63 [17,20] A10/AP DQU3 VMA_DQ54 [17,20]
R3 C8 FBA_CMD28 L7 C2 FBA_CMD28 L7 C2 FBA_CMD4 R7 A7
[17,20] FBA_CMD23 A9 DQU2 VMA_DQ21 [17,20] A10/AP DQU3 VMA_DQ24 [17,20] A10/AP DQU3 VMA_DQ59 [17,20] A11 DQU4 VMA_DQ49 [17,20]
L7 C2 FBA_CMD4 R7 A7 FBA_CMD4 R7 A7 FBA_CMD7 N7 A2
[17,20] FBA_CMD28 A10/AP DQU3 VMA_DQ18 [17,20] A11 DQU4 VMA_DQ31 [17,20] A11 DQU4 VMA_DQ61 [17,20] A12/BC DQU5 VMA_DQ55 [17,20]
R7 A7 FBA_CMD7 N7 A2 FBA_CMD7 N7 A2 FBA_CMD14 T3 B8
[17,20] FBA_CMD4 A11 DQU4 VMA_DQ20 [17,20] A12/BC DQU5 VMA_DQ27 [17,20] A12/BC DQU5 VMA_DQ56 [17,20] A13 DQU6 VMA_DQ48 [17,20]
N7 A2 FBA_CMD14 T3 B8 FBA_CMD14 T3 B8 FBA_CMD12 T7 A3
[17,20] FBA_CMD7 A12/BC DQU5 VMA_DQ16 [17,20] A13 DQU6 VMA_DQ28 [17,20] A13 DQU6 VMA_DQ60 [17,20] A14 DQU7 VMA_DQ53 [17,20]
T3 B8 FBA_CMD12 T7 A3 FBA_CMD12 T7 A3 M7
[17,20] FBA_CMD14 A13 DQU6 VMA_DQ22 [17,20] A14 DQU7 VMA_DQ29 [17,20] A14 DQU7 VMA_DQ58 [17,20] A15
T7 A3 M7 M7
[17,20] FBA_CMD12 A14 DQU7 VMA_DQ19 [17,20] A15 A15
M7
A15 FBA_CMD29 M2 B2
BA0 VDD#B2 +1.5V_GFX
FBA_CMD29 M2 B2 FBA_CMD29 M2 B2 FBA_CMD6 N8 D9
BA0 VDD#B2 +1.5V_GFX BA0 VDD#B2 +1.5V_GFX BA1 VDD#D9
M2 B2 FBA_CMD6 N8 D9 FBA_CMD6 N8 D9 FBA_CMD30 M3 G7 DR@4.7u/10V_6 C418
[17,20] FBA_CMD29 BA0 VDD#B2 +1.5V_GFX BA1 VDD#D9 BA1 VDD#D9 BA2 VDD#G7
N8 D9 FBA_CMD30 M3 G7 DR@4.7u/10V_6 C606 FBA_CMD30 M3 G7 DR@4.7u/10V_6 C376 K2
[17,20] FBA_CMD6 BA1 VDD#D9 BA2 VDD#G7 BA2 VDD#G7 VDD#K2
M3 G7 DR@4.7u/10V_6 C341 K2 K2 K8 DR@0.1U/10V_4 C619
[17] FBA_CMD30 BA2 VDD#G7 VDD#K2 VDD#K2 VDD#K8
K2 K8 DR@0.1U/10V_4 C435 K8 DR@0.1U/10V_4 C326 N1 DR@0.1U/10V_4 C420
VDD#K2 K8 DR@0.1U/10V_4 C639 VDD#K8 N1 DR@0.1U/10V_4 C395 VDD#K8 N1 DR@0.1U/10V_4 C394 VMA_CLK1 J7 VDD#N1 N9
VDD#K8 N1 DR@0.1U/10V_4 C596 VMA_CLK0 J7 VDD#N1 N9 J7 VDD#N1 N9 VMA_CLK1# K7 CK VDD#N9 R1 GND
VDD#N1 CK VDD#N9 [17,20] VMA_CLK1 CK VDD#N9 CK VDD#R1
J7 N9 VMA_CLK0# K7 R1 GND K7 R1 GND FBA_CMD19 K9 R9
[17,20] VMA_CLK0 CK VDD#N9 CK VDD#R1 [17,20] VMA_CLK1# CK VDD#R1 CKE VDD#R9
K7 R1 GND FBA_CMD3 K9 R9 K9 R9
[17,20] VMA_CLK0# CK VDD#R1 CKE VDD#R9 [17,20] FBA_CMD19 CKE VDD#R9
K9 R9
[17,20] FBA_CMD3 CKE VDD#R9 FBA_CMD16 K1 A1
ODT VDDQ#A1 +1.5V_GFX
C FBA_CMD0 K1 A1 K1 A1 FBA_CMD17 L2 A8 C
ODT VDDQ#A1 +1.5V_GFX [17,20] FBA_CMD16 ODT VDDQ#A1 +1.5V_GFX CS VDDQ#A8
K1 A1 FBA_CMD1 L2 A8 L2 A8 FBA_CMD11 J3 C1 DR@4.7u/10V_6 C396
[17,20] FBA_CMD0 ODT VDDQ#A1 +1.5V_GFX CS VDDQ#A8 [17] FBA_CMD17 CS VDDQ#A8 RAS VDDQ#C1
L2 A8 FBA_CMD11 J3 C1 DR@4.7u/10V_6 C416 FBA_CMD11 J3 C1 DR@4.7u/10V_6 C358 FBA_CMD15 K3 C9
[17] FBA_CMD1 CS VDDQ#A8 RAS VDDQ#C1 RAS VDDQ#C1 CAS VDDQ#C9
J3 C1 DR@4.7u/10V_6 C637 FBA_CMD15 K3 C9 FBA_CMD15 K3 C9 FBA_CMD25 L3 D2 DR@0.1U/10V_4 C562
[17,20] FBA_CMD11 RAS VDDQ#C1 CAS VDDQ#C9 CAS VDDQ#C9 WE VDDQ#D2
K3 C9 FBA_CMD25 L3 D2 DR@0.1U/10V_4 C620 FBA_CMD25 L3 D2 DR@0.1U/10V_4 C384 E9 DR@0.1U/10V_4 C428
[17,20] FBA_CMD15 CAS VDDQ#C9 WE VDDQ#D2 WE VDDQ#D2 VDDQ#E9
L3 D2 DR@0.1U/10V_4 C393 E9 DR@0.1U/10V_4 C345 E9 DR@0.1U/10V_4 C407 F1
[17,20] FBA_CMD25 WE VDDQ#D2 VDDQ#E9 VDDQ#E9 VDDQ#F1
E9 DR@0.1U/10V_4 C576 F1 F1 F3 H2 GND
VDDQ#E9 VDDQ#F1 VDDQ#F1 [17,20] VMA_WDQS5 DQSL VDDQ#H2
F1 F3 H2 GND F3 H2 GND G3 H9
VDDQ#F1 [17,20] VMA_WDQS0 DQSL VDDQ#H2 [17,20] VMA_WDQS4 DQSL VDDQ#H2 [17,20] VMA_RDQS5 DQSL VDDQ#H9
F3 H2 GND G3 H9 G3 H9
[17,20] VMA_WDQS1 DQSL VDDQ#H2 [17,20] VMA_RDQS0 DQSL VDDQ#H9 [17,20] VMA_RDQS4 DQSL VDDQ#H9
G3 H9
[17,20] VMA_RDQS1 DQSL VDDQ#H9 E7 A9
[17,20] VMA_DM5 DML VSS#A9
E7 A9 E7 A9 D3 B3
[17,20] VMA_DM0 DML VSS#A9 [17,20] VMA_DM4 DML VSS#A9 [17,20] VMA_DM6 DMU VSS#B3
E7 A9 D3 B3 D3 B3 E1
[17,20] VMA_DM1 DML VSS#A9 [17,20] VMA_DM3 DMU VSS#B3 [17,20] VMA_DM7 DMU VSS#B3 VSS#E1
D3 B3 E1 E1 G8
[17,20] VMA_DM2 DMU VSS#B3 VSS#E1 VSS#E1 VSS#G8
E1 G8 G8 C7 J2
VSS#E1 VSS#G8 VSS#G8 [17,20] VMA_WDQS6 DQSU VSS#J2
G8 C7 J2 C7 J2 B7 J8
VSS#G8 [17,20] VMA_WDQS3 DQSU VSS#J2 [17,20] VMA_WDQS7 DQSU VSS#J2 [17,20] VMA_RDQS6 DQSU VSS#J8
C7 J2 B7 J8 B7 J8 M1
[17,20] VMA_WDQS2 DQSU VSS#J2 [17,20] VMA_RDQS3 DQSU VSS#J8 [17,20] VMA_RDQS7 DQSU VSS#J8 VSS#M1
B7 J8 M1 M1 M9
[17,20] VMA_RDQS2 DQSU VSS#J8 VSS#M1 VSS#M1 VSS#M9
M1 M9 M9 P1
VSS#M1 M9 VSS#M9 P1 VSS#M9 P1 FBA_CMD20 T2 VSS#P1 P9
VSS#M9 P1 FBA_CMD20 T2 VSS#P1 P9 FBA_CMD20 T2 VSS#P1 P9 RESET VSS#P9 T1
T2 VSS#P1 P9 RESET VSS#P9 T1 RESET VSS#P9 T1 R437 DR@243_4 FBA_ZQ7 L8 VSS#T1 T9
[17,20] FBA_CMD20 RESET VSS#P9 VSS#T1 VSS#T1 GND ZQ VSS#T9
T1 R416 DR@243_4 FBA_ZQ3 L8 T9 R417 DR@243_4 FBA_ZQ6 L8 T9
VSS#T1 GND ZQ VSS#T9 GND ZQ VSS#T9
R409 DR@243_4 FBA_ZQ2 L8 T9
GND ZQ VSS#T9 B1 GND
B1 GND B1 GND VSSQ#B1 B9
B1 GND VSSQ#B1 B9 VSSQ#B1 B9 VSSQ#B9 D1
VSSQ#B1 B9 VSSQ#B9 D1 VSSQ#B9 D1 VSSQ#D1 D8
VSSQ#B9 D1 VSSQ#D1 D8 VSSQ#D1 D8 VSSQ#D8 E2
VSSQ#D1 D8 VSSQ#D8 E2 VSSQ#D8 E2 J1 VSSQ#E2 E8
B VSSQ#D8 E2 J1 VSSQ#E2 E8 J1 VSSQ#E2 E8 L1 NC#J1 VSSQ#E8 F9 B
J1 VSSQ#E2 E8 L1 NC#J1 VSSQ#E8 F9 L1 NC#J1 VSSQ#E8 F9 J9 NC#L1 VSSQ#F9 G1
L1 NC#J1 VSSQ#E8 F9 J9 NC#L1 VSSQ#F9 G1 J9 NC#L1 VSSQ#F9 G1 L9 NC#J9 VSSQ#G1 G9
J9 NC#L1 VSSQ#F9 G1 L9 NC#J9 VSSQ#G1 G9 L9 NC#J9 VSSQ#G1 G9 NC#L9 VSSQ#G9
L9 NC#J9 VSSQ#G1 G9 NC#L9 VSSQ#G9 NC#L9 VSSQ#G9 96-BALL
NC#L9 VSSQ#G9 96-BALL 96-BALL SDRAM DDR3
96-BALL SDRAM DDR3 SDRAM DDR3 DR@VRAM _DDR3_HYNIX_256MX16
SDRAM DDR3 DR@VRAM _DDR3_HYNIX_256MX16 DR@VRAM _DDR3_HYNIX_256MX16
DR@VRAM _DDR3_HYNIX_256MX16
+1.5V_GFX
+1.5V_GFX
+1.5V_GFX
+1.5V_GFX
C402 DR@10U/6.3V_6 R448 R737
EV@1.33K/F_4 EV@1.33K/F_4
A C392 DR@10U/6.3V_6 C597 DR@10U/6.3V_6 A
C438 DR@10U/6.3V_6 VREFC_VMA3 VREFD_VMA3 162_1% ohm CS11622FB07 RES CHIP 162 1/16W +-1%(0402) C434 DR@10U/6.3V_6
+1.5V_GFX
+1.5V_GFX C400 DR@0.1U/10V_4
CS11622FB15 RES CHIP 162 1/16W +-1%(0402) C401 DR@10U/6.3V_6
C398 DR@0.1U/10V_4 R449 R740 +1.5V_GFX
C412 DR@1U/6.3V_4 C389 DR@1U/6.3V_4 C352 DR@0.1U/10V_4 EV@1.33K/F_4 C415 EV@1.33K/F_4 C594 VMA_CLK1 +1.5V_GFX C432 DR@0.1U/10V_4
C426
C351
DR@1U/6.3V_4
DR@1U/6.3V_4
C344
C558
DR@1U/6.3V_4
DR@1U/6.3V_4 C348 DR@0.1U/10V_4
EV@0.01U/25V_4 EV@0.01U/25V_4
R418 C600 DR@1U/6.3V_4 C593 DR@1U/6.3V_4
C431
C424
DR@0.1U/10V_4
DR@0.1U/10V_4
Quanta Computer Inc.
C347 DR@1U/6.3V_4 C353 DR@1U/6.3V_4 C572 DR@0.1U/10V_4 EV@162_4 C433 DR@1U/6.3V_4 C391 DR@1U/6.3V_4
C589 DR@0.1U/10V_4 C627 DR@1U/6.3V_4 C409 DR@1U/6.3V_4 C406 DR@0.1U/10V_4
PROJECT :ZRT/ZRTA
VMA_CLK1# C429 DR@1U/6.3V_4 C436 DR@1U/6.3V_4 C383 DR@0.1U/10V_4 Size Document Number Rev
C427 DR@0.1U/10V_4 3A
DDR3L - RANK1
Date: Wednesday, February 11, 2015 Sheet 21 of 44
5 4 3 2 1
5 4 3 2 1
DP TO VGA
IVDDO
+3V RX_IVDD 20mils
20mils
L16 80ohm_100MHz RX_IVDD33 R576 *Short_6
D D
C518 C497
0.1u/10V_4 0.1u/10V_4
C222 C223 15mils
0.1u/10V_4 *0.1u/10V_4
C204
10u/6.3V_6
IVDDO
10
40
29
30
32
11
20
37
39
U16
IT6516 un-stuff 0 ohm CRTVDD5
IVDD33
IVDD33
IVDDO
OVDD
OVDD
IVDD
IVDD
IVDD
IVDD
[2] CRT_HPD CRT_HPD 33 20mils
HPD
38 5VMCU R266 6515@0_6
C209 0.1u/10V_4 CRT_TXP0_C 22 MCUVDDH
C [2] CRT_TXP0 RX0P C
C212 0.1u/10V_4 CRT_TXN0_C 23
[2] CRT_TXN0 RX0N
C214 0.1u/10V_4 CRT_TXP1_C 25
[2] CRT_TXP1 RX1P
C218 0.1u/10V_4 CRT_TXN1_C 26
[2] CRT_TXN1 RX1N
24 URDBG
URDBG TP22
12
ISPSCL 13
CRT_AUXP C205 0.1u/10V_4 CRT_AUXP_C 19 ISPSDA
[2] CRT_AUXP RXAUXP
CRT_AUXN C203 0.1u/10V_4 CRT_AUXN_C 18 17 DDCCLK_R R229 22/J_4
[2] CRT_AUXN RXAUXN VGADDCCLK DDCCLK [23]
16 DDCDAT_R R228 22/J_4 DDCDAT [23]
VGADDCSDA IVDDO
15 1 VSYNC 20mils
DCAUXP VSYNC VSYNC [23]
14 2 HSYNC
+3V DCAUXN HSYNC HSYNC [23]
IVDDO DAC_VDDC 80ohm_100MHz L24
20mils 0929 modify
30mils C505
10mils
L25 80ohm_100MHz RX_AVCC 21 6 0.1u/10V_4 C501
0.1u/10V_4 C499 27 AVCC VDDC 4.7u/10V_6
AVCC
10mils
C520
10u/6.3V_6
*0.1u/10V_4 C508 IT6515FN
9 CRT_RED CRT_RED [23]
IORP
8 CRT_GRE
IOGP CRT_GRE [23]
GND
IT6515FN_QFN-40
31
41
R270
*10K_4
A A
[2,5,7,8,9,10,11,13,14,15,16,17,18,23,24,25,26,27,28,29,30,31,33,34,35,36,37,38,39] +3V
[23,24,26,27,29,33,37] +5V
CRTVDD5
CRT +5V 3
Q20
1 C224 *0.1u/10V_4
IN OUT 2 CN17
16
GND CRTVDD5
AP2331SA-7
6
L13 BLM15BB470SN1D CRT_R1 1 11 CRT_11 TP68
+5V [22] CRT_RED
7
1C-1 2014/01/10 Remove U29 and add U40 and U41. L14 BLM15BB470SN1D CRT_G1 2 12 DDCDAT
[22] CRT_GRE DDCDAT [22]
8
L15 BLM15BB470SN1D CRT_B1 3 13 CRTHSYNC
[22] CRT_BLU
C512 9
4 14 CRTVSYNC
U32 0.1u/10V_4 C207 C211 C216 C215 C210 C206 10
R232 R234 R242 5 15 DDCCLK DDCCLK [22]
1 5 75/F_4 75/F_4 75/F_4 10p/50V_4 10p/50V_4 10p/50V_4 10p/50V_4 10p/50V_4 10p/50V_4
OE# VCC
A A
CRT CONN
17
HSYNC 2 4 CRTHSYNC
[22] HSYNC A Y
M74VHC1GT125DF2G U35
CRTHSYNC 1 10 CRTHSYNC C225 *0.22u/6.3V_4
C521 CRTVDD5 2 1 10 9 CRTVDD5
3 2 9 C228 *220p/50V_4
U34 0.1u/10V_4 CRTVSYNC 4 GND_3/8 7 CRTVSYNC
DDCCLK 5 4 7 6 DDCCLK C229 0.1u/10V_4 CRTVDD5
Power trace tracking
1 5 5 6
OE# VCC [2,5,7,8,9,10,11,13,14,15,16,17,18,22,24,25,26,27,28,29,30,31,33,34,35,36,37,38,39] +3V
*RClamp0524P C517 10p/50V_4 CRTVSYNC [22,24,26,27,29,33,37] +5V
[7,8,10,11,13,25,26,27,28,29,31,32,33,37,38,39] +3VPCU
VSYNC 2 4 CRTVSYNC U33 C515 10p/50V_4 CRTHSYNC [27,29,32,33,34,35,36,37,38,39] VIN
[22] VSYNC A Y CRT_R1 1 10 CRT_R1
CRT_G1 2 1 10 9 CRT_G1 C519 *10p/50V_4 DDCCLK
3 3 2 9
GND DDCDAT 4 GND_3/8 7 DDCDAT C507 *10p/50V_4 DDCDAT
CRT_B1 5 4 7 6 CRT_B1
M74VHC1GT125DF2G 5 6
*RClamp0524P
2
4.7u/25V_8 1000p/50V_4 0.1u/10V_4_X7R 1000p/50V_4 C440 U26 LCDVCC
1000p/50V_4
B 3 1 TP_INT 1u/6.3V_4 6 1 LCDVCC B
[10] TP_INT_PCH IN OUT
Q39 4 2 C423 C439 C421 C422 C425
*2N7002K IN GND
+3V R466 *short_4 EDP_VDD_EN_R 3 5 *0.1u/10V_4 *2.2u/10V_8 0.1u/10V_4 0.01U/25V_4 22u/6.3V_8
[2] EDP_VDD_EN ON/OFF GND
R471 *0_4
VIN
G5243AT11U
R748 100K_4 EDP_AUX_C R745 *100K_4 CN19
R749 *100K_4 EDP_AUX#_C R746 100K_4 MAX 1.5A R444 *short_8 R470
G_5
TP_RST# R475 *10K_4 R445 *short_8 V_BLIGHT
40
39 100K_4
38
LCDVCC C419 C417 37
*1u/6.3V_4 *1u/6.3V_4 36
R469 *short_8 LCDVCC_R 35
R742 *Short_6 CCD_PWR 34
+3V 33
32
R741 *Short_6 TP_PWR 31 G_4
+5V
+3V R744 *0_4 TP_RST# 30 Touch screen level shift I2C(reserve)
29
28 +3V
[2] PCH_BRIGHT 27
BL_ON
R788 33_4 EDP_HPD_R 26
[2] EDP_HPD 25
C783 180P/50V_4
C604 .1U/16V_4 EDP_AUX_C 24 R476 *0_4 R477 R473
[2] EDP_AUXP 23
[2] EDP_AUXN C605 .1U/16V_4 EDP_AUX#_C *10K_4 *10K_4
22
21 Q40
[2] EDP_TXP1 C616 .1U/16V_4 EDP_TX1_C TPD->100kHz,TS=400Khz
C617 .1U/16V_4 EDP_TX1#_C 20
eDP [2] EDP_TXN1 19 1 6 I2C1_SDA_GPIO6_CONN
Intel design guide suggestion
18 MCP PIN 10u.
[2] EDP_TXP0 C622 .1U/16V_4 EDP_TX0_C Per inch 3u TS=3x5inch
C623 .1U/16V_4 EDP_TX0#_C 17 2
[2] EDP_TXN0 16 +3V 400kHz10~100u =2.4~0.4k.
15 [10] I2C1_SDA_GPIO6 100Khz 10~100u=9k~1k.
[9] USBP6+ R761 *short_4 USBP6+_R [10] I2C1_SCL_GPIO7
R762 *short_4 USBP6-_R 14 4 3 I2C1_SCL_GPIO7_CONN
C CCD-USB [9] USBP6-
I2C1_SCL_GPIO7_CONN R775 *0_4 13 C
R754 0_4 USBP5+_R/TP_CLK 12 5
[9] USBP5+ 11
R755 0_4 USBP5-_R/TP_DATA
Touch Panel [9] USBP5-
I2C1_SDA_GPIO6_CONN R776 *0_4 10 G_1
C776 *.1U/16V_4 EDP_TX2_C 9 *2N7002DW
[2] EDP_TXP2 8
[2] EDP_TXN2 C777 *.1U/16V_4 EDP_TX2#_C R474 *0_4
R765 33_4 7
[31] TS_EN 6
[2] EDP_TXP3 C774 *.1U/16V_4 EDP_TX3_C
C775 *.1U/16V_4 EDP_TX3#_C 5
[2] EDP_TXN3 4
C782
180P/50V_4 R786 33_4 3
[10] GPIO8 2
TP_INT
G_0
1 +3VPCU
C781 50398-04071-001
180P/50V_4
R438
*100K_4
LID591#,EC intrnal PU
1C1-2 2014/03/11 Add R698 for TS_EN short TP_INT,
for issue debug. D22
R434 R455 1N4148WS
10K_4 10K_4
BL_ON
R454 *short_4 PCH_BLON_R BL#
Hall Sensor (HSR) [2] PCH_BLON
[31] PCH_BLON_EC R461 *short_4
3
R460
+3VPCU 100K_4 2
EC_FPBACK# [31]
Q37
R1 *100K_4 Q38 DTC144EUA
1
2N7002DW
D D
1
R6
D5 *Short_6
*VPORT_6
1 2 1 2 R789 33_4 LID#
1B-3 2013/12/10 change Q3.3 from +3V to +3VPCU.
2
D6 C784
C1 *VPORT_6 180P/50V_4
3
4.7u/10V_6 MR1
AH9249NTR-G1 Quanta Computer Inc.
1
1st:AL009249000 -- BCD
PROJECT : ZRT/ZRTA
Size Document Number Rev
2nd:AL009132001 -- ANC 1A
CRT/LVDS/CAMERA/LID
Date: Wednesday, February 11, 2015 Sheet 23 of 44
1 2 3 4 5 6 7 8
5 4 3 2 1
HDMI
From PCH
C130 0.1u/10V_4 INT_HDMITX2N_C
[2] INT_HDMITX2N
C129 0.1u/10V_4 INT_HDMITX2P_C
[2] INT_HDMITX2P
C141 0.1u/10V_4 INT_HDMITX1N_C
[2] INT_HDMITX1N
[2] INT_HDMITX1P
C139 0.1u/10V_4 INT_HDMITX1P_C HDMI connector
C132 0.1u/10V_4 INT_HDMITX0N_C
[2] INT_HDMITX0N
C131 0.1u/10V_4 INT_HDMITX0P_C
[2] INT_HDMITX0P
C148 0.1u/10V_4 INT_HDMICLK+_C
D [2] INT_HDMICLK+ D
C151 0.1u/10V_4 INT_HDMICLK-_C
[2] INT_HDMICLK-
CN12
20
SHELL1
1
INT_HDMITX0P_C 1
R161 R159 R145 R148 R150 R153 R140 R143 2 D2+
INT_HDMITX0N_C 3 D2 Shield
470_4 470_4 470_4 470_4 470_4 470_4 470_4 470_4 INT_HDMITX1P_C 4 D2-
5 D1+
2
INT_HDMITX1N_C 6 D1 Shield
INT_HDMITX2P_C 7 D1-
8 D0+
INT_HDMITX2N_C 9 D0 Shield 23
INT_HDMICLK+_C 10 D0- GND
1B-1 20131108 Change +5V to +3V for DG. 11 CK+ 22
CK Shield GND
3
INT_HDMICLK-_C 12
13 CK-
Q44 14 CE Remote
2 HDMI_DDCCLK_MB 15 NC
+5V DDC CLK
HDMI_DDCDATA_MB 16
+5V Q10 17 DDC DATA
2N7002E 3 1 HDMI_5V 18 GND
R521 IN OUT 2 19 +5V
1
*100K/F_4 GND HDMI_MB_HPD R527 *short_4HP_DET_CN HP DET 21
AP2331SA-7 C153 D21 SHELL2
1
*220p/50V_4 *AZ5125-01J HDMI connector
R529
20K_4
2
C C
HDMI-detect
+3V +3V
R526
2
1M_4
Q47
2N7002K
I2C
+3V +5V
2
D24
RB501V-40
+3V
1
B B
R519 R520
EMI
2
2.2K_4 2.2K_4
Q45
1 3 HDMI_DDCCLK_MB
INT_HDMITX2P_C
2N7002K
R141 *120/F_4
+3V INT_HDMITX2N_C
+5V
INT_HDMITX1P_C
2
R152 *120/F_4
D26
RB501V-40 INT_HDMITX1N_C
+3V
INT_HDMITX0P_C
From PCH
1
R147 *120/F_4
R523 R524
[2] HDMI_DDCCLK_SW
2
INT_HDMICLK-_C
A A
LAN
LAN_XTALI C167 10p/50V_4
+3V_S5 R215 NAC@0_8
1
2
Y1 (1.5A) 60 mils
25MHZ +-30PPM 1 3 R205 *short_8
40 mils
+3VPCU LANVCC
VDD10
3
4
LAN_XTAL2 C176 Q15 R204 *0_8 REGOUT
C179 *10P/50V/COG_4 C168 10p/50V_4 AC@AO3413
2
R203 2.49K/F_4 RSET AC@1u/6.3V_4 R210 50 mils
10 mils TP16 AC@100K_4
TP17
TP13
[31] IOAC_LANPWR# R202 AC@10K_4
D LANVCC D
C169 *10P/50V/COG_4
32
31
30
29
28
27
26
25
U9
RSET
AVDD33
AVDD10
CKXTAL2
CKXTAL1
LED0
LED1/GPO
LED2(LED1)
33
GND
2
MDI_2- 7 18 GPP_TX3N_LAN C159 0.1U/10V_4
MDIN2(NC) HSON PCIE_RX3-_LAN [9]
8 17 GPP_TX3P_LAN C158 0.1U/10V_4
VDD10 AVDD10 HSOP PCIE_RX3+_LAN [9]
3 1 PCIE_REQ_LAN#_R
[9] CLK_PCIE_LAN_REQ#
+3V
AVDD33(NC)
Q11
REFCLK_N
MDIN3(NC)
REFCLK_P
MDIP3(NC)
CLKREQB
AC@2N7002K
HSIN
HSIP
1K_4
ISOLATEB
9
10
11
12
13
14
15
16
LANVCC
40 mils (Iout=1A)
R193 1K_4
R186
2
15K_4
MDI_3+
C157 C156 MDI_3- S5 Q13
DTC144EUA
IOAC
0.1U/10V_4 10U/6.3V_6 LANVCC
C R195 *short_4 3 1 PCIE_LAN_WAKE#_R C
[7,28] PCIE_LAN_WAKE#
CLK_PCIE_LANN [9]
R194 0_4
CLK_PCIE_LANP [9] [31] LAN_WAKE#
PCIE_TX3-_LAN [9] R188 *0_4
PCIE_TX3+_LAN [9]
PCIE_REQ_LAN#_R
* Place 0.1uF CAP close to pin-- 24 * Place 1uF CAP close to each VDD10 pin-- 22 (reserve)
B
Tramsformer B
RJ45 Connector
1003 change 0603 type
U31 CN13
24 LAN_MCT3 R201 75/F_6 LANCT3 R221 *Short_6
1 MCT0 C195 *0.1U/10V_4
TCT0 23 LAN_MX0+ C194 *0.1U/10V_4
MDI_0+ R199 1/F_4 MDI_0+_C 2 TX0+ C193 *0.1U/10V_4
TD0+ 22 LAN_MX0- C192 *0.1U/10V_4
MDI_0- R196 1/F_4 MDI_0-_C 3 TX0-
TD0- 21 LAN_MCT2 R197 75/F_6
U12 LANVCC 4 MCT1
MDI_0+_C 1 6 MDI_0-_C TCT1 20 LAN_MX1+ LAN_MX0+ 1 GND_LAN
2 IO1 IO4 5 MDI_1+ R190 1/F_4 MDI_1+_C 5 TX1+ LAN_MX0- 2
MDI_1-_C 3 GND REF 4 MDI_1+_C TD1+ 19 LAN_MX1- LAN_MX1+ 3
IO2 IO3 MDI_1- R185 1/F_4 MDI_1-_C 6 TX1- LAN_MX2+ 4
*CM1293A-04SO TD1- 18 LAN_MCT1 R183 75/F_6 LAN_MX2- 5
7 MCT2 LAN_MX1- 6
TCT2 17 LAN_MX2+ LAN_MX3+ 7 9
MDI_2+ R181 1/F_4 MDI_2+_C 8 TX2+ LAN_MX3- 8 10
U8 LANVCC TD2+ 16 LAN_MX2-
MDI_2+_C 1 6 MDI_2-_C MDI_2- R179 1/F_4 MDI_2-_C 9 TX2-
2 IO1 IO4 5 TD2- 15 LAN_MCT0 R178 75/F_6
MDI_3-_C 3 GND REF 4 MDI_3+_C 10 MCT3 GND_LAN
IO2 IO3 TCT3 14 LAN_MX3+
*CM1293A-04SO MDI_3+ R172 1/F_4 MDI_3+_C 11 TX3+
TD3+ LAN_RJ45
13 LAN_MX3-
GND
C164
Power trace tracking
0.01U/50V/X7R_4
GND_LAN
[2,5,7,8,9,10,11,13,14,15,16,17,18,22,23,24,26,27,28,29,30,31,33,34,35,36,37,38,39] +3V
[5,7,8,9,10,11,13,27,29,31,33,36,38] +3V_S5
[7,8,10,11,13,23,26,27,28,29,31,32,33,37,38,39] +3VPCU
C485
220p/3KV_1808
0930 modify Quanta Computer Inc.
PROJECT :ZRT/ZRTA
GND_LAN Size Document Number Rev
1A
LAN (RTL8111GS)
Date: Wednesday, February 11, 2015 Sheet 25 of 44
5 4 3 2 1
5 4 3 2 1
LINE1R-VREFO +3V
*2N7002DW
MIC2-VREFO *100K_4
1 6 SLEEVE
CODEC_VREF C24 2.2U/6.3V_4 R88
ADOGND
2
INT_AMIC-VREFO C23 10u/6.3V_4
ADOGND +5VA
3
D D
C27
C25
placed close to codec R42 100K_4 4 3 RING2 *100K_4
C30 5
2
1u/10V_4
*10K_4 PCH_AZ_CODEC_RST#
10u/6.3V_4
R91
1u/10V_4 C26 ADOGND Q5
C28 Q6
0.1u/10V_4 10u/6.3V_4 *2N7002K C71
*1u/10V_4
1
+AZA_VDD
Place next to pin 26
36
35
34
33
32
31
30
29
28
27
26
25
+1.5VA
U4
ADOGND
VREF
HP-OUT-L
LINE1-VREFO-L
AVDD1
AVSS1
MIC2-VREFO
CPVDD
CBN
HP-OUT-R
LINE1-VREFO-R
CPVEE
LDO1-CAP
C35
C34
D-Mic
10u/6.3V_4 0.1u/10V_4 +3V
ADOGND 37 24 LINE2-L +3V
CBP LINE2-L T1
R180 0_4 +3VDMIC2 C160 10p/50V_4 R213 DM@0_4 +3VDMIC C170 DM@10p/50V_4
38 23 LINE2-R C161 10u/6.3V_4 C177 DM@10u/6.3V_4
AVSS2 LINE2-R T2
ADOGND
Place next to pin 40 C29 10u/6.3V_4 39 22 LINE1L_R U10 U11
LDO2-CAP LINE1-L 6 1 Dual_EN DMIC_CS R163 DM@0_4 6 1
VDD GND VDD GND +3VDMIC
Analog 40 21 LINE1R_R
AVDD2 LINE1-R DMIC_DAT_L R166 0_4 DMIC_DAT_C 5 2 DMIC_DAT_L R169 *0_4 DMIC_DAT_D 5 2 DMIC_CS2
41 20 R52 0_6 DATA CS DATA CS
Digital +5VAA PVDD1 NC +3VPCU
DMIC_CLK_L R165 0_4 DMIC_CLK_C 4 3 DMIC_CLK_L R168 DM@0_4 DMIC_CLK_D 4 3
L_SPK+ 42 19 C37 10u/6.3V_4 CLK GND CLK GND
SPK-L+ MIC1-CAP ADOGND
C39 C41 D-MIC DM@D-MIC
10u/6.3V_4 0.1u/10V_4
L_SPK- 43
SPK-L-
ALC255 MIC2-R/SLEEVE
18 SLEEVE C154
*0.1u/10V_4
C155
*0.1u/10V_4
R_SPK- 44 17 RING2 C163 C162
SPK-R- MIC2-L/RING2 *0.1u/10V_4 *0.1u/10V_4
near Codec R_SPK+ 45 16
SPK-R+ MONO-OUT
46 15
+5VAA PVDD2 JDREF Dual_EN R176 DM@0_4
GPIO0/DMIC-DATA
+3VDMIC2
Low is power down PD# 47 GPIO1/DMIC-CLK 14
C C50 amplifier output PDB Sense B R170 SM@0_4 C
C49 48 13 SENSEA R63 200K_4 HP_JD#
SDATA-OUT
TP10 SPDIFO/GPIO2 Sense A
LDO3-CAP
0.1u/10V_4 1.Single DMIC DMIC_CS R207 *0_4 DMIC_CS2 R177 *0_4
SDATA-IN
+3VDMIC2 +3VDMIC
DVDD-IO
PCBEEP
RESETB
BIT-CLK
10u/6.3V_4 R68 100K_4 +3V KMM47237626-06DT (AL472376000) (MAIN)
DVDD
SYNC
DVSS
10
11
12
Digital NSM0410DT (W/ Fortemedia algorithm)
Main MIC CS need connect to second MIC DATA
C57 1.6Vrms D20 RB500V-40
+3V R71 *Short_6 +AZA_VDD
10u/6.3V_4 PCBEEP C61 0.1u/10V_4BEEP_1 R74 22K_4
SPKR [8,10]
Universal Audio Jack
DMIC_DAT_R
DMIC_CLK_R
+3V +1.5V
R31 R12
Place next to pin 1 2.2K_4 2.2K_4
PCH_AZ_CODEC_RST# 40mils
PCH_AZ_CODEC_RST# [8]
R92 *short_4
RING2 L1 *short_4 RING2_R
PCH_AZ_CODEC_SYNC [8]
DMIC_DAT_L R73 *short_4
DVDD_IO R93 *0_4
DMIC_CLK_L R83 22_4
SLEEVE L4 *short_4 SLEEVE_R
R37 *short_4 ACZ_SDIN R82 33_4 C70 C55
PCH_AZ_CODEC_SDIN0 [8]
R57 *short_4 C67 40mils
R22 *short_4 10p/50V_4 PCH_AZ_CODEC_BITCLK [8] 0.1u/10V_4 10u/6.3V_4
R55 *short_4 CN3
R35 *short_4 C63 *22p/50V_4 SLEEVE_R 4
R11 *short_4 HPR L3 *Short_6 HPR-1 R23 56/F_4 HPR_SYS 2
C20 *1000p/50V_4 Place next to pin 9 HP_JD# 6
PCH_AZ_CODEC_SDOUT [8]
C54 *1000p/50V_4 5
7
HPL L2 *Short_6 HPL-1 R13 56/F_4 HPL_SYS 1
B 3 B
RING2_R
ADOGND C13
+5VAA COMBOJACK
2200P/50V_4 C2
L10 R15
+5V
PBY160808T-600Y-N(60,3A) R21 C3 *100P/50V_4
C46 C47 *1K_4 C14 Normal Open
*1K_4 2200P/50V_4 PIN1 --> L
1U/6.3V_4 10u/6.3V_4 *100P/50V_4 PIN2 --> R
PIN3 --> GND/MIC
PIN4 --> MIC/GND
LINE1R_R C10 4.7u/6.3V_4 ADOGND ADOGND ADOGND
PIN5 --> GND
PIN6 --> JD
LINE1L_R C8 4.7u/6.3V_4 PIN7 --> Shielding
+AZA_VDD
LINE1L-VREFO
R20
R19
4.7K_4
4.7K_4
SLEEVE_R D10 1 2 *VPORT 0402 151 MV05
A
C22 C33 R41
*10K/F_4 Codec PWR 3V/1.5V(ADO) A
*0.1u/10V_4 *10u/6.3V_6 ADOGND
Internal Speaker +1.5VA
R38 *0_4
40mil for each signal
DIGITAL ANALOG
ADOGND 1003 change 0603type CN4
R_SPK+ R18 *Short_6 R_SPK+_1
R_SPK- R17 *Short_6 R_SPK-_1 4 6 R40 *short_4
3 5 +1.5V
L_SPK- R16 *Short_6 L_SPK-_1
L_SPK+ R14 *Short_6 L_SPK+_1 2 C17
C730, C787 close U37 pin3 and L65 1
SPK_CONN_4P 1U/6.3V_4 Quanta Computer Inc.
C7 C6 C5 C4
[7,8,10,11,13,23,25,27,28,29,31,32,33,37,38,39] +3VPCU *68p/50V_4 *68p/50V_4 *68p/50V_4 *68p/50V_4 PROJECT : ZRT/ZRTA
[2,5,7,8,9,10,11,13,14,15,16,17,18,22,23,24,25,27,28,29,30,31,33,34,35,36,37,38,39] +3V
Size Document Number Rev
[22,23,24,27,29,33,37] +5V
3B
[11,28,37] +1.5V ALC283/HP/SPK
Date: Wednesday, February 11, 2015 Sheet 26 of 44
5 4 3 2 1
5 4 3 2 1
CN10
23
GND23 CN15
1 14
GND1 2 SATA_TXP0_C C52 0.01U/25V_4 GND14 +3V
RXP SATA_TXP0 [8]
3 SATA_TXN0_C C53 0.01U/25V_4 SATA_TXN0 [8] 1
RXN 4 GND1 2 SATA_TXP1_C C189 0.01U/25V_4
GND2 RXP SATA_TXP1 [8]
5 SATA_RXN0_C C42 0.01U/25V_4 3 SATA_TXN1_C C196 0.01U/25V_4 SATA_TXN1 [8]
D TXN 6 SATA_RXN0 [8] RXN 4
D
TXP
SATA_RXP0_C C43 0.01U/25V_4
SATA_RXP0 [8] GND2
R782 H:SSD
7 5 SATA_RXN1_C C200 0.01U/25V_4 100K_4 L:ODD
GND3 TXN 6 SATA_RXN1 [8]
SATA_RXP1_C C201 0.01U/25V_4
TXP SATA_RXP1 [8]
7 SSD_ID R781 10K_4
8 GND3 DEVSLP_ODD [8]
R231 10K_4 +3V
3.3V 9 R780 33_4
3.3V 10 8 ODD_PRSNT# [8]
DEVSLP0_R R97 *0_4 DEVSLP0 [10] C208 180P/50V_4
3.3V 11 DP 9 +5VODD R561 *short_8 +5V_ODD
GND 12 +5V +5V 10
GND 13 +5V 11 C503 C509 C496 C500 C495 C493
+
GND 14 +5V_HDD 60mil R111 *short_8 MD 12
5V 15 GND 13 0.01U/25V_4 0.01U/25V_4 *0.1u/16V_4 *0.1u/16V_4 10u/6.3V_6 *100u/6.3V_3528
5V 16 GND
5V 17 C97 C96 C92 C91 C89 + C102 15
GND 18 R778 *0_4 0.01U/25V_4 0.01U/25V_4 *0.1u/16V_4 *0.1u/16V_4 10u/6.3V_6 *100u/6.3V_3528 GND15
RSVD G_INT2 [29] +3V
19 6030D-13G20
GND 20
12V 21 R239 10K_4
12V 22 R785 33_4
12V EC_ODD_EJ [31]
C780 180P/50V_4
24
GND24
HDD CONN
6
R544 5 4 R537 NAC@0_8
AC@100K 2
1 R538 C766 C767 C768 C769
AC@22_8 *0.1u/50V_6 *0.1u/50V_6 *0.1u/50V_6 *0.1u/50V_6
2
R560
3
ODD_EN_Q 2 1
MOD_EN_5V
3
[31] ODD_POWER R571 AC@0_4 ODD_EN
ODD_EN_Q 2
1
*100K 1
2
AC@2N7002DW
Q51
4
B
TPM NPCT650 (TPM) HOLE1
*H-TC315BC354D118P2
HOLE2 HOLE3
*O-ZRTA-5 *H-TC315BC354D118P2
HOLE4 HOLE5 HOLE6
*H-C118D118 *H-O138X114D138X114N *H-TC315BC354D134P2
HOLE7
*H-O152X92DO152X92N
B
1
TPMM 1.2 AL009655K01
+3V3_TPM_VSB
TPMM 2.0 AL000650K01 +3V +3V3_TPM SLB9655 STUFF +3V
+3V_S5
R491 *Short_6 R517 TPM_S@0_6 +3VSUS HOLE8 HOLE9 HOLE10 HOLE11 HOLE12 HOLE13 HOLE14 HOLE15
C458 TPM@10u/6.3V_6 R512 TPM_N@0_6 *O-ZRTA-3 *O-ZRTA-2 *o-zrt-1 *h-tc256ic201bc236d161p2 *h-tc256ic201bc236d161p2*O-ZRTA-1 *O-ZRTA-4 *h-tc256ic201bc236d161p2
C459 TPM@0.1u/10V_4 R516 *0_6
C460 TPM@0.1u/10V_4 C467 TPM@10u/6.3V_6
C469 TPM@0.1u/10V_4 C468 TPM@0.1u/10V_4
1
1
24
19
10
U29
VDD3
VDD2
VDD1
VSB
1
PCLK_TPM 21 SERIRQ GPIO3/BADD 8
[9] PCLK_TPM LCLK/SCLK TEST
[7,31] CLKRUN# CLKRUN# R493 TPM_N@0_4 TPM_CLKRUN# 15 3 R509 TPM_LRESET#
PLTRST# R492 *short_4 TPM_LRESET# 16 CLKRUN/GPIO04 NC1 12 TPM_S@0_4
A [7,13,16,25,28,31] PLTRST# A
LPCPD 28 LRESET/SPI_RST NC2 13 SLB9655 STUFF
LPCPD NC3 [7,8,10,11,13,23,25,26,28,29,31,32,33,37,38,39] +3VPCU
14
NC4 [5,7,8,9,10,11,13,25,29,31,33,36,38] +3V_S5
[2,5,7,8,9,10,11,13,14,15,16,17,18,22,23,24,25,26,28,29,30,31,33,34,35,36,37,38,39] +3V
GND1
GND2
GND3
GND4
+3V3_TPM +3V3_TPM
PROJECT : ZRT/ZRTA
LPCPDR109 *4.7K_4 GPX R506 TPM_S@4.7K_4 Size Document Number Rev
1A
SLB9655 STUFF SLB9655 STUFF HDD/ODD/TPM NPCT650
Date: Wednesday, February 11, 2015 Sheet 27 of 44
5 4 3 2 1
5 4 3 2 1
CN14
+WL_VDD
1
NGFF 2 C213 10u/6.3V_6
D USBP4+ 3 GND 3.3Vaux 4 C483 0.1u/10V_4 D
[9] USBP4+ USB_D+ 3.3Vaux +WL_VDD
USBP4- 5 6 C484 0.1u/10V_4
[9] USBP4- USB_D- LED#1
7 8 C502 0.1u/10V_4
9 GND PCM_CLK 10 C504 0.1u/10V_4
11 SDIO CLK(O) PCM_SYNC 12
13 SDIO CMDIO) PCM_IN 14
15 SDIO DAT0(IO) PCM_OUT 16 R792 Q57
SDIO DAT1(IO) LED#2
2
17 18 *10K_4 *2N7002K
19 SDIO DAT2(IO) GND 20
21 SDIO DAT3(IO) UART Wake 22 SUSCLK 1 3
SDIO Wake(I) UART Rx PCH_SUSCLK [7]
23 24
25 SDIO Reset Key 5 26
KEY1 Key 6 +WL_VDD APU 3V_S5(Ext PU)
27 28 C684
29 KEY2 Key 7 30 *22P/50V_4 R791 *0_4
31 KEY3 Key 8 32
33 KEY4 UART Tx 34
PCIE_TX4+_WLAN 35 GND UART CTS 36
[9] PCIE_TX4+_WLAN PETp0 UART RTS
PCIE_TX4-_WLAN 37 38
[9] PCIE_TX4-_WLAN PETn0 Clink RESET
39 40
PCIE_RX4+_WLAN 41 GND CLink DATA 42
[9] PCIE_RX4+_WLAN PERp0 CLink CLK
PCIE_RX4-_WLAN 43 44 R542 *0_4
[9] PCIE_RX4-_WLAN PERn0 COEX3 PCIERST# [25]
45 46
CLK_PCIE_WLANP 47 GND COEX2 48 R541 AC@0_4
[9] CLK_PCIE_WLANP REFCLKP0 COEX1 IOAC_RST# [25,31]
[9] CLK_PCIE_WLANN CLK_PCIE_WLANN 49 50 SUSCLK
51 REFCLKN0 SUSCLK(32KHz) 52 WLAN_RST# R550 NAC@0_4
C GND PERST0# PLTRST# [7,13,16,25,27,31] C
WLAN_CLKREQ# 53 54 BT_POWERON [31]
WLAN_WAKE_R# 55 CLKREQ0# W_DISABLE#2 56 RF_EN_R R783 33_4
PEWake0# W_DISABLE#1 RF_EN [31]
57 58
59 GND NFC I2C SM DATA 60 C779 180P/50V_4
61 PETp1 NFC I2C SM CLK 62
63 PETn1 NFC I2C IRQ 64 LPC_LAD0_C R534 *0_4 LPC_LAD0
GND NFC Reset# LPC_LAD0 [8,27,31]
65 66 LPC_LAD1_C R533 *0_4 LPC_LAD1
PERp1 RESERVED3 LPC_LAD1 [8,27,31]
67 68 LPC_LAD2_C R532 *0_4 LPC_LAD2
PERn1 RESERVED4 LPC_LAD2 [8,27,31]
69 70 LPC_LAD3_C R531 *0_4 LPC_LAD3
GND RESERVED5 LPC_LAD3 [8,27,31]
[9] CLK_PCI_LPC CLK_PCI_LPC R536 *0_4 CLK_PCI_LPC_C 71 72
LPC_LFRAME# R535 *0_4 LPC_LFRAME#_C 73 Reserved1 3.3Vaux 74 +WL_VDD
[8,27,31] LPC_LFRAME# Reserved2 3.3Vaux
75
GND
+1.5V
IOAC_WLANPWR#
+WL_VDD
+WL_VDD Low Mini card +3V power enable
+3V
R564 High Mini card +3V power disable
4.7K_4
Q50
R540 IOAC
4.7K_4
5 R233
S0 4 3 WLAN_CLKREQ#
NAC@0_8
+WL_VDD
[9] PCIE_CLKREQ_WLAN#
+3VPCU
1 3 +WL_VDD
2
WLAN_WAKE_R#
S5 1 6 R569 *short_4
R223
*100K_4
Q17
AC@AO3413
WLAN_WAKE# [31]
2
A
R568 *0_4 [31] IOAC_WLANPWR# A
PCIE_LAN_WAKE# [7,25]
2N7002DW
R539 *0_4
R563 *0_4
Quanta Computer Inc.
PROJECT : ZRT/ZRTA
High Mini card +3V power disable Size Document Number Rev
1A
Mini-Card/WL/3G/SIM
Date: Wednesday, February 11, 2015 Sheet 28 of 44
5 4 3 2 1
5 4 3 2 1
2
MX4 5 3 4 MX4 *100K_4 0.22u/25V_6 0.1u/10V_4
[31] MX4
6 1 2
100Khz 10~100u=9k~1k. 10K_4 10K_4
MX5 MX5 1006 Del TP CN
[31] MX5
MX6 7 CP6 *100p/50Vx4 R486 *0_4 C450 *1000p/50V_4 50mil
[31] MX6 [31] PTP_PWR_EN#
MX7 8 7 8 MY3 8
+TPVDD 10
[31] MX7
MY17 9 5 6 MY2 R481 *short_4 TPCLK_R 7 9
D [31] MY17 [31] TPCLK D
MY16 10 3 4 MY1 R482 *short_4 TPDATA_R 6
[31] MY16 [31] TPDATA
MY15 11 1 2 MY0 5
[31] MY15
MY14 12 CP1 *100p/50Vx4 I2C_TP_SDA_R 4
[31] MY14 +TPVDD
MY13 13 7 8 MY7 R33 *0_4 C444 C445 I2C_TP_SCL_R 3
[31] MY13
MY12 14 5 6 MY6 *0.1u/10V_4 *0.1u/10V_4 R784 33_4 TPD_INT#_R 2
[31] MY12 2N7002DW [2,31] TPD_INT#
MY11 15 3 4 MY5 R480 2.2K_4 R790 33_4 TPD_EN_R 1
[31] MY11 [31] TPD_EN
MY10 16 1 2 MY4 R479 2.2K_4
[31] MY10 CN7
MY9 17 CP3 *100p/50Vx4 1 6
[31] MY9
MY8 18 7 8 MY11 C785
[31] MY8
MY7 19 5 6 MY10 [10] I2C0_SDA_GPIO4 2 I2C_TP_SDA_R 180P/50V_4
[31] MY7
MY6 20 3 4 MY9 [10] I2C0_SCL_GPIO5 I2C_TP_SCL_R
[31] MY6
MY5 21 1 2 MY8
[31] MY5
MY4 22 CP4 *100p/50Vx4 4 3
[31] MY4
MY3 23 7 8 MY15
[31] MY3
MY2 24 5 6 MY14 5
[31] MY2 +TPVDD
MY1 25 3 4 MY13
[31] MY1 Q41 +3V VIN
MY0 26 1 2 MY12 +TPVDD
[31] MY0
R779 0_4 27 29 CP5 *100p/50Vx4 R34 *0_4 R478 *10K_4 TPD_EN_R
[13,31] NBSWON#
28 30 +3V
C447 *100p/50V_4 MX1
C448 *100p/50V_4 MX0
KB_CONN R56 R26
R51 *1M_6 *22_8
1
*10K_4 +TPVDD
PTP_PWR_EN#
D29
*TVS AZ5125-01H.R7G
3
2
3
+3VPCU R768
*10K_4
2 2 2
C RP1 *10K_10P8R TPD_INT# C
10 1 MX3 R48 Q1
MX4 9 2 *1M_6 *2N7002K
1
MX6 8 3 MX2 Q3 Q2 C641
For test only
1
MX5 7 4 MX0 1006 add *DTC144EU *DTC144EU 180P/50V_4
MX7 6 5 MX1
SW1
3 2 NBSWON#
4 1
TP61 TP62
5
6 C778
Power Switch
*0.1u/10V_4 CPU FAN (THM) +3V
+3V
R601
R584
+5V 10K_4
+5V *10K_4
KB_BL LED (KBL) +5V
2
C547 KBL@2.2u/6.3V_6 C516
[31] FANSIG
R406 2.2U_6
1
1
KBL@10K_4 Q52 2 3 TH_FAN_POWER
VIN VO 5 1
KBL@AO3413 GND 2
2 1 6
[8] SMB1ALERT# /FON GND 3
2
7 C514 C513 C523
4 GND 8 FAN_3P
[31] CPUFAN# VSET GND
3
B B
2.2U_6 0.01U/25V_4 *0.01U/25V_4
1
G991P11U
3
KBL@4.7u/10V_6 KBL@0.01U/25V_4
4
3 6
2
1
5
POWER LED(UIF) R7 *1M_4
[7,8,10,11,13,23,25,26,27,28,31,32,33,37,38,39] +3VPCU
[22,23,24,26,27,33,37] +5V
+3V_S5 [2,5,7,8,9,10,11,13,14,15,16,17,18,22,23,24,25,26,27,28,30,31,33,34,35,36,37,38,39] +3V
KBL@KB_backlight
[30,33,34,35] +5VPCU
R8 *1M_4
[4,27,33] +3VSUS
[5,7,8,9,10,11,13,25,27,31,33,36,38] +3V_S5
D1 1 2 *5.5V/25V/410P_4 +3V_S5
+3V Power LED Blue
LED1
G-sensor(ACS) R522 *Short_6 +G_SEN_PW
[31] PWRLED#
R2 71.5/F_4 2 3
U30 R3 130/F_4 1
[31] SUSLED#
C473 C474 1 2
GS@0.1U/10V_4 14 Vdd_IO NC 3 LED_AMBER/BLUE
GS@10u/6.3V_6 VDD NC
1 Amber
2
D2 *5.5V/25V/410P_4
10 R9 *1M_4 +3VPCU
D23 GS@RB500V-40 ACCEL_INTA_R 11 RESERVED 15
[10] ACCEL_INTA INT1 RESERVED
[27] G_INT2 D27 GS@RB500V-40 G_INT2_R 9 R10 *1M_4
INT2 +3VPCU
A A
ACCEL_INTA R518 *short_4 7
SA0
Battery D3 1 2 *5.5V/25V/410P_4
CLK_SDATA R514 *short_4 G_MBDATA_R 6 5
[8,13,14,15] CLK_SDATA
CLK_SCLK R515 *short_4 G_MBCLK_R 4 SDA GND 12 Blue
LED2
[8,13,14,15] CLK_SCLK SCL GND 13 R4 71.5/F_4 2 3
GND [31] BATLED0#
C472 +G_SEN_PW +G_SEN_PW 8 16
*22P/50V_4 CS GND R5 130/F_4 1
G_MBDATA_R C470 *33P/50V_4
GS@LIS3DHTR
[31] BATLED1#
LED_AMBER/BLUE
Quanta Computer Inc.
G_MBCLK_R C471 *33P/50V_4
Amber
1 2 PROJECT : ZRT/ZRTA
D4 *5.5V/25V/410P_4 Size Document Number Rev
R510 *4.7K_4 G_MBDATA_R
+G_SEN_PW
R511 *4.7K_4 G_MBCLK_R KB/TP/FAN/LED 3A
13
12
11
10
R113 *0_4 ILIM_SELR114 *100K_4
13
12
11
10
+5VPCU
USBPWR1
U5 Close USB3.0
USBP0-_C RV4 1 2 *EGA_4 1u/6.3V_4 C87 1 12 USBPWR R72 *short_8
USBP0+ 3 IN OUT 10 USBP0+_R
[9] USBP0+ DP_OUT DP_IN
USBP0+_C RV3 1 2 *EGA_4 USBP0- 2 11 USBP0-_R C56
[9] USBP0- DM_OUT DM_IN
R117 *short_4 USB_CHARGE_EN 5 13 USB_OC0#
+
[31] USB_CHARGE_ON EN FAULT
USB3_RXN0_R RV1 1 2 *EGA_4 9 16 R103 22K_4 C51 C62
R123 *short_4 CLT1 6 STATUS ILIM_HI 15 R102 48.7K_4
[31] USB_CLT1 CLT1 ILIM_LO 100u/6.3V_12
GND1
USB3_RXP0_R RV2 1 2 *EGA_4 R121 100K_4 CLT2 7 4 0.1u/10V_4
R120 100K_4 CLT3 8 CLT2 ILIM_SEL 14 470P/50V_4
+5VPCU CLT3 GND
1007 change footprint
USB3_TXN0_R RV5 1 2 *EGA_4
17
G3703R41D
USB3_TXP0_R RV6 1 2 *EGA_4 GMT AL003703000 ILIM_SEL R115 *short_4 USB_BC_ON [31]
TI AL002544001
C C
R29 *short_4 USBP7-_R +3V R39 *Short_6 DVDD
[9] USBP7-
[9] USBP7+ R30 *short_4 USBP7+_R
TP1
TP2
USBPWR2 SD_D2/MS_D5
CN11 SD_D3/MS_D4
USB3.0 CONN 0.1u/10V_4 C12
1 USBP1-_R 1
RV10 2 *EGA_4
2 1 VBUS TP3
USBP1- R105 *short_4 USBP1-_R
[9] USBP1- 2 D-
USBP1+ R101 *short_4 USBP1+_R 3 USBP1+_R RV9 1 2 *EGA_4
V18
[9] USBP1+ 3 D+
4
USB3_RXN1 R96 *short_4 USB3_RXN1_R 5 4 GND USB3_RXN1_R RV7 1 2 *EGA_4
[9] USB3_RXN1 6 5 SSRX-
USB3_RXP1 R100 *short_4 USB3_RXP1_R
24
23
22
21
20
19
[9] USB3_RXP1 7 6 SSRX+ USB3_RXP1_R RV8 1 2 *EGA_4 U2
C85 0.1u/10V_4 USB3_TXN1_R 8 7 GND
V18
XD_D7
SP14
SP13
SP12
SP11
[9] USB3_TXN1 8 SSTX-
C90 0.1u/10V_4 USB3_TXP1_R 9
[9] USB3_TXP1 9 SSTX+ 1
USB3_TXN1_R RV11 2 *EGA_4 R27 6.2K/F_4 RREF 1 18 SD_CMD
13
12
11
10
DVDD 4 DP 15 SD_CLK
3V3_IN QFN24 SP8
VCC_XD VCC_XD 5 14
CARD_3V3 SP7 TP6
SDREG 6 13 SD_CDZ
SDREG SP6
XD_CD#
C21
SP1
SP2
SP3
SP4
SP5
C16 C15
4.7u/10V_6 25 GND
0.1u/10V_4 0.1u/16V_4
7
8
9
10
11
12
+5VPCU
USBPWR2
U6 Close USB3.0
1u/6.3V_4 C117 5 1
IN OUT
2 C93
GND
+
B B
USBON# 4 3 C94 C95
[31] USBON# EN /OC
100u/6.3V_12
AP22802BW5-7 0.1u/10V_4 TP8 TP7
470P/50V_4 TP9 SD_D0/MS_D6
[9] USB_OC0#
SD_D1/MS_D7
SD_WP/MS_D1
Enable: Low Active /2.5A
[4,33,36,38,39] +5V_S5
GND C9 CN1
USBON# 4 3 C442 *100u/6.3V_12
EN /OC SD_WP/MS_D1 R45 *short_4 SD_WP_R 11
AP22802BW5-7 0.1u/10V_4 SD_CDZ R36 *short_4 SD_CD#_R 10 WP 16
470P/50V_4 SD_D2/MS_D5 R25 *short_4 SD_DATA2_R 9 CD NC 17
SD_D1/MS_D7 R44 *short_4 SD_DATA1_R 8 DATA2 NC
[9] USB_OC1# 7 DATA1
SD_D0/MS_D6 R43 *short_4 SD_DATA0_R
6 DATA0
SD_CLK R32 *short_4 SD_CLK_R 5 VSS2
Enable: Low Active /2.5A 4 CLK
VCC_XD VDD
3
SD_CMD R28 *short_4 SD_CMD_R 2 VSS1
GND
GND
GND
GND
SD_D3/MS_D4 R24 *short_4 SD_DATA3_R 1 CMD
CD/DATA3
USBPWR3 SD-CARD
12
13
14
15
A CN6 C18 A
1 C19
2 4.7u/10V_6 0.1u/16V_4
3
4
5
6
[9] USBP3- 7
8
D/B USB Port [9] USBP3+
9 11
10 12
USB_CONN
Quanta Computer Inc.
PROJECT : ZRT/ZRTA
Size Document Number Rev
1A
USB Port/ DB
Date: Wednesday, February 11, 2015 Sheet 30 of 44
5 4 3 2 1
5 4 3 2 1
EC(KBC) L9 +A3VPCU
+3VPCU
114
121
106
127
U27 PCH_SPI_SO_EC R496 *10K_4
11
26
50
92
74
84
83
82
19
20
99
98
97
96
93
3
10 110 MBCLK
VCC
VSTBY_FSPI
AVCC
VSTBY
VSTBY
VSTBY
VSTBY
VSTBY
VSTBY(PLL)
EGCLK/GPE3
EGCS#/GPE2
EGAD/GPE1
L80HLAT/BAO/GPE0
L80LLAT/GPE7
GPH7
ID6/GPH6
ID5/GPH5
ID4/GPH4
ID3/GPH3
CLKRUN#/ID0/GPH0
[8,27,28] LPC_LAD0 LAD0/GPM0(3) SMCLK0/GPB3 MBCLK [32]
9 111 MBDATA
[8,27,28] LPC_LAD1 LAD1/GPM1(3) SMDAT0/GPB4 MBDATA [32]
[8,27,28] LPC_LAD2
8 SM BUS 115 2ND_MBCLK 2ND_MBCLK [8,19]
7 LAD2/GPM2(3) SMCLK1/GPC1 116 2ND_MBDATA
+3VPCU
[8,27,28] LPC_LAD3
[7,13,16,25,27,28] PLTRST# PLTRST# 22
13
LAD3/GPM3(3)
LPCRST#/GPD2
SMDAT1/GPC2
PECI/SMCLK2/GPF6(3)
117
118
EC_PECR_R R498
2ND_MBDATA [8,19]
43_4 H_PECI [4] SM BUS PU(KBC)
[9] CLK_PCI_EC LPCCLK/GPM4(3) SMDAT2/PECIRQT#/GPF7(3) LID# [23]
[8,27,28] LPC_LFRAME#
6 +3VPCU
LFRAME#/GPM5(3)
PROCHOT_EC 17 MBCLK R500 4.7K_4
LPCPD#/GPE6
2
1
73 21 HWPG +3V_RTC C772
[32] TEMP_MBAT ADC7/CTS1#/GPI7(3) WAKE UP RI2#/GPD1
35 *0.1U/16V_4
[28] IOAC_WLANPWR# RTS1#/GPE5
34
[26] PCBEEP_EC
2
122 PWM7/RIG1#/GPA7 112
[5] HWPG_1.05V_EC# DTR1#/SBUSY/GPG1/ID7 RING#/PWRFAIL#/CK32KOUT/LPCRST#/GPB7 RSMRST# [7] [32] BI
[32] AC_Protect
95
94 CTX1/SOUT1/GPH2/SMDAT3/ID2 R771
[27] EC_ODD_EJ CRX1/SIN1/SMCLK3/GPH1/ID1
3
Q55 100K_4
6
[8] PCH_SPI_CLK_EC
105 PJA138K
101 FSCK/GPG7
[8] SPI_CS0#_UR_ME FSCE#/GPG3 RF_EN [28]
[8] PCH_SPI_SI_EC
102 EXTERNAL SERIAL FLASH ICMNT ICMNT [32]
2 BI_GATE
103 FMOSI/GPG4 66
[8] PCH_SPI_SO_EC FMISO/GPG5 ADC0/GPI0(3)
1
67 C36 10u/6.3V_6 ECAGND
56 ADC1/GPI1(3) 68 dGPU_OPP# C773
[29] MY16 KSO16/SMOSI/GPC3(3) ADC2/GPI2(3) dGPU_OPP# [19] SW3
57 69 *0.1U/25V_4
[29] MY17 VRON [36]
2
KSO17/SMISO/GPC5(3) ADC3/GPI3(3)
3
4
32 70 BI_SW Q54
[23] TS_EN IOAC_LANPWR# [25]
1
PWM6/SSCK/GPA6 ADC4/GPI4(3) 6 *PJ4N3KDW
[33,34,37] S5_ON S5_ON 100 A/D D/A
125 SSCE0#/GPG2
[29] PTP_PWR_EN# SSCE1#/GPG0 SPI ENABLE
76 Vgs = 1.5V Vgs = 1.5V
TACH2/GPJ0(3) DPWROK [7]
36 77 EC_FB_CLAMP EC_FB_CLAMP [17,19]
5
[29] MY0 KSO0/PD0 GPJ1(3)
37 78 PCH_PWROK [5,7]
[29] MY1 KSO1/PD1 DAC2/TACH0B/GPJ2(3)
B 38 79 PCH_SUSPWRACK_R [7] B
[29] MY2
1
2
39 KSO2/PD2 DAC3/TACH1B/GPJ3(3)
[29] MY3 KSO3/PD3
40
[29] MY4 KSO4/PD4
41
[29] MY5 KSO5/PD5
42 KBMX
[29] MY6 KSO6/PD6
43
[29] MY7 KSO7/PD7
44
[29] MY8 KSO8/ACK#
45
[29] MY9 KSO9/BUSY
46
[29] MY10 KSO10/PE
51 2 R95 *0_4
KSI3/SLIN#
KSI2/INIT#
54
KSI4
KSI5
KSI6
KSI7
VSS
VSS
VSS
VSS
VSS
3
IT8987 SM BUS ARRANGEMENT TABLE Q4
58
59
60
61
62
63
64
65
27
49
91
104
75
12
1
100K_4
[29] MX4
[29] MX5 SM Bus 3
[29] MX6
L11
[29] MX7
BLM15AG121SN1D(120,500MA)_4 SM Bus 4
[7,8,10,11,13,23,25,26,27,28,29,32,33,37,38,39] +3VPCU
HWPG(KBC) +3V
[16,18,19,39] +3V_GFX
[2,5,7,8,9,10,11,13,14,15,16,17,18,22,23,24,25,26,27,28,29,30,33,34,35,36,37,38,39] +3V
[5,7,8,9,10,11,13,25,27,29,33,36,38] +3V_S5
A A
DDR=1.5V, D1 DNP and D2 POP
DDR=1.35V, D1 POP and D2 DNP R64
10K_4
D1
D11 RB500V-40 HWPG
[37] HWPG_1.5V
D2
D15 *RB500V-40
[5] HWPG_1.05V
D13 RB500V-40
Quanta Computer Inc.
[35] HWPG_VDDR
D14 RB500V-40 PROJECT : ZRT/ZRTA
[13,34] HWPG_1.05V_S5
Size Document Number Rev
D12 RB500V-40 3A
[33] SYS_HWPG KBC IT8587
Date: Wednesday, February 11, 2015 Sheet 31 of 44
5 4 3 2 1
5 4 3 2 1
VA2 PR203
VA1 PQ56 PD8 0.02/F_0612 PQ22
AOL1413 SV1040 VIN AOL1413
PJ1 1 1 1
2 5 3 1 2 2 5
1 3 2 3
2 PR202
3
1
D *short_4 D
4 PC62 PC52 PR105 24737_ACN PC139 PC138 PR117
4
Power conn 0.1u/50V_6 0.1u/50V_6 220K_4 0.1u/50V_6 2200p/50V_6 33K/F_4
PD5
P4SMAFJ20A 24737_ACP
2
PC58 PC55 PR205
0.1u/50V_6 2200p/50V_6 1 6 *short_4
3
IMD2AT108
2
24737_ACP
PQ21
2N7002K
24737_ACN
1
PR128
*Short_6 PC63 PC61 PC165
0.1u/50V_6 0.1u/50V_6 0.1u/50V_6
PR127
+3VPCU 63.4K/F_4
1
VIN
PR229 PC157
ACN
ACP
C 10K/F_4 1u/16V_6 C
24737_ACDET 6 16 24737_REGN
ACDET REGN
PR107 PR110 PR108 PC53
*10K_4 100K_4 100K_4 0.1u/25V_4 PD9
24737_VCC 20 RB500V-40
VCC PR116 PC162 PC161
PR124 PC163 *Short_6 2200p/50V_6 10u/25V_8
20_1206 0.47u/25V_6 17 24737_BST
[31] ACIN BTST
5
PC160
47n/50V_6
[7] ACPRESENT
PR99 18 24737_DH 4
HIDRV
6
*0_4 5 PQ58
[31] SB_ACDC ACOK# AON7410
PR100 19 24737_LX
3
2
1
*short_4 PHASE PR230
0.01/F_0612
MBDATA 8 PU11 PL11
PQ18 SDA BQ24737RGRR 6.8uH_7X7X3
2N7002DW PR226 15 24737_DL 1 2 BAT-V
1
*short_4 LCDRV
PC159 MBCLK 9
SCL
5
0.1u/50V_6
+3VPCU PR225 PQ57
PR222 *short_4 14 AON7410 PR123
PC152 10K_4 PGND *4.7_6
*100p/50V_4 24737_BM# 11 4 PR224 PR223
BM# *short_4 *short_4
PR227 PC153
10K_4 24737_CMPOUT 3 PR112 10_6 0.1u/25V_4
3
2
1
B BAT-V CMPOUT 13 24737_SRP 24737_SRP PC155 PC164 PC158 B
SRP PC60 2200p/50V_6 10U/25V_8 10U/25V_8
24737_ILIM 10 PC156 *680p/50V_6 24737_SRN
BI [31] ILIM
C114F3-108A1-L_Batt_Conn
PJ2 0.1u/25V_4
PR221 *0_4 PR125 PR113 7.5_6
9 8 316K/F_4 24737_CMPIN 4 12 24737_SRN
7 CMPIN SRN
6 PR122 100_4 TEMP_MBAT IOUT
GND
GND
GND
GND
GND
5 TEMP_MBAT [31]
PC154
4 0.1u/25V_4
3 PR115 PR228 / SRN
SRP/
+3VPCU
7
21
22
23
24
25
2 PR121 1M_4 100K/F_4
10 1 *100K_4 Check with HW side
4-Cells Others
R2 +1.05V
PR220
PR126
*100K_4
bq24737 / 7.5
10/ / 7.5
10/
24737_BM# 2 SP@51K/F_4 PR111
MBCLK [31] R1 *0_4 H_PROCHOT# [4,31,36]
PQ20
3
*2N7002K
[31] ICMNT
MBDATA [31]
REGN MAX voltage 6.5V
1
1
24737_CMPOUT 2
PC56 PC57 V_ILIM=20*(VSRP-VSRN)=20*Ichg*Rsr
*47p/50V_4 *47p/50V_4 PC59 PQ19
100p/50V_4 2N7002K =0.793V for 3.965A current limit
A A
GPU_THROTTING# [19]
2
PR109
Pin10 ILIM=0.793V
3
PD6 PD4
R1 R2 *short_4 Rsr = 0.01ohm
PDZ5.6B PDZ5.6B
24737_CMPOUT 2
UMA-45W 51K(CS35102FB04) 100K
[31] AC_Protect For BATT Only PQ59
*2N7002K
Quanta Computer Inc.
DIS-65W 115K(CS41152FB08) 100K 1
PROJECT : ZRT/ZRTA
Size Document Number Rev
2A
Charger(BQ24737RGRR)
Date: Wednesday, February 11, 2015 Sheet 32 of 44
5 4 3 2 1
5 4 3 2 1
MAIND SYS_SHDN#
MAIND [34,37] SYS_SHDN# [10,37]
PR137
*Short_6
JP2 JP3
*short_3720 +3VPCU VL 3V_LDO *short_3720
PR10
D D
10K/F_4
[31] SYS_HWPG
1 2 +5VPCU_VIN +3VPCU_VIN 1 2 VIN
VIN
SYS_SHDN#
10u/6.3V_6
0.1u/25V_4
4.7u/6.3V_6
1
+
PC69
PC71
33U/25V_6x4.5 10u/25V_8 2200p/50V_6 2200p/50V_6 10u/25V_8
51225_VIN
PC70
+5VPCU +5VPCU PQ29
5
5 Volt +/- 5% AON7410 +3VPCU
5
PQ26
TDC : 6.9A AON7410 +3VPCU
1
13
12
3
4
TDC : 3A
1
OCP : 11A 4
VIN
VREG5
VREG3
Width : 280mil 7 6 SYS_SHDN#
PEAK : 4A
3
2
1
PGOOD EN2
JP7 OCP : 5A
2
1
2
3
*short_3720 51225_EN1 20 10 51225_DH2
EN1 DRVH2 PR140 PC74 Width : 120mil JP5
2
PL1 51225_DH1 16 9 51225_VBST2 PL3 *short_3720
2.2uH_7X7X3 PC67 PR132 DRVH1 VBST2 3.3uH_7X7X3
+5V_SRC 51225_VBST1 17 8 51225_SW2 1/F_6 0.1u/50V_6 +3V_SRC
VBST1 PU4 SW2
0.1u/50V_6 1/F_6 51225_SW1 18 TPS51225RUKR 11 51225_DL2
SW1 DRVL2
5
C C
PR133 51225_DL1 15 4 51225_FB2 PR136
15.4K/F_4 DRVL1 VFB2 6.81K/F_4
51225_FB1 2 21 PR12
+ PR8 4 VFB1 GND 4 *4.7_6 +
*4.7_6 14 22
PC65 PC64 VO1 GND PC80 PC90
VCLK
GND
GND
GND
GND
CS1
CS2
220u/6.3V_6X4.2 0.1u/50V_6 PQ27 PQ30 0.1u/50V_6 220u/6.3V_6X4.2
1
2
3
3
2
1
AON7752 AON7752 PC8
PR134 *680p/50V_6 PR135
19
26
25
24
23
10K/F_4 PC5 10K/F_4
*680p/50V_6
51225_CS1
51225_CS2
51225_VCLK
OCP:5A
L(ripple current)
=(9-3.3)*3.3/(3.3u*0.355M*9)
110K/F_4
48.7K/F_4
~1.784A
PC2 Iocp=5-(1.784/2)=4.108A
2 0.1u/50V_6
PD2 Vth=4.108A*14.5mOhm+1mV=60.56mV
OCP:11A 1PS302 3 R(Ilim)=(60.56mV*8)/10uA
L(ripple current) PR130 1/13 Adding +3VSUS power for touch pad ~48.45K
1
=(9-5)*5/(2.2u*0.3M*9)
*Short_6 (By acer request)
PR4
PR11
PC1
=3.367A 0.1u/50V_6 PC66
Iocp=11-(3.367/2)=9.316A 0.1u/50V_6 PR6
2 *Short_6
B Vth=9.316A*14.5mOhm+1mV=136.082mV PD1 VIN +3VSUS +15V VIN +3VPCU B
R(Ilim)=(136.082mV*8)/10uA 1PS302 3
=108.86K 1
PR152 PR160 PR150 PR151
+15V_ALWP *1M_6 *22_8 *1M_6 *1M_6
+15V
3
PR7
22_8 PC3
0.1u/50V_6 SUSD 2
3
PQ37
2 *AO3404
[31,35] SUSON
1
2 2
+3VSUS
PR153 PQ36 PQ34
1
PQ35 *1M_6 *2N7002K *2N7002K
*DTC144EU PC82
TDC : 0.038A
1
VIN +3V_S5 +5V_S5 +15V VIN +5VPCU +5VPCU +3VPCU +3VPCU *2.2n/50V_4
PEAK : 0.05A
Width : 20mil
PR3 PR16 PR1 PR9 PR5
5
3
S5D 2 MAIND 4 MAIND 2 S5D 2
A A
3
1
2 2 2
+5V_S5 +5V +3V +3V_S5
PR2 PQ4 PQ1 PQ3
Quanta Computer Inc.
1
*2.2n/50V_4
PEAK : 1A PEAK : 5.14A PEAK : 0.83A PEAK : 0.91A PROJECT : ZRT/ZRTA
Size Document Number Rev
Width : 40mil Width : 160mil Width : 40mil Width : 40mil SYSTEM 5V/3V (TPS51225) 2A
JP8
*short_3720
1 2 VIN
D D
+5VPCU
+3V
5
PR13 AON7410
100K/F_4
7
V5IN
51211V_DRVH 4
1 9 PR17 PC10 +1.05V_S5
[13,31] HWPG_1.05V_S5 PGOOD DRVH *Short_6 0.1u/50V_6
PR146 *short_4 51211V_EN 3 10 51211V_VBST
[31,33,37] S5_ON
3
2
1
EN VBST PL4
51211V_TRIP 2 PU1 8 51211V_SW +1V_SRC 1 2
PR14 121K/F_4 TRIP TPS51211DSCR SW 1uH_7X7X3
51211V_TST 5 6 51211V_DRVL
TST DRVL
5
PR149 470K/F_4
12 11 JP9
C PR15 GND GND PR169 PR148 *short_3720 C
GND
GND
GND
GND
*100K/F_4 *4.7_6 5.1K/F_4
FB
4 +
+1.05V
*22u/6.3V_8
13
14
15
16
4
1.05 Volt +/- 5%
PC97
PC98 PC95
51211V_FB PQ38 0.1u/50V_6 330u/2.5V_6X4.2
TDC : 7.91A
3
2
1
AON7752 PC87
*680p/50V_6 PR145
OCP=12A
10K/F_4 PEAK : 10.5A
L ripple current OCP : 12A
=(19-1.05)*1.05/(1u*290k*19)
=3.42A Width : 320mil
Vtrip=12-(3.42/2)*14.5mohm
=149.2mV
Rlimit=149.2mV/10uA*8=119.36Kohm VFB=0.7V
+1.05V_S5
B B
5
MAIND 4
VIN +1.05V_S5 [33,37] MAIND
+1.05V_MODPHY +15V PQ43
AON6414AL
1
2
3
PR22 PR188 PR24
3
*1M_4 *22_8 *1M_4 +1.05V_MODPHY +1.05V
+1.05V
PR58 *short_8
MODPHY_D 2
TDC : 4.5A
3
3
3
PR20
*0_4 PR21
PQ50
*AO3404
PEAK : 6A
Width : 180mil
1
2 *1M_4 2 2
[10] MODPHY_EN PC13 +1.05V_MODPHY
1
*1u/10V_4 *100K_4
+1.05V_MODPHY Quanta Computer Inc.
2
TDC : 0.75A
PEAK : 1A +DDR_VTT_RUN
Width : 40mil
PC91 PC92
10u/6.3V_6 10u/6.3V_6
D TDC : 0.38A D
Width : 20mil
Close to IC
Greater than or equal 40mil
PC89
0.22u/10V_4
+5VPCU
+3V JP4
*short_3720
PC93 PC84
22
21
10u/6.3V_6 1u/10V_4
2
PR168 51216_VIN 1 2
VIN
100K/F_4
PAD
PAD
VTTGND
VLDOIN
VTTREF
VTT
VTTSNS
+1.35V_SUS
20 12
PQ32
AON7410
1.35 Volt +/- 5%
[31] HWPG_VDDR TDC : 4.5A
5
PGOOD V5IN PC81 PC79
C C
2200p/50V_4 10u/25V_8
PR157 51216_S3 17 14 51216_DRVH
PEAK : 6A
[31,37] MAINON S3 DRVH
*0_4 PR154 PC83 OCP : 8A
2/F_6 0.1u/50V_6 4 JP1
[31,33] SUSON
PR155 51216_S5 16 15 51216_VBST *short_3720 Width : 180mil
*short_4 S5 PU5 VBST PL2
TPS51216RUKR 2.2uH_7X7X3
3
2
1
PR166 51216_MODE 19 13 51216_SW +1.35VSUS_SRC 1 2 +1.35V_SUS
200K/F_4 MODE SW
5
PR161 51216_TRIP 18 11 51216_DRVL
TRIP DRVL +1.35V_SUS [4,5,14,15]
84.5K/F_4
VDDQSNS
PR147
26 10 4 *4.7_6
REFIN
PAD PGND
GND
PAD
PAD
PAD
REF
+
PC72 PC68
3
2
1
VREF=1.8V PC78 0.1u/50V_6 330u/2.5V_6X4.2
6
25
24
23
7 *680p/50V_6
51216_REF PQ33
AON7752
51216_REFIN
PC88 PR19
B 0.1u/10V_4 *Short_6 B
RDSon=14.5mohm
PR165
51216_S3 PR156 51216_S5 10K/F_4 Close to output cap
*0_4
PR159 PC85
30.1K/F_4 0.01U/25V_4 Mode Frequency Discharge mode
Vtrip=8-(1.425/2)*14.5mohm PR86=30.1K/F_4
=105.668mV S0 1 1 ON ON ON
Rlimit=105.668mV/10uA*8=84.53Kohm Quanta Computer Inc.
S3 (mainon off) 0 1 ON ON OFF PROJECT : ZRT/ZRTA
Size Document Number Rev
S4/S5 0 0 OFF OFF OFF 2A
DDR 1.35V(TPS51216)
Date: Wednesday, February 11, 2015 Sheet 35 of 44
5 4 3 2 1
5 4 3 2 1
JP6
*short_3720
+VIN_VCCIN
IMON offset
Place NTC close to the 1 2
VIN
+VIN_VCCIN +3V_S5 51624_VREF
VCORE Hot-Spot. +5V_S5 +5V_S5
2200p/50V_4
100U/25V_6x4.5
1
10u/25V_8
10u/25V_8
0.1u/50V_6
PC42
PC43
PC132
PC134
PC137
PC129 +
100K/F_4_4250NTC
1u/10V_4
PR79
2M/F_4
2
20/F_6
36.5K/F_4
S28@665K/F_4
*90.9K/F_4
*39.2K/F_4
2
PR78
PR211
PR201
PR200
PR199
PR196
PR106
10K/F_4
D D
1_6
PR204
VDD
PR208 51624_SKIP# 1 5 PL8
PR80 *short_4 SKIP# VIN S28@0.15uH_7X7X4
51624_OCP-I 51624_VRON 51624_PWM1 51624_PWM1_R 8 4 CS_SW1 1 2
DCR= 0.66mOhm
PWM VSW +VCCIN
2M/F_4 CS_BSTR1 6 3
4
BOOT_R PGND
PC49
PR74
PC149
30K/F_4
20K/F_4
39K/F_4
1u/6.3V_4
150K/F_4
1000P/50V_4
0.33u/6.3V_4
S28@100K/F_4
S28@2.26K/F_4
CS_BST1 7 9
PR81
PR85
PR89
PR90
2.2_6
PR87 1U/10V_6 +
9.09K/F_4
BOOT PAD
PR86
PR83
PC47
PC148
100K/F_4
*330u/2V_7343
*short_4
0.1u/10V_4
22u/6.3V_8
22u/6.3V_8
PC33
PC28
PC29
PC127
PR194 PC46 PU8
1000p/50V_6
PC38
2.2/F_6 0.22u/25V_6 CSD97374CQ4M
Add 11 GND VIAs
for thermal pad
PR71
PR67
51624_CSP1
S28@2.94K/F_4
+1.05V
PR70
51624_B-RAMP
51624_SLEWA
51624_F-IMAX
51624_O-USR
Close to VR 51624_THERM PC141
51624_VREF
51624_VDD
*0.1u/25V_4
S28@0.12u/10V_4
PC142
51624_V5A
15@16.9K/F_4
10K/F_4_3435KNTC
PR84
51624_VBAT
0.1u/10V_4
PC50
PR98
56_4
PR216
PR219
PR103
*56_4
130/F_4
*75/F_4
51624_CSN1
PR190
27
10
11
15
14
28
16
2
9
PC48
*0.1u/25V_4
VREF
VBAT
THERM
VDD
O-USR
F-IMAX
B-RAMP
SLEWA
V5A
30 6 51624_PWM1
[4,31,32] H_PROCHOT# VR_HOT PWM1
VR_SVID_CLK PR217 *short_451624_CLK 31 5 51624_PWM2 Close to the Close with
[5] VR_SVID_CLK VCLK PWM2
VR side. phase1 inductor
[5] VR_SVID_ALERT# VR_SVID_ALERT# PR218 *short_451624_ALERT# 32 4 51624_MODE
ALERT MODE
VR_SVID_DATA PR213 *short_451624_DATA 1 17 51624_CSP1
[5] VR_SVID_DATA VDIO CSP1
C 3 PU10 18 51624_CSN1 C
PGOOD TPS51624RSM CSN1
+3V +3V +3V 51624_SKIP# 7 19 51624_CSN2
SKIP CSN2 PS3 OSR
51624_VRON 8 20 51624_CSP2
VR_ON CSP2
51624_VFB 24 21
*100K/F_4
*100K/F_4
*100K/F_4
VFB NC
Rmode 100K Ohm ON ON
PR96
PR207
PR206
51624_GFB 23 22 PR94
GFB N/C 150K/F_4
DROOP
COMP
OCP-I
PAD
PAD
PAD
PAD
PAD
PAD
PAD
PAD
PAD
PAD
51624_VREF
26
25
12
13
29
33
34
35
36
37
38
39
40
41
42
[5,10] IMVP_PWRGD
PR209 *short_4
For BW 2 Phase
51624_DROOP
51624_OCP-I
51624_IMON
51624_COMP
[31] VRON
PR198 *0_4 PR97
*short_8 +VIN_VCCIN
S28@4.7K/F_4
*short_4
*short_4
[5] VRON_CPU
PR197 *short_4
+VCCIN
+5V_S5
For BW 1 Phase
PR82
PC151
PR215
10K/F_4
*100p/50V_4
S28@340K/F_4
28@2200p/50V_4
28@0.1u/50V_6
28@4.7u/25V_8
28@4.7u/25V_8
PC44
PC41
PC133
PC131
PC130
PC147 28@1u/10V_4
4700p/25V_4
PR212
PR210
PR101
PC140
PR187 *330p/50V_4
*10_4 +3V_S5
2
1500p/50V_4
VDD
PR88
1 5
PR102
51624_SKIP# PL9
39K/F_4
S28@4.75K/F_4
28@2.2_6
15@0_4 CS_BSTR2 6 3
4
BOOT_R PGND
PR73
28@1.8K/F_4
PR186 CS_BST2 7 9
PC146 BOOT PAD
B Parallel *10_4 B
28@0_4
*0.01u/50V_4
28@1000p/50V_6
28@0.1u/10V_4
28@22u/6.3V_8
28@22u/6.3V_8
PC32
PC30
PC31
51624_CSP2 PC135 PU9
PC37
Close to the PR195 28@0.22u/25V_6 28@CSD97374CQ4M
CPU side. 28@2.2/F_6 Add 11 GND VIAs
51624_PWM2
for thermal pad
PR69
PR66
51624_CSN2 51624_CSP2
28@2.67K/F_4
PR68
PC145
*0.1u/25V_4
28@0.15u/10V_4
PC144
PR92 PR91
15@0_4 *0_4
*22.6K/F_4
28@10K/F_4_3435KNTC
PR93
51624_CSN2
PR191
PC143
*0.1u/25V_4
:
VCORE L/L: :
VCORE L/L: PR70 CS22672FB12 PR200 CS42942FB13
+3VPCU
1 2 +1.5V
+1.5V
+3V
1.5Volt +/- 5%
TDC : 0.64A
1
JP11 PC110 PC109
*short_3720 10u/6.3V_6 0.1u/25V_6 JP10
PU7 TPS54318RTER
PEAK : 0.85A *short_3720
PR181 16
VIN PH
10 Width : 40mil
100K/F_4
A A
1 11 PL5
2
VIN PH 1uH_7X7X3
2 12
VIN PH
14 13 PR180 *Short_6
[31] HWPG_1.5V PWRGD BOOT
MAINON 15 6 PC102
EN VSNS 0.1u/50V_6 PR183
PR49 7 3
R1 100K/F_4
*short_4 COMP GND PC111 PC107 PC105
8 4 0.1u/10V_4 10u/6.3V_6 10u/6.3V_6
RT/CLK GND 1.5V_VSNS
PAD
PAD
PAD
PAD
PAD
PAD
PC103 9 5
1000p/50V_4 PR50 PR182 SS AGND
8.06K/F_4 121K/F_4 VFB=0.8V R2 PR184
22
21
20
19
18
17
113K/F_4
V0=0.8*(R1+R2)/R2
B B
VIN
Thermal protection
PD7
DA2J10100L
Need fine tune
for thermal protect point VIN +3V +5V +1.05V +15V
Note placement position
TEMP=85C
PR167 PR142 PR18 PR129 PR25 PR141
1M_6 1M_4 22_8 220_8 22_8 1M_4
1
PQ41
AO3409 MAINON_ON_G MAIND
2 MAIND [33,34]
3
3
3
PR144
2 PQ31 1M_4 2 2 2 2
3
[31,35] MAINON
S5_ON 2 DTC144EU PC76
[31,33,34] S5_ON
PQ5 PQ23 PQ11 PQ28 *2200p/50V_4
2N7002K 2N7002K 2N7002K 2N7002K
1
PQ39 PR170 PR143
1
1
DTC144EU *Short_6 *100K/F_6
C C
VL VL
SYS_SHDN# [10,33]
1.47K/F_4
8
PR185
10K/F_4_3435NTC 2.469V 3
+ 1 2
LM393_PIN2 2
- PQ42
3
PU6A 2N7002K
4
AS393MTR-E1 PC96
1
0.1u/50V_6
S5_ON 2
PR164
PQ7 200K/F_4
2N7002K
1
D 5 D
+ 7
6
-
PU6B
AS393MTR-E1
+5V_S5
JP12
PR44 *short_3720
*Short_6 +VIN_GPU_CORE
1 2
D VIN D
EV@2200p/50V_4
EV@10u/25V_8
EV@10u/25V_8
EV@0.1u/50V_6
100U/25V_6x4.5
1
PR42
18 1658R-PVCC
PC118
PC112
PC108
PC113
PC104
PR175 EV@10K/F_4 PR173 EV@20K/F_4 EV@2.2/F_6 +
1
3V_MAIN_PWGD 1658R-VREF 1658R-BOOT1
PC22
2
EV@1U/10V_4
2
PC99 *0.01U/25V_4 PC20
5
PR176 1 2 EV@0.22u/25V_6
EV@100K/F_4 PU2
PR172 1 1658R-BOOT1
PVCC
+VIN_GPU_CORE 1658R-OCS/CB 9 BOOT1 1658R-UGATE1 4 PQ48
PR174 *1/F_4 OCS/CB 2 1658R-UGATE1 EV@AON6414AL
PR177 *0_4 *499K/F_4 UGATE1
[8] VGPU_EN
1
2
3
20 1658R-PHASE1 PL7
3V_MAIN_PWGD PR40 *short_4 1658R-EN 3 PHASE1 EV@0.24uH_7X7X3
[18,39] 3V_MAIN_PWGD EN 19 1658R-LGATE1 1658R-PHASE1
DCR=1.1m ohm
LGATE1 +VGPU_CORE
DGPU_PSI PR39 *short_4 1658R-PSI 4
[19] DGPU_PSI PSI
5
EV@UP1658RQKF PR52
EV@2.2/F_6
EV@330u/2V_7343
PWM-VID PR36 *short_4 1658R-VID 5 15 1658R-BOOT2 +
[19] PWM-VID VID BOOT2 4
1658R-LGATE1
EV@0.1u/10V_4
EV@10u/6.3V_8
14
PC123
PC126
PC121
1658R-UGATE2
1 2 1658R-VREF 8 UGATE2
1
2
3
PC17 EV@1U/10V_4 VREF 16 1658R-PHASE2 PQ45 PC25
PHASE2 EV@AON6752 EV@1000p/50V_6
1658R-REFADJ 6 17 1658R-LGATE2 PR178 EV@10K_4
REFADJ LGATE2 1 2
+3V
C C
7
+3V_S5 +3VPCU R1 PR32 REFIN 13 1658R-PG PR41 *short_4
PR33 EV@20K/F_4
R2 PGOOD GPU_PWR_GD [17]
1658R-REFIN
*0.01U/25V_4
PC18
EV@20K/F_4 12 1658R-COMP
COMP
EV@4700P/25V_4
GND
PR35 PR34 10
FB
FBRTN
1
+VIN_GPU_CORE
PC19
*10K_4 *10K_4
1
PR43
11
21
DGPU_PSI PR28
EV@22P/50V_4
EV@2.2/F_6
C R3
2
1658R-FBRTN
PC14 EV@2K/F_4 1658R-BOOT2
2
PC100
EV@2200p/50V_4
EV@10u/25V_8
EV@10u/25V_8
EV@2700P/50V_4
EV@16K/F_6
EV@0.1u/50V_6
1658R-FB
PR37
PC117
PC119
PC106
PC116
PR38 PC21
5
*0_4 EV@0.22u/25V_6
1658R-UGATE2 4
PR27
EV@18.2K/F_4 R4
1
2
3
Phase Number of Operation *22P/50V_4 PQ47 PL6
1
*short_4
*short_4
EV@AON6414AL EV@0.24uH_7X7X3 DCR=1.1m ohm
PC16
PR31
PR30
PR29 1658R-PHASE2 +VGPU_CORE
*5.1K/F_4
2
5
PR26 PR51
PWM-SVID : Config B EV@0_4
R5
EV@330u/2.5V_6X4.2
EV@2.2/F_6 + +
EV@330u/2V_7343
Check PWM-SVID by SKU
3
1658R-LGATE2 4
EV@0.1u/10V_4
EV@10u/6.3V_8
PC124
PC125
PC120
PC122
B B
1
2
3
2 PQ46 PC24
PQ12 EV@AON6752 EV@1000p/50V_6
*2N7002K
1
Standby PC15
1
Function *1U/10V_4
2
+VGPU_CORE
PR53 N16S-GT(23W)
*short_4
[16,17,18] +1.05V_GFX
[17,20,21,27] +1.5V_GFX
[16,18,19,31] +3V_GFX
D D
5
PR75 PR189 PR65
EV@1M_4 EV@22_8 EV@1M_4
dGPU_D1 4 PQ52
EV@MDV1528Q
3
3
PR192
+1.05V_GFX
3
2
1
*short_4 PR72
[18,38] 3V_MAIN_PWGD
2 EV@1M_4 2 2
PC34 +1.05V_GFX
TDC : 1.57A
PEAK : 2.1A
1
PQ51 PQ17 *2.2n/50V_4
PQ16 EV@2N7002K EV@2N7002K
Width : 80mil
1
PC128 PR193 EV@PDTC143TT
1
*1u/10V_4 EV@100K_4
3
EV@1M_4 EV@22_8 EV@1M_4
dGPU_D 2
3
3
PR47 PQ14
*short_4 PR46 EV@AO3404 +3V_GFX
1
[10] DGPU_PWR_EN
2 EV@1M_4 2 2
PC101
+3V_GFX
TDC : 0.05A
PEAK : 0.06A
1
1
*1u/10V_4 EV@100K_4
2
VIN
+5V_S5
+3V
5
PR61
EV@100K/F_4
7
PQ53
V5IN
1.5GFX_DRVH 4 EV@AON7410
HWPG_1.5VGFX 1 9 PR76 PC36 +1.5V_GFX
[18] HWPG_1.5VGFX PGOOD DRVH *Short_6 EV@0.1u/50V_6
1.5GFX_EN 3 10 1.5GFX_VBST PL10
3
2
1
[17] FBVDDQ_EN PR59 *short_4 EN VBST EV@2.2uH_7X7X3
1.5GFX_TRIP 2 PU3 8 1.5GFX_SW
PR64 EV@80.6K/F_4 TRIP EV@TPS51211DSCR
SW
1.5GFX_TST 5 6 1.5GFX_DRVL
PC27 PR63 EV@470K/F_4 TST DRVL
5
*1u/10V_4 12 11
GND GND PR77 PR60 +1.5V_GFX
GND
GND
GND
GND
+
4 TDC : 3.06A
13
14
15
16
PC136 PC150
OCP=8A 1.5GFX_FB EV@0.1u/50V_6 EV@330u/2V_7343
PEAK : 4.08A
L ripple current PQ54 PC40 OCP : 5A
3
2
1
VFB=0.704V
A A
VIN +1.35V_GFX
3V_MAIN_PWGD PWM
PWM
GPU_PWR_GD
OR FBVDDQ_EN
Gate HWPG_1.5VGFX DGPU_PWROK
+3V_GFX
MOSFET
EC_FB_CLAMP
+3V_MAIN EC
GPU 3V_MAIN_EN
MOSFET
3V_MAIN_PWGD
+1.05V_S5
MOSFET +1.05V_GFX
3V_MAIN_PWGD
B B
dGPU_OPP#
+1.05V_GFX +3.3V External GPU POWER 3V_MAIN_EN S0
dGPU_OTP#
dGPU_ALT#
SM-Bus1
+VGPU_CORE +1.35V External GPU POWER 3V_MAIN_EN S0
GPIO12_ACIN
dGPU
D D
Battery Mode 3
VIN 1
3 3
+3VPCU
1
+3VPCU +5VPCU
5b VIN BAT-V
VL +3.3V_DSW
3V_LDO 3V/5V 2
+5VPCU +5V_S5 11 2 VR depend on A measure +3.3V_DSW
3 +15V
result to implement EN CHARGER Battery
EN2
EN1
D
+3VPCU S5 PWR +3V_S5 10 4 for B test D
3
3
S5_ON 8 NBSWON# 5a DSW_ON +3VPCU or +3.3V_DSW
1 VIN +3VCC_S5
6 Delay DSW power well 10ms DSW PWR
PWR DPWROK DPWROK
SUS PWR
DDR VDDQ +1.35V_SUS 18 BTN 13 RSMRST# +1.05V
RSMRST#
VR 7 14 SB_ACDC ASW PWR
DDR_VTTREF 19 EC ACPRESENT +3V_S5
30 DNBSWON#
15 PWRBTN#
HWPG SUSC# 16 SPI PWR
+DDR_VTT_RUN 23 SLP_S4# +V1.05DX_MODPHY
SUSB# 20 SLP_S3#
HSIO PWR
PCH_SUSACK# SUSACK +1.05V
HWPG_VDDR 24
PG PCH_SUSPWARN# SUSWRAN
PLL PWR
S5
S3
VRON
SUSON
S5_ON
MAINON
EC_PWROK
HWPG_1.05V_EC#
+0.75V_ON PLTRST#
+0.75V_ON
? PLTRST#
38 SYS_PWROK HDA PWR
SUSON SYS_PWROK
17 34 IMVP_PWRGD
+3VPCU 24 HWPG_VDDR
3 36
26 HWPG_1.05V 31 EC_PWROK 38
+1.5V 12 30a 31 32b 21 17 8
1.5V
PLTRST#
HWPG_1.5V
VR 29 29
HWPG_1.5V ?
PG
EN
+VCCIN
RESET#
CPU
VDDQ PWR
+1.05V_VCCST
RUN PWR +1.05V
+1.05V_VCCST PROCPWRGD
B
3 +5VPCU +5V 28 VCCST PWR B
MOS1
SM_PG_CNTL1
VCCST_PWRGD
0 ohm
3 +3VPCU +3V 27
VR_READY
MOS2
VR_EN
10K ohm
SVID
+1.05V_S5 +1.05V
9 25
MOS3
G
HWPG_1.05V
1 VIN 12
MAINON
VRON_CPU
DDR_PG_CTRL
21
IMVP_PWRGD
VCCST_PWRGD_EN
SVID
33
+VCCIN EC_PWROK VCCST_PWRGD_EN
IMVP 31
VIN
1 9 VR
SYS_PWROK
+1.05V_S5 36
+1.05V_S5
VR 34
12 IMVP_PWRGD HWPG_1.05V_EC# 37 22 34 32a
HWPG_1.05V PG 30a
EN
PG
EN
A A
+3V_S5 +3V
SDRAM
2.2K 2.2K 4.7K 4.7K
+3.3V_RUN
AP2 SMB_PCH_CLK CLK_SCLK
2N7002DW
A AH1 SMB_PCH_DAT Level shift CLK_SDATA WLAN A
XDP
Brodwell
ULT
+3V_S5
2.2K 2.2K
AN1 SMB_ME0_CLK
B B
AK1 SMB_ME0_DAT
+3V_S5
*2.2K *2.2K
+3V_S5
AU3 SMB_ME1_CLK
*2N7002DW
AH3 SMB_ME1_DAT Level shift
+3V_S5 3V3MISC
C C
+3V_GFX
116 2ND_MBDATA
2N7002DW
115 2ND_MBCLK Level shift dGPU
+3VPCU
100
+G_SEN_PW
SIO
ITE8987
D *4.7K *4.7K D
94 G_MBCLK
實實實defult
虛實實reserve
MDV1528Q +5V_S5
SYS_HWPG S5D
2 VGPU_PWRGD
7
3V_LDO PWRGD
1 +5VPCU MDV1528Q +5V
D
PWR EN! PWRGD
D
S5_Vout
3V/5V MAIND VIN Vin VGPU Core Vout +VGPU_CORE
4 uP1642
TPS51225
3V_LDO EN
1 EN2 3V_MAIN_PWGD
Vin S3_Vout +3VPCU 6
AO3404 +3V_S5
VIN
S5D
2
HWPG_1.5VGFX
AO3404 +3V 9
MAIND PWRGD
4
VIN Vin +1.35V_GFX Vout
TPS51211 +1.35V_GFX
EC_FB_CLAMP EN
C
AO3404 +3V_GFX EC OR Gate FBVDDQ_EN
C
GPU_PWR_GD
dGPU_PWR_EN 8
PCH
HWPG_1.05V
AO3430 +1.05V
PWRGD
HWPG_VDDR
HWPG_1.5V
SUSON PWRGD
3 EC S5 EN +1.35V_SUS
S5_Vout
+1.35V_SUS DDR_VTTREF PWRGD
+0.75V_ON
EC
Quanta Computer Inc.
VIN
PROJECT : ZRT/ZRTA
Size Document Number Rev
3A
ULT PWR CONTROL
Date: Wednesday, February 11, 2015 Sheet 43 of 44
5 4 3 2 1
5 4 3 2 1
11 2013/10/15 following up acer define and swap USB3 and USB2 port.(Page9)
12 2013/10/15 swap CAP C8579/C8580 to Vrefo and resistor R5214/R5215 to Line in.(Page30)
13 2013/10/15 U27.30/U27.31 del fan Pwm signal.(Page32)
14 20131015 change LVDS\USB3\RJ45\FAN\TPD\USB DB CN\DC-IN CN\Power Button\Cardreader\KB BLK CN\Power board, footprint.
C C
B B
A A