Clevo P655RP6 Service Manual

P655RP6(-G)
Preface
Notebook Computer
P655RP6(-G)
Service Manual
Preface
I
Preface
Notice
The company reserves the right to revise this publication or to change its contents without notice. Information contained
herein is for reference only and does not constitute a commitment on the part of the manufacturer or any subsequent ven-
dor. They assume no responsibility or liability for any errors or inaccuracies that may appear in this publication nor are
they in anyway responsible for any loss or damage resulting from the use (or misuse) of this publication.
This publication and any accompanying software may not, in whole or in part, be reproduced, translated, transmitted or
reduced to any machine readable form without prior consent from the vendor, manufacturer or creators of this publica-
tion, except for copies kept by the user for backup purposes.
Brand and product names mentioned in this publication may or may not be copyrights and/or registered trademarks of
their respective companies. They are mentioned for identification purposes only and are not intended as an endorsement
of that product or its manufacturer.
Preface
Version 1.0
August 2016
Trademarks
Intel and Intel Core are trademarks of Intel Corporation.
Windows® is a registered trademark of Microsoft Corporation.
Other brand and product names are trademarks and /or registered trademarks of their respective companies.
II
Preface
About this Manual

This manual is intended for service personnel who have completed sufficient training to undertake the maintenance and
inspection of personal computers.
It is organized to allow you to look up basic information for servicing and/or upgrading components of the P655RP6(-
G) series notebook PC.
The following information is included:
Chapter 1, Introduction, provides general information about the location of system elements and their specifications.
Chapter 2, Disassembly, provides step-by-step instructions for disassembling parts and subsystems and how to upgrade
elements of the system.
Appendix A, Part Lists
Preface
Appendix B, Schematic Diagrams
Appendix C, Updating the FLASH ROM BIOS
III
Preface
IMPORTANT SAFETY INSTRUCTIONS

Follow basic safety precautions, including those listed below, to reduce the risk of fire, electric shock and injury to per-
sons when using any electrical equipment:
1. Do not use this product near water, for example near a bath tub, wash bowl, kitchen sink or laundry tub, in a wet
basement or near a swimming pool.
2. Avoid using a telephone (other than a cordless type) during an electrical storm. There may be a remote risk of elec-
trical shock from lightning.
3. Do not use the telephone to report a gas leak in the vicinity of the leak.
4. Use only the power cord and batteries indicated in this manual. Do not dispose of batteries in a fire. They may
explode. Check with local codes for possible special disposal instructions.
5. This product is intended to be supplied by a Listed Power Unit as follows:
• AC Input of 100 - 240V, 50 - 60Hz, DC Output of 19V, 10.5A (200 Watts) minimum AC/DC Adapter.
Preface
FCC Statement
This device complies with Part 15 of the FCC Rules. Operation is subject to the following two conditions:
This device may not cause harmful interference.
This device must accept any interference received, including interference that may cause undesired operation.
IV
Preface
Instructions for Care and Operation

The notebook computer is quite rugged, but it can be damaged. To prevent this, follow these suggestions:
1. Don’t drop it, or expose it to shock. If the computer falls, the case and the components could be damaged.
Do not expose the computer Do not place it on an unstable Do not place anything heavy
to any shock or vibration. surface. on the computer.
2. Keep it dry, and don’t overheat it. Keep the computer and power supply away from any kind of heating element. This
is an electrical appliance. If water or any other liquid gets into it, the computer could be badly damaged.
Do not expose it to excessive Do not leave it in a place Don’t use or store the com- Do not place the computer on
Preface
heat or direct sunlight. where foreign matter or mois- puter in a humid environment. any surface which will block
ture may affect the system. the vents.
3. Follow the proper working procedures for the computer. Shut the computer down properly and don’t forget to save
your work. Remember to periodically save your data as data may be lost if the battery is depleted.
Do not turn off the power Do not turn off any peripheral Do not disassemble the com- Perform routine maintenance
until you properly shut down devices when the computer is puter by yourself. on your computer.
all programs. on.
V
Preface
4. Avoid interference. Keep the computer away from high capacity transformers, electric motors, and other strong mag-
netic fields. These can hinder proper performance and damage your data.
5. Take care when using peripheral devices.
Use only approved brands of Unplug the power cord before

peripherals. attaching peripheral devices.
Power Safety
Preface
The computer has specific power requirements:

• Only use a power adapter approved for use with this computer.
• Your AC adapter may be designed for international travel but it still requires a steady, uninterrupted power supply. If you are
 unsure of your local power specifications, consult your service representative or local power company.
Power Safety • The power adapter may have either a 2-prong or a 3-prong grounded plug. The third prong is an important safety feature; do
Warning not defeat its purpose. If you do not have access to a compatible outlet, have a qualified electrician install one.
Before you undertake • When you want to unplug the power cord, be sure to disconnect it by the plug head, not by its wire.
any upgrade proce- • Make sure the socket and any extension cord(s) you use can support the total current load of all the connected devices.
dures, make sure that • Before cleaning the computer, make sure it is disconnected from any external power supplies.
you have turned off the
power, and discon-
nected all peripherals Do not plug in the power Do not use the power cord if Do not place heavy objects
and cables (including cord if you are wet. it is broken. on the power cord.
telephone lines and
power cord). It is advis-
able to also remove
your battery in order to
prevent accidentally
turning the machine
on.
VI
Preface
Battery Precautions
• Only use batteries designed for this computer. The wrong battery type may explode, leak or damage the computer.
• Do not continue to use a battery that has been dropped, or that appears damaged (e.g. bent or twisted) in any way. Even if the
computer continues to work with a damaged battery in place, it may cause circuit damage, which may possibly result in fire.
• Recharge the batteries using the notebook’s system. Incorrect recharging may make the battery explode.
• Do not try to repair a battery pack. Refer any battery pack repair or replacement to your service representative or qualified service
personnel.
• Keep children away from, and promptly dispose of a damaged battery. Always dispose of batteries carefully. Batteries may explode
or leak if exposed to fire, or improperly handled or discarded.
• Keep the battery away from metal appliances.
• Affix tape to the battery contacts before disposing of the battery.
• Do not touch the battery contacts with your hands or metal objects.
Battery Guidelines
The following can also apply to any backup batteries you may have.
Preface
• If you do not use the battery for an extended period, then remove the battery from the computer for storage.
• Before removing the battery for storage charge it to 60% - 70%.
• Check stored batteries at least every 3 months and charge them to 60% - 70%.

Battery Disposal
The product that you have purchased contains a rechargeable battery. The battery is recyclable. At the end of its useful life, under var-
ious state and local laws, it may be illegal to dispose of this battery into the municipal waste stream. Check with your local solid waste
officials for details in your area for recycling options or proper disposal.
Caution
Danger of explosion if battery is incorrectly replaced. Replace only with the same or equivalent type recommended by the manufacturer.
Discard used battery according to the manufacturer’s instructions.
Battery Level
Click the battery icon in the taskbar to see the current battery level and charge status. A battery that drops below a level of 10%
will not allow the computer to boot up. Make sure that any battery that drops below 10% is recharged within one week.
VII
Preface
Related Documents
You may also need to consult the following manual for additional information:
User’s Manual on CD/DVD

This describes the notebook PC’s features and the procedures for operating the computer and its ROM-based setup pro-
gram. It also describes the installation and operation of the utility programs provided with the notebook PC.
System Startup
1. Remove all packing materials.
2. Place the computer on a stable surface.
3. Insert the battery and make sure it is locked in position.
4. Securely attach any peripherals you want to use with the
computer (e.g. keyboard and mouse) to their ports.
Preface
5. Attach the AC/DC adapter to the DC-In jack at the rear of the
computer, then plug the AC power cord into an outlet, and 135°
connect the AC power cord to the AC/DC adapter.
6. Use one hand to raise the lid/LCD to a comfortable viewing angle
Figure 1
Opening the Lid/LCD/
(do not exceed 135 degrees); use the other hand (as illustrated in Computer with AC/DC
Figure 1) to support the base of the computer (Note: Never lift the Adapter Plugged-In
computer by the lid/LCD).
7. Press the power button to turn the computer “on”.

Shut Down
Note that you should always shut your computer down by
choosing the Shut down command in Windows (see be-
low). This will help prevent hard disk or system problems.
Click the icon in the Start Screen and

choose Shut down from the menu.
Or
Right-click the Start button at the bottom of the Start
Screen or the Desktop and choose Shut down or sign out
> Shut down from the context menu.
VIII
Preface
Contents
Introduction ..............................................1-1 Main Board ................................................................................... A-5
HDD .............................................................................................. A-6
Overview .........................................................................................1-1 LCD ............................................................................................... A-7
Specifications ..................................................................................1-2
External Locator - Top View with LCD Panel Open ......................1-4 Schematic Diagrams................................. B-1
External Locator - Front & Right Side Views .................................1-5 System Block Diagram ...................................................................B-2
External Locator - Left Side & Rear View .....................................1-6 Processor 1/7 ...................................................................................B-3
External Locator - Bottom View .....................................................1-7 Processor 2/7 ...................................................................................B-4
Mainboard Overview - Top (Key Parts) .........................................1-8 Processor 3/7 ...................................................................................B-5
Mainboard Overview - Bottom (Key Parts) ....................................1-9 Processor 4/7 ...................................................................................B-6
Mainboard Overview - Top (Connectors) .....................................1-10 Processor 5/7 ...................................................................................B-7
Mainboard Overview - Bottom (Connectors) ...............................1-11 Processor 6/7 ...................................................................................B-8
Disassembly ...............................................2-1 Processor 7/7 ...................................................................................B-9
Preface
DDR CHA SO-DIMM_0 ..............................................................B-10
Overview .........................................................................................2-1 DDR CHA SO-DIMM_1 ..............................................................B-11
Maintenance Tools ..........................................................................2-2 DDR CHB SO-DIMM_0 ..............................................................B-12
Connections .....................................................................................2-2 DDR CHB SO-DIMM_1 ..............................................................B-13
Maintenance Precautions .................................................................2-3 Panel, Inverter ...............................................................................B-14
Disassembly Steps ...........................................................................2-4 Redriver ........................................................................................B-15
Removing the Keyboard ..................................................................2-5
Mini DP Port E .............................................................................B-16
Removing the Battery ......................................................................2-6 Mini DP Port F ..............................................................................B-17
Removing the Hard Disk Drive .......................................................2-8 HDMI Connector ..........................................................................B-18
Removing the System Memory (RAM) ........................................2-10
VGA PCI Express .........................................................................B-19
Removing the M.2 SSD Module ...................................................2-13 VGA Frame Buffer Partition ........................................................B-20
Removing the Wireless LAN Module ...........................................2-14
Frame Buffer Partition A ..............................................................B-21
Wireless LAN, Combo, 3G & LTE Module Cables .....................2-15 Frame Buffer Partition B ..............................................................B-22
Removing and Installing the 3G/SATA Module ...........................2-16 Frame Buffer Partition A_B .........................................................B-23
Part Lists ..................................................A-1 GPU Frame Buffer Partition .........................................................B-24
Part List Illustration Location ........................................................ A-2 Frame Buffer Partition C ..............................................................B-25
Top ................................................................................................. A-3 Frame Buffer Partition C_D .........................................................B-26
Bottom ............................................................................................ A-4 GPU Decoupling ...........................................................................B-27
IX
Preface
GPU Decoupling 2 ....................................................................... B-28 1V8_RUN/AON, NV3V3 .............................................................B-60

Straps and XTAL ......................................................................... B-29 NVVDD Phase 1 & 2 ...................................................................B-61
IFP I/O Interface ........................................................................... B-30 NVVDDS ......................................................................................B-62
Misc - GPIO, I2C and ROM ........................................................ B-31 PEX_VDD ....................................................................................B-63
NVIDIA Power Sequence ............................................................ B-32 FBVDDQ ......................................................................................B-64
GPU NVVDD, FBVDDQ ............................................................ B-33 VCC_Core & VCCSA ..................................................................B-65
GPU GND .................................................................................... B-34 VCore Output Stage ......................................................................B-66
PCH 1/9 ........................................................................................ B-35 VCCGT .........................................................................................B-67
PCH 2/9 ........................................................................................ B-36 VCCGT Output Stage ...................................................................B-68
PCH 3/9 ........................................................................................ B-37 LAN RTL8411, Card Reader ........................................................B-69
PCH 4/9 ........................................................................................ B-38 AR_TBT .......................................................................................B-70
PCH 5/9 ........................................................................................ B-39 AR_Power .....................................................................................B-71
PCH 6/9 ....................................................................................... B-40 TPS65982, Type C ........................................................................B-72
PCH 7/9 ........................................................................................ B-41 TPS65982, Type A .......................................................................B-73
Preface
PCH 8/9 ........................................................................................ B-42 USB, Type A ................................................................................B-74

PCH 9/9 ........................................................................................ B-43 Audio Board_3D AMP .................................................................B-75
KBC IT8587 ................................................................................. B-44 HDD Board ...................................................................................B-76
USB Charger ................................................................................ B-45 Power Board .................................................................................B-77
USB .............................................................................................. B-46 LED Board ....................................................................................B-78
M.2 WLAN+BT, PCIE4X SSD ................................................... B-47 Click Board ...................................................................................B-79
M.2 3G/LTE ................................................................................. B-48 Finger Sensor Board .....................................................................B-80
Realtek ALC892 ........................................................................... B-49 Power Board .................................................................................B-81
TPA2008D2 ................................................................................. B-50 LED Board ....................................................................................B-82
TPM, CCD, TP ............................................................................. B-51 Updating the FLASH ROM BIOS......... C-1
Fan, LID, KB LED ....................................................................... B-52
Download the BIOS ........................................................................C-1
Connector ..................................................................................... B-53
Unzip the downloaded files to a bootable CD/DVD or
DDR 1.2V / 0.6VS ....................................................................... B-54
USB Flash drive ..............................................................................C-1
VDD3, VDD5 ............................................................................... B-55
Set the computer to boot from the external drive ...........................C-1
5V, 5VS, 3.3V, 3.3VS, 3.3VA ..................................................... B-56
Use the flash tools to update the BIOS ...........................................C-2
Power 1.0V, VCCIO .................................................................... B-57
Restart the computer (booting from the HDD) ...............................C-2
AC_In, Charger ............................................................................ B-58
1.0DX_VCCSTG/VCCSFR_OC/2.5V ........................................ B-59
X
Introduction
Chapter 1: Introduction
Overview
This manual covers the information you need to service or upgrade the P655RP6(-G) series notebook computer. Infor-
mation about operating the computer (e.g. getting started, and the Setup utility) is in the User’s Manual. Information
about dri-vers (e.g. VGA & audio) is also found in the User’s Manual. The manual is shipped with the computer.
Operating systems (e.g. Windows 8.1, etc.) have their own manuals as do application softwares (e.g. word processing and
database programs). If you have questions about those programs, you should consult those manuals.
The P655RP6(-G) series notebook is designed to be upgradeable. See Disassembly on page 2 - 1 for a detailed descrip-
1.Introduction
tion of the upgrade procedures for each specific component. Please take note of the warning and safety information in-
dicated by the “” symbol.
The balance of this chapter reviews the computer’s technical specifications and features.
Overview 1 - 1
Introduction
Specifications Processor Options Security
i7-6820HK (2.70GHz), i7-6700HQ (2.60GHz) Security (Kensington® Type) Lock Slot

8MB Smart Cache, 14nm, DDR4-2133MHz, TDP 45W BIOS Password
Supports Intel® CPU over-clocking technology on i7-6820HK Intel PTT for Systems Without TPM Hardware
 (Factory Option) TPM 2.0
Latest Specification Information Core Logic
(Factory Option) Fingerprint Reader Module
The specifications listed here are correct at the Intel® HM170 Express Chipset
time of sending them to the press. Certain items Video Adapter Options
(particularly processor types/speeds) may be LCD Options
Microsoft Hybrid Graphics Mode or Discrete Graphics
changed, delayed or updated due to the manu-
15.6" (39.62cm), 16:9, QFHD (3840x2160)/FHD Mode
facturer's release schedule. Check with your
service center for more details. (1920x1080) Supports up to 4 Active Displays
Supports NVIDIA Surround View via HDMI x 1 and MiniDP x2
BIOS
1.Introduction
AMI BIOS (64Mb SPI Flash-ROM) Intel Integrated GPU

Intel® HD Graphics 530
 Memory
Dynamic Frequency
CPU Speed & Computer in DC Mode Four 260 Pin SO-DIMM Sockets Supporting DDR4 2133/ Intel Dynamic Video Memory Technology
Note that when the computer is in DC mode (pow- 2400MHz Memory Microsoft DirectX®12 Compatible
ered by the battery only) the CPU may not run at Memory Expandable from 8GB (minimum) up to 64GB
full speed. This is a design feature implemented in (maximum) NVIDIA® Discrete GPU
order to protect the battery. Supports XMP 2666MHz (XMP support depends on proces- NVIDIA® GeForce GTX 1060
sor)
6GB GDDR5 Video RAM
Microsoft DirectX®12 Compatible
 Supports GPU Overclocking
SO-DIMM Memory Types
Pointing Device
All SO-DIMM memory modules in-
stalled in the system should be iden- Built-in Touchpad (scrolling key functionality integrated)
tical (the same size and brand) in
order to prevent unexpected system Keyboard
behavior.
(Factory Option) Full Color Illuminated Full-size Winkey
Do not mix SO-DIMM memory mod- Keyboard (with numeric keypad)
ule sizes and brands otherwise un- Or
expected system problems may (Factory Option) Full-size Illuminated White LED Winkey
occur. Keyboard (with numeric keypad)
1 - 2 Specifications
Introduction
Storage Communication Features
(Factory Option) Two SATA M.2 2280 SSDs supporting Built-In Gigabit Ethernet LAN Supports NVIDIA G-SYNC Technolgy in dGPU Mode
RAID level 0/1 2.0M FHD PC Camera Module (G-SYNC is only supported if you have a G-SYNC capable
Or (Factory Option - Model A Only) M.2 3G/4G Module display and a GTX series video adapter)
(Factory Option) One PCIe Gen3 x4 M.2 2280 SSD Virtual Reality Ready
WLAN/ Bluetooth M.2 Modules:
Two Changeable 2.5" (6cm) SATA (Serial) Hard Disk Drives (Factory Option) Intel® Wireless-AC 8260 Wireless LAN Environmental Spec
(HDDs)/SSDs (1st: 7.0mm (h) & 2nd: 7.0mm/9.5mm (h)) (802.11ac) + Bluetooth 4.1
supporting RAID Level 0/1 Temperature
(Factory Option) Intel® Wireless-N 7265 Wireless LAN
Or (802.11b/g/n) + Bluetooth 4.0 Operating: 5°C - 35°C
One changeable 2.5" (6cm) 7.0mm/9.5mm (h) SATA (Serial) (Factory Option) Intel® Wireless-AC 3165 Wireless LAN Non-Operating: -20°C - 60°C
Hard Disk Drive/Solid State Drive (SSD) (802.11ac) + Bluetooth 4.0 Relative Humidity
Audio (Factory Option) Qualcomm® Atheros Killer™ Wireless-AC Operating: 20% - 80%
1535 Wireless LAN (802.11ac) + Bluetooth 4.1 Non-Operating: 10% - 90%
High Definition Audio Compliant Interface (Factory Option) Qualcomm® Wireless LAN (802.11ac/ad)
1.Introduction
S/PDIF Digital Output + Bluetooth 4.1 Power
Two Speakers Embedded 4-Cell Polymer Battery Pack, 60WH
Card Reader
Sound Blaster Audio
ANSP™ 3D sound technology on headphone output Embedded Multi-In-1 Push-Push Card Reader Full Range AC/DC Adapter
Built-In Array Microphone MMC (MultiMedia Card) / RS MMC AC Input: 100 - 240V, 50 - 60Hz
SD (Secure Digital) / Mini SD / SDHC/ SDXC DC Output: 19V, 10.5A (200W)
Note: External 5.1CH Audio Output Supported by Line-Out,
Microphone-In and Headphone & S/PDIF Out Combo Jacks M.2 Slots Dimensions & Weight
Interface Slot 1 for Combo WLAN and Bluetooth Module 385mm (w) * 271mm (d) * 27.3mm (h)
Slot 2 for SATA or PCIe Gen3 x4 SSD 2.6kg (Barebone with 60WH Battery)
Two USB 3.1 Gen 2 Type C Ports
Slot 3 for SATA SSD
Three USB 3.0 (USB 3.1 Gen 1) Ports (Including one AC/DC
Powered USB port) (Factory Option) Slot 4 for 3G/4G Module
Two Mini DisplayPorts (1.3) Note: (Factory Option) LTE or 802.11ad Antenna
One HDMI-Out Port
One 2-In-1 Audio Jack (Headphone & S/PDIF Optical Output 
Combo Jack) M.2 SSD Limitation
One Microphone-In Jack
When slot 3 has an M.2 SATA SSD
One Line-Out Jack installed, then slot 2 will not be avail-
One RJ-45 LAN Jack able for M.2 PCIe SSDs.
One DC-In Jack
Specifications 1 - 3
Introduction
Figure 1
External Locator - Top View with LCD Panel Open
Top View
1. PC Camera
2. *PC Camera LED
*When the PC 3 2 1 3
camera is in use,
the LED will be
illuminated.
3. Built-In Array
Microphone
4. LCD
1.Introduction
5. Speakers 4
6. Power Button
7. Keyboard
8. Touchpad &
Buttons
9. Fingerprint
Reader (Optional) 5 5
6
1 - 4 External Locator - Top View with LCD Panel Open

Introduction
External Locator - Front & Right Side Views Figure 2

Front View
1. LED Indicator
FRONT VIEW
1.Introduction
Figure 3
Right Side View
1. S/PDIF-Out Jack
2. Microphone-In
Jack
RIGHT SIDE VIEW 3. Headphone-Out
Jack
4. USIM Card
Reader (for 3G/
1 2 3 5 6 6 7 9 4G USIM Cards)
4 5. Multi-in-1 Card
8
Reader
6. USB 3.1 Ports
7. USB 3.0 Port
8. RJ-45 LAN Jack
9. Security Lock
Slot
External Locator - Front & Right Side Views 1 - 5

Introduction
External Locator - Left Side & Rear View

Figure 4
Left Side View
1. Vent
2. HDMI-Out Port /
3. Powered USB 3.0 LEFT SIDE VIEW
Port
4. Mini DisplayPorts
1 2 3 4 4
1.Introduction
Figure 5 REAR VIEW

Rear View
1. Vent
2
2. DC-In Jack
1
3. USB Port 3
1 - 6 External Locator - Left Side & Rear View

Introduction
External Locator - Bottom View

Figure 6
Bottom View
1. Vent
1
1
1
1.Introduction
1
1 
Overheating
To prevent your com-

puter from overhea-
ting, make sure no-
thing blocks any vent
while the computer is
in use.
External Locator - Bottom View 1 - 7

Introduction
Figure 7 Mainboard Overview - Top (Key Parts)

Mainboard Top
Key Parts
1. Memory Slots
DDR4 SO-DIMM
2. KBC-ITE IT8587
3. CMOS Battery
1.Introduction
1
3
1 - 8 Mainboard Overview - Top (Key Parts)

Introduction
Mainboard Overview - Bottom (Key Parts) Figure 8

Mainboard Bottom
Key Parts
1. Mini-Card
Connector (WLAN
Module)
2. Mini-Card
4 Connector (M.2
3G/SATA Module)
3. Mini-Card
Connector (M.2
PCIE/SATA SSD
1.Introduction
1
Module)
4. GPU-GTX1060M
5 5. Memory Slots
6
DDR4 SO-DIMM
6. CPU
2 3
Mainboard Overview - Bottom (Key Parts) 1 - 9

Introduction
Figure 9 Mainboard Overview - Top (Connectors)

Mainboard Top
Connectors
4 5
1. HDMI Port
2. USB Port 3.0
Connector
3. Mini Display Port
4. USB Port 3.1
Connector 11
5. DC-In Jack
2
6. Keyboard Cable
Connector
1.Introduction
4
7. TP Connector
8. Speaker 1 4
Connector
9. USIM Card 2 10
Reader (for 3G/
4G USIM Cards) 3 6 8
10. Multi-in-1 Card 3 7 9
Reader
11. RJ-45 LAN Jack
1 - 10 Mainboard Overview - Top (Connectors)

Introduction
Mainboard Overview - Bottom (Connectors) Figure 10

Mainboard Bottom
Connectors
5
1. HDD Connector
11 2. Battery Connector
3. Fan Connector
4. LCD Cable
Connector
4 5. CCD Connector
1.Introduction
2
Mainboard Overview - Bottom (Connectors) 1 - 11

Introduction
1.Introduction
1 - 12
Disassembly
Chapter 2: Disassembly
Overview
This chapter provides step-by-step instructions for disassembling the P655RP6(-G) series notebook’s parts and subsys-
tems. When it comes to reassembly, reverse the procedures (unless otherwise indicated).
We suggest you completely review any procedure before you take the computer apart.
Procedures such as upgrading/replacing the RAM, optical device and hard disk are included in the User’s Manual but are
repeated here for your convenience.
2.Disassembly
To make the disassembly process easier each section may have a box in the page margin. Information contained under
the figure # will give a synopsis of the sequence of procedures involved in the disassembly procedure. A box with a  
lists the relevant parts you will have after the disassembly process is complete. Note: The parts listed will be for the dis-
Information
assembly procedure listed ONLY, and not any previous disassembly step(s) required. Refer to the part list for the previ-
ous disassembly procedure. The amount of screws you should be left with will be listed here also.
A box with a  will also provide any possible helpful information. A box with a  contains warnings.
An example of these types of boxes are shown in the sidebar.


Warning
Overview 2 - 1
Disassembly
NOTE: All disassembly procedures assume that the system is turned OFF, and disconnected from any power supply (the
battery is removed too).
Maintenance Tools
The following tools are recommended when working on the notebook PC:
• M3 Philips-head screwdriver
• M2.5 Philips-head screwdriver (magnetized)
• M2 Philips-head screwdriver
• Small flat-head screwdriver
• Pair of needle-nose pliers
• Anti-static wrist-strap
2.Disassembly
Connections
Connections within the computer are one of four types:
Locking collar sockets for ribbon connectors To release these connectors, use a small flat-head screwdriver to
gently pry the locking collar away from its base. When replac-
ing the connection, make sure the connector is oriented in the
same way. The pin1 side is usually not indicated.
Pressure sockets for multi-wire connectors To release this connector type, grasp it at its head and gently
rock it from side to side as you pull it out. Do not pull on the
wires themselves. When replacing the connection, do not try to
force it. The socket only fits one way.
Pressure sockets for ribbon connectors To release these connectors, use a small pair of needle-nose pli-
ers to gently lift the connector away from its socket. When re-
placing the connection, make sure the connector is oriented in
the same way. The pin1 side is usually not indicated.
Board-to-board or multi-pin sockets To separate the boards, gently rock them from side to side as
you pull them apart. If the connection is very tight, use a small
flat-head screwdriver - use just enough force to start.
2 - 2 Overview
Disassembly
Maintenance Precautions
The following precautions are a reminder. To avoid personal injury or damage to the computer while performing a re- 
moval and/or replacement job, take the following precautions: Power Safety
Warning
1. Don't drop it. Perform your repairs and/or upgrades on a stable surface. If the computer falls, the case and other
Before you undertake
components could be damaged. any upgrade proce-
2. Don't overheat it. Note the proximity of any heating elements. Keep the computer out of direct sunlight. dures, make sure that
3. Avoid interference. Note the proximity of any high capacity transformers, electric motors, and other strong mag- you have turned off the
netic fields. These can hinder proper performance and damage components and/or data. You should also monitor power, and discon-
the position of magnetized tools (i.e. screwdrivers). nected all peripherals
and cables (including
4. Keep it dry. This is an electrical appliance. If water or any other liquid gets into it, the computer could be badly telephone lines and
damaged. power cord). It is advis-
5. Be careful with power. Avoid accidental shocks, discharges or explosions. able to also remove
2.Disassembly
•Before removing or servicing any part from the computer, turn the computer off and detach any power supplies. your battery in order to
•When you want to unplug the power cord or any cable/wire, be sure to disconnect it by the plug head. Do not pull on the wire. prevent accidentally
6. Peripherals – Turn off and detach any peripherals. turning the machine
7. Beware of static discharge. ICs, such as the CPU and main support chips, are vulnerable to static electricity. on.
Before handling any part in the computer, discharge any static electricity inside the computer. When handling a
printed circuit board, do not use gloves or other materials which allow static electricity buildup. We suggest that
you use an anti-static wrist strap instead.
8. Beware of corrosion. As you perform your job, avoid touching any connector leads. Even the cleanest hands pro-
duce oils which can attract corrosive elements.
9. Keep your work environment clean. Tobacco smoke, dust or other air-born particulate matter is often attracted
to charged surfaces, reducing performance.
10. Keep track of the components. When removing or replacing any part, be careful not to leave small parts, such as
screws, loose inside the computer.
Cleaning
Do not apply cleaner directly to the computer, use a soft clean cloth.
Do not use volatile (petroleum distillates) or abrasive cleaners on any part of the computer.
Overview 2 - 3
Disassembly
Disassembly Steps
The following table lists the disassembly steps, and on which page to find the related information. PLEASE PERFORM
THE DISASSEMBLY STEPS IN THE ORDER INDICATED.
To remove the Keyboard:

1. Remove the keyboard page 2 - 5
To remove the Battery:
1. Remove the battery page 2 - 6
To remove the HDD:
2.Disassembly

2. Remove the HDD page 2 - 8
To remove the System Memory:
2. Remove the system memory page 2 - 10
To remove the M.2 SSD:
2. Remove the SSD page 2 - 13
To remove the Wireless LAN Module:
2. Remove the WLAN page 2 - 14
To remove and install the 3G/SATA Module:
2. Remove the 3G page 2 - 16
3. Remove the SATA page 2 - 17
4. Install the 3G/SATA page 2 - 18
2 - 4 Disassembly Steps
Disassembly
Removing the Keyboard Figure 1

1. Turn off the computer, turn it over. Keyboard Removal
2. Remove screws 1 - 2 from the bottom of the computer.
3. Open it up with the LCD on a flat surface before pressing at point 3 to release the keyboard module (use the spe- a. Remove the screws from
the bottom of the compu-
cial eject stick 4 to do this) while releasing the keyboard in the direction of the arrow 5 as shown (Figure 1a).
ter and then eject the
4. Carefully lift the keyboard 6 up, being careful not to bend the keyboard ribbon cable 7 . Disconnect the key- keyboard using a special
board ribbon cable 7 from the locking collar socket by using a flat-head screwdriver to pry the locking collar pins eject stick to push the
8 away from the base (Figure 1b). keyboard out while re-
5. Carefully lift the keyboard 6 off the computer (Figure 1c). leasing the keyboard as
shown.
a. b. Lift the keyboard up and
b. disconnect the keyboard
6 ribbon cable from the
2.Disassembly
3 locking collar socket.
c. Remove the keyboard.
7
1
2
8 8
8 7 
7 Re-inserting the Key-
board
8 8 When re-inserting the

keyboard firstly, align the
keyboard tabs at the bot-
c. tom of the keyboard with
the slots in the case.
5

3 4. Eject Stick
6. Keyboard
4 6
• 2 Screws
Removing the Keyboard 2 - 5

Disassembly
Figure 2 Removing the Battery

Battery Removal 1. Turn the computer off, and turn it over.
2. Remove the SD card cover 16 and screws 2 - 15 (Figure 2a).
a. Remove the SD cover
and screws.
3. Carefully lift the bottom case 16 up in the direction of the arrow 17 and remove it (Figure 2b).
b. Remove the bottom case. 4. The battery will be visible at point 18 on the computer (Figure 2c).
c. Locate the battery.
a. 2 5 b.
3 4
12
16
6
2.Disassembly
13 14
1
11 15 7
17
9 8
10
c.
 16
1. SD Card Cover
16. Bottom Case
18
• 14 Screws
2 - 6 Removing the Battery

Disassembly
5. Carefully disconnect the cable 19 , then remove screws 20 - 22 (Figure 3b).

Figure 3
6. Lift the battery 23 off the computer (Figure 3e).
Battery Removal
7. Reinsert the bottom case starting from point 24 as shown (Figure 3f) to avoid damaging the rear USB 3.0 port.
(cont’d.)
Tighten the screws to secure the bottom case in place.
d. Disconnect the cable and
remove the screws.
d. e. e. Lift the battery off the
19
computer.
f. Reinsert the bottom case
20 and tighten the screws.
2.Disassembly
21
22
23
f.
24

23. Battery
• 3 Screws
Removing the Battery 2 - 7

Disassembly
Figure 4 Removing the Hard Disk Drive

HDD Assembly The hard disk drive can be taken out to accommodate other 2.5" serial (SATA) hard disk drives with a height of 9.5mm
Removal or 7mm (h). Follow your operating system’s installation instructions, and install all necessary drivers and utilities (as
outlined in Chapter 4 of the User’s Manual) when setting up a new hard disk.
a. Locate the HDD.
b. Remove the screws.
Hard Disk Disassembly Process
1. Turn off the computer, and remove the battery (page 2 - 6).
2. The HDD will be visible at point 1 on the mainboard (Figure 4a).
3. Remove screws 2 - 5 from the HDD assembly (Figure 4b).
a.
2.Disassembly

HDD System Warning
New HDD’s are blank. Before you

begin make sure:
1
You have backed up any data you
want to keep from your old HDD.
You have all the CD-ROMs and

FDDs required to install your oper-
b. ating system and programs.
5
If you have access to the internet,
 download the latest application and
6. Hard Disk hardware driver updates for the op-
erating system you plan to install.
Copy these to a removable medi-
• 4 Screws um.
2
3 4
2 - 8 Removing the Hard Disk Drive

Disassembly
4. Slide to lift and pull the hard disk in the direction of arrow 6 (Figure 5c).
5. Lift the hard disk assembly 7 out of the bay 8 (Figure 5d). Figure 5
6. Remove screws 9 - 12 and bracket 13 from the hard disk 14 (Figure 5e). HDD Assembly
Removal (cont’d.)
7. Reverse the process to install a new hard disk (do not forget to replace the screws).
c. Slightly lift and pull the
c. d. HDD in the direction of
the arrow.
d. Lift the HDD assembly
out of the bay.
e. Remove the screws and
7
bracket from the HDD.
8
2.Disassembly
10
e.
11
6  13
Installing 9.5mm or 7mm
HDD
Note that the hard disks pic- 9

tured on the following pages
are 9.5mm(h) hard disk drive.
In some cases 7.0mm(h) hard 

disk drive will be installed. Do 12 7. HDD Assembly
pay attention on the alignment 13. HDD Bracket
of the hard disk and bracket 14 14. HDD
when tightening the screws.
For more information, contact • 4 Screws

your distributor/supplier, and
bear in mind your warranty
terms.
Removing the Hard Disk Drive 2 - 9

Disassembly
Figure 6 Removing the System Memory (RAM)

RAM-1 Module
Removal
The computer has four memory sockets for 260 pin Small Outline Dual In-line Memory Modules (SO-DIMM) support-
ing DDR4 Up to 2400 MHz. The main memory can be expanded up to 64GB. The total memory size is automatically
a. The RAM modules will detected by the POST routine once you turn on your computer.
be visible at point 1 . Memory-1 Upgrade Process
b. Remove the screws
and lift the shielding 1. Turn off the computer, turn it over, remove the keyboard (page 2 - 5).
plate out. 2. The RAM modules will be visible at point 1 after removing the shielding plate (Figure 6a).
3. Remove screws 2 - 5 and lift the shielding plate 6 off the computer (Figure 6b).
a. b. 5
2.Disassembly
2
 1
Contact Warning
3 4
Be careful not to touch
the metal pins on the
module’s connecting
edge. Even the cleanest
hands have oils which
can attract particles, and
degrade the module’s 6
performance.

6. RAM Shielding Plate
• 4 Screws
2 - 10 Removing the System Memory (RAM)

Disassembly
4. Gently pull the two release latches ( 7 & 8 ) on the sides of the memory socket in the direction indicated by the Figure 7
arrows (Figure 7c). The RAM module 9 will pop-up (Figure 7d), and you can then remove it. RAM-1 Module
5. Pull the latches to release the second module if necessary. Removal (cont’d)
6. Insert a new module holding it at about a 30° angle and fit the connectors firmly into the memory slot.
7. The module will only fit one way as defined by its pin alignment. Make sure the module is seated as far into the slot c. Pull the release lat-
as it will go. DO NOT FORCE IT; it should fit without much pressure. ches.
8. Press the module in and down towards the mainboard until the slot levers click into place to secure the module. d. Remove the module.
c. d.
7 7
9 9 
2.Disassembly
Contact Warning
8 Be careful not to touch

8 the metal pins on the
module’s connecting
edge. Even the clean-
est hands have oils
which can attract parti-
cles, and degrade the
module’s performance.

9. RAM Module
Removing the System Memory (RAM) 2 - 11

Disassembly
Figure 8 Memory-2 Upgrade Process

RAM-2 Module 1. Turn off the computer, turn it over, remove the battery (page 2 - 6).
Removal 2. The RAM-2 modules will be visible at point 1 on the mainboard (Figure 8a).
3. Gently pull the two release latches ( 2 & 3 ) on the sides of the memory socket in the direction indicated by the
a. The RAM modules arrows (Figure 8b). The RAM module 4 will pop-up (Figure 8c), and you can then remove it.
will be visible at point 4. Pull the latches to release the second module if necessary.
1 on the main- 5. Insert a new module holding it at about a 30° angle and fit the connectors firmly into the memory slot.
board.
b. Pull the release lat-
6. The module will only fit one way as defined by its pin alignment. Make sure the module is seated as far into the slot
ches. as it will go. DO NOT FORCE IT; it should fit without much pressure.
c. Remove the module. 7. Press the module in and down towards the mainboard until the slot levers click into place to secure the module.
8. Replace the bottom cover and the screws (see page 2 - 6).
9. Restart the computer to allow the BIOS to register the new memory configuration as it starts up.
2.Disassembly
 c.
a. b.
Contact Warning
Be careful not to touch

the metal pins on the
module’s connecting 2
edge. Even the clean-
2
est hands have oils
which can attract parti- 1 4
cles, and degrade the
module’s performance.
3 3

4. RAM Module
2 - 12 Removing the System Memory (RAM)

Disassembly
Removing the M.2 SSD Module Figure 9

M.2 SSD Module
1. Turn off the computer, turn it over, remove the battery (page 2 - 6).
Removal
2. The M.2 SSD module will be visible at point 1 on the mainboard (Figure 9a).
3. Remove the screw 2 (Figure 9b)
a. Locate the M.2 SSD.
4. The M.2 SSD module 3 (Figure 9c) will pop-up, and you can remove it from the computer. b. Remove the screw.
c. The M.2 SSD module
a. c. will pop up.
2.Disassembly
1
b.
 3
Thermal Pad
Be sure to place the thermal pad’s adhesive side down onto


the module surface. 3.M2 SSD Module
Note that the thermal pad may be subject to change in de-

sign, kindly contact your local representative for details. • 1 Screw
2
Removing the M.2 SSD Module 2 - 13

Disassembly
Figure 10 Removing the Wireless LAN Module

Wireless LAN
1. Turn off the computer, turn it over, remove the battery (page 2 - 6).
Module Removal
2. The Wireless LAN module will be visible at point 1 on the mainboard (Figure 10a).
3. Carefully disconnect the cables 2 & 3 , and then remove the screw 4 (Figure 10b)
a. Locate the WLAN.
b. Disconnect the cables
4. The Wireless LAN module 5 (Figure 10c) will pop-up, and you can remove it from the computer.
and remove the screw.
c. The WLAN module will a. c.
pop up.
5
Note: Make sure you
1 5
reconnect the antenna
2.Disassembly
cable to the “1 + 2”
socket (Figure 10b).
b.
2
4
 3
5.Wireless LAN Module
• 1 Screw
2 - 14 Removing the Wireless LAN Module

Disassembly
Wireless LAN, Combo, 3G & LTE Module Cables

Note that the cables for connecting to the antennae on WLAN, WLAN & Bluetooth Combo, 3G and LTE modules are
not labelled. The cables/covers (each cable will have either a black or transparent cable cover) are color coded for iden-
tification as outlined in the table below.
Antenna Cable Cover

Module Type Cable Color
Type Type
WLAN/WLAN & Bluetooth WM 1 Transparent

Black
Combo WM 2 White
LTE 1 Black
2.Disassembly
LTE Broadband Black
LTE 2 Blue
3G 1 Black
3G Broadband Black
3G 2 Blue
Cable 1 is usually connected to antenna 1 (Main) on the module, and cable 2 to antenna 2 (Aux).
Wireless LAN, Combo, 3G & LTE Module Cables 2 - 15

Disassembly
Removing and Installing the 3G/SATA Module

Figure 11
3G Module Removal 3G Module Removal Procedure
1. Turn off the computer, remove the battery (page 2 - 6).
a. Locate the module. 2. Locate the module, it is visible at point 1 (Figure 11a).
b. Disconnect the cables and
3. Carefully disconnect the cables 2 & 3 , and then remove the screw 4 from the module (Figure 11b).
remove the screw.
c. The module will pop-up. 4. The module 5 will pop-up (Figure 11c).
d. Lift the module up off the 5. Lift the module 5 up and off the computer (Figure 11d).
socket.
a. c.
2.Disassembly
b. d.
4
 5
5. 3G Module
3
• 1 Screw
2 - 16 Removing and Installing the 3G/SATA Module

Disassembly
SATA Module Removal Procedure Figure 12

1. Turn off the computer, remove the battery (page 2 - 6). SATA Module
2. Locate the module, it is visible at point 1 (Figure 12a). Removal
3. Remove the screw 2 from the module (Figure 12b).
4. The module 3 will pop-up (Figure 12c). a. Locate the module.
5. Lift the module 3 up and off the computer (Figure 12d). b. Disconnect the cables and
remove the screw.
c. The module will pop-up.
a. b. d. Lift the module up off the
socket.
2.Disassembly
1
c. d.

3 3. SATA Module
• 1 Screw
Removing and Installing the 3G/SATA Module 2 - 17

Disassembly
Figure 13 3G/SATA Installation Procedure

3G/SATA Module 1. Place the thermal pad 1 on the module as shown (Figure 13a).
Installation 2. Insert the module 2 in the computer (Figure 13b).
3. Tighten the screw 3 to secure it in place (Figure 13c).
a. Place the thermal pad.
b. Insert the module. a. b.
c. Tighten the screw.
1
2.Disassembly
Top
c.
3

Thermal Pad
Be sure to place the thermal pad’s adhesive side down onto

 the module surface.
1. Thermal Pad Note that the thermal pad may be subject to change in de-
2. M2 SATA Module sign, kindly contact your local representative for details.
• 1 Screw
2 - 18 Removing and Installing the 3G/SATA Module

Appendix A:Part Lists
This appendix breaks down the P655RP6(-G) series notebook’s construction into a series of illustrations. The component
part numbers are indicated in the tables opposite the drawings.
Note: This section indicates the manufacturer’s part numbers. Your organization may use a different system, so be sure
to cross-check any relevant documentation.
Note: Some assemblies may have parts in common (especially screws). However, the part lists DO NOT indicate the
total number of duplicated parts used.
Note: Be sure to check any update notices. The parts shown in these illustrations are appropriate for the system at the
A.Part Lists
time of publication. Over the product life, some parts may be improved or re-configured, resulting in new part numbers.
A - 1
Part List Illustration Location
The following table indicates where to find the appropriate part list illustration.
Table A - 1
Part List Illustration
Part
Location
Top page A - 3
Bottom page A - 4
Main Board page A - 5
HDD page A - 6
LCD page A - 7
A.Part Lists
A - 2
Top
Figure A - 1
A.Part Lists
Top
Top A - 3
Bottom
Figure A - 2
A.Part Lists
Bottom
A - 4 Bottom
Main Board
Figure A - 3
Main Board
A.Part Lists
Main Board A - 5
HDD
Figure A - 4
A.Part Lists
HDD
A - 6 HDD
LCD
Figure A - 5
LCD
A.Part Lists
LCD A - 7
A.Part Lists
A - 8
Schematic Diagrams
Appendix B: Schematic Diagrams

This appendix has circuit diagrams of the P655RP6(-G) notebook’s PCB’s. The following table indicates where to find
the appropriate schematic diagram.
Diagram - Page Diagram - Page Diagram - Page Diagram - Page

System Block Diagram - Page B - 2 Frame Buffer Partition A_B - Page B - 23 KBC IT8587 - Page B - 44 VCC_Core & VCCSA - Page B - 65 Table B - 1
Processor 1/7 - Page B - 3 GPU Frame Buffer Partition - Page B - 24 USB Charger - Page B - 45 VCore Output Stage - Page B - 66 SCHEMATIC
Processor 2/7 - Page B - 4 Frame Buffer Partition C - Page B - 25 USB - Page B - 46 VCCGT - Page B - 67 DIAGRAMS
B.Schematic Diagrams
Processor 3/7 - Page B - 5 Frame Buffer Partition C_D - Page B - 26 M.2 WLAN+BT, PCIE4X SSD - Page B - 47 VCCGT Output Stage - Page B - 68
Processor 4/7 - Page B - 6 GPU Decoupling - Page B - 27 M.2 3G/LTE - Page B - 48 LAN RTL8411, Card Reader - Page B - 69
Processor 5/7 - Page B - 7 GPU Decoupling 2 - Page B - 28 Realtek ALC892 - Page B - 49 AR_TBT - Page B - 70
Processor 6/7 - Page B - 8 Straps and XTAL - Page B - 29 TPA2008D2 - Page B - 50 AR_Power - Page B - 71
Processor 7/7 - Page B - 9 IFP I/O Interface - Page B - 30 TPM, CCD, TP - Page B - 51 TPS65982, Type C - Page B - 72
DDR CHA SO-DIMM_0 - Page B - 10 Misc - GPIO, I2C and ROM - Page B - 31 Fan, LID, KB LED - Page B - 52 TPS65982, Type A - Page B - 73 
DDR CHA SO-DIMM_1 - Page B - 11 NVIDIA Power Sequence - Page B - 32 Connector - Page B - 53 USB, Type A - Page B - 74
Version Note
DDR CHB SO-DIMM_0 - Page B - 12 GPU NVVDD, FBVDDQ - Page B - 33 DDR 1.2V / 0.6VS - Page B - 54 Audio Board_3D AMP - Page B - 75
DDR CHB SO-DIMM_1 - Page B - 13 GPU GND - Page B - 34 VDD3, VDD5 - Page B - 55 HDD Board - Page B - 76
The schematic dia-
grams in this chapter
Panel, Inverter - Page B - 14 PCH 1/9 - Page B - 35 5V, 5VS, 3.3V, 3.3VS, 3.3VA - Page B - 56 Power Board - Page B - 77
are based upon version
Redriver - Page B - 15 PCH 2/9 - Page B - 36 Power 1.0V, VCCIO - Page B - 57 LED Board - Page B - 78 6-7P-P65P9-002. If your
Mini DP Port E - Page B - 16 PCH 3/9 - Page B - 37 AC_In, Charger - Page B - 58 Click Board - Page B - 79 mainboard (or other
boards) are a later ver-
Mini DP Port F - Page B - 17 PCH 4/9 - Page B - 38 1.0DX_VCCSTG/VCCSFR_OC/2.5V - Page B - 59 Finger Sensor Board - Page B - 80
sion, please check with
HDMI Connector - Page B - 18 PCH 5/9 - Page B - 39 1V8_RUN/AON, NV3V3 - Page B - 60 Power Board - Page B - 81 the Service Center for
VGA PCI Express - Page B - 19 PCH 6/9 - Page B - 40 NVVDD Phase 1 & 2 - Page B - 61 LED Board - Page B - 82 updated diagrams (if re-
VGA Frame Buffer Partition - Page B - 20 PCH 7/9 - Page B - 41 NVVDDS - Page B - 62 quired).
Frame Buffer Partition A - Page B - 21 PCH 8/9 - Page B - 42 PEX_VDD - Page B - 63
Frame Buffer Partition B - Page B - 22 PCH 9/9 - Page B - 43 FBVDDQ - Page B - 64
B - 1
Schematic Diagrams
System Block Diagram

5 4 3 2 1
1.35V(VDDQ),1.5VS
P650RP Skylake System Block Diagram SHEET 53
VDD3,VDD5
P650 POWER SW BOARD SHEET 54
6-71-P65PC-D01 SHEET 76
5V,3.3V,5VS,3VS,
<=4.5" PCIE*16 SHEET 55
P650 HDD BOARD
D 6-71-P65PN-D03 SHEET 75 27 MHz DDR4/1.2V/1866, 2133MHz D
VDD1.0,VCCIO
P650 CLICK BOARD N17E-G1 H-processor <=4.5"
SHEET 56
6-71-P65P2-D01 (W/FP)
SHEET 78 HM170 AC_IN,CHARGER
6-71-P65P2-D01-1 (W/O FP) SHEET 18~33 PROCESSOR DDR4 SHEET 57
P650 AUDIO BOARD 3DHP BGA1440 SO-DIMM*4
SHEET 74
<=6" 1.0DX_VCCSTG/VCCSFR_OC
6-71-P65P8-D12 SHEET 9,10,11,12
Mini DP SHEET 15,16 SHEET 2,3,4,5,6,7,8 VPP 2.5V
SYSTEM SMBUS SHEET 58
P650 LED BOARD
6-71-P65P4-D03 SHEET 77
HDMI2.0(P8409A)SHEET 17 1V8_RUN,1V8_AON,NV3V3
eDP DMI*4 SHEET 59
P650 FINGER BOARD <=7" 5.1 channel
6-71-P65PF-D01
SHEET 79 <=6" NVVDD
SHEET 60
PANEL PS8331B
SHEET 13 SHEET 3
NVVDDS
SPDIF MIC HP SHEET 61
Sheet 1 of 81 C
P655 POWER SW BOARD
6-71-P655C-DP1 SHEET 80 ESS
HIFI
OUT IN OUT
PEX_VDD C
H Platform 枸䔁 SHEET 62
System Block P655 LED BOARD 32.768KHz
Controller SHEET 75~76
AUDIO BOARD
SHEET 74
3D
surround
FBVDDQ
6-71-P6554-DP3 SHEET 81
Diagram Hub (PCH-H)
SV3H612
SHEET 63
TOUCH PAD SPI(Option) SHEET 74 VCC_CORE & VCCSA

TPM2.0 24MHz SHEET 64~65
SHEET 43
(Option) SPDIF
SHEET50 (RESERVE) SHEET 50
OUT VCCGT
23x23mm FCBGA Azalia Codec TPA2008D2 SHEET 66~67
EC REALTEK SHEET 49
INT MIC ALC892
ITE 8587A 33 MHz LPC
(512KB ROM) SHEET 34~42 SHEET 48 SHEET 48
BIOS Front L
SPI Front R
SHEET 43 24 MHz
SHEET 34 AZALIA LINK
INT. K/B EC SMBUS
B B
SHEET 43
THERMAL SMART SMART PCIE 100 MHz
SENSOR FANx3 BATTERY <8" <8"
AC-IN <8"
RT5 NGFF PCIE NGFF PCIE
K/B Backlight SHEET 2 SHEET 50 SHEET 56
SOCKET SOCKET
SHEET 49,51 USB 3.0 USB 2.0 SSD PCIE4X WLAN+BT Realtek
5 Gbps 480 Mbps TBT
2"~7" PORT 0
SHEET 46 (USB8) SHEET 69~70 RTL8411B
SATA III 6.0Gb/s M KEY SHEET 46 LAN CARD
3"~9" A KEY SHEET 68 READER
PORT 2 PORT 3
25
PORT 1 1"~12" MHz
NGFF PCIE P650
LAN BOARD
SATA HDD SATA HDD SOCKET USB3.0 FINGER PRINTER
7mm 7mm 3G/M.2 SATA PORT1 CCD (USB7) USB3.1 USB3.1 2IN1
ON CLICK BOARD RJ-45
SHEET 36
(USB1) (USB9) TYPE C TYPE A SHEET 68
SOCKET
USB3.0 SHEET 44 SHEET 50 (USB4) (USB3) SHEET 68
HDD BOARD PORT2
SHEET 77 (Charging)
FingerPrint SHEET 71 SHEET 72
A (USB6) ~73 A
SHEET 47 USB3.0
B KEY PORT5 SHEET 81 12 MHz
(USB4)
SIM SHEET 45
(Optional)
ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
ONLY P65 Title
[01]BLOCK DIAGRAM
SHEET 47 Size Document Number Rev
A3 P650RP 6-7P-P65P9-002 006
Date: Tuesday, July 19, 2016 Sheet 1 of 82

5 4 3 2 1
B - 2 System Block Diagram

Schematic Diagrams
Processor 1/7
5 4 3 2 1
?
SKYLAKE_HALO
U113C
BGA1440
E25 B25 PEG_TX_0 C985 0.22u_10V_X5R_04

[18] PEG_RX0 PEG_RXP[0] PEG_TXP[0] PEG_TX0 [18]
D25 A25 PEG_TX#_0 C974 0.22u_10V_X5R_04
D [18] PEG_RX#0 PEG_RXN[0] PEG_TXN[0] PEG_TX#0 [18] D
E24 B24 PEG_TX_1 C978 0.22u_10V_X5R_04
F24 C24 PEG_TX#_1 C965 0.22u_10V_X5R_04
[18] PEG_RX#1 PEG_RXN[1] PEG_TXN[1] PEG_TX#1 [18]
E23 B23 PEG_TX_2 C968 0.22u_10V_X5R_04
D23 A23 PEG_TX#_2 C959 0.22u_10V_X5R_04
E22 B22 PEG_TX_3 C962 0.22u_10V_X5R_04
F22 C22 PEG_TX#_3 C950 0.22u_10V_X5R_04
E21 B21 PEG_TX_4 C954 0.22u_10V_X5R_04
D21 A21 PEG_TX#_4 C940 0.22u_10V_X5R_04
E20 B20 PEG_TX_5 C935 0.22u_10V_X5R_04
F20 C20 PEG_TX#_5 C921 0.22u_10V_X5R_04
E19 B19 PEG_TX_6 C924 0.22u_10V_X5R_04
D19 A19 PEG_TX#_6 C911 0.22u_10V_X5R_04
E18 B18 PEG_TX_7 C914 0.22u_10V_X5R_04
F18 C18 PEG_TX#_7 C904 0.22u_10V_X5R_04
D17 A17 PEG_TX_8 C906 0.22u_10V_X5R_04
E17 B17 PEG_TX#_8 C897 0.22u_10V_X5R_04
F16 C16 PEG_TX_9 C899 0.22u_10V_X5R_04
E16 B16 PEG_TX#_9 C892 0.22u_10V_X5R_04
D15 A15 PEG_TX_10 C886 0.22u_10V_X5R_04
C [18] PEG_RX10 PEG_RXP[10] PEG_TXP[10] PEG_TX10 [18] C
E15 B15 PEG_TX#_10 C890 0.22u_10V_X5R_04
F14 C14 PEG_TX_11 C887 0.22u_10V_X5R_04
E14 B14 PEG_TX#_11 C884 0.22u_10V_X5R_04
[18] PEG_RX12
[18] PEG_RX#12
D13
E13 PEG_RXP[12]
PEG_RXN[12]
PEG_TXP[12]
PEG_TXN[12]
A13
B13
PEG_TX_12
PEG_TX#_12
PEG_TX_13
C885
C881
0.22u_10V_X5R_04
0.22u_10V_X5R_04
PEG_TX12 [18]
PEG_TX#12 [18] Sheet 2 of 81
[18] PEG_RX13 F12 C12 C883 0.22u_10V_X5R_04
Processor 1/7
PEG_RXP[13] PEG_TXP[13] PEG_TX#_13 PEG_TX13 [18]
[18] PEG_RX#13 E12 B12 C880 0.22u_10V_X5R_04
PEG_RXN[13] PEG_TXN[13] PEG_TX#13 [18]
D11 A11 PEG_TX_14 C876 0.22u_10V_X5R_04
E11 B11 PEG_TX#_14 C869 0.22u_10V_X5R_04
VCCIO F10 C10 PEG_TX_15 C875 0.22u_10V_X5R_04

E10 B10 PEG_TX#_15 C868 0.22u_10V_X5R_04
R681
PEG_COMP G2
PEG_RCOMP
24.9_1%_04
D8 B8
[35] DMI_IT_MR_0_DP DMI_RXP[0] DMI_TXP[0] DMI_MT_IR_0_DP [35]
E8 A8
[35] DMI_IT_MR_0_DN DMI_RXN[0] DMI_TXN[0] DMI_MT_IR_0_DN [35]
E6 C6
F6 B6
B B
D5 B5
E5 A5
J8 D4
J9 B4
3 OF 14
SKL_H_BGA_BGA
REV = 1 ?
3.3V
PLACE NEAR CPU
2
RT1
TH05-3H103FR
P/N 6-17-10320-731
1
A THERM_VOLT [43] A
R373
4.7K_1%_04
Title
[02] Processor 1/7-DMI/PEG
3.3V [13,17,31,44,45,46,47,50,52,53,55,56,58,59,60,62,70]
Size Document Number Rev
VCCIO [3,7,56] A3 P650RP 6-71-P65P0-D02A D03B

5 4 3 2 1
Processor 1/7 B - 3
Schematic Diagrams
Processor 2/7
5 4 3 2 1
U113D
?
SKYLAKE_HALO
BGA1440
NV_DP_F
K36 D29 IEDP_TXP_0
DDI1_TXP[0] EDP_TXP[0] DDI3_AUX_R
K37 E29 IEDP_TXN_0
DDI1_TXN[0] EDP_TXN[0] DDI3_AUX#_R
J35 F28 IEDP_TXP_1 R711 *100K_1%_04
J34 DDI1_TXP[1] EDP_TXP[1] E28 IEDP_TXN_1 R710 *100K_1%_04
DDI1_TXN[1] EDP_TXN[1] DDI3_AUX_RE 3.3VS
H37 B29 IEDP_TXN_2
DDI1_TXP[2] EDP_TXN[2] DDI3_AUX#_RE
H36 A29 IEDP_TXP_2 DDI3_AUX [46]
J37 DDI1_TXN[2] EDP_TXP[2] B28 IEDP_TXN_3 DDI3_AUX# [46]
J38 DDI1_TXP[3] EDP_TXN[3] C28 IEDP_TXP_3 R712 *10K_04 C_AUTO_EQ
DDI1_TXN[3] EDP_TXP[3] 3.3VS
C1030 *2.2u_6.3V_X5R_04 C_EN R709 *4.7K_04 3.3VS
D27 C26 IEDP_AUXP 3.3VS
E27 DDI1_AUXP EDP_AUXP B26 IEDP_AUXN
DDI1_AUXN EDP_AUXN C957 C1029
36
35
34
33
32
31
30
29
28
27
26
25
D H34 U58 D
H33 DDI2_TXP[0] *0.1u_10V_X5R_04 *0.1u_10V_X5R_04
V3P3
SDA_DDC
SCL_DDC
V3P3
GND
AUX_SRCP
AUX_SRCN
HPD_SRC PERICOM(TI)(PARADA) AUX_SNKP
AUX_SNKN
DNC(VDDD_DREG)(CEXT) AUTO-EQ(RSTN)(RST#)
ENABLE(ENABLE)(PD#)
V3P3
F37 DDI2_TXN[0] A33 EDP_DISP_UTIL
DDI2_TXP[1] EDP_DISP_UTIL VCCIO
G38
F34 DDI2_TXN[1]
DDI2_TXP[2]
3.3VS
F35
E37 DDI2_TXN[2] EDP_RCOMP
D37 EDP_RCOMP R171 24.9_1%_04 FROM CPU Zdiff=85ȍ 37 Zdiff=100ȍ TO CON
E36 DDI2_TXP[3] CLOSE TO CPU DDI3_TXP0_RE C1026 *0.1u_16V_X7R_04 38 DNC 24
DDI2_TXN[3] DDI3_TXN0_RE C1027 *0.1u_16V_X7R_04 39 IN0P GND 23
Width = 20mil IN0N OUT0P DDI3_TXP0 [46]
OP_1(SDA_CTL)(SDA_CTL/CFG0)
F26 Space = 25mil C_EQ 40 22
OP_0(SCL_CTL)(SCL_CTL/PEQ)
DDI2_AUXP DDI3_TXP1_RE EQ(DNC)(CFG1) OUT0N DDI3_TXN0 [46]
E26 lengh = 100mil(max) C1004 *0.1u_16V_X7R_04 41 21
DDI2_AUXN IN1P DNC
OC_1(ADDR_EQ)(I2C_ADDR)
DDI3_TXN1_RE C999 *0.1u_16V_X7R_04 42 20
DDI3_TXP0_RE IN1N OUT1P DDI3_TXP1 [46]
C34 43 19
DDI3_TXN0_RE DDI3_TXP[0] DDI3_TXP2_RE DNC OUT1N DDI3_TXN1 [46]
R662 R663 D34 C997 *0.1u_16V_X7R_04 44 18
*100K_04 *100K_04DDI3_TXP1_RE B36 DDI3_TXN[0] DDI3_TXN2_RE C990 *0.1u_16V_X7R_04 45 IN2P GND 17
DDI3_TXP2 [46]
CNTRL(DNC)(REXT)
DDI3_TXN1_RE B34 DDI3_TXP[1] 46 IN2N OUT2P 16
DDI3_TXP2_RE DDI3_TXN[1] DDI3_TXP3_RE OC_0(DNC)(NC) OUT2N DDI3_TXN2 [46]
F33 C983 *0.1u_16V_X7R_04 47 15
DDI3_TXP[2] IN3P DNC
DDI3_TXN2_RE E33 DDI3_TXN3_RE C971 *0.1u_16V_X7R_04 48 14

DDI3_TXP3_RE DDI3_TXN[2] IN3N OUT3P DDI3_TXP3 [46]
C33 49 13
DDI3_TXN3_RE DDI3_TXP[3] HGND OUT3N DDI3_TXN3 [46]
CAD_SRC
CAD_SNK
HPD_SNK
B33
DDI3_TXN[3]
PROC_AUDIO_CLK
G27 AUD_AZACPU_SCLK [37] 月PS8330B
DDI3_AUX_RE A27 G25
月 Conn
V3P3
V3P3
V3P3
DDI3_AUXP PROC_AUDIO_SDI AUD_AZACPU_SDO_R [37]
DDI3_AUX#_RE B27 G29
DDI3_AUXN PROC_AUDIO_SDO AUD_AZACPU_SDI_R R166 20_1%_04
4 OF 14 AUD_AZACPU_SDI [37]
*PS8330B
1
2
3
4
5
6
7
8
9
10
11
12
CLOSE TO CPU
SKL_H_BGA_BGA
REV = 1
?
C958 *2.2u_6.3V_X5R_04
R656 *100K_04 FROM CON
Sheet 3 of 81 C947 *0.1u_10V_X7R_04 DDI3_AUX_R
3.3VS
TO PCH [38] W IGIG_HPD_RE

3.3VS
R657 *1M_04
W IGIG_HPD
C1028
[46]
C956
*0.1u_10V_X7R_04 DDI3_AUX#_R
Processor 2/7 C C946
R771
*4.7K_04
R773
*4.7K_04
R772
*4.7K_04
R660 *10K_04 C_OP_0 R149
IN_CAD_SRC
*4.7K_04 3.3VS
*0.1u_10V_X5R_04 *0.1u_10V_X5R_04 C
R659 *10K_04 C_OP_1 R150 *4.7K_04 3.3VS

R658 4.99K_1%_04 C_CNTRL
D
S
S
G G Q55
*2SK3018S3 R684 *10K_04 C_EQ R694 *10K_04
Q52 Q53 IN_CAD_SRC 3.3VS 3.3VS
G
*AO3415 *AO3415
PS8331_IN1_AEQ#
S
U46 R585 *4.7K_04
DDI3_AUX_RE
DDI3_AUX#_RE cap near the PS8331B 5*9mm PS8331_IN2_AEQ# R584 *4.7K_04
PS8331B(U4)
R603 *0_04 IEDP_TXP_0 C844 0.1u_10V_X7R_04 IEDP_TXP_0_R 1 60 3.3VS
INTEL EDP IEDP_HPD [13] IEDP_TXN_0
C845 0.1u_10V_X7R_04 IEDP_TXN_0_R 2 IN1_D0P VDD3 59 PS8331_IN1_AEQ# 3.3VS
IN1_D0N IN1_AEQ# PS8331_IN1_PEQ# R555 *4.7K_04
R589 0_04 3 58 PS8331_IN2_AEQ#
[38] SB_IEDP_HPD IEDP_TXP_1 IN1_HPD IN2_AEQ#
C833 0.1u_10V_X7R_04 IEDP_TXP_1_R 4 57 R76 *4.7K_04
IEDP_TXN_1 C834 0.1u_10V_X7R_04 IEDP_TXN_1_R 5 IN1_D1P GND 56 PS8331_PI0 L :PORT1 (INTEL) (DEFAULT)
4/13 HPD㓡䓙8331廠↢ IEDP_TXP_2 IN1_D1N PI0 H: PORT2 (NV)
C847 0.1u_10V_X7R_04 IEDP_TXP_2_R 6 55 PS8331_PC1
IEDP_TXN_2 C848 0.1u_10V_X7R_04 IEDP_TXN_2_R 7 IN1_D2P PC1 54 PS8331_SW 3.3VS
IN1_D2N SW PS8331_CTL_EN PS8331_SW [13,30,38,52]
8 53
IEDP_TXP_3 GND I2C_CTL_EN 4/13 ADD I2C 䶂嶗妋 PS8331 ⼙枧panel timing issue PS8331_IN2_PEQ# R554 *4.7K_04
C835 0.1u_10V_X7R_04 IEDP_TXP_3_R 9 52 PS8331_IN1_PEQ#
IEDP_TXN_3 C836 0.1u_10V_X7R_04 IEDP_TXN_3_R 10 IN1_D3P IN1_PEQ/SDA_CTL 51 PS8331_IN2_PEQ# R74 *4.7K_04
C849 0.1u_10V_X7R_04 DEDP_D0 11 IN1_D3N IN2_PEQ/SCL_CTL
NV EDP [29] DEDP_D0_R
C850 0.1u_10V_X7R_04 DEDP_D#0 12 IN2_D0P 50 PS8331_PD
[29] DEDP_D#0_R IN2_HPD 13 IN2_D0N PD 49
R590 100K_04 C851 0.1u_10V_X7R_04 DEDP_D1 14 IN2_HPD VDD3 48 PS8331_CA_DET 3.3VS NEAR PIN 3.3VS
1V8_AON [29] DEDP_D1_R IN2_D1P CA_DET
4/13 HPD㓡䓙8331廠↢ C852 0.1u_10V_X7R_04 DEDP_D#1 15 47 PS8331_CEXT C294 2.2u_6.3V_X5R_04 PS8331_PI0 R574 *4.7K_04
[29] DEDP_D#1_R IN2_D1N CEXT
C829 0.1u_10V_X7R_04 DEDP_D2 16 46
[29] DEDP_D2_R IN2_D2P OUT_D0P DP_TXP0 [13] R84 *4.7K_04
B eDP C830 0.1u_10V_X7R_04 DEDP_D#2 17 45 B
[29] DEDP_D#2_R 18 IN2_D2N OUT_D0N 44 EDP_HPD DP_TXN0 [13]
R89 DEDP_D3 GND OUT_HPD EDP_HPD [13]
C831 0.1u_10V_X7R_04 19 43
[29] DEDP_D3_R DEDP_D#3 20 IN2_D3P OUT_D1P 42 DP_TXP1 [13] 3.3VS
10K_04 C832 0.1u_10V_X7R_04
[29] DEDP_D#3_R IN2_D3N OUT_D1N DP_TXN1 [13] R73
GND
41 EDP PS8331_PC0 R550 4.7K_04
21 40
GPIO17_IFPD_HPD_R [30] 3.3VS VDD3 OUT_D2P DP_TXP2 [13] *100K_04
22 39 AUX PULL HI R71 *4.7K_04
23 IN1_SDA OUT_D2N 38 PS8331_PC0 DP_TXN2 [13]
C
Q4 24 IN1_SCL PC0 37
IN2_SDA OUT_D3P DP_TXP3 [13] 3.3VS
BTN3904 B R97 *100K_04 DEDP_HPD 25 36
DEDP_HPD [13] IN2_SCL OUT_D3N DP_TXN3 [13]
R95 100K_04
26
VDD3 VDD3
35
3.3VS PS8331_REXT NEAR PIN PS8331_PC1 R571 *4.7K_04
M-SOT23-CBE IEDP_AUXN C826 0.1u_10V_X7R_04 IEDP_AUXN_R 27 34 R548 4.99K_1%_04
E
IEDP_AUXP C824 0.1u_10V_X7R_04 IEDP_AUXP_R 28 IN1_AUXN REXT 33 R94 *4.7K_04

C318 220p_50V_NPO_04 IN1_AUXP GND
C289 0.1u_10V_X7R_04 DEDP_D_AUX# 29 32
[29] DEDP_D_AUX#_R IN2_AUXN OUT_AUXP_SCL DP_AUX [13]
[29] DEDP_D_AUX_R
C287 0.1u_10V_X7R_04 DEDP_D_AUX 30
IN2_AUXP OUT_AUXN_SDA
31
DP_AUX# [13]
EDP L :PORT1 (INTEL)
C317 *220p_50V_NPO_04 3.3VS 3.3VS
H: PORT2 (NV) (DEFAULT)
61 10K_04 R549 3.3VS PS8331_SW R557 *4.7K_04
THERMAL_PAD 10K_04 R547
4/13 ㍉岤天㯪忚昶䁢A2 R78 *4.7K_04
PS8331BQFN60GTR-A2
R552
L : Normal (DEFAULT) *10K_04 QFN60-5X9MM
H: Chip power down
NEAR PIN
PS8331_PD 3.3VS 3.3VS 3.3VS PS8331_CA_DET R72 1M_04
3.3VS 3.3VS
D
R573 4/13 ADD I2C 䶂嶗妋 PS8331 ⼙枧panel timing issue

*499_1%_04 G EDP_HPD C314 C302 C293 C295 C316
Q38 0.1u_10V_X7R_04 3.3VS
S
0.01u_16V_X7R_04 0.1u_10V_X7R_04 0.01u_16V_X7R_04 0.1u_10V_X7R_04

*2SK3018S3
C827 PIN21 PIN26 PIN35 PIN49 PIN60
A D02 RS PS8331_CTL_EN R1014 *4.7K_04 A
*1u_6.3V_X5R_04
R1015 *0_04
D02 RS
PS8331_IN2_PEQ#
[9,10,11,12,17,37,52] SMB_CLK_R R1016 *0_04 Title
[9,10,11,12,17,37,52] SMB_DATA_R R1017 *0_04 PS8331_IN1_PEQ# [03] Processor 2/7-DISPLAY
4/13 ADD I2C 䶂嶗妋 PS8331 ⼙枧panel timing issue 1V8_AON [18,27,28,30,31,32,59,60,61,63] Size Document Number Rev
VCCIO [2,7,56]
3.3VS [9,10,11,12,13,14,15,17,30,31,34,36,37,38,39,40,42,43,46,47,48,49,50,51,52,55,59,64,66,68,70] Custom P650RP 6-71-P65P0-D02A D03B

5 4 3 2 1
B - 4 Processor 2/7
Schematic Diagrams
Processor 3/7
5 4 3 2 1
M_A_DQ[63:0] [9,10]
?
SKYLAKE_HALO
U113B
[11,12] M_B_DQ[63:0]
?
SKYLAKE_HALO BGA1440
U113A M_B_DQ0 BT11 AM9
BGA1440
M_B_DQ1 DDR1_DQ[0]/DDR0_DQ[16] DDR1_CKP[0] M_B_CLK_DDR0 [11]
M_A_DQ0 BR11 AN9
BR6 AG1 M_B_DQ2 DDR1_DQ[1]/DDR0_DQ[17] DDR1_CKN[0] M_B_CLK_DDR#0 [11]
M_A_DQ1 DDR0_DQ[0] DDR0_CKP[0] M_A_CLK_DDR0 [9] BT8 AM8
BT6 AG2 M_B_DQ3 DDR1_DQ[2]/DDR0_DQ[18] DDR1_CKN[1] M_B_CLK_DDR#1 [11]
M_A_DQ2 DDR0_DQ[1] DDR0_CKN[0] M_A_CLK_DDR#0 [9] BR8 AM7
BP3 AK1 M_B_DQ4 DDR1_DQ[3]/DDR0_DQ[19] DDR1_CKP[1] M_B_CLK_DDR1 [11]
M_A_DQ3 DDR0_DQ[2] DDR0_CKN[1] M_A_CLK_DDR#1 [9] BP11 AM11
BR3 AK2 M_B_DQ5 DDR1_DQ[4]/DDR0_DQ[20] DDR1_CLKP[2] M_B_CLK_DDR2 [12]
M_A_DQ4 DDR0_DQ[3] DDR0_CKP[1] M_A_CLK_DDR1 [9] BN11 AM10
BN5 AL3 M_B_DQ6 DDR1_DQ[5]/DDR0_DQ[21] DDR1_CLKN[2] M_B_CLK_DDR#2 [12]
M_A_DQ5 DDR0_DQ[4] DDR0_CLKP[2] M_A_CLK_DDR2 [10] BP8 AJ10
BP6 AK3 M_B_DQ7 DDR1_DQ[6]/DDR0_DQ[22] DDR1_CLKP[3] M_B_CLK_DDR3 [12]
M_A_DQ6 DDR0_DQ[5] DDR0_CLKN[2] M_A_CLK_DDR#2 [10] BN8 AJ11
BP2 AL2 M_B_DQ8 DDR1_DQ[7]/DDR0_DQ[23] DDR1_CLKN[3] M_B_CLK_DDR#3 [12]
M_A_DQ7 DDR0_DQ[6] DDR0_CLKP[3] M_A_CLK_DDR3 [10] BL12
BN3 AL1 M_B_DQ9 DDR1_DQ[8]/DDR0_DQ[24]
D M_A_DQ8 DDR0_DQ[7] DDR0_CLKN[3] M_A_CLK_DDR#3 [10] BL11 AT8 D
BL4 M_B_DQ10 DDR1_DQ[9]/DDR0_DQ[25] DDR1_CKE[0] M_B_CKE0 [11]
M_A_DQ9 DDR0_DQ[8] BL8 AT10
BL5 AT1 M_B_DQ11 DDR1_DQ[10]/DDR0_DQ[26] DDR1_CKE[1] M_B_CKE1 [11]
M_A_DQ10 DDR0_DQ[9] DDR0_CKE[0] M_A_CKE0 [9] BJ8 AT7
BL2 AT2 M_B_DQ12 DDR1_DQ[11]/DDR0_DQ[27] DDR1_CKE[2] M_B_CKE2 [12]
M_A_DQ11 DDR0_DQ[10] DDR0_CKE[1] M_A_CKE1 [9] BJ11 AT11
BM1 AT3 M_B_DQ13 DDR1_DQ[12]/DDR0_DQ[28] DDR1_CKE[3] M_B_CKE3 [12]
M_A_DQ12 DDR0_DQ[11] DDR0_CKE[2] M_A_CKE2 [10] BJ10
BK4 AT5 M_B_DQ14 DDR1_DQ[13]/DDR0_DQ[29]
M_A_DQ13 DDR0_DQ[12] DDR0_CKE[3] M_A_CKE3 [10] BL7 AF11
BK5 M_B_DQ15 DDR1_DQ[14]/DDR0_DQ[30] DDR1_CS#[0] M_B_CS#0 [11]
M_A_DQ14 DDR0_DQ[13] BJ7 AE7
BK1 AD5 M_B_DQ16 DDR1_DQ[15]/DDR0_DQ[31] DDR1_CS#[1] M_B_CS#1 [11]
M_A_DQ15 DDR0_DQ[14] DDR0_CS#[0] M_A_CS#0 [9] BG11 AF10
BK2 AE2 M_B_DQ17 DDR1_DQ[16]/DDR0_DQ[48] DDR1_CS#[2] M_B_CS#2 [12]
M_A_DQ16 DDR0_DQ[15] DDR0_CS#[1] M_A_CS#1 [9] BG10 AE10
BG4 AD2 M_B_DQ18 DDR1_DQ[17]/DDR0_DQ[49] DDR1_CS#[3] M_B_CS#3 [12]
M_A_DQ17 DDR0_DQ[16]/DDR0_DQ[32] DDR0_CS#[2] M_A_CS#2 [10] BG8
BG5 AE5 M_B_DQ19 DDR1_DQ[18]/DDR0_DQ[50]
M_A_DQ18 DDR0_DQ[17]/DDR0_DQ[33] DDR0_CS#[3] M_A_CS#3 [10] BF8 AF7
BF4 M_B_DQ20 DDR1_DQ[19]/DDR0_DQ[51] DDR1_ODT[0] M_B_ODT0 [11]
M_A_DQ19 DDR0_DQ[18]/DDR0_DQ[34] BF11 AE8
BF5 AD3 M_B_DQ21 DDR1_DQ[20]/DDR0_DQ[52] DDR1_ODT[1] M_B_ODT1 [11]
M_A_DQ20 DDR0_DQ[19]/DDR0_DQ[35] DDR0_ODT[0] M_A_ODT0 [9] BF10 AE9
BG2 AE4 M_B_DQ22 DDR1_DQ[21]/DDR0_DQ[53] DDR1_ODT[2] M_B_ODT2 [12]
M_A_DQ21 DDR0_DQ[20]/DDR0_DQ[36] DDR0_ODT[1] M_A_ODT1 [9] BG7 AE11
BG1 AE1 M_B_DQ23 DDR1_DQ[22]/DDR0_DQ[54] DDR1_ODT[3] M_B_ODT3 [12]
M_A_DQ22 DDR0_DQ[21]/DDR0_DQ[37] DDR0_ODT[2] M_A_ODT2 [10] BF7
BF1 AD4 M_B_DQ24 DDR1_DQ[23]/DDR0_DQ[55]
M_A_DQ23 DDR0_DQ[22]/DDR0_DQ[38] DDR0_ODT[3] M_A_ODT3 [10] BB11 AH10
BF2 M_B_DQ25 DDR1_DQ[24]/DDR0_DQ[56] DDR1_RAS#/DDR1_CAB[3]/DDR1_MA[16] M_B_RAS# [11,12]
M_A_DQ24 DDR0_DQ[23]/DDR0_DQ[39] BC11 AH11
BD2 AH5 M_B_DQ26 DDR1_DQ[25]/DDR0_DQ[57] DDR1_WE#/DDR1_CAB[2]/DDR1_MA[14] M_B_W E# [11,12]
DDR0_DQ[24]/DDR0_DQ[40] DDR0_BA[0]/DDR0_CAB[4]/DDR0_BA[0] M_A_BA0 [9,10] BB8 AF8
M_A_DQ25 BD1 AH1 DDR1_DQ[26]/DDR0_DQ[58] DDR1_CAS#/DDR1_CAB[1]/DDR1_MA[15] M_B_CAS# [11,12]
DDR0_DQ[25]/DDR0_DQ[41] DDR0_BA[1]/DDR0_CAB[6]/DDR0_BA[1] M_A_BA1 [9,10] M_B_DQ27 BC8
M_A_DQ26 BC4 AU1 DDR1_DQ[27]/DDR0_DQ[59]
DDR0_DQ[26]/DDR0_DQ[42] DDR0_BA[2]/DDR0_CAA[5]/DDR0_BG[0] M_A_BG0 [9,10] M_B_DQ28 BC10 AH8
M_A_DQ27 BC5 DDR1_DQ[28]/DDR0_DQ[60] DDR1_BA[0]/DDR1_CAB[4]/DDR1_BA[0] M_B_BA0 [11,12]
DDR0_DQ[27]/DDR0_DQ[43] M_B_DQ29 BB10 AH9
M_A_DQ28 BD5 AH4 DDR1_DQ[29]/DDR0_DQ[61] DDR1_BA[1]/DDR1_CAB[6]/DDR1_BA[1] M_B_BA1 [11,12]
DDR0_DQ[28]/DDR0_DQ[44] DDR0_RAS#/DDR0_CAB[3]/DDR0_MA[16] M_A_RAS# [9,10] M_B_DQ30 BC7 AR9
M_A_DQ29 BD4 AG4 DDR1_DQ[30]/DDR0_DQ[62] DDR1_BA[2]/DDR1_CAA[5]/DDR1_BG[0] M_B_BG0 [11,12]
DDR0_DQ[29]/DDR0_DQ[45] DDR0_WE#/DDR0_CAB[2]/DDR0_MA[14] M_A_W E# [9,10] M_B_DQ31 BB7
M_A_DQ30 BC1 AD1 DDR1_DQ[31]/DDR0_DQ[63]
DDR0_DQ[30]/DDR0_DQ[46] DDR0_CAS#/DDR0_CAB[1]/DDR0_MA[15] M_A_CAS# [9,10] M_B_DQ32 AA11 AJ9
M_A_DQ31 BC2 DDR1_DQ[32]/DDR1_DQ[16] DDR1_MA[0]/DDR1_CAB[9]/DDR1_MA[0] M_B_A0 [11,12]
DDR0_DQ[31]/DDR0_DQ[47] M_B_DQ33 AA10 AK6
M_A_DQ32 AB1 AH3 DDR1_DQ[33]/DDR1_DQ[17] DDR1_MA[1]/DDR1_CAB[8]/DDR1_MA[1] M_B_A1 [11,12]
DDR0_DQ[32]/DDR1_DQ[0] DDR0_MA[0]/DDR0_CAB[9]/DDR0_MA[0] M_A_A0 [9,10] M_B_DQ34 AC11 AK5
M_A_DQ33 AB2 AP4 DDR1_DQ[34]/DDR1_DQ[18] DDR1_MA[2]/DDR1_CAB[5]/DDR1_MA[2] M_B_A2 [11,12]
DDR0_DQ[33]/DDR1_DQ[1] DDR0_MA[1]/DDR0_CAB[8]/DDR0_MA[1] M_A_A1 [9,10] M_B_DQ35 AC10 AL5
M_A_DQ34 AA4 AN4 DDR1_DQ[35]/DDR1_DQ[19] DDR1_MA[3] M_B_A3 [11,12]
DDR0_DQ[34]/DDR1_DQ[2] DDR0_MA[2]/DDR0_CAB[5]/DDR0_MA[2] M_A_A2 [9,10] M_B_DQ36 AA7 AL6
M_A_DQ35 AA5 AP5 DDR1_DQ[36]/DDR1_DQ[20] DDR1_MA[4] M_B_A4 [11,12]
DDR0_DQ[35]/DDR1_DQ[3] DDR0_MA[3] M_A_A3 [9,10] M_B_DQ37 AA8 AM6
M_A_DQ36 AB5 AP2 DDR1_DQ[37]/DDR1_DQ[21] DDR1_MA[5]/DDR1_CAA[0]/DDR1_MA[5] M_B_A5 [11,12]
C DDR0_DQ[36]/DDR1_DQ[4] DDR0_MA[4] M_A_A4 [9,10] M_B_DQ38 AC8 AN7 C
M_A_DQ37
Sheet 4 of 81
AB4 AP1 M_B_DQ39 DDR1_DQ[38]/DDR1_DQ[22] DDR1_MA[6]/DDR1_CAA[2]/DDR1_MA[6] M_B_A6 [11,12]
M_A_DQ38 DDR0_DQ[37]/DDR1_DQ[5] DDR0_MA[5]/DDR0_CAA[0]/DDR0_MA[5] M_A_A5 [9,10] AC7 AN10
AA2 AP3 M_B_DQ40 DDR1_DQ[39]/DDR1_DQ[23] DDR1_MA[7]/DDR1_CAA[4]/DDR1_MA[7] M_B_A7 [11,12]
M_A_DQ39 DDR0_DQ[38]/DDR1_DQ[6] DDR0_MA[6]/DDR0_CAA[2]/DDR0_MA[6] M_A_A6 [9,10] W8 AN8
AA1 AN1 M_B_DQ41 DDR1_DQ[40]/DDR1_DQ[24] DDR1_MA[8]/DDR1_CAA[3]/DDR1_MA[8] M_B_A8 [11,12]
M_A_DQ40 DDR0_DQ[39]/DDR1_DQ[7] DDR0_MA[7]/DDR0_CAA[4]/DDR0_MA[7] M_A_A7 [9,10] W7 AR11
V5 AN3 M_B_DQ42 DDR1_DQ[41]/DDR1_DQ[25] DDR1_MA[9]/DDR1_CAA[1]/DDR1_MA[9] M_B_A9 [11,12]
DDR0_DQ[40]/DDR1_DQ[8] DDR0_MA[8]/DDR0_CAA[3]/DDR0_MA[8] M_A_A8 [9,10] V10 AH7
Processor 3/7
M_A_DQ41 V2 AT4 DDR1_DQ[42]/DDR1_DQ[26] DDR1_MA[10]/DDR1_CAB[7]/DDR1_MA[10] M_B_A10 [11,12]
DDR0_DQ[41]/DDR1_DQ[9] DDR0_MA[9]/DDR0_CAA[1]/DDR0_MA[9] M_A_A9 [9,10] M_B_DQ43 V11 AN11
M_A_DQ42 U1 AH2 DDR1_DQ[43]/DDR1_DQ[27] DDR1_MA[11]/DDR1_CAA[7]/DDR1_MA[11] M_B_A11 [11,12]
DDR0_DQ[42]/DDR1_DQ[10] DDR0_MA[10]/DDR0_CAB[7]/DDR0_MA[10] M_A_A10 [9,10] M_B_DQ44 W11 AR10
M_A_DQ43 U2 AN2 DDR1_DQ[44]/DDR1_DQ[28] DDR1_MA[12]/DDR1_CAA[6]/DDR1_MA[12] M_B_A12 [11,12]
DDR0_DQ[43]/DDR1_DQ[11] DDR0_MA[11]/DDR0_CAA[7]/DDR0_MA[11] M_A_A11 [9,10] M_B_DQ45 W10 AF9
M_A_DQ44 V1 AU4 DDR1_DQ[45]/DDR1_DQ[29] DDR1_MA[13]/DDR1_CAB[0]/DDR1_MA[13] M_B_A13 [11,12]
DDR0_DQ[44]/DDR1_DQ[12] DDR0_MA[12]/DDR0_CAA[6]/DDR0_MA[12] M_A_A12 [9,10] M_B_DQ46 V7 AR7
M_A_DQ45 V4 AE3 DDR1_DQ[46]/DDR1_DQ[30] DDR1_MA[14]/DDR1_CAA[9]/DDR1_BG[1] M_B_BG1 [11,12]
DDR0_DQ[45]/DDR1_DQ[13] DDR0_MA[13]/DDR0_CAB[0]/DDR0_MA[13] M_A_A13 [9,10] M_B_DQ47 V8 AT9
M_A_DQ46 U5 AU2 DDR1_DQ[47]/DDR1_DQ[31] DDR1_MA[15]/DDR1_CAA[8]/DDR1_ACT# M_B_ACT# [11,12]
DDR0_DQ[46]/DDR1_DQ[14] DDR0_MA[14]/DDR0_CAA[9]/DDR0_BG[1] M_A_BG1 [9,10] M_B_DQ48 R11
M_A_DQ47 U4 AU3 DDR1_DQ[48]
DDR0_DQ[47]/DDR1_DQ[15] DDR0_MA[15]/DDR0_CAA[8]/DDR0_ACT# M_A_ACT# [9,10] M_B_DQ49 P11 AJ7
M_A_DQ48 R2 DDR1_DQ[49] DDR1_PAR DDR1_B_PARITY [11,12]
DDR0_DQ[48]/DDR1_DQ[32] M_B_DQ50 P7 AR8
M_A_DQ49 P5 AG3 DDR1_DQ[50] DDR1_ALERT# DDR1_B_ALERT# [11,12]
DDR0_DQ[49]/DDR1_DQ[33] DDR0_PAR DDR0_A_PARITY [9,10] M_B_DQ51 R8
M_A_DQ50 R4 AU5 DDR1_DQ[51]
DDR0_DQ[50]/DDR1_DQ[34] DDR0_ALERT# DDR0_A_ALERT# [9,10] M_B_DQ52 R10
M_A_DQ51 P4 DDR1_DQ[52] M_B_DQS#[3:0] [11,12]
DDR0_DQ[51]/DDR1_DQ[35] M_B_DQ53 P10 BP9 M_B_DQS#0
M_A_DQ52 R5 DDR1_DQ[53] DDR1_DQSN[0]/DDR0_DQSN[2]
DDR0_DQ[52]/DDR1_DQ[36] M_A_DQS#[3:0] [9,10] M_B_DQ54 R7 BL9 M_B_DQS#1
M_A_DQ53 P2 BR5 M_A_DQS#0 DDR1_DQ[54] DDR1_DQSN[1]/DDR0_DQSN[3]
DDR0_DQ[53]/DDR1_DQ[37] DDR0_DQSN[0] M_B_DQ55 P8 BG9 M_B_DQS#2
M_A_DQ54 R1 BL3 M_A_DQS#1 DDR1_DQ[55] DDR1_DQSN[2]/DDR0_DQSN[6]
DDR0_DQ[54]/DDR1_DQ[38] DDR0_DQSN[1] M_B_DQ56 L11 BC9 M_B_DQS#3
M_A_DQ55 P1 BG3 M_A_DQS#2 DDR1_DQ[56] DDR1_DQSN[3]/DDR0_DQSN[7] M_B_DQS#[7:4] [11,12]
DDR0_DQ[55]/DDR1_DQ[39] DDR0_DQSN[2]/DDR0_DQSN[4] M_B_DQ57 M11 AC9 M_B_DQS#4
M_A_DQ56 M4 BD3 M_A_DQS#3 DDR1_DQ[57] DDR1_DQSN[4]/DDR1_DQSN[2]
DDR0_DQ[56]/DDR1_DQ[40] DDR0_DQSN[3]/DDR0_DQSN[5] M_A_DQS[7:4] [9,10] M_B_DQ58 L7 W9 M_B_DQS#5
M_A_DQ57 M1 AB3 M_A_DQS4 DDR1_DQ[58] DDR1_DQSN[5]/DDR1_DQSN[3]
DDR0_DQ[57]/DDR1_DQ[41] DDR0_DQSP[4]/DDR1_DQSP[0] M_B_DQ59 M8 R9 M_B_DQS#6
M_A_DQ58 L4 V3 M_A_DQS5 DDR1_DQ[59] DDR1_DQSN[6]
DDR0_DQ[58]/DDR1_DQ[42] DDR0_DQSP[5]/DDR1_DQSP[1] M_B_DQ60 L10 M9 M_B_DQS#7
M_A_DQ59 L2 R3 M_A_DQS6 DDR1_DQ[60] DDR1_DQSN[7]
DDR0_DQ[59]/DDR1_DQ[43] DDR0_DQSP[6]/DDR1_DQSP[4] M_B_DQ61 M10
M_A_DQ60 M5 M3 M_A_DQS7 DDR1_DQ[61] M_B_DQS[3:0] [11,12]
DDR0_DQ[60]/DDR1_DQ[44] DDR0_DQSP[7]/DDR1_DQSP[5] M_B_DQ62 M7 BR9 M_B_DQS0
M_A_DQ61 M2 DDR1_DQ[62] DDR1_DQSP[0]/DDR0_DQSP[2]
DDR0_DQ[61]/DDR1_DQ[45] M_A_DQS[3:0] [9,10] M_B_DQ63 L8 BJ9 M_B_DQS1
M_A_DQ62 L5 BP5 M_A_DQS0 DDR1_DQ[63] DDR1_DQSP[1]/DDR0_DQSP[3]
DDR0_DQ[62]/DDR1_DQ[46] DDR0_DQSP[0] BF9 M_B_DQS2
M_A_DQ63 L1 BK3 M_A_DQS1 DDR1_DQSP[2]/DDR0_DQSP[6]
DDR0_DQ[63]/DDR1_DQ[47] DDR0_DQSP[1] M_B_CB0 AW11 BB9 M_B_DQS3
BF3 M_A_DQS2 DDR1_ECC[0] DDR1_DQSP[3]/DDR0_DQSP[7] M_B_DQS[7:4] [11,12]
DDR0_DQSP[2]/DDR0_DQSP[4] M_B_CB1 AY11 AA9 M_B_DQS4
B M_A_CB0 BA2 BC3 M_A_DQS3 DDR1_ECC[1] DDR1_DQSP[4]/DDR1_DQSP[2] B
DDR0_ECC[0] DDR0_DQSP[3]/DDR0_DQSP[5] M_A_DQS#[7:4] [9,10] M_B_CB2 AY8 V9 M_B_DQS5
M_A_CB1 BA1 AA3 M_A_DQS#4 DDR1_ECC[2] DDR1_DQSP[5]/DDR1_DQSP[3]
DDR0_ECC[1] DDR0_DQSN[4]/DDR1_DQSN[0] M_B_CB3 AW8 P9 M_B_DQS6
M_A_CB2 AY4 U3 M_A_DQS#5 DDR1_ECC[3] DDR1_DQSP[6]
DDR0_ECC[2] DDR0_DQSN[5]/DDR1_DQSN[1] M_B_CB4 AY10 L9 M_B_DQS7
M_A_CB3 AY5 P3 M_A_DQS#6 DDR1_ECC[4] DDR1_DQSP[7]
DDR0_ECC[3] DDR0_DQSN[6]/DDR1_DQSN[4] M_B_CB5 AW10
M_A_CB4 BA5 L3 M_A_DQS#7 DDR1_ECC[5]
DDR0_ECC[4] DDR0_DQSN[7]/DDR1_DQSN[5] M_B_CB6 AY7 AW9
M_A_CB5 BA4 DDR1_ECC[6] DDR1_DQSP[8]
DDR0_ECC[5] M_B_CB7 AW7 AY9
M_A_CB6 AY1 AY3 DDR1_ECC[7] DDR1_DQSN[8]
M_A_CB7 AY2 DDR0_ECC[6] DDR0_DQSP[8] BA3
DDR0_ECC[7] DDR0_DQSN[8]
DDR CHANNEL B
CLOSE TO CPU
R678 121_1%_04 DDR_RCOMP0 G1 BN13
DDR_RCOMP1 H1 DDR_RCOMP[0] DDR_VREF_CA DIMM_CA_CPU_VREF_A [9]
DDR CHANNEL A R687 75_1%_04 BP13 DIMM_DQ_CPU_VREF_A
R696 100_1%_04 DDR_RCOMP2 J2 DDR_RCOMP[1] DDR0_VREF_DQ BR13
DDR_RCOMP[2] 2 OF 14 DDR1_VREF_DQ DIMM_DQ_CPU_VREF_B [11]
1 OF 14 REV = 1
SKL_H_BGA_BGA
?
REV = 1
SKL_H_BGA_BGA
?
A A
Title
[04] Processor 3/7-DDR3L
A3 P650RP 6-71-P65P0-D02A D03B

5 4 3 2 1
Processor 3/7 B - 5
Schematic Diagrams
Processor 4/7
5 4 3 2 1
NEAR CPU Ʉ CFG[0]: Stall reset sequence after PCU

PLL lock until de-asserted:
1.0V_VCCST — 1 = (Default) Normal Operation;
No stall.
— 0 = Stall.
U113E
?
SKYLAKE_HALO Ʉ CFG[1]: Reserved configuration lane.
Ʉ CFG[2]: PCI Express* Static x16 Lane
BGA1440 Numbering Reversal.
R352 R357 [39] PCH_CPU_BCLK_R_DP B31 BN25 CFG0 R353 *1K_04
A32 BCLKP CFG[0] BN27 CFG1 R935 *1K_04 — 1 = Normal operation
100_04 56.2_1%_04 [39] PCH_CPU_BCLK_R_DN BCLKN CFG[1] BN26 CFG2 R355 *1K_04 — 0 = Lane numbers reversed.
CFG[2]
D [39] PCH_CPU_PCIBCLK_R_DP D35
PCI_BCLKP CFG[3]
BN28 CFG3 R936 *1K_04 Ʉ CFG[3]: Reserved configuration lane. D
[39] PCH_CPU_PCIBCLK_R_DN C36
PCI_BCLKN CFG[4]
BR20 CFG4 R946 1K_04 Ʉ CFG[4]: eDP enable:
BM20 CFG5 R356 *1K_04 — 1 = Disabled.
[64,66] H_CPU_SVIDDAT CFG[5]
[39] CPU_24MHZ_R_DP E31 BT20 CFG6 R944 *1K_04 — 0 = Enabled.
[64,66] H_CPU_SVIDALRT# CLK24P CFG[6]
D31 BP20 CFG7 R934 *1K_04
[64,66] H_CPU_SVIDCLK [39] CPU_24MHZ_R_DN CLK24N CFG[7] BR23
Ʉ CFG[6:5]: PCI Express* Bifurcation
R354 CFG[8] BR22
— 00 = 1 x8, 2 x4 PCI Express*
CFG[9] BT23 — 01 = reserved
220_04 CFG[10] — 10 = 2 x8 PCI Express*
BT22
CFG[11] BM19 — 11 = 1 x16 PCI Express*
CFG[12] BR19 Ʉ CFG[7]: PEG Training:
CFG[13] BP19 — 1 = (default) PEG Train
CPU_VIDALERT_N BH31 CFG[14] BT19
VIDALERT# CFG[15]
immediately following RESET# de
BH32 assertion.
BH29 VIDSCK BN23
VIDSOUT CFG[17] — 0 = PEG Wait for BIOS for
H_PROCHOT# R937 499_1%_04 H_PROCHOT#_R BR30 BP23
[57,64,66] H_PROCHOT# PROCHOT# CFG[16] training.
BP22
Ʉ CFG[19:8]: Reserved configuration
BT13 CFG[19] BN22

[53] DDR_VTT_PG_CTRL DDR_VTT_CNTL CFG[18] lanes.
BR27 SKL_XDP_MBP_0
BPM#[0] BT27 SKL_XDP_MBP_1
BPM#[1] BM31 SKL_MBP_2
VCCST_PW RGD R164 60.4_1%_04 VCCST_PW RGD_CPU H13 BPM#[2] BT30 SKL_MBP_3
VCCST_PWRGD BPM#[3]
[37] H_PW RGD BT31

PROCPWRGD H_TDO
Sheet 5 of 81 [36] PLTRST_CPU_N BP35 BT28

BM34 RESET# PROC_TDO BL32
[36] H_PM_SYNC PM_SYNC PROC_TDI 1.0V_VCCST
R938 20_1%_04 H_PM_DOW N_R BP31 BP28
[36] H_PM_DOW N H_PECI_R PM_DOWN PROC_TMS H_TCK
R128 *12.1_1%_04 BT34 BR28
[36] PCH_PECI PECI PROC_TCK
Processor 4/7 C R933 *0402_short J31 H_TDO R948 51_04 C

TO EC [43] H_PECI THERMTRIP# BP30 H_TRST#
[36] PCH_THERMTRIP# PROC_TRST# H_TRST# [42]
H_SKTOCC_N BR33 BL30 H_PREQ# H_TCK R374 51_04
[38] H_SKTOCC_N SKTOCC# PROC_PREQ# H_PREQ# [42]
R930 *0_04 BN1 BP27 H_PRDY#
PROC_SELECT# PROC_PRDY# H_PRDY# [42]
FLOAT FOR SKL BM30
GND FOR CNL CATERR# BT25 CFG_RCOMP
CFG_RCOMP 3.3VA
H_SKTOCC_N R939 100K_04

5 OF 14 R947
SKL_H_BGA_BGA REV = 1 49.9_1%_04

?
VCCST_PWRGD 1.0V_VCCST
VDD3 R169
PCI EXPRESS STATIC LANE REVERSAL FOR ALL PEG PORTS
1K_04
VCCST_PW RGD
1: (DEFAULT)NORMAL OPERATION;
R151
LANE# DEFINITION MATCHES
100K_04 CFG2 SOCKET PIN MAP DEFINITION
3
D 0: LANE REVERSAL
B C391 B
5 G *0.01u_16V_X7R_04
S Q11B
4
MTDK3S6R DISPLAY PORT PRESENCE STRAP
6
D
1: DISABLED;
R167 0_04 2 G
[13,42,43,64,66] ALL_SYS_PW RGD S Q11A NO PHYSICAL DISPLAY PORT ATTACHED
1
MTDK3S6R TO EMBEDDED DISPLAY PORT

C386
0: ENABLED;
*0.1u_10V_X7R_04 AN EXTERNAL DISPLAY PORT DEVICE
CFG4 IS CONNECTED TO THE EMBEDDED
DISPLAY PORT
PCIE PORT BIFURCATION STRAPS
11: (Default) x16 - Device 1 functions 1 and 2 disabled

10: x8, x8 - Device 1 function 1 enabled ; function 2 disabled
1.0DX_VCCSTG CFG[6:5] 01: Reserved - (Device 1 function 1 disabled ; function 2 enabled)
00: x8,x4,x4 - Device 1 functions 1 and 2 enabled
H_PROCHOT# R379 1K_04
DEFENSIVE PULL DOWN SITE

D
Q23
A G C643 1: (Default) PEG Train immediately following xxRESETB de assertion A

[43] H_PROCHOT_EC
2SK3018S3 CFG7 0: PEG Wait for BIOS for training
S
47P_50V_NPO_04
R386
100K_04 3.3VA [34,35,36,37,38,40,42,55] Title
CAD Note: Capacitor need to be placed
[05]Processor 4/7-CLK/JTAG/MISC
1.0DX_VCCSTG [7,57,58]
close to buffer output pin 1.0V_VCCST [7,36,37,56,64,66] Size Document Number Rev
VDD3 [30,34,37,40,42,43,46,49,51,54,55,56,57,58,59,60,61,62,63,68]
VCCIO [2,3,7,56]
A3 P650RP 6-71-P65P0-D02A D03B

5 4 3 2 1
B - 6 Processor 4/7
Schematic Diagrams
Processor 5/7
5 4 3 2 1
VCORE VCORE
PLACE CAPS AT BOARD EDGE

?
VCORE
CPU_TOP_VCCCORE U113GSKYLAKE_HALO
?
SKYLAKE_HALO
U113J
BGA1440
BGA1440
AA13 V32
C529 C528 AA31 VCC VCC V33 BJ17
C458 AA32 VCC VCC V34 BJ19 VCCOPC
VCC VCC VCCOPC
22u_6.3V_X5R_06
22u_6.3V_X5R_06
+ AA33 V35 BJ20
AA34 VCC VCC V36 BK17 VCCOPC
VCC VCC VCCOPC
EEFCX0J221YR
AA35 V37 BK19
AA36 VCC VCC V38 BK20 VCCOPC
D VCORE D
AA37 VCC VCC W13 BL16 VCCOPC
AA38 VCC VCC W14 BL17 VCCOPC
AB29 VCC VCC W29 BL18 VCCOPC
C1152 C1153 C1075 C1151 C1074 C1149 C1150 C527 AB31 VCC VCC W31 BL20 VCCOPC
VCC VCC VCCOPC
22u_6.3V_X5R_06
22u_6.3V_X5R_06
22u_6.3V_X5R_06
22u_6.3V_X5R_06
*22u_6.3V_X5R_06
*22u_6.3V_X5R_06
*22u_6.3V_X5R_06
*22u_6.3V_X5R_06
AB35 W35 BM17
AB36 VCC VCC W36 BN17 VCCOPC
AB37 VCC VCC W37 VCCOPC
AB38 VCC VCC W38 BJ23
AC13 VCC VCC Y29 BJ26 RSVD
AC14 VCC VCC Y30 BJ27 RSVD
AC29 VCC VCC Y31 BK23 RSVD
PLACE CAPS AT BACK AC32 VCC VCC Y34 BL23 RSVD
VCORE AC33 VCC VCC Y35 BL24 RSVD
CPU_BACK_VCCCORE AC34 VCC VCC Y36 BL25 RSVD
AC35 VCC VCC L14 BL26 RSVD
AC36 VCC VCC P29 BL27 RSVD
AD13 VCC VCC P30 BL28 RSVD
C1091 C1147 C1148 C1067 C484 C487 C503 C515 C502 C1090 C1146 C1089 VCC VCC RSVD
AD14 P31 BM24
AD31 VCC VCC P32 RSVD
10u_6.3V_X5R_06
10u_6.3V_X5R_06
10u_6.3V_X5R_06
10u_6.3V_X5R_06
10u_6.3V_X5R_06
10u_6.3V_X5R_06
10u_6.3V_X5R_06
*10u_6.3V_X5R_06
*10u_6.3V_X5R_06
*10u_6.3V_X5R_06
*10u_6.3V_X5R_06
*10u_6.3V_X5R_06
AD32 VCC VCC P33
AD33 VCC VCC P34 BL15
VCC VCC VCCOPC_SENSE
Sheet 6 of 81
AD34 P35 BM16
AD35 VCC VCC P36 VSSOPC_SENSE
AD36 VCC VCC R13 BL22
C AD37 VCC VCC R31 BM22 RSVD C
AD38 VCC VCC R32 RSVD
AE13
AE14
AE30
VCC
VCC
VCC
VCC
VCC
VCC
R33
R34
R35
BP15
BR15 VCCEOPIO
Processor 5/7
AE31 VCC VCC R36 BT15 VCCEOPIO
AE32 VCC VCC R37 VCCEOPIO
AE35 VCC VCC R38 BP16
AE36 VCC VCC T29 BR16 RSVD
AE37 VCC VCC T30 BT16 RSVD
AE38 VCC VCC T31 RSVD
AF35 VCC VCC T32
AF36 VCC VCC T35 BN15
AF37 VCC VCC T36 BM15 VCCEOPIO_SENSE
AF38 VCC VCC T37 VSSEOPIO_SENSE
K13 VCC VCC T38 BP17
K14 VCC VCC U29 BN16 RSVD
L13 VCC VCC U30 RSVD
N13 VCC VCC U31
N14 VCC VCC U32 BM14
N30 VCC VCC U33 BL14 VCC_OPC_1P8
N31 VCC VCC U34 VCC_OPC_1P8
N32 VCC VCC U35 BJ35
N35 VCC VCC U36 BJ36 RSVD
VCORE VCC VCC RSVD
N36 V13
N37 VCC VCC V14
N38 VCC VCC V31 AT13
P13 VCC VCC P14 AW13 ZVM#
VCC VCC MSM#
B AU13 B
AY13 ZVM2#
C1093 C1073 C493 C480 C506 C481 C464 C508 C471 C465 C511 C512 C495 C1072 C478 MSM2#
AG37
VCC_SENSE VCC_VCORE_SENSE [64]
AG38 BT29
1u_6.3V_X5R_04
1u_6.3V_X5R_04
1u_6.3V_X5R_04
1u_6.3V_X5R_04
1u_6.3V_X5R_04
1u_6.3V_X5R_04
1u_6.3V_X5R_04
1u_6.3V_X5R_04
1u_6.3V_X5R_04
1u_6.3V_X5R_04
1u_6.3V_X5R_04
1u_6.3V_X5R_04
1u_6.3V_X5R_04
1u_6.3V_X5R_04
1u_6.3V_X5R_04
VSS_SENSE VSS_VCORE_SENSE [64] OPC_RCOMP

BR25
BP25 OPCE_RCOMP
7 OF 14 OPCE_RCOMP2
10 OF 14
SKL_H_BGA_BGA REV = 1 ?
SKL_H_BGA_BGA
REV = 1 ?
VCC_VCORE_SENSE R919 VSS_VCORE_SENSE

*49.9_1%_04
C494 C483 C505 C469 C513 C510 C514 C509 C489 C507 C470 C474 C479 C459 C467
*1u_6.3V_X5R_04
*1u_6.3V_X5R_04
*1u_6.3V_X5R_04
*1u_6.3V_X5R_04
*1u_6.3V_X5R_04
*1u_6.3V_X5R_04
*1u_6.3V_X5R_04
*1u_6.3V_X5R_04
*1u_6.3V_X5R_04
*1u_6.3V_X5R_04
*1u_6.3V_X5R_04
*1u_6.3V_X5R_04
*1u_6.3V_X5R_04
*1u_6.3V_X5R_04
*1u_6.3V_X5R_04
A A
VCORE [64,65]
Title
[06] Processor 5/7-POWER1
A3 P650RP 6-71-P65P0-D02A D03B

5 4 3 2 1
Processor 5/7 B - 7
Schematic Diagrams
Processor 6/7
5 4 3 2 1
PLACE CAP BACKSIDE

VCCSA VDDQ
VCCVDDQ_CLK 1.0V_VCCSFR 1.0V_VCCST
?
SKYLAKE_HALO
U113I C488 C461 C462
BGA1440
1u_6.3V_X5R_04
1u_6.3V_X5R_04
10u_6.3V_X5R_06
J30 AA6
VCCSA VDDQ ?
SKYLAKE_HALO
K29 AE12 U113K
K30 VCCSA VDDQ AF5
K31 VCCSA VDDQ AF6
BGA1440
K32 VCCSA VDDQ AG5 D1 BM33

D K33 VCCSA VDDQ AG9 E1 RSVD_TP RSVD_TP BL33 D
K34 VCCSA VDDQ AJ12 E3 RSVD_TP RSVD_TP
K35 VCCSA VDDQ AL11 E2 RSVD_TP BJ14
L31 VCCSA VDDQ AP6 RSVD_TP RSVD_TP BJ13
L32 VCCSA VDDQ AP7 BR1 RSVD_TP
L35 VCCSA VDDQ AR12 BT2 RSVD_TP BK28
VCCSA VDDQ 1.0DX_VCCSTG VCCSFR_OC RSVD_TP RSVD
L36 AR6 BJ28
L37 VCCSA VDDQ AT12 BN35 RSVD
L38 VCCSA VDDQ AW6 RSVD BJ18
VCCSA VDDQ C457 C473 C601 C597 VSS
M29 AY6 J24
M30 VCCSA VDDQ J5 H24 RSVD BJ16
1u_6.3V_X5R_04
1u_6.3V_X5R_04
1u_6.3V_X5R_04
*1u_6.3V_X5R_04
M31 VCCSA VDDQ J6 BN33 RSVD RSVD_TP BK16
M32 VCCSA VDDQ K12 BL34 RSVD RSVD_TP
M33 VCCSA VDDQ K6 RSVD
M34 VCCSA VDDQ L12 N29 BK24
M35 VCCSA VDDQ L6 R14 RSVD RSVD_TP BJ24
VCCIO VCCSA VDDQ RSVD RSVD_TP
M36 R6 AE29
VCCSA VDDQ T6 AA14 RSVD BK21
VDDQ W6 VCCVDDQ_CLK RSVD RSVD BJ21
AG12 VDDQ R665 *0402_short A36 RSVD
VCCIO VCCSFR_OC RSVD
G15 Y12 A37 BT17
G17 VCCIO VDDQC RSVD RSVD BR17
G19 VCCIO BH13 H23 RSVD
VCCIO VCCPLL_OC [42] PCH_2_CPU_TRIGGER PROC_TRIGIN
G21 G11 R168 30.1_1%_04 CPU_2_PCH_TRIGGER_R J23 BK18
Sheet 7 of 81 H15
H16
H17
VCCIO
VCCIO
VCCIO
VCCPLL_OC
H30
1.0V_VCCST
1.0DX_VCCSTG VCCFUSEPRG
[42] CPU_2_PCH_TRIGGER
F30
E30
PROC_TRIGOUT
RSVD
VSS
RSVD_TP
BJ34
BJ33
H19 VCCIO VCCST RSVD RSVD_TP
Processor 6/ C
H20
H21
H26
VCCIO
VCCIO
VCCIO
VCCSTG
H29
G30
R249
NEAR TO CPU PIN
*28mil short-p
1.0V_VCCSFR
B30
C30 RSVD
RSVD G13
C
H27 VCCIO VCCSTG G3 RSVD AJ8

J15 VCCIO H28 VCCIO J3 RSVD RSVD BL31
J16 VCCIO VCCPLL J28 RSVD RSVD
J17 VCCIO VCCPLL AROUND_CPU B2
VCCIO R229 NCTF
J19 B38
J20 VCCIO M38 NCTF BP1
VCCIO VCCSA_SENSE VCCSA_SENSE [64] 100_1%_04 VCCVDDQ_CLK VDDQ NCTF
J21 M37 BR35 BR2
VCCIO VSSSA_SENSE VSS_SA_SENSE [64] RSVD NCTF
J26 BR31 C1
J27 VCCIO H14 VCCIO_SENSE BH30 RSVD NCTF C38
VCCIO VCCIO_SENSE J14 VSS_IO_SENSE RSVD NCTF
VSSIO_SENSE R258 *28mil short-p 11 OF 14
R165
SKL_H_BGA_BGA
REV = 1 ?
100_1%_04
9 OF 14
SKL_H_BGA_BGA REV = 1 ? PLACE CAP IN BOARD EDGE PLACE CAP IN BACK SIDE
CPU_TOP_VCCSA VCCSA VCCSA CPU_BACK_VCCSA VCCSA
PLACE CAP BACKSIDE VCCSA VCCSA

VDDQ VDDQ VCCIO C1000 C401 C1065
C1068 C1034 C1011 C1002 C1012 C1069 C1013 C1033 C1066 C1032
*22u_6.3V_X5R_06
*22u_6.3V_X5R_06
*22u_6.3V_X5R_06
B B
1u_6.3V_X5R_04
1u_6.3V_X5R_04
10u_6.3V_X5R_06
10u_6.3V_X5R_06
10u_6.3V_X5R_06
10u_6.3V_X5R_06
*1u_6.3V_X5R_04
*10u_6.3V_X5R_06
*10u_6.3V_X5R_06
*10u_6.3V_X5R_06
C1001 C982
C556 C468 C522 C589 C538 C557 C519 C580 C492 C526 C463 C541 C501 C573 C466 C532 C460
22u_6.3V_X5R_06
*22u_6.3V_X5R_06
C445
+
10u_6.3V_X5R_06
10u_6.3V_X5R_06
10u_6.3V_X5R_06
10u_6.3V_X5R_06
10u_6.3V_X5R_06
22u_6.3V_X5R_06
22u_6.3V_X5R_06
10u_6.3V_X5R_06
10u_6.3V_X5R_06
*10u_6.3V_X5R_06
*10u_6.3V_X5R_06
*10u_6.3V_X5R_06
*10u_6.3V_X5R_06
*10u_6.3V_X5R_06
*22u_6.3V_X5R_06
*22u_6.3V_X5R_06
*10u_6.3V_X5R_06
220u_6.3V_SMD-D
*EEFCX0J221YR
[9,10,11,12,37,53,58] VDDQ
[2,3,56] VCCIO
[64,65] VCCSA
[5,57,58] 1.0DX_VCCSTG
[58] VCCSFR_OC
[56] 1.0V_VCCSFR
[5,36,37,56,64,66] 1.0V_VCCST
A A
Title
[07] Processor 6/7-POWER2
A3 P650RP 6-71-P65P0-D02A D03B

5 4 3 2 1
B - 8 Processor 6/7
Schematic Diagrams
Processor 7/7
5 4 3 2 1
VCCGT ?
U113MSKYLAKE_HALO +VCCGTU
VCCGT VCCGT SKYLAKE_HALO
? BGA1440 U113N
? SKYLAKE_HALO BB4 AK30 BGA1440
U113L VSS VSS ?
U113FSKYLAKE_HALO BB3 AK29 U113HSKYLAKE_HALO AJ29
BGA1440 BB2 VSS VSS AK4
AJ30 VCCGT
Y38
BGA1440
K1 C17 C25 BB1 VSS VSS AJ38 BG34 BGA1440 AF29
AV29 AJ31 VCCGT
Y37 VSS VSS J36 C13 VSS VSS C23 BA38 VSS VSS AJ37 BG35 VCCGT VCCGTX AF30
VCCGT AV30 AJ32 VCCGT
Y14 VSS VSS J33 C9 VSS VSS C21 BA37 VSS VSS AJ6 BG36 VCCGT VCCGTX AF31
Y13 VSS VSS J32 BT32 VSS VSS C19 BA12 VSS VSS AJ5 BH33 VCCGT VCCGTX AF32
Y9 VSS VSS J18 BT21 VSS VSS C8 BA9 VSS VSS AJ2 BH36 VCCGT VCCGTX AG13
VCCGT AV35 AK31 VCCGT
Y8 VSS VSS J10 BT18 VSS VSS C5 BA8 VSS VSS AJ1 BH37 VCCGT VCCGTX AG14
VCCGT AV36 AK32 VCCGT
Y7 VSS VSS J7 BT14 VSS VSS BM29 BA7 VSS VSS AH34 BH38 VCCGT VCCGTX AG31
VCCGT AW14 AK33 VCCGT
W34 VSS VSS J4 BT12 VSS VSS BM25 BA6 VSS VSS AH33 BJ37 VCCGT VCCGTX AG32
W33 VSS VSS H35 BT9 VSS VSS BM18 B9 VSS ? VSS AH12 BJ38 VCCGT VCCGTX AG33
W12 VSS VSS H32 BT5 VSS VSS BM11 AY34 VSS VSS AH6 BL36 VCCGT VCCGTX AG34
W5 VSS VSS H25 BR36 VSS VSS BM8 AY33 VSS VSS AG30 BL37 VCCGT VCCGTX AG35
D VCCGT AW34 AK37 VCCGT D
W4 VSS VSS H22 BR34 VSS VSS BM7 AY14 VSS VSS AG29 BM36 VCCGT VCCGTX AG36
W3 VSS VSS H18 BR29 VSS VSS BM5 AY12 VSS VSS AG11 BM37 VCCGT VCCGTX AH13
VCCGT AW36 AL13 VCCGT
W2 VSS VSS H12 BR26 VSS VSS BM3 AW30 VSS VSS AG10 BN36 VCCGT VCCGTX AH14
W1 VSS VSS H11 BR24 VSS VSS BL38 AW29 VSS VSS AG8 BN37 VCCGT VCCGTX AH29
V30 VSS VSS G28 BR21 VSS VSS BL35 AW12 VSS VSS AG7 BN38 VCCGT VCCGTX AH30
VCCGT AY29 AL31 VCCGT
V29 VSS VSS G26 BR18 VSS VSS BL13 AW5 VSS VSS AG6 BP37 VCCGT VCCGTX AH31
V12 VSS VSS G24 BR14 VSS VSS BL6 AW4 VSS VSS AF14 BP38 VCCGT VCCGTX AH32
V6 VSS VSS G23 BR12 VSS VSS BK25 AW3 VSS VSS AF13 BR37 VCCGT VCCGTX AJ13
U38 VSS VSS G22 BR7 VSS VSS BK22 AW2 VSS VSS AF12 BT37 VCCGT VCCGTX AJ14
U37 VSS VSS G20 BP34 VSS VSS BK13 AW1 VSS VSS AF4 BE38 VCCGT VCCGTX
U6 VSS VSS G18 BP33 VSS VSS BK6 AV38 VSS VSS AF3 BF13 VCCGT
VCCGT AY37 AM13 VCCGT
T34 VSS VSS G16 BP29 VSS VSS BJ30 AV37 VSS VSS AF2 BF14 VCCGT
VCCGT AY38 AM14 VCCGT
T33 VSS VSS G14 BP26 VSS VSS BJ29 AU34 VSS VSS AF1 BF29 VCCGT
VCCGT BA13 AM29 VCCGT
T14 VSS VSS G12 BP24 VSS VSS BJ15 AU33 VSS VSS AE34 BF30 VCCGT
T13 VSS VSS G10 BP21 VSS VSS BJ12 AU12 VSS VSS AE33 BF31 VCCGT
T12 VSS VSS G9 BP18 VSS VSS BH11 AU11 VSS VSS AE6 BF32 VCCGT
VSS VSS VSS VSS VSS VSS VCCGT
T11 G8 BP14 BH10 AU10 AD30 BF35 VCCGT VCCGT
VSS VSS VSS VSS VSS VSS VCCGT BA31 AM33
T8 G4 BN34 BH3 AU7 AD11 BF38 VCCGT VCCGT
T7 F36 BN31 BH2 AU6 AD10 BG29 VCCGT VCCGT
VSS VSS VSS VSS VSS VSS VCCGT BA35 AN13
T5 F31 BN30 BG37 AT30 AD9 BG30 VCCGT VCCGT
VSS VSS VSS VSS VSS VSS VCCGT BA36 AN14
VSS VSS VSS VSS VSS VSS VCCGT BB13 AN31
T2 F25 BN21 BF34 AR38 AD6 BG33 VCCGT VCCGT
T1 F23 BN20 BF6 AR37 AC38 BC36 VCCGT VCCGT
R30 F21 BN19 BE30 AR14 AC37 BC37 VCCGT VCCGT
Sheet 8 of 81
R29 F19 BN18 BE5 AR13 AC12 BC38 VCCGT VCCGT
R12 F17 BN14 BE4 AR5 AC6 BD13 VCCGT VCCGT
P38 F15 BN12 BE3 AR4 AC5 BD14 VCCGT VCCGT
VSS VSS VSS VSS VSS VSS VCCGT BB37 AP13
Processor 7/7
VSS VSS VSS VSS VSS VSS VCCGT BB38 AP14
P6 F9 BN4 BD38 AR1 AC2 BD31 VCCGT VCCGT
VSS VSS VSS VSS VSS VSS VCCGT BC29 AP29
N34 F8 BN2 BD37 AP34 AC1 BD32 VCCGT VCCGT
N33 F5 BM38 BD12 AP33 AB34 BD33 VCCGT VCCGT
C VSS VSS VSS VSS VSS VSS VCCGT BC35 AP35 C
N10 F2 BM27 BD8 AP10 AA30 BD36 VCCGT VCCGT
VSS VSS VSS VSS VSS VSS VCCGT BE33 AP36
N9 E38 BM26 BD7 AP9 AA29 BE31 VCCGT VCCGT
N8 E35 BM23 BD6 AP8 AA12 BE32 VCCGT VCCGT
N7 E34 BM21 BC33 AN30 A30 BE37 VCCGT VCCGT
VSS VSS VSS VSS VSS VSS VCCGT BE36 AR29
N6 E9 BM13 BC14 AN29 A28 VCCGT VCCGT
VSS VSS VSS VSS VSS VSS AR30
N5 E4 BM12 BC13 AN12 A26 VCCGT
VSS VSS VSS VSS VSS VSS 8 OF 14 AR31
N4 D33 BM9 BC6 AN6 A24 VCCGT
VSS VSS VSS VSS VSS VSS AR32
N3 D30 BM6 BB30 AN5 A22 SKL_H_BGA_BGA REV = 1 ? VCCGT
VSS VSS VSS VSS VSS VSS AR33 AH38
N2 D28 BM2 BB29 AM38 A20 VCCGT VCCGT_SENSE VSSGTX_SENSE VCCGT_SENSE [66]
N1 D26 BL29 BB6 AM37 A18 VCCGT VSSGTX_SENSE
M14 D24 BK29 BB5 AM12 A16 VCCGT VSSGT_SENSE VCCGTX_SENSE VSSGT_SENSE [66]
M13 D22 BK15 AM5 A14 VCCGT VCCGTX_SENSE
VSS VSS VSS VSS VSS AT14
M12 D20 BK14 AM4 A12 VCCGT
M6 D18 BJ32 AM3 A10 VCCGT
L34 D16 BJ31 AM2 A9 VCCGT
L33 D14 BJ25 AM1 A6 VCCGT
L30 D12 BJ22 AL34 VCCGT
VSS VSS VSS VSS AT35
L29 D10 BH14 AL33 VCCGT
VSS VSS VSS C2 VSS AT36
K38 D9 BH12 NCTFVSS AL14 B37 VCCGT
VSS VSS VSS BT36 VSS NCTFVSS AT37
K11 D6 BH9 NCTFVSS AL12 B3 VCCGT
VSS VSS VSS BT35 VSS NCTFVSS AT38
K10 D3 BH8 NCTFVSS AL10 A34 VCCGT
VSS VSS VSS BT4 VSS NCTFVSS AU14
K9 C37 BH5 NCTFVSS AL9 A4 VCCGT
VSS VSS VSS BT3 VSS NCTFVSS AU29
K8 C31 BH4 NCTFVSS AL8 A3 VCCGT
VSS VSS VSS BR38 VSS NCTFVSS AU30
K7 C29 BH1 NCTFVSS AL7 VCCGT
VSS VSS VSS VSS AU31
K5 C27 BG38 AL4 VCCGT
VSS VSS VSS VSS AU32
K4 BG13 VCCGT
VSS VSS AU35
K3 D38 BG12 VCCGT
VSS NCTFVSS VSS 13 OF 14 AU36
K2 BF33 VCCGT
VSS VSS AU37
BF12 SKL_H_BGA_BGA REV = 1 ? VCCGT
6 OF 14 VSS AU38
BE29 PLACE CAP IN BACK SIDE VCCGT
VSS 14 OF 14
SKL_H_BGA_BGA REV = 1 ? BE6
BD9 VSS VCCGT SKL_H_BGA_BGA REV = 1 ?
BC34 VSS CPU_BACK_VCCGT
BC12 VSS
BB12 VSS
VSS 12 OF 14
C625 C624 C623 C622 C604 C603 C577 C626
SKL_H_BGA_BGA REV = 1 ?
B B
22u_6.3V_X5R_06
22u_6.3V_X5R_06
22u_6.3V_X5R_06
22u_6.3V_X5R_06
22u_6.3V_X5R_06
*22u_6.3V_X5R_06
*22u_6.3V_X5R_06
*22u_6.3V_X5R_06
VCCGT
VCCGT VCCGT PLACE CAP IN BOARD EDGE
CPU_TOP_VCCGT
C1192 C1228 C1226 C1227 C1219 C1203 C1220 C1204 C1205 C1206 C1208 C1209 C1221 C588 C586 C587 C1222 C1202 C1199 C1229
C582 C578 C579 C547 C546 C545
10u_6.3V_X5R_06
10u_6.3V_X5R_06
10u_6.3V_X5R_06
10u_6.3V_X5R_06
10u_6.3V_X5R_06
10u_6.3V_X5R_06
10u_6.3V_X5R_06
10u_6.3V_X5R_06
10u_6.3V_X5R_06
10u_6.3V_X5R_06
10u_6.3V_X5R_06
10u_6.3V_X5R_06
*1u_6.3V_X5R_04
*1u_6.3V_X5R_04
*10u_6.3V_X5R_06
*10u_6.3V_X5R_06
*10u_6.3V_X5R_06
*10u_6.3V_X5R_06
*10u_6.3V_X5R_06
*10u_6.3V_X5R_06
22u_6.3V_X5R_08
22u_6.3V_X5R_08
22u_6.3V_X5R_08
22u_6.3V_X5R_08
22u_6.3V_X5R_08
22u_6.3V_X5R_08
C1244 C1243
+ +
*EEFCX0J221YR
*EEFCX0J221YR
VCCGT
C575 C560 C552 C543 C585 C554 C548 C540 C1198 C1197 C1201 C576 C561 C553 C544 C592 C599 C572 C571 C570 C569 C568 C567 C1196 C1195 C1194 C1193 C574 C559 C551 C583 C584 C542 C593 C591
1u_6.3V_X5R_04
1u_6.3V_X5R_04
1u_6.3V_X5R_04
1u_6.3V_X5R_04
1u_6.3V_X5R_04
1u_6.3V_X5R_04
1u_6.3V_X5R_04
1u_6.3V_X5R_04
1u_6.3V_X5R_04
1u_6.3V_X5R_04
1u_6.3V_X5R_04
1u_6.3V_X5R_04
1u_6.3V_X5R_04
1u_6.3V_X5R_04
1u_6.3V_X5R_04
1u_6.3V_X5R_04
1u_6.3V_X5R_04
1u_6.3V_X5R_04
1u_6.3V_X5R_04
*1u_6.3V_X5R_04
*1u_6.3V_X5R_04
*1u_6.3V_X5R_04
*1u_6.3V_X5R_04
*1u_6.3V_X5R_04
*1u_6.3V_X5R_04
*1u_6.3V_X5R_04
*1u_6.3V_X5R_04
*1u_6.3V_X5R_04
*1u_6.3V_X5R_04
*1u_6.3V_X5R_04
*1u_6.3V_X5R_04
*1u_6.3V_X5R_04
*1u_6.3V_X5R_04
*1u_6.3V_X5R_04
*1u_6.3V_X5R_04
A A
[66,67] VCCGT Title
[08] Processor 7/7-POWER/GND
C P650RP 6-71-P65P0-D02A D03B

5 4 3 2 1
Processor 7/7 B - 9
Schematic Diagrams
DDR CHA SO-DIMM_0

5 4 3 2 1
VTT_MEM
Channel A SO-DIMM 0[RAM1] J_DIMMA_1A

STD TYPE
H=4mm
VDDQ
163
J_DIMMA_1B
258
2.5V
160 VDD19 VTT

159 VDD18
137 8 VDD17
[4] M_A_CLK_DDR0 CK0_T DQ0 M_A_DQ5 [4,10] 154 259
139 7 VDD16 VPP2
[4] M_A_CLK_DDR#0 CK0_C DQ1 M_A_DQ0 [4,10] 153 257
138 20 VDD15 VPP1
[4] M_A_CLK_DDR1 CK1_T DQ2 M_A_DQ2 [4,10] 148
140 21 VDD14
[4] M_A_CLK_DDR#1 CK1_C DQ3 M_A_DQ3 [4,10] 147
4 VDD13 3.3VS
DQ4 M_A_DQ1 [4,10] 142
109 3 VDD12
[4] M_A_CKE0 CKE0 DQ5 M_A_DQ4 [4,10] 141
110 16 VDD11
D [4] M_A_CKE1 CKE1 DQ6 M_A_DQ6 [4,10] 136 255 D
17 VDD10 VDDSPD
DQ7 M_A_DQ7 [4,10] 135
PLACE THE CAP WITHIN 200 MILS FROM THE SODIMM 149 28 VDD9
[4] M_A_CS#0 S0* DQ8 M_A_DQ8 [4,10] 130
DDR4_DRAMRST# 157 29 VDD8
[4] M_A_CS#1 S1* DQ9 M_A_DQ12 [4,10] 129 C351 C343
[10,11,12,37] DDR4_DRAMRST# 41 VDD7
DQ10 M_A_DQ14 [4,10] 124
155 42 VDD6
[4] M_A_ODT0 ODT0 DQ11 M_A_DQ11 [4,10] 123 0.1u_10V_X7R_04 2.2u_6.3V_X5R_04
161 24 VDD5
[4] M_A_ODT1 ODT1 DQ12 M_A_DQ9 [4,10] 118
25 VDD4
DQ13 M_A_DQ13 [4,10] 117
115 38 VDD3
[4,10] M_A_BG0 BG0 DQ14 M_A_DQ10 [4,10] 112
113 37 VDD2
[4,10] M_A_BG1 BG1 DQ15 M_A_DQ15 [4,10] 111
150 50 VDD1
[4,10] M_A_BA0 BA0 DQ16 M_A_DQ17 [4,10]
145 49
[4,10] M_A_BA1 BA1 DQ17 M_A_DQ20 [4,10] GND1
62 MT1
DQ18 M_A_DQ23 [4,10] GND2

144 63 MT2
[4,10] M_A_A0 A0 DQ19 M_A_DQ18 [4,10]
133 46 PLACE NEAR TO PIN
[4,10] M_A_A1 A1 DQ20 M_A_DQ16 [4,10]
132 45
[4,10] M_A_A2 A2 DQ21 M_A_DQ21 [4,10] 251 252
131 58 VSS VSS
[4,10] M_A_A3 A3 DQ22 M_A_DQ19 [4,10] 247 248
PLACE THE CAP CLOSE TO SODIMM 128 59 VSS VSS
[4,10] M_A_A4 A4 DQ23 M_A_DQ22 [4,10] 243 244
126 70 VSS VSS
DDR_VREFCA_CHA_DIMM [4,10] M_A_A5 A5 DQ24 M_A_DQ25 [4,10] 239 238
127 71 VSS VSS
[4,10] M_A_A6 A6 DQ25 M_A_DQ28 [4,10] 235 234
122 83 VSS VSS
[4,10] M_A_A7 A7 DQ26 M_A_DQ30 [4,10] 231 230
125 84 VSS VSS
Sheet 9 of 81 C1087
0.1u_10V_X7R_04
C1059
*2.2u_6.3V_X5R_04
[4,10] M_A_A8
[4,10] M_A_A9
[4,10] M_A_A10
[4,10] M_A_A11
121
146
120
A8
A9
A10_AP
A11
DQ27
DQ28
DQ29
DQ30
66
67
79
M_A_DQ31
M_A_DQ24
M_A_DQ29
M_A_DQ27
[4,10]
[4,10]
[4,10]
[4,10]
227
223
217
213
VSS
VSS
VSS
VSS
VSS
VSS
226
222
218
214
119 80 VSS VSS
DDR CHA SO- VDDQ [4,10] M_A_A12
[4,10] M_A_A13
[4,10] M_A_W E#
[4,10] M_A_CAS#
158
151
156
A12
A13
A14_WE*
DQ31
DQ32
DQ33
174
173
187
M_A_DQ26
M_A_DQ32
M_A_DQ37
M_A_DQ39
[4,10]
[4,10]
[4,10]
[4,10]
209
205
201
197
VSS
VSS
VSS
VSS
VSS
VSS
210
206
202
196
152 A15_CAS* DQ34 186
DIMM_0 C [4,10] M_A_RAS# M_A_DQ34 [4,10] 193 VSS VSS 192 C

R830 A16_RAS* DQ35 170
M_A_DQ36 [4,10] 189 VSS VSS 188
DQ36 169
*240_1%_04 M_A_DQ33 [4,10] 185 VSS VSS 184
114 DQ37 183
[4,10] M_A_ACT# M_A_DQ38 [4,10] 181 VSS VSS 180
ACT* DQ38 182
M_A_DQ35 [4,10] 175 VSS VSS 176
143 DQ39 195
[4,10] DDR0_A_PARITY M_A_DQ41 [4,10] 171 VSS VSS 172
116 PARITY DQ40 194
[4,10] DDR0_A_ALERT# M_A_DQ45 [4,10] 167 VSS VSS 168
134 ALERT* DQ41 207
[36] DIMM0_CHA_EVENT# M_A_DQ46 [4,10] 107 VSS VSS 106
DDR4_DRAMRST# 108 EVENT* DQ42 208
M_A_DQ42 [4,10] 103 VSS VSS 102
RESET* DQ43 191
M_A_DQ44 [4,10] 99 VSS VSS 98
DDR_VREFCA_CHA_DIMM 164 DQ44 190
M_A_DQ40 [4,10] 93 VSS VSS 94
VREFCA DQ45 203
M_A_DQ43 [4,10] 89 VSS VSS 90
254 DQ46 204
[3,10,11,12,17,37,52] SMB_DATA_R M_A_DQ47 [4,10] 85 VSS VSS 86
253 SDA DQ47 216
2.5V [3,10,11,12,17,37,52] SMB_CLK_R M_A_DQ49 [4,10] 81 VSS VSS 82
SCL DQ48 215
M_A_DQ52 [4,10] 77 VSS VSS 78
000 166
SA2
DQ49
DQ50
228
M_A_DQ55 [4,10] 73 VSS VSS 72
260 229 VSS VSS
SA1 DQ51 M_A_DQ51 [4,10] 69 68
256 211 VSS VSS
C328 C326 C337 C334 SA0 DQ52 M_A_DQ50 [4,10] 65 64
212 VSS VSS
DQ53 M_A_DQ48 [4,10] 61 60
224 VSS VSS
10u_6.3V_X5R_06 *10u_6.3V_X5R_06 1u_6.3V_X5R_04 *1u_6.3V_X5R_04 M_A_DQ53 [4,10] 57 56
CHA_DIMM0=000 DQ54
DQ55
225
M_A_DQ54 [4,10] 51 VSS VSS 52
92 237 VSS VSS
CHA_DIMM1=001 91 CB0_NC DQ56 236
M_A_DQ61 [4,10] 47
VSS VSS
48
CB1_NC DQ57 M_A_DQ60 [4,10] 43 44
VTT_MEM CHB_DIMM0=010 101
CB2_NC DQ58
249
M_A_DQ58 [4,10] 39 VSS VSS 40
105 250 VSS VSS
CHB_DIMM1=011 88 CB3_NC DQ59 232
M_A_DQ63
M_A_DQ56
[4,10]
[4,10]
35
31 VSS VSS
36
30
87 CB4_NC DQ60 233
M_A_DQ57 [4,10] 27 VSS VSS 26
100 CB5_NC DQ61 245
C330 C323 C331 M_A_DQ62 [4,10] 23 VSS VSS 22
104 CB6_NC DQ62 246
M_A_DQ59 [4,10] 19 VSS VSS 18
CB7_NC DQ63
B 10u_6.3V_X5R_06 1u_6.3V_X5R_04 *10u_6.3V_X5R_06 M_A_DQS[7:0] [4,10] 15 VSS VSS 14 B
12 13 M_A_DQS0 VSS VSS
VDDQ DM0*/DBI0* DQS0_T 9 10
DM1*/DBI1* DQS1_T M_A_DQS2 5 6
54 55 VSS VSS
75 76 VSS VSS
VDDQ 178 DM3*/DBI3* DQS3_T 179 M_A_DQS4
199 DM4*/DBI4* DQS4_T 200 M_A_DQS5
220 DM5*/DBI5* DQS5_T 221 M_A_DQS6
DM6*/DBI6* DQS6_T M_A_DQS7 VDDQ D4AS0-26001-1P40
C1052 241 242
+
96 DM7*/DBI7* DQS7_T 97
330uF_2.5V_12m_6.6*6.6*4.2 DM8*/DBI8* DQS8_T
M_A_DQS#0 M_A_DQS#[7:0] [4,10]
11
DQS0_C 32 M_A_DQS#1 R762
DQS1_C
DQS2_C
53
74
M_A_DQS#2
M_A_DQS#3 1K_1%_04
月DIMM䪗㒢㓦
DQS3_C 177 M_A_DQS#4
DQS5_C 219 M_A_DQS#6 DDR_VREFCA_CHA_DIMM
VDDQ DQS6_C M_A_DQS#7 DDR_VREFCA_CHA_DIMM [10]
240
DQS7_C 95 C1051 C1063
162 DQS8_C R763
165 S2*/C0 10u_6.3V_X5R_06 0.1u_10V_X7R_04
C605 C638 C364 C440 C1083 C1121 C1223 C1082 S3*/C1 1K_1%_04
10u_6.3V_X5R_06 10u_6.3V_X5R_06 10u_6.3V_X5R_06 10u_6.3V_X5R_06 10u_6.3V_X5R_06 10u_6.3V_X5R_06 10u_6.3V_X5R_06 *10u_6.3V_X5R_06 D4AS0-26001-1P40

6-86-24260-002 R743 1.8_1%_04
VDDQ [4] DIMM_CA_CPU_VREF_A
A C1064 A
0.022u_16V_X7R_04
C1118 C1180 C1218 C1213 C1215 C1115 C1216 C1177
*10u_6.3V_X5R_04 *10u_6.3V_X5R_04 10u_6.3V_X5R_04 *10u_6.3V_X5R_04 *10u_6.3V_X5R_04 10u_6.3V_X5R_04 *10u_6.3V_X5R_04 *10u_6.3V_X5R_04 R764

24.9_1%_04
Title
[7,10,11,12,37,53,58] VDDQ [09] DDR3 CHA SO-DIMM_0
[10,11,12,53] VTT_MEM
[10,11,12,58] 2.5V Size Document Number Rev
[3,10,11,12,13,14,15,17,30,31,34,36,37,38,39,40,42,43,46,47,48,49,50,51,52,55,59,64,66,68,70] 3.3VS A3 P650RP 6-71-P65P0-D02A D03B

5 4 3 2 1
B - 10 DDR CHA SO-DIMM_0

Schematic Diagrams
DDR CHA SO-DIMM_1

5 4 3 2 1
Channel A SO-DIMM 1[RAM3] REV TYPE

H=5.2mm
J_DIMMA_2A
137 8
[4] M_A_CLK_DDR2 CK0_T DQ0 M_A_DQ5 [4,9]
139 7
[4] M_A_CLK_DDR#2 CK0_C DQ1 M_A_DQ0 [4,9]
138 20 VTT_MEM
[4] M_A_CLK_DDR3 CK1_T DQ2 M_A_DQ2 [4,9]
140 21
[4] M_A_CLK_DDR#3 CK1_C DQ3 M_A_DQ3 [4,9]
4 VDDQ J_DIMMA_2B
DQ4 M_A_DQ1 [4,9]
109 3
[4] M_A_CKE2 CKE0 DQ5 M_A_DQ4 [4,9] 2.5V
D 110 16 D
PLACE THE CAP WITHIN 200 MILS FROM THE SODIMM [4] M_A_CKE3 CKE1 DQ6 M_A_DQ6 [4,9] 163 258
17 VDD19 VTT
DDR4_DRAMRST# DQ7 M_A_DQ7 [4,9] 160
149 28 VDD18
[9,11,12,37] DDR4_DRAMRST# [4] M_A_CS#2 S0* DQ8 M_A_DQ8 [4,9] 159
157 29 VDD17
[4] M_A_CS#3 S1* DQ9 M_A_DQ12 [4,9] 154 259
41 VDD16 VPP2
DQ10 M_A_DQ14 [4,9] 153 257
155 42 VDD15 VPP1
[4] M_A_ODT2 ODT0 DQ11 M_A_DQ11 [4,9] 148
161 24 VDD14
[4] M_A_ODT3 ODT1 DQ12 M_A_DQ9 [4,9] 147
2/1 DEL reversed 25 VDD13 3.3VS
DQ13 M_A_DQ13 [4,9] 142
115 38 VDD12
[4,9] M_A_BG0 BG0 DQ14 M_A_DQ10 [4,9] 141
113 37 VDD11
[4,9] M_A_BG1 BG1 DQ15 M_A_DQ15 [4,9] 136 255
150 50 VDD10 VDDSPD
[4,9] M_A_BA0 BA0 DQ16 M_A_DQ17 [4,9] 135
145 49 VDD9
[4,9] M_A_BA1 BA1 DQ17 M_A_DQ20 [4,9] 130
62 VDD8
DQ18 M_A_DQ23 [4,9] 129 C912 C913
144 63 VDD7
[4,9] M_A_A0 A0 DQ19 M_A_DQ18 [4,9] 124
133 46 VDD6
[4,9] M_A_A1 A1 DQ20 M_A_DQ16 [4,9] 123 0.1u_10V_X7R_04 2.2u_6.3V_X5R_04
PLACE THE CAP CLOSE TO SODIMM 132 45 VDD5
[4,9] M_A_A2 A2 DQ21 M_A_DQ21 [4,9] 118
131 58 VDD4
DDR_VREFCA_CHA_DIMM [4,9] M_A_A3 A3 DQ22 M_A_DQ19 [4,9] 117
128 59 VDD3
[9] DDR_VREFCA_CHA_DIMM [4,9] M_A_A4 M_A_DQ22 [4,9] 112
126 A4 DQ23 70
[4,9] M_A_A5 M_A_DQ25 [4,9] 111 VDD2
127 A5 DQ24 71
[4,9] M_A_A6 M_A_DQ28 [4,9] VDD1
C1062 C1061 122 A6 DQ25 83
[4,9] M_A_A7 A7 DQ26 M_A_DQ30 [4,9] GND1
125 84 MT1
[4,9] M_A_A8 A8 DQ27 M_A_DQ31 [4,9] GND2
0.1u_10V_X7R_04 10u_6.3V_X5R_06 121 66 MT2
[4,9] M_A_A9 A9 DQ28 M_A_DQ24 [4,9]
146 67 PLACE NEAR TO PIN
[4,9] M_A_A10 A10_AP DQ29 M_A_DQ29 [4,9]
120 79
[4,9] M_A_A11 A11 DQ30 M_A_DQ27 [4,9] 251 252
119 80 VSS VSS
[4,9] M_A_A12 A12 DQ31 M_A_DQ26 [4,9] 247 248
C
VDDQ
[4,9] M_A_A13
[4,9] M_A_W E#
[4,9] M_A_CAS#
158
151
156
152
A13
A14_WE*
A15_CAS*
DQ32
DQ33
DQ34
174
173
187
186
M_A_DQ32
M_A_DQ37
M_A_DQ39
[4,9]
[4,9]
[4,9]
243
239
235
VSS
VSS
VSS
VSS
VSS
VSS
244
238
234 C
Sheet 10 of 81
[4,9] M_A_RAS# M_A_DQ34 [4,9] 231 VSS VSS 230
R840
240_1%_04
[4,9] M_A_ACT#
114
A16_RAS*
ACT*
DQ35
DQ36
DQ37
DQ38
170
169
183
M_A_DQ36
M_A_DQ33
M_A_DQ38
[4,9]
[4,9]
[4,9]
227
223
217
VSS
VSS
VSS
VSS
VSS
VSS
226
222
218
DDR CHA SO-
182 VSS VSS
DIMM_1
DQ39 M_A_DQ35 [4,9] 213 214
143 195 VSS VSS
[4,9] DDR0_A_PARITY PARITY DQ40 M_A_DQ41 [4,9] 209 210
116 194 VSS VSS
[4,9] DDR0_A_ALERT# ALERT* DQ41 M_A_DQ45 [4,9] 205 206
134 207 VSS VSS
[36] DIMM1_CHA_EVENT# DDR4_DRAMRST# EVENT* DQ42 M_A_DQ46 [4,9] 201 202
108 208 VSS VSS
RESET* DQ43 M_A_DQ42 [4,9] 197 196
191 VSS VSS
DDR_VREFCA_CHA_DIMM 164 DQ44 M_A_DQ44 [4,9] 193 192
190 VSS VSS
VREFCA DQ45 M_A_DQ40 [4,9] 189 188
203 VSS VSS
DQ46 M_A_DQ43 [4,9] 185 184
254 204 VSS VSS
[3,9,11,12,17,37,52] SMB_DATA_R SDA DQ47 M_A_DQ47 [4,9] 181 180
253 216 VSS VSS
[3,9,11,12,17,37,52] SMB_CLK_R SCL DQ48 M_A_DQ49 [4,9] 175 176
215 VSS VSS
M_A_DQ52 [4,9] 171 172
001 166
SA2
DQ49
DQ50
228
M_A_DQ55 [4,9] 167 VSS VSS 168
260 229 VSS VSS
SA1 DQ51 M_A_DQ51 [4,9] 107 106
3.3VS 256 211 VSS VSS
SA0 DQ52 M_A_DQ50 [4,9] 103 102
212 VSS VSS
DQ53 M_A_DQ48 [4,9] 99 98
224
CHA_DIMM0=000 DQ54 225
M_A_DQ53 [4,9] 93 VSS
VSS
VSS
VSS
94
DQ55 M_A_DQ54 [4,9] 89 90
CHA_DIMM1=001 92
CB0_NC DQ56
237
M_A_DQ61 [4,9] 85 VSS VSS 86
91 236 VSS VSS
CHB_DIMM0=010 101 CB1_NC DQ57 249
M_A_DQ60 [4,9] 81
VSS VSS
82
CB2_NC DQ58 M_A_DQ58 [4,9] 77 78
CHB_DIMM1=011 105
88 CB3_NC DQ59
250
232
M_A_DQ63 [4,9] 73 VSS VSS 72
M_A_DQ56 [4,9] 69 VSS VSS 68
87 CB4_NC DQ60 233
M_A_DQ57 [4,9] 65 VSS VSS 64
100 CB5_NC DQ61 245
M_A_DQ62 [4,9] 61 VSS VSS 60
104 CB6_NC DQ62 246
M_A_DQ59 [4,9] 57 VSS VSS 56
B CB7_NC DQ63 B
M_A_DQS[7:0] [4,9] 51 VSS VSS 52
2.5V VDDQ DM0*/DBI0* DQS0_T 47 48
54 55 VSS VSS
75 76 VSS VSS
178 179 VSS VSS
C327 C872 C870 C871 199 200 VSS VSS
220 221 VSS VSS
10u_6.3V_X5R_06 *10u_6.3V_X5R_06 1u_6.3V_X5R_04 *1u_6.3V_X5R_04 241 242 VSS VSS
DM7*/DBI7* DQS7_T 19 18
96 97 VSS VSS
DM8*/DBI8* DQS8_T 15 14
M_A_DQS#[7:0] [4,9] 9 VSS VSS 10
11 M_A_DQS#0 VSS VSS
VTT_MEM DQS0_C M_A_DQS#1 5 6
32 VSS VSS
DQS1_C M_A_DQS#2 1 2
53 VSS VSS
DQS2_C 74 M_A_DQS#3
C874 C888 C873 DQS4_C 198 M_A_DQS#5
DQS5_C M_A_DQS#6 D4AR0-26001-1P52
219
10u_6.3V_X5R_06 1u_6.3V_X5R_04 *10u_6.3V_X5R_06 DQS6_C 240 M_A_DQS#7
DQS7_C 95
162 DQS8_C
165 S2*/C0
S3*/C1
VDDQ
D4AR0-26001-1P52
6-86-24260-019
C1181 C1084 C944 C1175 C1008 C1174 C1252 C1240
[9,11,12,58] 2.5V
A [7,9,11,12,37,53,58] VDDQ A
10u_6.3V_X5R_06 *10u_6.3V_X5R_06 10u_6.3V_X5R_06 10u_6.3V_X5R_06 10u_6.3V_X5R_06 10u_6.3V_X5R_06 10u_6.3V_X5R_06 10u_6.3V_X5R_06
[9,11,12,53] VTT_MEM
[3,9,11,12,13,14,15,17,30,31,34,36,37,38,39,40,42,43,46,47,48,49,50,51,52,55,59,64,66,68,70] 3.3VS
VDDQ
C1178 C1176 C1217 C1116 C1117 C1214 C1179 C1120 Title
[10] DDR3 CHA SO-DIMM_1
*10u_6.3V_X5R_04 *10u_6.3V_X5R_04 *10u_6.3V_X5R_04 *10u_6.3V_X5R_04 *10u_6.3V_X5R_04 *10u_6.3V_X5R_04 *10u_6.3V_X5R_04 *10u_6.3V_X5R_04
A3 P650RP 6-71-P65P0-D02A D03B

5 4 3 2 1
DDR CHA SO-DIMM_1 B - 11

Schematic Diagrams
DDR CHB SO-DIMM_0

5 4 3 2 1
VTT_MEM
Channel B SO-DIMM 0[RAM2]RSV TYPE

H=4mm
VDDQ
163
160
J_DIMMB_1B
VDD19 VTT
258
2.5V
J_DIMMB_1A 159 VDD18

154 VDD17 259
M_B_DQ0 M_B_DQ[63:0] [4,12] VDD16 VPP2
137 8 153 257
[4] M_B_CLK_DDR0 CK0_T DQ0 M_B_DQ5 VDD15 VPP1
139 7 148
[4] M_B_CLK_DDR#0 CK0_C DQ1 M_B_DQ7 VDD14
138 20 147 3.3VS
[4] M_B_CLK_DDR1 CK1_T DQ2 M_B_DQ3 VDD13
140 21 142
D [4] M_B_CLK_DDR#1 CK1_C DQ3 M_B_DQ4 VDD12 D
4 141
109 DQ4 3 M_B_DQ2 136 VDD11 255
[4] M_B_CKE0 CKE0 DQ5 M_B_DQ1 VDD10 VDDSPD
110 16 135
[4] M_B_CKE1 CKE1 DQ6 M_B_DQ6 VDD9
17 130
149 DQ7 28 M_B_DQ9 129 VDD8 C955 C895
[4] M_B_CS#0 S0* DQ8 M_B_DQ14 VDD7
157 29 124
41 123 0.1u_10V_X7R_04 2.2u_6.3V_X5R_04
155 DQ10 42 M_B_DQ15 118 VDD5
[4] M_B_ODT0 ODT0 DQ11 M_B_DQ8 VDD4
161 24 117
PLACE THE CAP WITHIN 200 MILS FROM THE SODIMM 25 112
115 DQ13 38 M_B_DQ11 111 VDD2
DDR4_DRAMRST# [4,12] M_B_BG0 BG0 DQ14 VDD1
[9,10,12,37] DDR4_DRAMRST# 113 37 M_B_DQ12
[4,12] M_B_BG1 BG1 DQ15 M_B_DQ16
150 50 GND1
[4,12] M_B_BA0 BA0 DQ16 M_B_DQ18 MT1

145 49 GND2
[4,12] M_B_BA1 BA1 DQ17 M_B_DQ21 MT2
62 PLACE NEAR TO PIN
144 DQ18 63 M_B_DQ19
[4,12] M_B_A0 A0 DQ19 M_B_DQ17
133 46 251 252
[4,12] M_B_A1 A1 DQ20 M_B_DQ22 VSS VSS
132 45 247 248
131 58 243 244
128 59 239 238
126 70 235 234
127 71 231 230
Sheet 11 of 81 PLACE THE CAP CLOSE TO SODIMM

[4,12] M_B_A6
[4,12] M_B_A7
[4,12] M_B_A8
[4,12] M_B_A9
122
125
121
A6
A7
A8
A9
DQ25
DQ26
DQ27
DQ28
83
84
66
M_B_DQ24
M_B_DQ29
M_B_DQ28
227
223
217
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
226
222
218
146 67 M_B_DQ27 213 214
DDR CHB SO- C

DDR_VREFCA_CHB_DIMM
C1080 C1078
VDDQ
[4,12] M_B_A10
[4,12] M_B_A11
[4,12] M_B_A12
[4,12] M_B_A13
120
119
158
A10_AP
A11
A12
DQ29
DQ30
DQ31
79
80
174
M_B_DQ30
M_B_DQ26
M_B_DQ39
209
205
201
VSS
VSS
VSS
VSS
VSS
VSS
210
206
202 C
151 A13 DQ32 173 M_B_DQ35 197 VSS VSS 196
DIMM_0 0.1u_10V_X7R_04 *2.2u_6.3V_X5R_04
R851
[4,12] M_B_W E#
[4,12] M_B_CAS#
[4,12] M_B_RAS#
156
152
A14_WE*
A15_CAS*
A16_RAS*
DQ33
DQ34
DQ35
187
186
170
M_B_DQ32
M_B_DQ37
M_B_DQ34
193
189
185
VSS
VSS
VSS
VSS
VSS
VSS
192
188
184
DQ36 169 M_B_DQ38 181 VSS VSS 180
240_1%_04 DQ37 M_B_DQ33 VSS VSS
114 183 175 176
[4,12] M_B_ACT# ACT* DQ38 M_B_DQ36 VSS VSS
182 171 172
143 DQ39 195 M_B_DQ41 167 VSS VSS 168
[4,12] DDR1_B_PARITY PARITY DQ40 M_B_DQ45 VSS VSS
116 194 107 106
[4,12] DDR1_B_ALERT# DIMM0_CHB_EVENT# ALERT* DQ41 M_B_DQ46 VSS VSS
134 207 103 102
[36] DIMM0_CHB_EVENT# DDR4_DRAMRST# EVENT* DQ42 M_B_DQ43 VSS VSS
108 208 99 98
RESET* DQ43 191 M_B_DQ40 93 VSS VSS 94
DDR_VREFCA_CHB_DIMM 164 DQ44 190 M_B_DQ44 89 VSS VSS 90
VREFCA DQ45 203 M_B_DQ42 85 VSS VSS 86
254 DQ46 204 M_B_DQ47 81 VSS VSS 82
2.5V [3,9,10,12,17,37,52] SMB_DATA_R SDA DQ47 VSS VSS
253 216 M_B_DQ55 77 78
[3,9,10,12,17,37,52] SMB_CLK_R SCL DQ48 M_B_DQ48 VSS VSS
215 73 72
010 166
SA2
DQ49
DQ50
228 M_B_DQ49 69 VSS
VSS
VSS
VSS
68
260 229 M_B_DQ51 65 64
C917 C918 C919 C920 3.3VS SA1 DQ51 VSS VSS
256 211 M_B_DQ52 61 60
SA0 DQ52 212 M_B_DQ54 57 VSS VSS 56
10u_6.3V_X5R_06 *10u_6.3V_X5R_06 1u_6.3V_X5R_04 *1u_6.3V_X5R_04 DQ53 M_B_DQ53 VSS VSS
224 51 52
CHA_DIMM0=000 DQ54 225 M_B_DQ50 47 VSS VSS 48
CHA_DIMM1=001 92 DQ55 237 M_B_DQ61 43 VSS VSS 44
91 CB0_NC DQ56 236 M_B_DQ62 39 VSS VSS 40
VTT_MEM
CHB_DIMM0=010 101 CB1_NC DQ57 249 M_B_DQ60 35 VSS VSS 36
CB2_NC DQ58 VSS VSS
CHB_DIMM1=011 105
88 CB3_NC DQ59
250
232
M_B_DQ58
M_B_DQ59
31
27 VSS VSS
30
26
B B
C325 C923 C329 CB6_NC DQ62 M_B_DQ63 VSS VSS
104 246 15 14
CB7_NC DQ63 9 VSS VSS 10
10u_6.3V_X5R_06 1u_6.3V_X5R_04 *10u_6.3V_X5R_06 M_B_DQS0 M_B_DQS[7:0] [4,12] VSS VSS
VDDQ 12 13 5 6
33 DM0*/DBI0* DQS0_T 34 M_B_DQS1 1 VSS VSS 2
54 DM1*/DBI1* DQS1_T 55 M_B_DQS2 VSS VSS
75 DM2*/DBI2* DQS2_T 76 M_B_DQS3
199 DM4*/DBI4* DQS4_T 200 M_B_DQS5 D4AR0-26001-1P40
96 DM7*/DBI7* DQS7_T 97 VDDQ
DM8*/DBI8* DQS8_T
M_B_DQS#0 M_B_DQS#[7:0] [4,12]
11
[3,9,10,12,13,14,15,17,30,31,34,36,37,38,39,40,42,43,46,47,48,49,50,51,52,55,59,64,66,68,70] 3.3VS DQS0_C 32 M_B_DQS#1
DQS1_C M_B_DQS#2 C1103
[7,9,10,12,37,53,58] VDDQ 53 R758
[9,10,12,53] VTT_MEM DQS2_C 74 M_B_DQS#3
DQS3_C M_B_DQS#4 1K_1%_04 10u_6.3V_X5R_06
[9,10,12,58] 2.5V 177
DQS4_C 198 M_B_DQS#5
DQS6_C
月DIMM䪗㒢㓦
VDDQ 240 M_B_DQS#7
DQS7_C 95 C1056
162 DQS8_C
S2*/C0 R741
165 0.1u_10V_X7R_04
S3*/C1 1K_1%_04 DDR_VREFCA_CHB_DIMM
DDR_VREFCA_CHB_DIMM [12]
C613 C658 C455 C402 C1212 C1224 C1270 C1225
D4AR0-26001-1P40 C1081 C1057
10u_6.3V_X5R_06 *10u_6.3V_X5R_06 10u_6.3V_X5R_06 10u_6.3V_X5R_06 10u_6.3V_X5R_06 10u_6.3V_X5R_06 10u_6.3V_X5R_06 10u_6.3V_X5R_06
A R740 1.8_1%_04 0.1u_10V_X7R_04 0.1u_10V_X7R_04 A
6-86-24260-000 [4] DIMM_DQ_CPU_VREF_B
C1071
VDDQ
0.022u_16V_X7R_04
C1239 C1110 C1119 C1092 C1010 C1190 C989 C1207 R765 Title
1u_6.3V_X5R_04 1u_6.3V_X5R_04 1u_6.3V_X5R_04 1u_6.3V_X5R_04 1u_6.3V_X5R_04 1u_6.3V_X5R_04 1u_6.3V_X5R_04 1u_6.3V_X5R_04
24.9_1%_04 [11] DDR4 CHB SO-DIMM_0
A3 P650RP 6-71-P65P0-D02A D03B

5 4 3 2 1
B - 12 DDR CHB SO-DIMM_0

Schematic Diagrams
DDR CHB SO-DIMM_1

5 4 3 2 1
Channel B SO-DIMM 1[RAM4] J_DIMMB_2A

STD TYPE
H=5.2mm
M_B_DQ0 M_B_DQ[63:0] [4,11] VTT_MEM
137 8
[4] M_B_CLK_DDR2 CK0_T DQ0 M_B_DQ5
139 7
[4] M_B_CLK_DDR#2 CK0_C DQ1 M_B_DQ7 VDDQ J_DIMMB_2B
138 20
[4] M_B_CLK_DDR3 CK1_T DQ2 M_B_DQ3
140 21 2.5V
[4] M_B_CLK_DDR#3 CK1_C DQ3 M_B_DQ4
4 163 258
109 DQ4 3 M_B_DQ2 160 VDD19 VTT
D 110 16 159 D
17 154 259
149 DQ7 28 M_B_DQ9 153 VDD16 VPP2 257
[4] M_B_CS#2 S0* DQ8 M_B_DQ14 VDD15 VPP1
157 29 148
41 147 3.3VS
155 DQ10 42 M_B_DQ15 142 VDD13
161 24 141
25 136 255
115 DQ13 38 M_B_DQ11 135 VDD10 VDDSPD
[4,11] M_B_BG0 BG0 DQ14 M_B_DQ12 VDD9
113 37 130
[4,11] M_B_BG1 BG1 DQ15 M_B_DQ16 VDD8
150 50 129 C964 C975
[4,11] M_B_BA0 BA0 DQ16 M_B_DQ18 VDD7
145 49 124
[4,11] M_B_BA1 BA1 DQ17 M_B_DQ21 VDD6
62 123 0.1u_10V_X7R_04 2.2u_6.3V_X5R_04
144 DQ18 63 M_B_DQ19 118 VDD5
[4,11] M_B_A0 A0 DQ19 M_B_DQ17 VDD4
133 46 117
[4,11] M_B_A1
132 A1 DQ20 45 M_B_DQ22 112 VDD3
[4,11] M_B_A2 A2 DQ21 M_B_DQ23 VDD2
131 58 111
[4,11] M_B_A3 A3 DQ22 M_B_DQ20 VDD1
128 59
[4,11] M_B_A4 A4 DQ23 M_B_DQ25
126 70 GND1
[4,11] M_B_A5 A5 DQ24 M_B_DQ31 MT1
127 71 GND2
[4,11] M_B_A6 A6 DQ25 M_B_DQ24 MT2
122 83
[4,11] M_B_A7 A7 DQ26 M_B_DQ29 PLACE NEAR TO PIN
125 84
PLACE THE CAP WITHIN 200 MILS FROM THE SODIMM [4,11] M_B_A8 A8 DQ27 M_B_DQ28
121 66 251 252
[4,11] M_B_A9 A9 DQ28 VSS VSS
[9,10,11,37] DDR4_DRAMRST#
DDR4_DRAMRST#
VDDQ
[4,11] M_B_A10
[4,11] M_B_A11
[4,11] M_B_A12
146
120
119
158
A10_AP
A11
A12
DQ29
DQ30
DQ31
67
79
80
174
M_B_DQ27
M_B_DQ30
M_B_DQ26
M_B_DQ39
247
243
239
235
VSS
VSS
VSS
VSS
VSS
VSS
248
244
238
234
Sheet 12 of 81
[4,11] M_B_A13 A13 DQ32 VSS VSS
C
R858
[4,11] M_B_W E#
[4,11] M_B_CAS#
[4,11] M_B_RAS#
151
156
152
A14_WE*
A15_CAS*
A16_RAS*
DQ33
DQ34
DQ35
173
187
186
170
M_B_DQ35
M_B_DQ32
M_B_DQ37
M_B_DQ34
231
227
223
217
VSS
VSS
VSS
VSS
VSS
VSS
230
226
222
218
C
DDR CHB SO-
DQ36 VSS VSS
240_1%_04
[4,11] M_B_ACT#
114
143
ACT*
DQ37
DQ38
DQ39
169
183
182
195
M_B_DQ38
M_B_DQ33
M_B_DQ36
M_B_DQ41
213
209
205
201
VSS
VSS
VSS
VSS
VSS
VSS
214
210
206
202
DIMM_1
[4,11] DDR1_B_PARITY PARITY DQ40 M_B_DQ45 VSS VSS
116 194 197 196
[4,11] DDR1_B_ALERT# DIMM1_CHB_EVENT# ALERT* DQ41 M_B_DQ46 VSS VSS
134 207 193 192
[36] DIMM1_CHB_EVENT# DDR4_DRAMRST# EVENT* DQ42 M_B_DQ43 VSS VSS
108 208 189 188
RESET* DQ43 191 M_B_DQ40 185 VSS VSS 184
DDR_VREFCA_CHB_DIMM 164 DQ44 190 M_B_DQ44 181 VSS VSS 180
VREFCA DQ45 203 M_B_DQ42 175 VSS VSS 176
254 DQ46 204 M_B_DQ47 171 VSS VSS 172
[3,9,10,11,17,37,52] SMB_DATA_R SDA DQ47 M_B_DQ55 VSS VSS
253 216 167 168
[3,9,10,11,17,37,52] SMB_CLK_R SCL DQ48 M_B_DQ48 VSS VSS
215 107 106
011 166
SA2
DQ49
DQ50
228 M_B_DQ49 103 VSS
VSS
VSS
VSS
102
PLACE THE CAP CLOSE TO SODIMM 260 229 M_B_DQ51 99 98
3.3VS SA1 DQ51 VSS VSS
256 211 M_B_DQ52 93 94
3.3VS SA0 DQ52 VSS VSS
DDR_VREFCA_CHB_DIMM 212 M_B_DQ54 89 90
[11] DDR_VREFCA_CHB_DIMM DQ53 M_B_DQ53 VSS VSS
224 85 86
CHA_DIMM0=000 DQ54 225 M_B_DQ50 81 VSS VSS 82
C1058 C1079 CHA_DIMM1=001 92 DQ55 237 M_B_DQ61 77 VSS VSS 78
0.1u_10V_X7R_04 10u_6.3V_X5R_06 CHB_DIMM0=010 101 CB1_NC DQ57 249 M_B_DQ60 69 VSS VSS 68
CB2_NC DQ58 VSS VSS
CHB_DIMM1=011 105
88 CB3_NC DQ59
250
232
M_B_DQ58
M_B_DQ59
65
61 VSS VSS
64
60
2.5V 104 CB6_NC DQ62 246 M_B_DQ63 47 VSS VSS 48
B CB7_NC DQ63 43 VSS VSS 44 B
M_B_DQS0 M_B_DQS[7:0] [4,11] VSS VSS
VDDQ 12 13 39 40
C931 C930 C929 C932 DM2*/DBI2* DQS2_T M_B_DQS3 VSS VSS
75 76 27 26
10u_6.3V_X5R_06 *10u_6.3V_X5R_06 1u_6.3V_X5R_04 *1u_6.3V_X5R_04 DM4*/DBI4* DQS4_T M_B_DQS5 VSS VSS
199 200 19 18
96 DM7*/DBI7* DQS7_T 97 5 VSS VSS 6
DM8*/DBI8* DQS8_T 1 VSS VSS 2
VTT_MEM M_B_DQS#[7:0] [4,11] VSS VSS
11 M_B_DQS#0
DQS0_C 32 M_B_DQS#1
DQS1_C 53 M_B_DQS#2
DQS2_C 74 M_B_DQS#3 D4AS0-26001-1P52
C909 C937 C324 DQS3_C M_B_DQS#4
177
10u_6.3V_X5R_06 1u_6.3V_X5R_04 *10u_6.3V_X5R_06 DQS5_C M_B_DQS#6
219
DQS7_C 95
162 DQS8_C
165 S2*/C0
VDDQ S3*/C1
D4AS0-26001-1P52 [3,9,10,11,13,14,15,17,30,31,34,36,37,38,39,40,42,43,46,47,48,49,50,51,52,55,59,64,66,68,70] 3.3VS

6-86-24260-003 [7,9,10,11,37,53,58] VDDQ
C403 C639 C365 C657 C441 C454 C606 C612 [9,10,11,53] VTT_MEM
[9,10,11,58] 2.5V
A 10u_6.3V_X5R_06 10u_6.3V_X5R_06 *10u_6.3V_X5R_06 10u_6.3V_X5R_06 *10u_6.3V_X5R_06 10u_6.3V_X5R_06 10u_6.3V_X5R_06 10u_6.3V_X5R_06 A
VDDQ
C1164 C1184 C1170 C1210 C1211 C1122 C988 C1038 Title
1u_6.3V_X5R_04 1u_6.3V_X5R_04 1u_6.3V_X5R_04 1u_6.3V_X5R_04 1u_6.3V_X5R_04 1u_6.3V_X5R_04 1u_6.3V_X5R_04 1u_6.3V_X5R_04
[12] DDR4 CHB SO-DIMM_1
A3 P650RP 6-71-P65P0-D02A D03B

5 4 3 2 1
DDR CHB SO-DIMM_1 B - 13

Schematic Diagrams
Panel, Inverter
5 4 3 2 1
DEFAULT SHORT
PANEL CONNECTOR (For coaxial cable) PLVDD
PANEL POWER 2
PJ10
1
2mm
6/3 PLVDD Q3A

VIN *MTS3572G6 VLED
R1073
2A
4 3
S2 D2
10K_04 C167
C216 C228
G2
J_LCD1
Q30 C253
1u_6.3V_X5R_04
*0.1u_50V_Y5V_06
*0.1u_50V_Y5V_06
D S FRAME_LOCK#_R *0.22u_50V_Y5V_06
[30] GPIO5_FRAME_LOCK# 1
5
D
ἧ䓐CABLE㍍⛘ 2 1 D
2SK3018S3 3.3VS 2 R53
3
3.3VS 3 *4.7K_06
R1030 *10K_04 4
G
暨䡢娵GS䁢3.3V R50 1A 5 4 R58
VGA_ENAVDD 6 5
*100K_04 6 R57 *150K_1%_04
7
7 *100K_04
8
㬌悐↮䚖⇵㗗⃰㍸ὃPANEL䴎NV G sync,㓭䚖⇵䠔橼䶂嶗㗗ᶵ䓐 L53 FCM1005KF-121T03 HI_GND 9 8
10 9
11 10 GND5
11 GND5 R59 3.3V
12 GND4
13 12 GND4 GND3
13 GND3 *100K_04
14 GND2
15 14 GND2 GND1 R60 *0_04
6
15 GND1 [37,42,43,44,49,55,56,69] SUSB# R52

16
16 Q3B
D1
17
17 *MTS3572G6 *10K_04
18 PANEL_VCC_EN R61
18 *0_04 PANEL_VCC_EN_R 1
C1335 0.1u_10V_X7R_04 DRX0# 19 G1
6
[3] DP_TXN0 19 D
S1
Sheet 13 of 81 [3] DP_TXP0
C1336
C1337
0.1u_10V_X7R_04
0.1u_10V_X7R_04
DRX0
DRX1#
20
21
22
20
21
5VS
LVDD_EN# 2G
Q2A
*MTDK5S6R
2
[3] DP_TXN1 22 1 2 S
C1338 0.1u_10V_X7R_04 DRX1 23
1
3
[3] DP_TXP1 23 D
Panel, Inverter [3]

[3]
DP_TXN2
DP_TXP2
C1339
C1340
0.1u_10V_X7R_04
0.1u_10V_X7R_04
DRX2#
DRX2
24
25
26
27
24
25
26 3.3VS
PJ8
DEFAULT SHORT
*3mm
5G
S
Q2B
*MTDK5S6R
4
C1341 0.1u_10V_X7R_04 DRX3# 28 27
[3] DP_TXN3 28 1 2
3.3VS R1031 *100K_04 C1342 0.1u_10V_X7R_04 DRX3 29
[3] DP_TXP3 29
C 30 PLVDD C
30 PJ9 3mm
C1333 0.1u_10V_X7R_04 31 U3
[3] DP_AUX# 31 2A
[3] DP_AUX
C1334 0.1u_10V_X7R_04
GSYNC_ID_R
32
32 5 1 >80 mil
[42] GSYNC_ID R47 1K_04 33 VIN VOUT
R1032 *100K_04 BRIGHTNESS_R 34 33
2/1 䓐cable⇌㕟NVSR-GSYNC panel INV_BLON 34 C165 4
VLED 35 VIN/SS
HPD_L 35 1u_6.3V_X5R_04 C166 C171 R48
36
36 3 2
2A 37 EN GND
37 *1u_6.3V_X5R_04 10u_6.3V_X5R_06 *100K_04
38
38 UP7553
39
39 R42
40 PANEL_VCC_EN
C283 C278 40
100K_04
LVDFH-04008-TP00+
0.1u_50V_Y5V_06 0.01u_50V_X7R_04 PCB Footprint = lvdfh-04008-tp
current = 0.3A
6-21-44K00-040 3.3VS
eDP
R1034 100K_04
U85
2 12 C1344 0.1u_16V_Y5V_04
[36] NB_ENAVDD VGA_ENAVDD 0B0 VCC
11
[30] VGA_ENAVDD 1B0 PANEL_VCC_EN
1
R43 *10K_04 R1035 100K_04 A0
PLVDD 10 3
R1036 *100K_04 S0 GND
5 9
[36] BLON 0B1 VCC
BRIGHTNESS_R PANEL_PW M 8
R39 *0402_short [31] VGA_BKLTEN 1B1 BLON_R
4
R1037 100K_04 7 A1 6
S1 GND
B B
PI5A3158BZAE D02
P/N = 6-03-53158-0J1
[3,13,30,38,52] PS8331_SW
3.3VS
śɥ
L :PORT1 (INTEL) (DEFAULT) śɨ
H: PORT2 (NV)
C
A
D75
BAV99 RECTIFIER 3.3V
HPD_L R500 1K_04 EDP_HPD
EDP_HPD [3]
3.3V
PANEL POWER
AC
R529 100K_04 U45C
14
C1343
74LVC08APW U45B
14
9 74LVC08APW
0.1u_16V_Y5V_04 [43] BKL_EN 3.3V
8 BLON1 4
BLON_R 10 6 BLON2
5
R530 100K_04
7
U45A
14
7
R37 *100K_04 SB_BLON 74LVC08APW
1
3 INV_BLON
[42] SB_BLON
2
3.3V
eDP ἧ䓐eDP㗪,BRIGHTNESS䚜㍍ U45D
14
7
㍍⇘EDP CONNECTOR 3.3VS
5/13 D02A LOCATION 12
74LVC08APW R36 C68
[43,51] LID_SW # 0.1u_10V_X7R_04
R1038 100K_04 11 LID_SW #1 100K_04
U86
13
2 12 C1345 0.1u_16V_Y5V_04
[36] EDP_BRIGHTNESS 0B0 VCC
A 11 A
[31] VGA_BKLPW M 1B0 PANEL_PW M
1
7
R1039 100K_04 10 A0 3 DEL LVDS SIGNAL
S0 GND [5,42,43,64,66] ALL_SYS_PW RGD
5 9 R1040
[3] IEDP_HPD 0B1 VCC
8 *10K_04
[3] DEDP_HPD 1B1 4
7 A1 6
[3,13,30,38,52] PS8331_SW S1 GND Title
L :PORT1 (INTEL) (DEFAULT) PI5A3158BZAE [43,49,52,53,54,55,56,57,62,64,65,66,67] VIN

[13]PANEL,INVERTER,CRT
P/N = 6-03-53158-0J1 EDP_HPD [17,36,48,49,50,51,52,55,60,61] 5VS
H: PORT2 (NV) Size Document Number Rev
śɥ [2,17,31,44,45,46,47,50,52,53,55,56,58,59,60,62,70]
[3,9,10,11,12,14,15,17,30,31,34,36,37,38,39,40,42,43,46,47,48,49,50,51,52,55,59,64,66,68,70]
3.3V
3.3VS A3 P650RP 6-71-P65P0-D02A D03B
śɨ
5 4 3 2 1
B - 14 Panel, Inverter
Schematic Diagrams
Redriver
5 4 3 2 1
61'366 36%
TI PARADA
6-03-08330-030
NV_DP_F
6-02-75130-BQ0 C1095 0.1u_10V_X7R_04
[29] MDP_F_AUX#_SDA
C1088 0.1u_10V_X7R_04
SLQ X)*1' X)*1' U39 SN75DP130SSRGZR PS8330B [29] MDP_F_AUX_SCL
MDP_F_AUX#_RE
MDP_F_AUX_RE
2.2u_6.3V_X5R_04 R266 *100K_1%_04
pin2 C826 1u_6.3V_X5R_04 R273 *100K_1%_04
SLQ .9&& .*1' *1' 0_04
MDP_F_AUX_SCL
MDP_F_AUX#_SDA
3.3VS
pin3 R618 *10K_04 MDP_F_AUX [16]
MDP_F_AUX# [16]
SLQ [ .9&& .*1' pin7 R627 X 4.99K_1%_04
3.3VS R744 10K_04 A_AUTO_EQ
D
C1054 2.2u_6.3V_X5R_04 A_EN R805 *4.7K_04
pin35 R619 X 10K_04 3.3VS
SLQ [ .9&& .*1' 2.2u_6.3V_X5R_04

3.3VS
pin35 C828 0.22u_10V_X5R_04 C472 C485
36
35
34
33
32
31
30
29
28
27
26
25
U64
SLQ [ .*1' PS8330B 0.1u_10V_X5R_04 0.1u_10V_X5R_04
V3P3
V3P3
V3P3
SDA_DDC
SCL_DDC
GND
AUX_SRCP
AUX_SRCN
HPD_SRC PERICOM(TI)(PARADA)AUX_SNKP
AUX_SNKN
ENABLE(ENABLE)(PD#)
U44 SN75DP130SSRGZR
SLQ X)*1' .9&&X)*1' pin2 C886 1u_6.3V_X5R_04 2.2u_6.3V_X5R_04

pin3 R694 *10K_04 0_04 FROM NV Zdiff=90ȍ 37 Zdiff=100ȍ TO CON
SLQ [ .9&& .*1' 4.99K_1%_04 [29] MDP_F0_RE_R
C1046 0.1u_10V_X7R_04 MDP_F0_RE 38 DNC
IN0P GND
24
pin7 R726 X [29] MDP_F#0_RE_R
C1045 0.1u_10V_X7R_04 MDP_F#0_RE 39 23
MDP_F0 [16]
IN0N OUT0P
A_EQ 40 22
[ [ 10K_04
pin35 R691 X EQ(DNC)(CFG1) OUT0N MDP_F#0 [16]
SLQ [29] MDP_F1_RE_R
C1044 0.1u_10V_X7R_04 MDP_F1_RE 41
IN1P DNC
21
2.2u_6.3V_X5R_04 C1043 0.1u_10V_X7R_04 MDP_F#1_RE 42 20
pin35 C890 0.22u_10V_X5R_04 [29] MDP_F#1_RE_R IN1N OUT1P MDP_F1 [16]
43 19
DNC OUT1N MDP_F#1 [16]
C1042 0.1u_10V_X7R_04 MDP_F2_RE 44 18
[29] MDP_F2_RE_R IN2P GND
C1041 0.1u_10V_X7R_04 MDP_F#2_RE 45 17
[29] MDP_F#2_RE_R MDP_F2 [16]
CNTRL(DNC)(REXT)
46 IN2N OUT2P 16
OC_0(DNC)(NC) OUT2N MDP_F#2 [16]
C1040 0.1u_10V_X7R_04 MDP_F3_RE 47 15
[29] MDP_F3_RE_R IN3P DNC
[29] MDP_F#3_RE_R
C1039
月PS8330B
0.1u_10V_X7R_04 MDP_F#3_RE 48
49 IN3N
HGND
OUT3P
OUT3N
14
13
MDP_F3 [16]
MDP_F#3 [16] Sheet 14 of 81
CAD_SRC
CAD_SNK
HPD_SNK
Redriver
V3P3
V3P3
V3P3
PS8330B
1
2
3
4
5
6
7
8
9
10
11
12
C
C1055 2.2u_6.3V_X5R_04 R814 100K_04 FROM CON
[29] MDP_E_AUX#_SDA
C1166
C1163
0.1u_10V_X7R_04
0.1u_10V_X7R_04
NV_DP_E C1053 *0.01u_16V_X7R_04
3.3VS
MDP_F_HPD [16]
[29] MDP_E_AUX_SCL MDP_E_AUX#_RE TO NV & PCH[30,38] MDP_F_HPD_RE

G_MDPF_MODE [16] C486 C475
MDP_E_AUX_RE
R311 *100K_1%_04
R314 *100K_1%_04 MDPF_MODE_SRC
MDP_E_AUX_SCL 3.3VS 0.1u_10V_X5R_04 0.1u_10V_X5R_04
MDP_E_AUX#_SDA
MDP_E_AUX [15] A_OP_0
R754 *10K_04 R753 *4.7K_04 3.3VS
MDP_E_AUX# [15] A_OP_1
B_AUTO_EQ R767 *10K_04 R766 *4.7K_04 3.3VS
3.3VS R848 10K_04
C1145 2.2u_6.3V_X5R_04 B_EN R904 *4.7K_04 3.3VS R776 4.99K_1%_04 A_CNTRL
3.3VS
R251 *10K_04 A_EQ R248 *10K_04
C563 C549 3.3VS
36
35
34
33
32
31
30
29
28
27
26
25
U71
0.1u_10V_X5R_04 0.1u_10V_X5R_04
V3P3
V3P3
V3P3
SDA_DDC
SCL_DDC
GND
AUX_SNKN
AUX_SRCP
AUX_SRCN
HPD_SRC PERICOM(TI)(PARADA)AUX_SNKP
ENABLE(ENABLE)(PD#)
3.3VS R882 *0_04

NV3V3 R881 0_04
FROM NV Zdiff=100ȍ Zdiff=100ȍ

37
DNC R886 R884 R885
[29] MDP_E0_RE_R
C1131
C1130
0.1u_10V_X7R_04
0.1u_10V_X7R_04
MDP_E0_RE
MDP_E#0_RE
38
39 IN0P GND
24
23
TO CON 4.7K_04 4.7K_04 4.7K_04
[29] MDP_E#0_RE_R IN0N OUT0P MDP_E0 [15]
B_EQ 40 22
MDP_E1_RE EQ(DNC)(CFG1) OUT0N MDP_E#0 [15]

C1129 0.1u_10V_X7R_04 41 21
[29] MDP_E1_RE_R IN1P DNC
C1128 0.1u_10V_X7R_04 MDP_E#1_RE 42 20

[29] MDP_E#1_RE_R IN1N OUT1P MDP_E1 [15]
43 19
D
MDP_E#1 [15]
S
C1127 0.1u_10V_X7R_04 MDP_E2_RE 44 DNC OUT1N 18 G G Q56
[29] MDP_E2_RE_R B
C1126 0.1u_10V_X7R_04 MDP_E#2_RE 45 IN2P GND 17 2SK3018S3
[29] MDP_E#2_RE_R MDP_E2 [15] Q57 Q58
CNTRL(DNC)(REXT)
46 IN2N OUT2P 16 G MDPF_MODE_SRC

MDP_E3_RE OC_0(DNC)(NC) OUT2N MDP_E#2 [15] AO3415 AO3415
C1125 0.1u_10V_X7R_04 47 15
[29] MDP_E3_RE_R
S
C1124 0.1u_10V_X7R_04 MDP_E#3_RE 48 IN3P DNC 14
[29] MDP_E#3_RE_R IN3N OUT3P MDP_E3 [15] MDP_F_AUX_SCL
49 13 MDP_F_AUX#_SDA
HGND OUT3N MDP_E#3 [15]
月PS8330B
CAD_SRC
CAD_SNK
HPD_SNK
V3P3
V3P3
V3P3
3.3VS R914 *0_04

NV3V3 R927 0_04
PS8330B
FROM CON
1
2
3
4
5
6
7
8
9
10
11
12
C1142 2.2u_6.3V_X5R_04 R906 100K_04

C1143 *0.01u_16V_X7R_04 MDP_E_HPD [15] R911 R913 R920
3.3VS 4.7K_04 4.7K_04 4.7K_04
TO NV & PCH [30,38] MDP_E_HPD_RE
G_MDPE_MODE [15]
C555 C562
MDPE_MODE_SRC 0.1u_10V_X5R_04 0.1u_10V_X5R_04
D
S
S
B_OP_0 G G Q62
R874 *10K_04 R873 *4.7K_04 3.3VS Thunderbolt 1/12 2SK3018S3
R878 *10K_04 B_OP_1 R877 *4.7K_04 Q61 Q60
3.3VS G MDPE_MODE_SRC
AO3415 AO3415
R890 4.99K_1%_04 B_CNTRL
S
MDP_E_AUX_SCL
R299 *10K_04 B_EQ R304 *10K_04 MDP_E_AUX#_SDA
3.3VS
3.3VS [3,9,10,11,12,13,15,17,30,31,34,36,37,38,39,40,42,43,46,47,48,49,50,51,52,55,59,64,66,68,70]
NV3V3 [17,18,30,31,59,60,61,62]
Title
[14] DP REDRIVER
A3 P650RP 6-71-P65P0-D02A D03B

5 4 3 2 1
Redriver B - 15
Schematic Diagrams
Mini DP Port E
5 4 3 2 1
R365
R370
*0_04
*0_04
Close to Display PORT mini-Display Port E
1 2
[14] MDP_E#3 D_MDP_E#3 3.3VS MDP_PW R
C617 0.1u_10V_X7R_04
D_MDP_E3 U73
4 3 C616 0.1u_10V_X7R_04
[14] MDP_E3 5 1
L16 *DVI2012F2SF-900T05_08-SHORT VIN VOUT
C607 ᶵ⎗ⷞ C666
R362 *0_04 SY6288DAAC 2
R363 *0_04
*10u_6.3V_X5R_06 㚫㺷暣 GND 10u_6.3V_X5R_06
1 2
[14] MDP_E#2 D_MDP_E#2
D C615 0.1u_10V_X7R_04 D
D_MDP_E2 4 3
4 3 C611 0.1u_10V_X7R_04 [17,53,55] SUSB EN# OC#
[14] MDP_E2
L15 *DVI2012F2SF-900T05_08-SHORT
uP7549UMA5-20
PCB Footprint = M-SOT23-5
R375 *0_04
R372 *0_04
4 3
[14] MDP_E#1 D_MDP_E#1
C620 0.1u_10V_X7R_04
1 2 C630 0.1u_10V_X7R_04 D_MDP_E1
[14] MDP_E1
R376 *0_04
R378 *0_04 MDP_PW R
1 2 COMMON SHIELD6 GND4
[14] MDP_E#0 D_MDP_E#0 SHIELD5
C642 0.1u_10V_X7R_04 GND3
4 3 C633 0.1u_10V_X7R_04 D_MDP_E0
[14] MDP_E0
EMI_GND
PWR 20
20
GND 19
inductor for EMI 19
MDP_E_AUX#_R 18 AUX_CHN
Sheet 15 of 81 D_MDP_E#2J
D_MDP_E2J
17
15
LANE_2N
LANE_2P
18
16
17
15
AUX_CHP16 MDP_E_AUX_R
Mini DP Port E
GND 14
14
GND 13
13
D_MDP_E#3J 12 LANE_3N
12
D_MDP_E3J 10 LANE_3P LANE_1N 11 D_MDP_E#1J
11
10
C D_MDP_E1J 9 LANE_1P C
9
7 GND 8
GND 8
7
G_MDPE_CEC 6 CONFIG2
6
G_MDPE_MODE 4 CONFIG1 LANE_0N 5 D_MDP_E#0J
[14] G_MDPE_MODE 5
4
D_MDP_E0J 3 LANE_0P
3
1 GND HPD 2 MDP_E_HPD_R EMI_GND
2
R941 1
J_MDP1
MDP_PW R D03 1M_04 909JD20FSTC6M0CC
EMI_GND P/N = 6-21-11Y10-020
PCB Footprint = c-909jd20fstc6-1 SHIELD2 GND2
SHIELD1 GND1
3
C
R259 *0_04
MDP_PW R
EMI㒢㓦
A
D57 EMI_GND
R917
2
*BAT54CS3
100K_1%_04
R921 *0402_short MDP_E_AUX#_R

[14] MDP_E_AUX# R956 *0_08
R970 *0_08
B B
R923 *0402_short MDP_E_AUX_R

[14] MDP_E_AUX R458 *0_08
R926
100K_1%_04
EMI_GND DP ESD W/O LEVELSHIFT 暨ᶲ, NET ⎗SWAP
D23
D_MDP_E#3 6 5 D_MDP_E#3J
D_MDP_E3 7 4 D_MDP_E3J
8 3
D02 DT1140-04LP-7
D24 3/18 ㍉岤⺢嬘ἧ䓐20KV ESD
8 3
A A
TO DP REDRIVER D02 DT1140-04LP-7
R951 0_04 L48 FCM1005KF-121T03 MDP_E_HPD_R
[14] MDP_E_HPD
AC
D59
BAV99 RECTIFIER
C1249
220p_50V_NPO_04
Title
[15] MINI DP PORT E
A
MDP_PW R [16] MDP_PW R

[3,9,10,11,12,13,14,17,30,31,34,36,37,38,39,40,42,43,46,47,48,49,50,51,52,55,59,64,66,68,70] 3.3VS Size Document Number Rev
[13,17,36,48,49,50,51,52,55,60,61] 5VS D03B
A3 P650RP
6-71-P65P0-D02A
5 4 3 2 1
B - 16 Mini DP Port E
Schematic Diagrams
Mini DP Port F
5 4 3 2 1
mini-Display Port F
PLEASE CLOSE TO CONNECTOR
MDP_PW R
D R413 *0_04 Close to Display PORT D

1 2 C602
[14] MDP_F#3 D_MDP_F#3
C693 0.1u_10V_X7R_04
L28 4 3 C688 0.1u_10V_X7R_04 D_MDP_F3 10u_6.3V_X5R_06
[14] MDP_F3
*DVI2012F2SF-900T05_08-SHORT
R410 *0_04
R402 *0_04
1 2
[14] MDP_F#2 D_MDP_F#2
C681 0.1u_10V_X7R_04
L27 4 3 C671 0.1u_10V_X7R_04 D_MDP_F2
[14] MDP_F2
R398 *0_04
R415 *0_04 COMMON SHIELD6 GND4

4 3 SHIELD5 GND3
[14] MDP_F#1
C699 0.1u_10V_X7R_04 D_MDP_F#1
L29 1 2 C701 0.1u_10V_X7R_04 D_MDP_F1 MDP_PW R
[14] MDP_F1
R418 *0_04 PWR 20
Sheet 16 of 81
20
GND 19
19
R425 *0_04 MDP_F_AUX#_R 18 AUX_CHN
18
1 2
[14] MDP_F#0 D_MDP_F#0 D_MDP_F#2J
17
MDP_F_AUX_R
C712 0.1u_10V_X7R_04 17 LANE_2N AUX_CHP16
L30
Mini DP Port F
16
4 3 C708 0.1u_10V_X7R_04 D_MDP_F0 D_MDP_F2J 15 LANE_2P
[14] MDP_F0 15
GND
*DVI2012F2SF-900T05_08-SHORT 14
14
R421 *0_04 GND 13
13
D_MDP_F#3J 12 LANE_3N
12
D_MDP_F3J 10 LANE_3P LANE_1N 11 D_MDP_F#1J
11
C C
10
D_MDP_F1J 9 LANE_1P 9
7 GND 8
GND 8
inductor for EMI
7
G_MDPF_CEC 6 CONFIG2
6
G_MDPF_MODE 4 CONFIG1 LANE_0N 5 D_MDP_F#0J
[14] G_MDPF_MODE 5
4
D_MDP_F0J 3 LANE_0P
3
1 GND HPD 2 MDP_F_HPD_R
2
R968 1
J_MDP2
1M_04 909JD20FSTC6M0CC
EMI_GND P/N = 6-21-11Y10-020
PCB Footprint = c-909jd20fstc6-1 SHIELD2 GND2
SHIELD1 GND1
MDP_PW R
3
EMI_GND
C
MDP_PW R
DP ESD W/O LEVELSHIFT 暨ᶲ, NET ⎗SWAP

A
D60
R959
1
D26
*BAT54CS3 R385 *0_08
100K_1%_04
B D_MDP_F#3 6 5 D_MDP_F#3J B
R961 *0402_short MDP_F_AUX#_R R344 *0_08 D_MDP_F3 7 4 D_MDP_F3J
[14] MDP_F_AUX#
8 3
D_MDP_F#2 9 2 D_MDP_F#2J
R277 *0_08 D_MDP_F2 D_MDP_F2J
10 1
MDP_F_AUX_R D02 DT1140-04LP-7

R965 *0402_short
[14] MDP_F_AUX
EMI_GND D27 3/18 ㍉岤⺢嬘ἧ䓐20KV ESD
R967 D_MDP_F#1 D_MDP_F#1J

10 1
D_MDP_F1 9 2 D_MDP_F1J
100K_1%_04
8 3
D_MDP_F0 7 4 D_MDP_F0J
D_MDP_F#0 6 5 D_MDP_F#0J
DT1140-04LP-7
D02
A A
TO DP REDRIVER
R969 0_04 L51 FCM1005KF-121T03 MDP_F_HPD_R
[14] MDP_F_HPD
AC
D61
C1274
220p_50V_NPO_04
BAV99 RECTIFIER Title
[16] MINI DP PORT F
A
MDP_PW R [15] Size Document Number Rev

MDP_PW R
3.3VS [3,9,10,11,12,13,14,15,17,30,31,34,36,37,38,39,40,42,43,46,47,48,49,50,51,52,55,59,64,66,68,70]
5VS [13,17,36,48,49,50,51,52,55,60,61] A3
6-71-P65P0-D02A D03B

5 4 3 2 1
Mini DP Port F B - 17
Schematic Diagrams
HDMI Connector
5 4 3 2 1
HDMI_5VS
5VS
HDMI_5VS
HDMI CONNECTOR HDMI_5VS
EMI
C1355
HDMI_5VS
EMI
C1354
5/13 D02A LOCATION
BY platform 婧㔜℞ῤ
U12 J_HDMI1
5 1 16-A0171-2003-0 R132 R133 *100p_50V_NPO_04 *0.1u_16V_Y5V_04
VIN VOUT P/N = 6-21-14A80-019
C361 ᶵ⎗ⷞ C378 C390 2.2K_04 2.2K_04
SY6288DAAC 2
*10u_6.3V_X5R_06 㚫㺷暣 GND 22u_6.3V_X5R_08 22u_6.3V_X5R_08
4 3 PCB Footprint = C12881-100C

[15,53,55] SUSB EN# OC# HDMI_HPD-C HDMI_SCL-C
D 19 D
uP7549UMA5-20 18 HOT PLUG DETECT
PCB Footprint = M-SOT23-5 +5V 17 HDMI_SDA-C
HDMI_SDA-C 16 DDC/CEC GND
SDA 15 HDMI_SCL-C
14 SCL
C1372 R188 RESERVED HDMI_CEC
13
TMDS_CLOCK#-R 12 CEC
1.5P_50V_04 *180_1%_04 TMDS CLOCK- 11
TMDS_CLOCK-R EMI EMI CLK SHIELD R199
10
TMDS CLOCK+ 9 TMDS_DATA0#-R
TMDS DATA0- *180_1%_04

8
SHIELD0 EMI TMDS_DATA0-R
7
TMDS_DATA1#-R 6 TMDS DATA0+
TMDS DATA1- 5
SHIELD1
Sheet 17 of 81 TMDS_DATA1-R
R206
*180_1%_04
4
2
TMDS DATA1+
SHIELD2
TMDS DATA2-
3
1
TMDS_DATA2#-R
TMDS_DATA2-R
EMI R225
HDMI Connector
TMDS DATA2+
*180_1%_04
GND1
GND2
GND3
GND4
EMI
EMI_GND EMI_GND
GND1
GND2
GND3
GND4
C C
R971 *20mil_Short-p
EMI㒢㓦
EMI_GND
3.3V
1A HDMI 1.1VS
HDMI 2.0 Retimer C1367 0.1u_16V_Y5V_04 C894
10u_6.3V_X5R_06
C905
0.1u_10V_X5R_04
0.1A C1360 0.1u_16V_Y5V_04
3.3VS 5V
HDMI_CTRLCLK R1062 R651
0_04
[29] HDMI_CTRLCLK HDMI_CTRLDATA R1063 C889
0_04
HDMI_CTRLDATA_R
[29] HDMI_CTRLDATA 3.3VS 3.3VS 47K_04
HDMI_CTRLCLK_R
NV3V3 HDMI_5VS R1065 *0_04 U9 1u_10V_Y5V_06
R1066 *0_04 G9661-25ADJF11U 1A
HDMI_SDA-C
HDMI_SCL-C
3 4 V1.1_R 1.1VS
R1064 R1067 VIN VCNTL
SLEW_CTL
OE
J1
10K_04
*64.9K_1%_04 1 6 1 2
R1046 R1048 POK VOUT
OE
2.2K_04 2.2K_04 0.4A 0.4A
2
Q73A 1.1VS 1.1VS 5 *OPEN_2mm

NC
G
*MTDK5S6R R1068 *0_04 2 R127 C354 C347 C349 C348 C1359

HDMI_CTRLCLK 1 6 HDMI_SCL-C 0.1u_16V_Y5V_04 C1361 EN DEFAULT SHORT
C1362 0.1u_16V_Y5V_04 Ra
S
8 7 7.5K_1%_04
41
40
39
38
37
36
35
34
33
32
31
10u_6.3V_X5R_06
10u_6.3V_X5R_06
82p_50V_NPO_04
*10u_6.3V_X5R_06
0.1u_16V_Y5V_04
GND VFB
5
Q73B U87 9
GND
G
B *MTDK5S6R B
VDD_1V1
VCC_3V3
SLEW_CTL
VDD_1V1
GND_PAD
SDA_SRC
SCL_SRC
OE
GND
SDA_SNK
SCL_SNK
HDMI_CTRLDATA 4 3 HDMI_SDA-C
S
R126
C438 0.1u_10V_X7R_04 HDMI_DATA2P_C 1 30 TMDS_DATA2-R
[29] HDMI_DATA2P
C434 0.1u_10V_X7R_04 HDMI_DATA2N_C 2 IN_D2p OUT_D2p 29 TMDS_DATA2#-R
Rb 20K_1%_04
[29] HDMI_DATA2N HDMI_HPD IN_D2n OUT_D2n HDMI_HPD-C
3 28
[30,38] HDMI_HPD HDMI_DATA1P_C HPD_SRC HPD_SNK TMDS_DATA1-R
C421 0.1u_10V_X7R_04 4 27
[29] HDMI_DATA1P HDMI_DATA1N_C IN_D1p OUT_D1p TMDS_DATA1#-R
C412 0.1u_10V_X7R_04 5 26
[29] HDMI_DATA1N IN_D1n OUT_D1n
[29] HDMI_DATA0P
C396 0.1u_10V_X7R_04 HDMI_DATA0P_C
HDMI_DATA0N_C
6
IN_D0p OUT_D0p
25 TMDS_DATA0-R
TMDS_DATA0#-R
ON Vout = 0.8V ( 1 + Ra / Rb )
C394 0.1u_10V_X7R_04 7 24
[29] HDMI_DATA0N I2C_EN/PIN IN_D0n OUT_D0n HDMI_SEL#/A1
8 23
C379 0.1u_10V_X7R_04 HDMI_CLOCKP_C 9 I2C_EN/PIN HDMI_SEL#/A1 22 TMDS_CLOCK-R
[29] HDMI_CLOCKP HDMI_CLOCKN_C IN_CLKp OUT_CLKp TMDS_CLOCK#-R
C373 0.1u_10V_X7R_04 10 21
EQ_SEL/A0
[29] HDMI_CLOCKN IN_CLKn OUT_CLKn
SDA_CTL
PRE_SEL
VCC_3V3
VDD_1V1
VDD_1V1
VDD_1V1
SCL_CTL
VSADJ
GND
3.3VS
DP159RSB
11
12
13
14
15
16
17
18
6.49K_1%_04 19
20
64.9K_1%_04 R1049 I2C_EN/PIN R1050 *64.9K_1%_04 3.3VS 1.1VS
0.1u_16V_Y5V_04 C1363
*64.9K_1%_04 R1051 PRE_SEL R1052 *64.9K_1%_04
0.1A EQ_SEL/A0
PRE_SEL
*64.9K_1%_04 R1053 EQ_SEL/A0 R1054 *64.9K_1%_04 3.3VS
0.4A1.1VS C1371 C1370 C1369 C1368
64.9K_1%_04 R1059 HDMI_SEL#/A1 R1056 *64.9K_1%_04 0.4A1.1VS
0.1u_16V_Y5V_04 C1364
*6p_50V_NPO_04
*6p_50V_NPO_04
*10p_50V_NPO_04
*10p_50V_NPO_04
*64.9K_1%_04 R1060 SLEW _CTL R1061 *64.9K_1%_04 C1365 0.1u_16V_Y5V_04 NV3V3 [14,18,30,31,59,60,61,62]
R1055 *0_04
[3,9,10,11,12,37,52] SMB_CLK_R VDDQ [7,9,10,11,12,37,53,58]
R1057 *0_04 C1366 0.1u_16V_Y5V_04
[3,9,10,11,12,37,52] SMB_DATA_R 5V [45,48,52,53,55,58,59,62,63,64,65,66,67,71,73]
A A
R1058
3.3V [2,13,31,44,45,46,47,50,52,53,55,56,58,59,60,62,70]
3.3VS [3,9,10,11,12,13,14,15,30,31,34,36,37,38,39,40,42,43,46,47,48,49,50,51,52,55,59,64,66,68,70]
5VS [13,36,48,49,50,51,52,55,60,61]
Title
[17] HDMI 2.0 PS8409
A3 P650RP 6-71-P65P0-D02A D03B

5 4 3 2 1
B - 18 HDMI Connector
Schematic Diagrams
VGA PCI Express
1 2 3 4 5
NV3V3 1V8_AON
[31,60] NVVDD_PWRGD
R1069
10K_04
R540
*10K_04
NV PCI EXPRESS
G
Q36
D S 2SK3018S3
[39] PEG_CLKREQ#
A R536 G1A A
INS127416555
*10K_04 BGA2152
COMMON
1/23 PCI_EXPRESS under GPU PLACE btw GPU & VR PEX_VDD
PEX_DVDD BB33
R532 0_04 BK26 PEX_RST PEX_DVDD BB35
[30,31] GPU_PEX_RST#
PEX_DVDD BB36 C131 C125 C69 C84
PEX_CLKREQ# C99
BL26 PEX_CLKREQ PEX_DVDD BC33 C70 C115 C81
1u_6.3V_X6S_04
1u_6.3V_X6S_04
1u_6.3V_X6S_04
1u_6.3V_X6S_04
PEX_DVDD BC35
4.7u_6.3V_X5R_06
4.7u_6.3V_X5R_06
10u_6.3V_X5R_06
22u_6.3V_X5R_08
VGA_PEXCLK BM26 PEX_REFCLK PEX_DVDD BC36
[39] VGA_PEXCLK VGA_PEXCLK# BM27 PEX_REFCLK PEX_DVDD BD33
[39] VGA_PEXCLK#
PEX_DVDD BD36
C255 0.22u_10V_X5R_04 PEX_RX0 BG26 PEX_TX0
[2] PEG_RX0 PEX_RX0#
C242 0.22u_10V_X5R_04 BH26 PEX_TX0
[2] PEG_RX#0
Sheet 18 of 81
BL27 PEX_RX0 GND
[2] PEG_TX0
BK27 PEX_RX0
[2] PEG_TX#0
1V8_RUN
C239 0.22u_10V_X5R_04 PEX_RX1 BF26 PEX_TX1
C238 0.22u_10V_X5R_04 BE26 PEX_TX1 PEX_HVDD BB26
VGA PCI Express

[2] PEG_RX#1
PEX_HVDD BB27
BK29 PEX_RX1 PEX_HVDD BB29
[2] PEG_TX1
BL29 PEX_RX1 PEX_HVDD BB32 C184 C150 C280 C266
[2] PEG_TX#1 C192 C298 C758 C757 C759
PEX_HVDD BC26
1u_6.3V_X6S_04
1u_6.3V_X6S_04
1u_6.3V_X6S_04
1u_6.3V_X6S_04
C224 0.22u_10V_X5R_04 PEX_RX2 BF27 PEX_TX2 PEX_HVDD BC27
4.7u_6.3V_X5R_06
4.7u_6.3V_X5R_06
10u_6.3V_X5R_06
10u_6.3V_X5R_06
22u_6.3V_X5R_08
C212 0.22u_10V_X5R_04 BG27 PEX_TX2 PEX_HVDD BC29
[2] PEG_RX#2
PEX_HVDD BC30
BM29 PEX_RX2 PEX_HVDD BC32
[2] PEG_TX2
BM30 PEX_RX2 PEX_HVDD BD27
[2] PEG_TX#2
PEX_HVDD BD30
B C201 0.22u_10V_X5R_04 PEX_RX3 BG29 PEX_TX3 B
[2] PEG_RX3 PEX_RX3# GND
C196 0.22u_10V_X5R_04 BH29 PEX_TX3
[2] PEG_RX#3
BL30 PEX_RX3
[2] PEG_TX3
BK30 PEX_RX3
[2] PEG_TX#3
C195 0.22u_10V_X5R_04 BE29 PEX_TX4
[2] PEG_RX#4
BK32 PEX_RX4
[2] PEG_TX4
BL32 PEX_RX4
[2] PEG_TX#4
C194 0.22u_10V_X5R_04 PEX_RX5 BF30 1V8_RUN
[2] PEG_RX5 PEX_TX5
C183 0.22u_10V_X5R_04 PEX_RX5# BG30 PEX_TX5
[2] PEG_RX#5
PEX_PLL_HVDD BB30 PEX_PLL_HVDD_SVDD R49 0_04
BM32 PEX_RX5
[2] PEG_TX5
BM33 PEX_RX5 C155
[2] PEG_TX#5
0.1u_10V_X7R_04
C173 0.22u_10V_X5R_04 BH32 PEX_TX6
[2] PEG_RX#6
BL33 PEX_RX6
[2] PEG_TX6
BK33 PEX_RX6
[2] PEG_TX#6
C168 0.22u_10V_X5R_04 BE32 PEX_TX7 GND
[2] PEG_RX#7
BK35 PEX_RX7
[2] PEG_TX7
BL35 PEX_RX7
[2] PEG_TX#7
C154 0.22u_10V_X5R_04 BG33 PEX_TX8
[2] PEG_RX#8
C BM35 PEX_RX8 C
[2] PEG_TX8
BM36 PEX_RX8
[2] PEG_TX#8
[2] PEG_RX9 PEX_RX9# [29,62] PEX_VDD
C142 0.22u_10V_X5R_04 BH35 PEX_TX9
[2] PEG_RX#9
BL36 PEX_RX9
[2] PEG_TX9
BK36 PEX_RX9
[2] PEG_TX#9 [2,13,17,31,44,45,46,47,50,52,53,55,56,58,59,60,62,70] 3.3V
C128 0.22u_10V_X5R_04 BE35 PEX_TX10
[2] PEG_RX#10
[14,17,30,31,59,60,61,62] NV3V3
BK38 PEX_RX10
[2] PEG_TX10
BL38 PEX_RX10 [3,27,28,30,31,32,59,60,61,63] 1V8_AON
[2] PEG_TX#10
PEX_RX11 [19,27,28,31,32,59] 1V8_RUN
C127 0.22u_10V_X5R_04 BF36 PEX_TX11
C124 0.22u_10V_X5R_04 BG36 PEX_TX11
[2] PEG_RX#11
BM38 PEX_RX11
[2] PEG_TX11
BM39 PEX_RX11
[2] PEG_TX#11
C114 0.22u_10V_X5R_04 BH38 PEX_TX12
[2] PEG_RX#12
BL39 PEX_RX12
[2] PEG_TX12
BK39 PEX_RX12
[2] PEG_TX#12
C98 0.22u_10V_X5R_04 BE38 PEX_TX13
[2] PEG_RX#13
BK41 PEX_RX13
[2] PEG_TX13
BL41 PEX_RX13
[2] PEG_TX#13
D C97 0.22u_10V_X5R_04 PEX_RX14 BF39 PEX_TX14 D
C87 0.22u_10V_X5R_04 BG39 PEX_TX14
[2] PEG_RX#14
BM41 PEX_RX14
[2] PEG_TX14
BM42 PEX_RX14
[2] PEG_TX#14
C86 0.22u_10V_X5R_04 PEX_RX15 BH41 PEX_TX15
C83 0.22u_10V_X5R_04 BG41 PEX_TX15
[2] PEG_RX#15
BL42 PEX_RX15 PEX_TERMP BL44 PEX_TERMP R531 2.49K_1%_04
[2] PEG_TX15 Title
BK42
[2] PEG_TX#15 PEX_RX15
[18] VGA PCI EXPRESS
GND
Custom P650RP 6-71-P65P0-D02A D03B

1 2 3 4 5
VGA PCI Express B - 19

Schematic Diagrams
VGA Frame Buffer Partition

1 2 3 4 5 6 7 8
G1C
G1B
INS127421140
BGA2152
COMMON
PAGE3: GPU FRAME BUFFER PARTITION A/B INS127422923
BGA2152
COMMON
3/23 FBB
2/23 FBA
FBB_D0 H32 FBB_D0 FBB_CMD0 B35 FBB_CMD0
A FBA_D0 U51 Y51 FBA_CMD0 FBA_DBI[7..0] FBB_DBI[7..0] FBB_D1 D32 A35 FBB_CMD1 A
FBA_D0 FBA_CMD0 FBA_DBI[7..0] [20] FBB_DBI[7..0] [21] FBB_D1 FBB_CMD1
FBA_D1 U48 FBA_D1 FBA_CMD1 Y52 FBA_CMD1 FBB_D2 A33 FBB_D2 FBB_CMD2 D35 FBB_CMD2
FBA_D2 U50 Y49 FBA_CMD2 FBA_EDC[7..0] FBB_EDC[7..0] FBB_D3 B32 A36 FBB_CMD3
FBA_D2 FBA_CMD2 FBA_EDC[7..0] [20] FBB_EDC[7..0] [21] FBB_D3 FBB_CMD3
FBA_D3 U49 FBA_D3 FBA_CMD3 AA52 FBA_CMD3 FBB_D4 E32 FBB_D4 FBB_CMD4 B36 FBB_CMD4
FBA_D4 R51 AA51 FBA_CMD4 FBA_CMD[31..0] FBB_CMD[31..0] FBB_D5 G32 C36 FBB_CMD5
FBA_D4 FBA_CMD4 FBA_CMD[31..0] [20] FBB_CMD[31..0] [21] FBB_D5 FBB_CMD5
FBA_D5 R50 FBA_D5 FBA_CMD5 AA50 FBA_CMD5 FBB_D6 J30 FBB_D6 FBB_CMD6 C38 FBB_CMD6
FBA_D6 R47 AC50 FBA_CMD6 FBA_D[63..0] FBB_D[63..0] FBB_D7 F32 B38 FBB_CMD7
FBA_D6 FBA_CMD6 FBA_D[63..0] [20] FBB_D[63..0] [21] FBB_D7 FBB_CMD7
FBA_D7 U46 FBA_D7 FBA_CMD7 AC51 FBA_CMD7 FBB_D8 H36 FBB_D8 FBB_CMD8 A38 FBB_CMD8
FBA_D8 V46 FBA_D8 FBA_CMD8 AC52 FBA_CMD8 FBB_D9 G36 FBB_D9 FBB_CMD9 D38 FBB_CMD9
FBA_D9 Y45 FBA_D9 FBA_CMD9 AC49 FBA_CMD9 FBB_D10 J36 FBB_D10 FBB_CMD10 A39 FBB_CMD10
FBA_D10 Y47 FBA_D10 FBA_CMD10 AD52 FBA_CMD10 FBB_D11 F36 FBB_D11 FBB_CMD11 B39 FBB_CMD11
FBA_D11 Y46 FBA_D11 FBA_CMD11 AD51 FBA_CMD11 FBB_D12 F33 FBB_D12 FBB_CMD12 C39 FBB_CMD12
FBA_D12 V50 FBA_D12 FBA_CMD12 AD50 FBA_CMD12 FBB_D13 D33 FBB_D13 FBB_CMD13 C41 FBB_CMD13
FBA_D13 V47 FBA_D13 FBA_CMD13 AF50 FBA_CMD13 FBB_D14 J32 FBB_D14 FBB_CMD14 B41 FBB_CMD14
FBA_D14 U52 AF51 FBA_CMD14 FBB_D15 G33 A41 FBB_CMD15
FBA_D15 V51
FBA_D14
FBA_D15
FBA_CMD14
FBA_CMD15 AF52 FBA_CMD15 GDDR5 Mode F Mapping FBB_D16 E45
FBB_D15
FBB_D16
FBB_CMD15
FBB_CMD16 B49 FBB_CMD16
FBA_D16 AJ44 FBA_D16 FBA_CMD16 AN50 FBA_CMD16 FBB_D17 D45 FBB_D17 FBB_CMD17 A49 FBB_CMD17
FBA_D17 AG48 AN51 FBA_CMD17 FBB_D18 F45 A48 FBB_CMD18
FBA_D18 AJ45
FBA_D17 FBA_CMD17
AN52 FBA_CMD18
GB3B-256 ch0 0..31 ch1 32..63 FBB_D19 G45
FBB_D18 FBB_CMD18
D47 FBB_CMD19
FBA_D18 FBA_CMD18 FBB_D19 FBB_CMD19
FBA_D19 AG49 AM49 FBA_CMD19 FBB_D20 D42 A47 FBB_CMD20
FBA_D20 AF46
FBA_D19 FBA_CMD19
AM52 FBA_CMD20
CMD0 CAS* FBB_D21 E42
FBB_D20 FBB_CMD20
B47 FBB_CMD21
FBA_D21 AF47 AM51 FBA_CMD21 FBB_D22 F42 C47 FBB_CMD22
FBA_D22 AF48
FBA_D21 FBA_CMD21
AM50 FBA_CMD22
1.55V CMD1 CKE* FBB_D23 H41
FBB_D22 FBB_CMD22
C45 FBB_CMD23 1.55V
FBA_D22 FBA_CMD22 FBVDDQ FBB_D23 FBB_CMD23
FBA_D23 AD47 AK50 FBA_CMD23 FBB_D24 E41 B45 FBB_CMD24
FBA_D24 AD49
FBA_D23 FBA_CMD23
AK51 FBA_CMD24
CMD2 RST* FBB_D25 F39
FBB_D24 FBB_CMD24
A45 FBB_CMD25
FBVDDQ
FBA_D25 AD48 AK52 FBA_CMD25 FBB_D26 E39 D44 FBB_CMD26
FBA_D26 AC46
FBA_D25 FBA_CMD25
AJ49 FBA_CMD26
CMD3 RAS* FBB_D27 D39
FBB_D26 FBB_CMD26
A44 FBB_CMD27
Sheet 19 of 81
FBA_D27 AC47 AJ52 FBA_CMD27 FBB_D28 F38 B44 FBB_CMD28
FBA_D28 AA47
FBA_D27 FBA_CMD27
AJ51 FBA_CMD28
CMD4 A1_A9 FBB_D29 E38
FBB_D28 FBB_CMD28
C44 FBB_CMD29
FBA_D29 AA46 AJ50 FBA_CMD29 R31 R30 FBB_D30 D36 C42 FBB_CMD30 R45 R26
FBA_D30 AA45
FBA_D29 FBA_CMD29
AG50 FBA_CMD30
CMD5 A0_A10 FBB_D31 E36
FBB_D30 FBB_CMD30
B42 FBB_CMD31
FBA_D30 FBA_CMD30 *60.4_1%_04 *60.4_1%_04 FBB_D31 FBB_CMD31 *60.4_1%_04 *60.4_1%_04
VGA Frame Buffer

FBA_D31 Y44 AG51 FBA_CMD31 FBB_D32 M50 A42
FBA_D32 AW51
FBA_D31 FBA_CMD31
AG52
CMD6 A12_RFU FBB_D33 P48
FBB_D32 FBB_CMD32
D41
FBA_D33 BA52 AF49 FBB_D34 M51 C35 FBB_DEBUG0
FBA_D34 AW50
FBA_D33 FBA_CMD33
Y50 FBA_DEBUG0
CMD7 ABI* FBB_D35 M49
FBB_D34 FBB_CMD34
B50 FBB_DEBUG1
B
FBA_D34 FBA_CMD34 FBB_D35 FBB_CMD35 B
FBA_D35 BA51 AR50 FBA_DEBUG1 FBB_D36 P47
FBA_D35 FBA_CMD35 CMD8 A6_A11 FBB_D36
Partition FBA_D36
FBA_D37
FBA_D38
FBA_D39
BA50
BB50
BA49
AW49
FBA_D36
FBA_D37
FBA_D38
FBA_D39 FBA_DBG_RFU1 AA44
CMD9
CMD10
A7_A8
WE*
FBB_D37
FBB_D38
FBB_D39
FBB_D40
P52
R46
P46
L50
FBB_D37
FBB_D38
FBB_D39
FBB_D40
FBB_DBG_RFU1
FBB_DBG_RFU2
J35
J41
FBA_D40 AV48 FBA_D40 FBA_DBG_RFU2 AN44 FBB_D41 L51 FBB_D41
FBA_D41 AT49 FBB_D42 L52
FBA_D42 AT47
FBA_D41 CMD11 A5_BA1 FBB_D43 L49
FBB_D42
FBA_D42 FBB_D43
FBA_D43 AT48 FBB_D44 M46 H42 FBB_CLK0
FBA_D44 AT46
FBA_D43
AG45 FBA_CLK0 FB_CLK
CMD12 A4_BA2 FBB_D45 L47
FBB_D44 FBB_CLK0
G42 FBB_CLK0#
DP_FBB_CLK0 FB_CLK FBB_CLK0 [21]
FBA_D44 FBA_CLK0 DP_FBA_CLK0 FBA_CLK0 [20] FBB_D45 FBB_CLK0 DP_FBB_CLK0 FB_CLK FBB_CLK0# [21]
FBA_D45 AV51 AG46 FBA_CLK0# FB_CLK FBB_D46 M48 F47 FBB_CLK1
FBA_D46 AV52
FBA_D45 FBA_CLK0
AK46 FBA_CLK1
DP_FBA_CLK0
FB_CLK
FBA_CLK0# [20] CMD13 A2_BA0 FBB_D47 M47
FBB_D46 FBB_CLK1
E47 FBB_CLK1#
DP_FBB_CLK1 FB_CLK FBB_CLK1 [21]
FBA_D46 FBA_CLK1 DP_FBA_CLK1 FBA_CLK1 [20] FBB_D47 FBB_CLK1 DP_FBB_CLK1 FB_CLK FBB_CLK1# [21]
FBA_D47 AV49 AK45 FBA_CLK1# FB_CLK FBB_D48 D48
FBA_D48 AJ48
FBA_D47 FBA_CLK1 DP_FBA_CLK1 FBA_CLK1# [20] CMD14 A3_BA3 FBB_D49 C50
FBB_D48
FBA_D48 FBB_D49
FBA_D49 AJ46 FBB_D50 C48
FBA_D50 AJ47
FBA_D49 CMD15 CS* FBB_D51 C49
FBB_D50
FBA_D50 FBB_D51
FBA_D51 AK49 FBB_D52 E49
FBA_D52 AM47
FBA_D51 CMD16 CAS* FBB_D53 E50
FBB_D52
FBA_D52 FBB_D53
FBA_D53 AM46 FBB_D54 F49
FBA_D54 AN48
FBA_D53 CMD17 CKE* FBB_D55 F48
FBB_D54
FBA_D54 FBB_D55
FBA_D55 AN49 FBB_D56 F50 J33 FBB_WCK01
FBA_D56 AM44
FBA_D55
U45 FBA_WCK01 FB_WCK
CMD18 RST* FBB_D57 D52
FBB_D56 FBB_WCK01
H33 FBB_WCK01#
FBB_WCK01 FB_WCK FBB_WCK01 [21]
FBA_D56 FBA_WCK01 FBA_WCK01 FBA_WCK01 [20] FBB_D57 FBB_WCK01 FBB_WCK01 FB_WCK FBB_WCK01# [21]
FBA_D57 AM45 U44 FBA_WCK01# FB_WCK FBB_D58 J50 G35
FBA_D58 AN45
FBA_D57 FBA_WCK01
V45
FBA_WCK01 FBA_WCK01# [20] CMD19 RAS* FBB_D59 H48
FBB_D58 FBB_WCKB01
H35
FBA_D58 FBA_WCKB01 FBB_D59 FBB_WCKB01
FBA_D59 AN46 V44 FBB_D60 H51 J39 FBB_WCK23
FBA_D60 AR48
FBA_D59 FBA_WCKB01
AC45 FBA_WCK23 FB_WCK
CMD20 A1_A9 FBB_D61 J51
FBB_D60 FBB_WCK23
H39 FBB_WCK23#
FBA_D60 FBA_WCK23 FBA_WCK23 FBA_WCK23 [20] FBB_D61 FBB_WCK23 FBB_WCK23 FB_WCK FBB_WCK23# [21]
FBA_D61 AN47 AC44 FBA_WCK23# FB_WCK FBB_D62 H49 F41
FBA_D62 AR47
FBA_D61 FBA_WCK23
AD46
FBA_WCK23 FBA_WCK23# [20] CMD21 A0_A10 FBB_D63 H52
FBB_D62 FBB_WCKB23
G41
FBA_D62 FBA_WCKB23 FBB_D63 FBB_WCKB23
FBA_D63 AR46 AD45 L46 FBB_WCK45
FBA_D63 FBA_WCKB23
AV47 FBA_WCK45 FB_WCK
CMD22 A12_RFU FBB_WCK45
L45 FBB_WCK45#
FBA_WCK45 FBA_WCK45 FBA_WCK45 [20] FBB_WCK45 FBB_WCK45 FB_WCK FBB_WCK45# [21]
AV46 FBA_WCK45# FB_WCK FBB_DBI0 C32 M44
FBA_DBI0 U47
FBA_WCK45
AW48
FBA_WCK45 FBA_WCK45# [20] CMD23 ABI* FBB_DBI1 E33
FBB_DQM0 FBB_WCKB45
M45
FBA_DQM0 FBA_WCKB45 FBB_DQM1 FBB_WCKB45
FBA_DBI1 Y48 AW47 FBB_DBI2 E44 H47 FBB_WCK67
FBA_DBI2 AG47
FBA_DQM1 FBA_WCKB45
AR45 FBA_WCK67 FB_WCK
CMD24 A6_A11 FBB_DBI3 G39
FBB_DQM2 FBB_WCK67
H46 FBB_WCK67#
FBA_DQM2 FBA_WCK67 FBA_WCK67 FBA_WCK67 [20] FBB_DQM3 FBB_WCK67 FBB_WCK67 FB_WCK FBB_WCK67# [21]
FBA_DBI3 AC48 AR44 FBA_WCK67# FB_WCK FBB_DBI4 P49 J47
C
FBA_DBI4 BB51
FBA_DQM3 FBA_WCK67
AT45
FBA_WCK67 FBA_WCK67# [20] CMD25 A7_A8 FBB_DBI5 L48
FBB_DQM4 FBB_WCKB67
J46
C
FBA_DQM4 FBA_WCKB67 FBB_DQM5 FBB_WCKB67
FBA_DBI5 AV50 AT44 FBB_DBI6 D50
FBA_DBI6 AM48
FBA_DQM5 FBA_WCKB67 CMD26 WE* FBB_DBI7 H50
FBB_DQM6
FBA_DQM6 FBB_DQM7
FBA_DBI7 AR49 FBA_DQM7 CMD27 A5_BA1
FBB_EDC0 B33
FBA_EDC0 R48
CMD28 A4_BA2 FBB_EDC1 E35
FBB_DQS_WP0
FBA_DQS_WP0 FBB_DQS_WP1
FBA_EDC1 V48 FBB_EDC2 G44
FBA_EDC2 AF44
FBA_DQS_WP1 CMD29 A2_BA0 FBB_EDC3 H38
FBB_DQS_WP2
FBA_DQS_WP2 FBB_DQS_WP3
FBA_EDC3 AA48 FBB_EDC4 P50
FBA_EDC4 BB52
FBA_DQS_WP3 CMD30 A3_BA3 FBB_EDC5 J48
FBB_DQS_WP4
FBA_DQS_WP4 FBB_DQS_WP5 PLACE AT BALLS
FBA_EDC5 AT50 PLACE AT BALLS FBB_EDC6 D51
FBA_EDC6 AK48
FBA_DQS_WP5 CMD31 CS* FBB_EDC7 F51
FBB_DQS_WP6
L38 FB_PLL_AVDD
FBA_DQS_WP6 FBB_DQS_WP7 FBB_PLL_AVDD FB_PLL_AVDD [23]
FBA_EDC7 AR51 FBA_DQS_WP7 FBA_PLL_AVDD AN42 FB_PLL_AVDD LB2 . HCB1608KF-300T60 1V8_RUN
C254 C313 Y17 GND C117
W47 GND Y18 GND
W49 GND 0.1u_10V_X7R_04 22u_6.3V_X5R_08 Y19 GND
W51 GND Y20 GND 0.1u_10V_X7R_04
W6 GND Y21 GND
W8 GND GND GND Y22 GND
Y14 GND Y23 GND
Y15 GND Y24 GND GND
Y16 GND
FBVDDQ FBVDDQ
GND
GND
FB_PLL_AVDD AF42 FB_REFPLL_AVDD0
L29 FB_REFPLL_AVDD1
R4 R5 R40 R3
10K_04 10K_04 10K_04 10K_04
D C174 C245 FBA_CMD1 FBB_CMD1 D

FBA_CMD17 FBB_CMD17
0.1u_10V_X7R_04 0.1u_10V_X7R_04
FBA_CMD2 FBB_CMD2 [18,27,28,31,32,59] 1V8_RUN
FBA_CMD18 FBB_CMD18 [20,21,22,23,24,25,27,32,63] FBVDDQ
GND R13 R14 R12 R41
10K_04 10K_04 10K_04 10K_04
Title
[19] VGA Frame Buffer Partition
ɈP6xxRA Frame A,Bᶵᶲẞ(㔜枩␐怲暞ẞᶵᶲẞ)
GND GND

1 2 3 4 5 6 7 8
B - 20 VGA Frame Buffer Partition

Schematic Diagrams
Frame Buffer Partition A

1 2 3 4 5 6 7 8
FBA_WCK01 FBA_CMD[31..0]
[19] FBA_W CK01 FBA_WCK01# [19] FBA_CMD[31..0]
[19]
[19]
[19]
FBA_W CK01#
FBA_W CK23
FBA_W CK23#
FBA_WCK23
FBA_WCK23#
FBA_WCK45
[19] FBA_D[63..0]
FBA_D[63..0]
FBA_DBI[7..0]
FRAME BUFFER PARTITION A
[19] FBA_W CK45 FBA_WCK45# [19] FBA_DBI[7..0]
[19] FBA_W CK45# FBA_WCK67 FBA_EDC[7..0]
[19] FBA_W CK67 FBA_WCK67# [19] FBA_EDC[7..0] M8D
[19] FBA_W CK67# INS115241755
BGA170
COMMON
A M7D NORMAL M8B A

INS115242370 INS115241858
BGA170_MIRR
FBA_D32 A4 DQ0 BGA170
COMMON FBA_D33 A2 DQ1 COMMON
FBA_D34 B4 DQ2
MIRRORED M7B
FBA_D35 B2 DQ3 FBA_CMD19 G3 RAS
INS115242074
x32 x16 BGA170_MIRR
FBA_D36 E4 DQ4 FBA_CMD16 L3 CAS
FBA_D0 V4 DQ0 COMMON FBA_D37 E2 DQ5 FBA_CMD26 L12 WE
NC
FBA_D1 V2 DQ1 FBA_D38 F4 DQ6 FBA_CMD31 G12 CS
NC
FBA_D2 T4 DQ2 FBA_CMD3 L3 RAS FBA_D39 F2 DQ7
NC
FBA_D3 T2 DQ3 FBA_CMD0 G3 CAS FBA_CMD23 J4 ABI
NC
FBA_D4 N4 DQ4 FBA_CMD10 G12 WE FBA_EDC4 C2 EDC0
NC
FBA_D5 N2 DQ5 FBA_CMD15 L12 CS FBA_DBI4 D2 DBI0 FBA_CMD21 H4 A0_A10
NC
FBA_D6 M4 DQ6 VREFD A10 FBA_CMD20 H5 A1_A9
NC
FBA_D7 M2 DQ7 FBA_CMD7 J4 ABI FBA_CMD29 H11 A2_BA0
NC
x32 x16 FBA_CMD30 H10 A3_BA3
FBA_EDC0 R2 EDC0 FBA_CMD5 K4 A0_A10 FBA_D40 A11 DQ8 FBA_CMD28 K11 A4_BA2
NC NC
FBA_DBI0 P2 DBI0 FBA_CMD4 K5 A1_A9 FBA_D41 A13 DQ9 FBA_CMD27 K10 A5_BA1
NC NC
FBA_CMD13 K11 A2_BA0 FBA_D42 B11 DQ10 FBA_CMD24 K5 A6_A11
NC
FBA_CMD14 K10 A3_BA3 FBA_D43 B13 DQ11 FBA_CMD25 K4 A7_A8
NC
VREFD V10 FBA_CMD12 H11 A4_BA2 FBA_D44 E11 DQ12 FBA_CMD22 J5 RFU_A12
NC
FBA_D8
FBA_D9
FBA_D10
FBA_D11
V11
V13
T11
T13
DQ8
DQ9
DQ10
FBA_CMD11
FBA_CMD8
FBA_CMD9
FBA_CMD6
H10
H5
H4
J5
A5_BA1
A6_A11
A7_A8
FBA_D45
FBA_D46
FBA_D47
E13
F11
F13
DQ13
DQ14
DQ15
NC
NC
NC
Sheet 20 of 81
DQ11 RFU_A12
FBA_D12
FBA_D13
FBA_D14
FBA_D15
N11
N13
M11
M13
DQ12
DQ13
DQ14
FBA_EDC5 C13
FBA_DBI5 D13
FBA_W CK45 D4
EDC1
DBI1
GND
NC
FBA_CMD18
FBA_CMD17
J2
J3
RESET
CKE
Frame Buffer
DQ15 WCK01
B
FBA_EDC1
FBA_DBI1
R13
P13
EDC1
DBI1
FBA_CMD2
FBA_CMD1
J2
J3
RESET
CKE
FBA_W CK45# D5 WCK01
K4G80325FB-HC25
[19]
[19]
FBA_CLK1
FBA_CLK1#
J12
J11
CLK
CLK
B
Partition A
FBA_W CK01 P4 WCK01 J12 CLK R8 R9
FBA_W CK01# [19] FBA_CLK0 M8A
P5 WCK01 J11 CLK 40.2_1%_04 40.2_1%_04
[19] FBA_CLK0# INS115241971
BGA170
K4G80325FB-HC25 COMMON
R11 R10
NORMAL
M7A 40.2_1%_04 40.2_1%_04
FBA_D48 V11 DQ16 A5 NC_RFU_A5
INS115242217
FBA_D49 C18
BGA170_MIRR V13 DQ17 V5 NC_RFU_V5
COMMON FBA_D50 T11 DQ18
FBA_D51 0.01u_50V_X7R_04
MIRRORED
T13 DQ19
A5 NC_RFU_A5 FBA_D52 N11 DQ20
C20 FBA_D53
x32 x16 V5 NC_RFU_V5 N13 DQ21
FBA_D16 A11 DQ16 FBA_D54 M11 DQ22
FBA_D17
NC 0.01u_50V_X7R_04 FBA_D55 GND
A13 DQ17 NC
M13 DQ23
FBA_D18 B11 FBVDDQ
DQ18 NC
FBA_D19 B13 DQ19 FBA_EDC6 R13 EDC2
NC
FBA_D20 E11 DQ20 FBA_DBI6 P13 DBI2
NC
FBA_D21 E13 GND V10
DQ21 NC VREFD 0.300
FBA_D22 F11 DQ22 R510 FBA_VREFC J14 VREFC
NC
FBA_D23 F13 DQ23 549_1%_04 x32 x16
NC
FBA_D56 V4 DQ24 FBA_ZQ2 J13 ZQ
NC
FBA_EDC2 C13 EDC2 0.300 FBA_D57 V2 DQ25 C785
GND NC
FBA_DBI2 D13 DBI2 FBA_VREFC J14 VREFC FBA_D58 T4 DQ26 J10 SEN
NC NC
820p_50V_X7R_04
FBA_D59 T2 R502
ŇŃłŠŗœņŇń
DQ27 NC
FBA_ZQ0 J13 ZQ FBA_D60 N4 DQ28 121_1%_04
C C784 FBA_D61
NC
C
VREFD A10 N2 DQ29 K4G80325FB-HC25
FBA_D24 R506 FBA_D62
NC
A4 DQ24 J10 SEN M4 DQ30
1.33K_1%_04 NC
820p_50V_X7R_04
FBA_D25 A2 DQ25 FBA_D63 M2 DQ31

FBA_D26 R498 NC
B4 DQ26
FBA_D27 121_1%_04 FBA_EDC7
B2 DQ27 K4G80325FB-HC25 R2 EDC3 NC GND GND GND
FBA_D28 E4 DQ28 FBA_DBI7 P2 DBI3 NC
FBA_D29 E2 DQ29
FBA_D30 F4 DQ30 FBA_W CK67 P4 WCK23
FBA_D31 F2 DQ31 GND FBA_W CK67# P5 WCK23
GND GND
FBA_EDC3 C2 EDC3 K4G80325FB-HC25
FBA_DBI3 D2 DBI3
FBA_W CK23 D4 WCK23

FBA_W CK23# D5 WCK23
K4G80325FB-HC25
0.300 FBA_VREF_L R507 931_1%_04 FBA_VREFC

D
Q31
G 2SK3018S3
[21,24,30] GPIO10_ALT_MEM_VREF
S
D [19,21,22,23,24,25,27,32,63] FBVDDQ D
GND
ɈP6xxRA Frame A,Bᶵᶲẞ(㔜枩ᶵᶲẞ) Title
[20] Frame Buffer Partition A
P6x0RG, P6x0RE VRAM=K4G80325FB-HC03, HC28 Size Document Number Rev
P6x0RG1, P6x0RE1, P6x0RA VRAM=K4G41325FC-HC03 A3 P650RP 6-71-P65P0-D02A D03B

1 2 3 4 5 6 7 8
Frame Buffer Partition A B - 21

Schematic Diagrams
Frame Buffer Partition B

1 2 3 4 5 6 7 8
FBB_WCK01 FBB_CMD[31..0]
[19] FBB_W CK01 FBB_WCK01# [19] FBB_CMD[31..0]
[19]
[19]
[19]
FBB_W CK01#
FBB_W CK23
FBB_W CK23#
FBB_WCK23
FBB_WCK23#
FBB_WCK45
[19] FBB_D[63..0]
FBB_D[63..0]
FBB_DBI[7..0]
FRAME BUFFER PARTITION B
[19] FBB_W CK45 FBB_WCK45# [19] FBB_DBI[7..0]
[19] FBB_W CK45# FBB_WCK67 FBB_EDC[7..0]
[19] FBB_W CK67 FBB_WCK67# [19] FBB_EDC[7..0]
[19] FBB_W CK67# M6B
M5B M6D INS115243542
M5D INS115243645 BGA170
INS115243758
A COMMON A
BGA170_MIRR BGA170
INS115243861
COMMON COMMON
BGA170_MIRR
COMMON FBB_CMD19 G3 RAS
FBB_CMD3 L3
NORMAL FBB_CMD16 L3
MIRRORED RAS CAS
FBB_CMD0 G3 CAS FBB_D32 A4 DQ0 FBB_CMD26 L12 WE
x32 x16 FBB_CMD10 G12 WE FBB_D33 A2 DQ1 FBB_CMD31 G12 CS
FBB_D0 V4 DQ0 FBB_CMD15 L12 CS FBB_D34 B4 DQ2
NC
FBB_D1 V2 DQ1 FBB_D35 B2 DQ3 FBB_CMD23 J4 ABI
NC
FBB_D2 T4 DQ2 FBB_CMD7 J4 ABI FBB_D36 E4 DQ4
NC
FBB_D3 T2 DQ3 FBB_D37 E2 DQ5 FBB_CMD21 H4 A0_A10
NC
FBB_D4 N4 DQ4 FBB_CMD5 K4 A0_A10 FBB_D38 F4 DQ6 FBB_CMD20 H5 A1_A9
NC
FBB_D5 N2 DQ5 FBB_CMD4 K5 A1_A9 FBB_D39 F2 DQ7 FBB_CMD29 H11 A2_BA0
NC
FBB_D6 M4 DQ6 FBB_CMD13 K11 A2_BA0 FBB_CMD30 H10 A3_BA3
NC
FBB_D7 M2 DQ7 FBB_CMD14 K10 A3_BA3 FBB_EDC4 C2 EDC0 FBB_CMD28 K11 A4_BA2
NC
FBB_CMD12 H11 A4_BA2 FBB_DBI4 D2 DBI0 FBB_CMD27 K10 A5_BA1
FBB_EDC0 R2 EDC0 FBB_CMD11 H10 A5_BA1 VREFD A10 FBB_CMD24 K5 A6_A11
NC
FBB_DBI0 P2 DBI0 FBB_CMD8 H5 A6_A11 FBB_CMD25 K4 A7_A8
NC
FBB_CMD9 H4 A7_A8 x32 x16 FBB_CMD22 J5 RFU_A12
FBB_CMD6 J5 RFU_A12 FBB_D40 A11 DQ8 NC
VREFD V10 FBB_D41 A13 DQ9 NC
FBB_D8 V11 DQ8 FBB_D42 B11 DQ10 NC
FBB_D9 V13 FBB_D43 B13
Sheet 21 of 81
DQ9 DQ11 NC
FBB_D10 T11 DQ10 FBB_D44 E11 DQ12 NC
FBB_D11 T13 DQ11 FBB_D45 E13 DQ13 FBB_CMD18 J2 RESET
NC
FBB_D12 N11 DQ12 FBB_CMD2 J2 RESET FBB_D46 F11 DQ14 FBB_CMD17 J3 CKE
NC
FBB_D13 N13 FBB_CMD1 J3 FBB_D47 F13
Frame Buffer FBB_D14
FBB_D15
M11
M13
DQ13
DQ14
DQ15 [19] FBB_CLK0
J12
J11
CKE
CLK
CLK
FBB_EDC5
FBB_DBI5
C13
D13
DQ15
EDC1
DBI1
NC
GND
[19]
[19]
FBB_CLK1
FBB_CLK1#
J12
J11
CLK
CLK
FBB_EDC1 [19] FBB_CLK0# NC
Partition B
B R13 EDC1 B
FBB_DBI1 P13 DBI1 FBB_W CK45 D4 WCK01
FBB_W CK45# R6 R7
D5 WCK01
FBB_W CK01 R35 R34 40.2_1%_04 40.2_1%_04
P4 WCK01
FBB_W CK01# P5 40.2_1%_04 40.2_1%_04 K4G80325FB-HC25
WCK01
M6A
K4G80325FB-HC25
INS115243964
BGA170 A5 NC_RFU_A5
M5A
A5 NC_RFU_A5 COMMON C17 V5 NC_RFU_V5
INS115244067
FBVDDQ C64 V5 NC_RFU_V5
BGA170_MIRR NORMAL
COMMON 0.01u_50V_X7R_04
0.01u_50V_X7R_04 FBB_D48 V11 DQ16
MIRRORED
FBB_D49 V13 DQ17
x32 x16 FBB_D50 T11 DQ18
FBB_D16 A11 DQ16 FBB_D51 T13 DQ19 GND
NC
FBB_D17 A13 DQ17 R528 GND FBB_D52 N11 DQ20
NC
FBB_D18 B11 DQ18 549_1%_04 FBB_D53 N13 DQ21
NC
FBB_D19 B13 DQ19 FBB_D54 M11 DQ22
NC
FBB_D20 E11 DQ20 FBB_D55 M13 DQ23 0.300
NC
FBB_D21 E13 DQ21 0.300 FBB_VREFC J14 VREFC
NC
FBB_D22 F11 DQ22 FBB_VREFC J14 VREFC FBB_EDC6 R13 EDC2
NC
FBB_D23 F13 DQ23 FBB_DBI6 P13 DBI2 FBB_ZQ2 J13 ZQ
NC
FBB_ZQ0 J13 ZQ VREFD V10 C786
FBB_EDC2 C13 EDC2 C800 R526 J10 SEN
GND
820p_50V_X7R_04
FBB_DBI2 D13 DBI2 1.33K_1%_04 J10 SEN x32 x16
NC
820p_50V_X7R_04 FBB_D56 V4 DQ24 R499
NC
R527 FBB_D57 V2 DQ25 121_1%_04 K4G80325FB-HC25
NC
VREFD A10 121_1%_04 K4G80325FB-HC25 FBB_D58 T4 DQ26 NC
FBB_D24 A4 DQ24 FBB_D59 T2 DQ27 NC
C FBB_D25 A2 FBB_D60 N4 C
DQ25 DQ28 NC
FBB_D26 B4 DQ26 GND GND FBB_D61 N2 DQ29 NC
FBB_D27 B2 DQ27 FBB_D62 M4 DQ30 GND
NC
FBB_D28 E4 DQ28 FBB_D63 M2 DQ31 NC
FBB_D29 E2 DQ29
FBB_D30 F4 GND FBB_EDC7 R2
DQ30 EDC3 NC GND
FBB_D31 F2 DQ31 FBB_DBI7 P2 DBI3 NC
FBB_EDC3 C2 EDC3 FBB_W CK67 P4 WCK23

FBB_DBI3 D2 DBI3 FBB_W CK67# P5 WCK23
FBB_W CK23 D4 WCK23 K4G80325FB-HC25

FBB_W CK23# D5 WCK23
K4G80325FB-HC25
FBB_VREF_H R525 931_1%_04 FBB_VREFC
0.300
D
Q35
G 2SK3018S3
S
D D
[19,20,22,23,24,25,27,32,63] FBVDDQ
GND
ɈP6xxRA Frame A,Bᶵᶲẞ(㔜枩ᶵᶲẞ)
Title
[21] Frame Buffer Partition B
P6x0RG, P6x0RE VRAM=K4G80325FB-HC03, HC28 A3 P650RP 6-71-P65P0-D02A D03B
P6x0RG1, P6x0RE1, P6x0RA VRAM=K4G41325FC-HC03 Date: Tuesday, July 19, 2016 Sheet 21 of 82
1 2 3 4 5 6 7 8
B - 22 Frame Buffer Partition B

Schematic Diagrams
Frame Buffer Partition A_B

1 2 3 4 5 6 7 8
FRAME BUFFER PARTITION A/B DECOUPLING ɈP6xxRA Frame A,Bᶵᶲẞ

FBVDDQ
FBVDDQ
DECOUPLING AROUND FBA MEMORIES (DQ0-DQ31) PLACE Under MEM DECOUPLING AROUND FBA MEMORIES (DQ32-DQ63)
PLACE Under MEM
SPARE SPARE
C32 C23 C776 C37 C24 C769 C19 C768 C772 C780 C36 C35 C774 C25 C770 C775 C31 C26 C779 C808
1u_6.3V_X6S_04
1u_6.3V_X6S_04
1u_6.3V_X6S_04
1u_6.3V_X6S_04
1u_6.3V_X6S_04
1u_6.3V_X6S_04
1u_6.3V_X6S_04
1u_6.3V_X6S_04
1u_6.3V_X6S_04
1u_6.3V_X6S_04
1u_6.3V_X6S_04
1u_6.3V_X6S_04
1u_6.3V_X6S_04
1u_6.3V_X6S_04
1u_6.3V_X6S_04
1u_6.3V_X6S_04
1u_6.3V_X6S_04
1u_6.3V_X6S_04
1u_6.3V_X6S_04
1u_6.3V_X6S_04
A A
GND
FBVDDQ FBVDDQ GND
C72
C63
C763
C10
C13
C777
C782
C762
C21
C766
C12 C11 C34 C778 C33 C771 C109 C77 C767 C14 C817 C811
1u x 10 1u x 10
10u_6.3V_X5R_06
10u_6.3V_X5R_06
10u_6.3V_X5R_06
10u_6.3V_X5R_06
10u_6.3V_X5R_06
10u_6.3V_X5R_06
10u_6.3V_X5R_06
10u_6.3V_X5R_06
10u_6.3V_X5R_06
10u_6.3V_X5R_06
10u_6.3V_X5R_06
10u_6.3V_X5R_06
10u x 6 10u x 6
22u_6.3V_X5R_08
22u_6.3V_X5R_08
22u_6.3V_X5R_08
22u_6.3V_X5R_08
22u_6.3V_X5R_08
22u_6.3V_X5R_08
22u_6.3V_X5R_08
22u_6.3V_X5R_08
22u_6.3V_X5R_08
22u_6.3V_X5R_08
22u x 5 22u x 5
Sheet 22 of 81
FBVDDQ
GND
INS127839593
BGA170_MIRR
COMMON
M7C GND M8C
INS127839279
BGA170
COMMON FBVDDQ
FBVDDQ M5C
INS115247167
BGA170_MIRR
COMMON
GND
M6C
INS115247582
BGA170
COMMON
GND
FBVDDQ
Frame Buffer
B
J1 SOE*/MF_VDD
Mirrored
J1 MF_VSS/SOE*
Normal
J1 SOE*/MF_VDD
Mirrored
J1 MF_VSS/SOE*
Normal B
Partition A_B
add 1k to VDD add 1k to VSS add 1k to VDD add 1k to VSS
C10 VDD VSS B10 B10 VSS VDD C10 C10 VDD VSS B10 B10 VSS VDD C10
C5 VDD VSS B5 B5 VSS VDD C5 C5 VDD VSS B5 B5 VSS VDD C5
D11 VDD VSS D10 D10 VSS VDD D11 D11 VDD VSS D10 D10 VSS VDD D11
G1 VDD VSS G10 G10 VSS VDD G1 G1 VDD VSS G10 G10 VSS VDD G1
G11 VDD VSS G5 G5 VSS VDD G11 G11 VDD VSS G5 G5 VSS VDD G11
G14 VDD VSS H1 H1 VSS VDD G14 G14 VDD VSS H1 H1 VSS VDD G14
G4 VDD VSS H14 H14 VSS VDD G4 G4 VDD VSS H14 H14 VSS VDD G4
L1 VDD VSS K1 K1 VSS VDD L1 L1 VDD VSS K1 K1 VSS VDD L1
L11 VDD VSS K14 K14 VSS VDD L11 L11 VDD VSS K14 K14 VSS VDD L11
L14 VDD VSS L10 L10 VSS VDD L14 L14 VDD VSS L10 L10 VSS VDD L14
L4 VDD VSS L5 L5 VSS VDD L4 L4 VDD VSS L5 L5 VSS VDD L4
P11 VDD VSS P10 P10 VSS VDD P11 P11 VDD VSS P10 P10 VSS VDD P11
R10 VDD VSS T10 T10 VSS VDD R10 R10 VDD VSS T10 T10 VSS VDD R10
R5 VDD VSS T5 T5 VSS VDD R5 R5 VDD VSS T5 T5 VSS VDD R5
B1 VDDQ VSSQ A1 A1 VSSQ VDDQ B1 B1 VDDQ VSSQ A1 A1 VSSQ VDDQ B1

D1 VDDQ VSSQ C1 C1 VSSQ VDDQ D1 D1 VDDQ VSSQ C1 C1 VSSQ VDDQ D1
E10 VDDQ VSSQ C3 C3 VSSQ VDDQ E10 E10 VDDQ VSSQ C3 C3 VSSQ VDDQ E10
E5 VDDQ VSSQ C4 C4 VSSQ VDDQ E5 E5 VDDQ VSSQ C4 C4 VSSQ VDDQ E5
C F1 E1 E1 F1 F1 E1 E1 F1 C
VDDQ VSSQ VSSQ VDDQ VDDQ VSSQ VSSQ VDDQ
F12 VDDQ VSSQ E12 E12 VSSQ VDDQ F12 F12 VDDQ VSSQ E12 E12 VSSQ VDDQ F12
G13 VDDQ VSSQ F10 F10 VSSQ VDDQ G13 G13 VDDQ VSSQ F10 F10 VSSQ VDDQ G13
G2 VDDQ VSSQ F5 F5 VSSQ VDDQ G2 G2 VDDQ VSSQ F5 F5 VSSQ VDDQ G2
H12 VDDQ VSSQ H13 H13 VSSQ VDDQ H12 H12 VDDQ VSSQ H13 H13 VSSQ VDDQ H12
H3 VDDQ VSSQ H2 H2 VSSQ VDDQ H3 H3 VDDQ VSSQ H2 H2 VSSQ VDDQ H3
K12 VDDQ VSSQ K13 K13 VSSQ VDDQ K12 K12 VDDQ VSSQ K13 K13 VSSQ VDDQ K12
K3 VDDQ VSSQ K2 K2 VSSQ VDDQ K3 K3 VDDQ VSSQ K2 K2 VSSQ VDDQ K3
L13 VDDQ VSSQ M10 M10 VSSQ VDDQ L13 L13 VDDQ VSSQ M10 M10 VSSQ VDDQ L13
L2 VDDQ VSSQ M5 M5 VSSQ VDDQ L2 L2 VDDQ VSSQ M5 M5 VSSQ VDDQ L2
M1 VDDQ VSSQ N1 N1 VSSQ VDDQ M1 M1 VDDQ VSSQ N1 N1 VSSQ VDDQ M1
N10 VDDQ VSSQ R1 R1 VSSQ VDDQ N10 N10 VDDQ VSSQ R1 R1 VSSQ VDDQ N10
N5 VDDQ VSSQ R11 R11 VSSQ VDDQ N5 N5 VDDQ VSSQ R11 R11 VSSQ VDDQ N5
P1 VDDQ VSSQ R12 R12 VSSQ VDDQ P1 P1 VDDQ VSSQ R12 R12 VSSQ VDDQ P1
T1 VDDQ VSSQ V1 V1 VSSQ VDDQ T1 T1 VDDQ VSSQ V1 V1 VSSQ VDDQ T1
K4G80325FB-HC25 K4G80325FB-HC25 K4G80325FB-HC25 K4G80325FB-HC25

D D
GND GND GND GND
Title
[22] Frame Buffer Partition A_B
[19,20,21,23,24,25,27,32,63] FBVDDQ A3 P650RP 6-71-P65P0-D02A D03B

1 2 3 4 5 6 7 8
Frame Buffer Partition A_B B - 23

Schematic Diagrams
GPU Frame Buffer Partition

1 2 3 4 5 6 7 8
GPU FRAME BUFFER PARTITION C/D FBC_DBI[7..0]

FBC_DBI[7..0] [24]
ɈP6xxRE Frame Dᶵᶲẞ

FBC_EDC[7..0]
G1D FBC_EDC[7..0] [24] G1E
INS127538168 FBC_CMD[31..0] INS127540031
BGA2152 FBC_CMD[31..0] [24] BGA2152
COMMON COMMON
FBC_D[63..0]
4/23 FBC FBC_D[63..0] [24] 5/23 FBD
FBC_D0 C6 FBC_D0 FBC_CMD0 C11 FBC_CMD0 FBVDDQ AK8 FBD_D0 FBD_CMD0 AD2
FBC_D1 D6 FBC_D1 FBC_CMD1 B11 FBC_CMD1 AK4 FBD_D1 FBD_CMD1 AD1
FBC_D2 A6 FBC_D2 FBC_CMD2 A11 FBC_CMD2 AK2 FBD_D2 FBD_CMD2 AD4
A FBC_D3 B6 FBC_D3 FBC_CMD3 D11 FBC_CMD3 AK3 FBD_D3 FBD_CMD3 AC1 A
FBC_D4 B4 FBC_D4 FBC_CMD4 A12 FBC_CMD4 AK5 FBD_D4 FBD_CMD4 AC2
FBC_D5 A4 FBC_D5 FBC_CMD5 B12 FBC_CMD5 AK6 FBD_D5 FBD_CMD5 AC3
FBC_D6 B3 FBC_D6 FBC_CMD6 C12 FBC_CMD6 R99 R44 AK9 FBD_D6 FBD_CMD6 AA3
FBC_D7 C4 FBC_D7 FBC_CMD7 C14 FBC_CMD7 10K_04 10K_04 AK7 FBD_D7 FBD_CMD7 AA2
FBC_D8 D9 FBC_D8 FBC_CMD8 B14 FBC_CMD8 AG4 FBD_D8 FBD_CMD8 AA1
FBC_D9 C9 FBC_D9 FBC_CMD9 A14 FBC_CMD9 AF9 FBD_D9 FBD_CMD9 AA4
FBC_D10 E9 FBC_D10 FBC_CMD10 D14 FBC_CMD10 FBC_CMD1 AG6 FBD_D10 FBD_CMD10 Y1
FBC_D11 B9 FBC_D11 FBC_CMD11 A15 FBC_CMD11 FBC_CMD17 AG7 FBD_D11 FBD_CMD11 Y2
FBC_D12 B8 FBC_D12 FBC_CMD12 B15 FBC_CMD12 AJ4 FBD_D12 FBD_CMD12 Y3
FBC_D13 A8 FBC_D13 FBC_CMD13 C15 FBC_CMD13 FBC_CMD2 AJ5 FBD_D13 FBD_CMD13 V3
FBC_D14 F6 FBC_D14 FBC_CMD14 C17 FBC_CMD14 FBC_CMD18 AJ6 FBD_D14 FBD_CMD14 V2
FBC_D15 E6 FBC_D15 FBC_CMD15 B17 FBC_CMD15 AG5 FBD_D15 FBD_CMD15 V1
FBC_D16 F18 B24 FBC_CMD16 Y6 L3
FBC_D16 FBC_CMD16 FBD_D16 FBD_CMD16

FBC_D17 G18 FBC_D17 FBC_CMD17 A24 FBC_CMD17 R46 R104 Y5 FBD_D17 FBD_CMD17 L2
FBC_D18 E18 FBC_D18 FBC_CMD18 D23 FBC_CMD18 10K_04 10K_04 V5 FBD_D18 FBD_CMD18 L1
FBC_D19 H18 FBC_D19 FBC_CMD19 A23 FBC_CMD19 Y4 FBD_D19 FBD_CMD19 M4
FBC_D20 D15 FBC_D20 FBC_CMD20 B23 FBC_CMD20 AA6 FBD_D20 FBD_CMD20 M1
FBC_D21 E15 FBC_D21 FBC_CMD21 C23 FBC_CMD21 AA5 FBD_D21 FBD_CMD21 M2
FBC_D22 G17 FBC_D22 FBC_CMD22 C21 FBC_CMD22 AC5 FBD_D22 FBD_CMD22 M3
FBC_D23 H17 FBC_D23 FBC_CMD23 B21 FBC_CMD23 AC4 FBD_D23 FBD_CMD23 P3
FBC_D24 J15 FBC_D24 FBC_CMD24 A21 FBC_CMD24 AD7 FBD_D24 FBD_CMD24 P2
FBVDDQ
Sheet 23 of 81
FBC_D25 H15 FBC_D25 FBC_CMD25 D20 FBC_CMD25 GND AC6 FBD_D25 FBD_CMD25 P1
FBC_D26 E14 FBC_D26 FBC_CMD26 A20 FBC_CMD26 AF6 FBD_D26 FBD_CMD26 R4
FBC_D27 F14 FBC_D27 FBC_CMD27 B20 FBC_CMD27 AD6 FBD_D27 FBD_CMD27 R1
FBC_D28 H11 FBC_D28 FBC_CMD28 C20 FBC_CMD28 AF7 FBD_D28 FBD_CMD28 R2
GPU Frame Buffer B

FBC_D29
FBC_D30
FBC_D31
FBC_D32
G11
F11
E11
J29
FBC_D29
FBC_D30
FBC_D31
FBC_CMD29
FBC_CMD30
FBC_CMD31
C18
B18
A18
D17
FBC_CMD29
FBC_CMD30
FBC_CMD31
R62
*60.4_1%_04
R51
*60.4_1%_04
AF8
AF2
AF3
F4
FBD_D29
FBD_D30
FBD_D31
FBD_CMD29
FBD_CMD30
FBD_CMD31
R3
U3
U2
U1 B
FBC_D32 FBC_CMD32 FBD_D32 FBD_CMD32
Partition FBC_D33
FBC_D34
FBC_D35
FBC_D36
F30
H29
G30
FBC_D33
FBC_D34
FBC_D35
FBC_CMD33
FBC_CMD34
FBC_CMD35
A17
A9
C24
FBC_DEBUG0
FBC_DEBUG1
E1
F3
F5
FBD_D33
FBD_D34
FBD_D35
FBD_CMD33
FBD_CMD34
FBD_CMD35
V4
AD3
J3
B30 FBC_D36 D2 FBD_D36
FBC_D37 A30 FBC_D37 D1 FBD_D37
FBC_D38 H30 FBC_D38 C3 FBD_D38
FBC_D39 C30 FBC_D39 FBC_DBG_RFU1 J14 C2 FBD_D39 FBD_DBG_RFU1 AC9
FBC_D40 D27 FBC_D40 FBC_DBG_RFU2 J23 J5 FBD_D40 FBD_DBG_RFU2 P9
FBC_D41 J26 FBC_D41 J4 FBD_D41
FBC_D42 F27 FBC_D42 L8 FBD_D42
FBC_D43 G27 FBC_D43 J2 FBD_D43
FBC_D44 C27 FBC_D44 FBC_CLK0 G15 FBC_CLK0 DP_FBC_CLK0 FB_CLK F1 FBD_D44 FBD_CLK0 Y8
FBC_CLK0 [24]
FBC_D45 B27 FBC_D45 FBC_CLK0 F15 FBC_CLK0# DP_FBC_CLK0 FB_CLK F2 FBD_D45 FBD_CLK0 Y7
FBC_CLK0# [24]
FBC_D46 A27 FBC_D46 FBC_CLK1 H21 FBC_CLK1 DP_FBC_CLK1 FB_CLK H4 FBD_D46 FBD_CLK1 R8
FBC_CLK1 [24]
FBC_D47 G29 FBC_D47 FBC_CLK1 J21 FBC_CLK1# DP_FBC_CLK1 FB_CLK H5 FBD_D47 FBD_CLK1 R7
FBC_CLK1# [24]
FBC_D48 H20 FBC_D48 V7 FBD_D48
FBC_D49 D18 FBC_D49 V8 FBD_D49
FBC_D50 G20 FBC_D50 V6 FBD_D50
FBC_D51 E20 FBC_D51 V9 FBD_D51
FBC_D52 F23 FBC_D52 U4 FBD_D52
FBC_D53 E21 FBC_D53 R5 FBD_D53
FBC_D54 D21 FBC_D54 R6 FBD_D54
FBC_D55 E23 FBC_D55 U8 FBD_D55
FBC_D56 G24 FBC_D56 FBC_WCK01 F8 FBC_W CK01 FBC_WCK01 FB_WCK P6 FBD_D56 FBD_WCK01 AJ8
FBC_W CK01 [24]
FBC_D57 H26 FBC_D57 FBC_WCK01 G8 FBC_W CK01# FBC_WCK01 FB_WCK R9 FBD_D57 FBD_WCK01 AJ7
FBC_W CK01# [24]
FBC_D58 F24 FBC_D58 FBC_WCKB01 G9 P4 FBD_D58 FBD_WCKB01 AG8
FBC_D59 G26 FBC_D59 FBC_WCKB01 F9 P5 FBD_D59 FBD_WCKB01 AG9
FBC_D60 F26 FBC_D60 FBC_WCK23 H12 FBC_W CK23 FBC_WCK23 FB_WCK L7 FBD_D60 FBD_WCK23 AD8
C FBC_W CK23 [24] C
FBC_D61 D26 FBC_D61 FBC_WCK23 G12 FBC_W CK23# FBC_WCK23 FB_WCK L6 FBD_D61 FBD_WCK23 AD9
FBC_W CK23# [24]
FBC_D62 B26 FBC_D62 FBC_WCKB23 G14 L4 FBD_D62 FBD_WCKB23 AC7
FBC_D63 C26 FBC_D63 FBC_WCKB23 H14 L5 FBD_D63 FBD_WCKB23 AC8
FBC_WCK45 J27 FBC_W CK45 FBC_WCK45 FB_WCK FBD_WCK45 J6
FBC_W CK45 [24]
FBC_WCK45 H27 FBC_W CK45# FBC_WCK45 FB_WCK FBD_WCK45 J7
FBC_W CK45# [24]
FBC_DBI0 A5 FBC_DQM0 FBC_WCKB45 E29 AJ1 FBD_DQM0 FBD_WCKB45 H7
FBC_DBI1 C8 FBC_DQM1 FBC_WCKB45 F29 AG1 FBD_DQM1 FBD_WCKB45 H6
FBC_DBI2 J18 FBC_DQM2 FBC_WCK67 G23 FBC_W CK67 FBC_WCK67 FB_WCK AA7 FBD_DQM2 FBD_WCK67 P8
FBC_W CK67 [24]
FBC_DBI3 F12 FBC_DQM3 FBC_WCK67 H23 FBC_W CK67# FBC_WCK67 FB_WCK AD5 FBD_DQM3 FBD_WCK67 P7
FBC_W CK67# [24]
FBC_DBI4 D29 FBC_DQM4 FBC_WCKB67 H24 D3 FBD_DQM4 FBD_WCKB67 M7
FBC_DBI5 E27 FBC_DQM5 FBC_WCKB67 J24 H3 FBD_DQM5 FBD_WCKB67 M8
FBC_DBI6 F20 FBC_DQM6 U5 FBD_DQM6
FBC_DBI7 E26 FBC_DQM7 M9 FBD_DQM7
FBC_EDC0 D5 FBC_DQS_WP0 AJ3 FBD_DQS_WP0

FBC_EDC1 D8 FBC_DQS_WP1 AG2 FBD_DQS_WP1
FBC_EDC2 E17 FBC_DQS_WP2 AA9 FBD_DQS_WP2
FBC_EDC3 E12 FBC_DQS_WP3 AF4 FBD_DQS_WP3
FBC_EDC4 E30 FBC_DQS_WP4 E3 FBD_DQS_WP4
FBC_EDC5 B29 FBC_DQS_WP5 H2 FBD_DQS_WP5
FBC_EDC6 G21 FBC_DQS_WP6 U6 FBD_DQS_WP6
FBC_EDC7 R75 *0_04
E24 FBC_DQS_WP7 FBC_PLL_AVDD L17 FB_PLL_AVDD [19,23] M5 FBD_DQS_WP7 FBD_PLL_AVDD V11 FB_PLL_AVDD [19,23]
Y25 GND C96 Y33 GND C236

Y26 GND Y34 GND
Y27 GND 0.1u_10V_X7R_04 Y35 GND *0.1u_10V_X7R_04
D
Y28 GND Y36 GND D
Y29 GND Y37 GND
Y30 GND Y38 GND
Y31 GND Y39 GND
Y32 Y9 GND
GND GND GND
GND GND GP104 GP106
Title
[23] GPU Frame Buffer Partition
FBD UNUSED Size Document Number Rev
[19,20,21,22,24,25,27,32,63] FBVDDQ
A3 P650RP 6-71-P65P0-D02A D03B

1 2 3 4 5 6 7 8
B - 24 GPU Frame Buffer Partition

Schematic Diagrams
Frame Buffer Partition C

1 2 3 4 5 6 7 8
[23] FBC_CMD[31..0]
FBC_CMD[31..0]
FBC_D[63..0] [23] FBC_W CK01

FBC_WCK01
FBC_WCK01#
FRAME BUFFER PARTITION C
[23] FBC_D[63..0] [23] FBC_W CK01# FBC_WCK23
FBC_DBI[7..0] [23] FBC_W CK23 FBC_WCK23#
[23] FBC_DBI[7..0] [23] FBC_W CK23# FBC_WCK45
FBC_EDC[7..0] [23] FBC_W CK45 FBC_WCK45#
[23] FBC_EDC[7..0] [23] FBC_W CK45# FBC_WCK67 M4D
[23] FBC_W CK67 FBC_WCK67# INS115249753 M4B
[23] FBC_W CK67# BGA170 INS115249537
COMMON
BGA170
COMMON
M3D NORMAL
A M3B A
INS130557929 FBC_D32 A4 DQ0 FBC_CMD19 G3 RAS
BGA170_MIRR INS130552257 FBC_D33 FBC_CMD16
COMMON A2 DQ1 L3 CAS
BGA170_MIRR FBC_D34 FBC_CMD26
MIRRORED COMMON B4 DQ2 L12 WE
FBC_D35 B2 DQ3 FBC_CMD31 G12 CS
x32 x16 FBC_CMD3 L3 RAS FBC_D36 E4 DQ4
FBC_D0 V4 DQ0 FBC_CMD0 G3 CAS FBC_D37 E2 DQ5 FBC_CMD23 J4 ABI
NC
FBC_D1 V2 DQ1 FBC_CMD10 G12 WE FBC_D38 F4 DQ6
NC
FBC_D2 T4 DQ2 FBC_CMD15 L12 CS FBC_D39 F2 DQ7 FBC_CMD21 H4 A0_A10
NC
FBC_D3 T2 DQ3 FBC_CMD20 H5 A1_A9
NC
FBC_D4 N4 DQ4 FBC_CMD7 J4 ABI FBC_EDC4 C2 EDC0 FBC_CMD29 H11 A2_BA0
NC
FBC_D5 N2 DQ5 FBC_DBI4 D2 DBI0 FBC_CMD30 H10 A3_BA3
NC
FBC_D6 M4 DQ6 FBC_CMD5 K4 A0_A10 VREFD A10 FBC_CMD28 K11 A4_BA2
NC
FBC_D7 M2 DQ7 FBC_CMD4 K5 A1_A9 FBC_CMD27 K10 A5_BA1
NC
FBC_CMD13 K11 A2_BA0 x32 x16 FBC_CMD24 K5 A6_A11
FBC_EDC0 R2 EDC0 FBC_CMD14 K10 A3_BA3 FBC_D40 A11 DQ8 FBC_CMD25 K4 A7_A8
NC NC
FBC_DBI0 P2 DBI0 FBC_CMD12 H11 A4_BA2 FBC_D41 A13 DQ9 FBC_CMD22 J5 RFU_A12
NC NC
FBC_CMD11 H10 A5_BA1 FBC_D42 B11 DQ10 NC
FBC_CMD8 H5 A6_A11 FBC_D43 B13 DQ11 NC
VREFD V10 FBC_CMD9 H4 A7_A8 FBC_D44 E11 DQ12 NC
FBC_D8 V11 DQ8 FBC_CMD6 J5 RFU_A12 FBC_D45 E13 DQ13 NC
FBC_D9 V13 DQ9 FBC_D46 F11 DQ14
Sheet 24 of 81
NC
FBC_D10 T11 DQ10 FBC_D47 F13 DQ15 FBC_CMD18 J2 RESET
NC
FBC_D11 T13 DQ11 FBC_CMD17 J3 CKE
FBC_D12 N11 DQ12 FBC_EDC5 C13 EDC1 GND
FBC_D13 N13 FBC_DBI5 D13 J12
FBC_D14
FBC_D15
M11
M13
DQ13
DQ14
DQ15
FBC_CMD2
FBC_CMD1
J2
J3
RESET
CKE FBC_W CK45
FBC_W CK45#
D4
D5
DBI1
WCK01
WCK01
NC [23]
[23]
FBC_CLK1
FBC_CLK1#
J11
CLK
CLK
Frame Buffer
FBC_EDC1 R13 J12
Partition C
B EDC1 CLK B
FBC_DBI1 [23] FBC_CLK0 R55 R54
P13 DBI1 J11 CLK K4G80325FB-HC25
[23] FBC_CLK0# 40.2_1%_04 40.2_1%_04
FBC_W CK01 P4 WCK01
FBC_W CK01# M4A
P5 WCK01 R70 R69 INS115249374
BGA170
40.2_1%_04 40.2_1%_04 COMMON A5 NC_RFU_A5
C241 V5 NC_RFU_V5
M3A NORMAL
INS130550902 FBC_D48 V11 DQ16 0.01u_50V_X7R_04
BGA170_MIRR FBC_D49
COMMON A5 NC_RFU_A5 V13 DQ17
FBVDDQ C299 V5 NC_RFU_V5 FBC_D50 T11 DQ18
MIRRORED
FBC_D51 T13 DQ19
x32 x16 0.01u_50V_X7R_04 FBC_D52 N11 DQ20 GND
FBC_D16 A11 DQ16 FBC_D53 N13 DQ21
NC
FBC_D17 A13 DQ17 FBC_D54 M11 DQ22
NC
FBC_D18 B11 DQ18 FBC_D55 M13 DQ23
NC
FBC_D19 B13 DQ19 R539 GND 0.300
NC
FBC_D20 E11 DQ20 549_1%_04 FBC_EDC6 R13 EDC2 FBC_VREFC J14 VREFC
NC
FBC_D21 E13 DQ21 FBC_DBI6 P13 DBI2
NC
FBC_D22 F11 DQ22 VREFD V10 FBC_ZQ2 J13 ZQ
NC
FBC_D23 F13 DQ23 0.300 C818
NC
FBC_VREFC J14 VREFC x32 x16 J10 SEN
FBC_EDC2 C13 EDC2 FBC_D56 V4 DQ24 820p_50V_X7R_04
GND NC
FBC_DBI2 D13 DBI2 FBC_ZQ0 J13 ZQ FBC_D57 V2 DQ25
NC NC
C821 R541 FBC_D58 T4 DQ26 R537 K4G80325FB-HC25
NC
1.33K_1%_04 J10 SEN FBC_D59 T2 DQ27 121_1%_04
NC
820p_50V_X7R_04
VREFD A10 FBC_D60 N4 DQ28 NC

FBC_D24 A4 DQ24 FBC_D61 N2 DQ29 NC
C FBC_D25 A2 R542 FBC_D62 M4 C
DQ25 DQ30 NC GND
FBC_D26 B4 DQ26 121_1%_04 FBC_D63 M2 DQ31 NC
FBC_D27 B2 DQ27
FBC_D28 E4 DQ28 GND GND FBC_EDC7 R2 EDC3 NC
FBC_D29 E2 DQ29 FBC_DBI7 P2 DBI3 GND
NC
FBC_D30 F4 DQ30
FBC_D31 F2 DQ31 FBC_W CK67 P4 WCK23
FBC_W CK67# P5 WCK23
FBC_EDC3 C2 EDC3 GND
FBC_DBI3 D2 DBI3 K4G80325FB-HC25
FBC_W CK23 D4 WCK23

FBC_W CK23# D5 WCK23
0.300 FBC_VREF_L R538 931_1%_04 FBC_VREFC

D
D D
Q37
G 2SK3018S3
S
GND Title
[24] Frame Buffer Partition C
P6x0RG, P6x0RE VRAM=K4G80325FB-HC03, HC28 Size Document Number Rev
P6x0RG1, P6x0RE1, P6x0RA VRAM=K4G41325FC-HC03 [19,20,21,22,23,25,27,32,63] FBVDDQ A3 P650RP 6-71-P65P0-D02A D03B

1 2 3 4 5 6 7 8
Frame Buffer Partition C B - 25

Schematic Diagrams
Frame Buffer Partition C_D

1 2 3 4 5 6 7 8
FRAME BUFFER PARTITION C/D DECOUPLING ɈP6xxRE Frame Dᶵᶲẞ

FBVDDQ
DECOUPLING AROUND FBC MEMORIES (DQ0-DQ31)

SPARE
PLACE Under MEM
C816 C815 C820 C138 C139 C308 C853 C812 C809 C312
1u_6.3V_X6S_04
1u_6.3V_X6S_04
1u_6.3V_X6S_04
1u_6.3V_X6S_04
1u_6.3V_X6S_04
1u_6.3V_X6S_04
1u_6.3V_X6S_04
1u_6.3V_X6S_04
1u_6.3V_X6S_04
1u_6.3V_X6S_04
A A
FBVDDQ GND
C320
C288
C258
C140
C300
C296 C846 C819 C199 C256 C137
1u x 10
10u_6.3V_X5R_06
10u_6.3V_X5R_06
10u_6.3V_X5R_06
10u_6.3V_X5R_06
10u_6.3V_X5R_06
10u_6.3V_X5R_06
10u x 6
22u_6.3V_X5R_08
22u_6.3V_X5R_08
22u_6.3V_X5R_08
22u_6.3V_X5R_08
22u_6.3V_X5R_08
22u x 5
Sheet 25 of 81 GND GND
Frame Buffer FBVDDQ

M3C
INS130553998
BGA170_MIRR
COMMON
M4C
INS115253650
BGA170
COMMON
FBVDDQ
Partition C_D B
J1 SOE*/MF_VDD
add 1k to VDD
Mirrored
J1 MF_VSS/SOE*
Normal
add 1k to VSS
B
C10 VDD VSS B10 B10 VSS VDD C10

C5 VDD VSS B5 B5 VSS VDD C5
D11 VDD VSS D10 D10 VSS VDD D11
G1 VDD VSS G10 G10 VSS VDD G1
G11 VDD VSS G5 G5 VSS VDD G11
G14 VDD VSS H1 H1 VSS VDD G14
G4 VDD VSS H14 H14 VSS VDD G4
L1 VDD VSS K1 K1 VSS VDD L1
L11 VDD VSS K14 K14 VSS VDD L11
L14 VDD VSS L10 L10 VSS VDD L14
L4 VDD VSS L5 L5 VSS VDD L4
P11 VDD VSS P10 P10 VSS VDD P11
R10 VDD VSS T10 T10 VSS VDD R10
R5 VDD VSS T5 T5 VSS VDD R5
B1 VDDQ VSSQ A1 A1 VSSQ VDDQ B1

D1 VDDQ VSSQ C1 C1 VSSQ VDDQ D1
E10 VDDQ VSSQ C3 C3 VSSQ VDDQ E10
E5 VDDQ VSSQ C4 C4 VSSQ VDDQ E5
C F1 E1 E1 F1 C
VDDQ VSSQ VSSQ VDDQ
F12 VDDQ VSSQ E12 E12 VSSQ VDDQ F12
G13 VDDQ VSSQ F10 F10 VSSQ VDDQ G13
G2 VDDQ VSSQ F5 F5 VSSQ VDDQ G2
H12 VDDQ VSSQ H13 H13 VSSQ VDDQ H12
H3 VDDQ VSSQ H2 H2 VSSQ VDDQ H3
K12 VDDQ VSSQ K13 K13 VSSQ VDDQ K12
K3 VDDQ VSSQ K2 K2 VSSQ VDDQ K3
L13 VDDQ VSSQ M10 M10 VSSQ VDDQ L13
L2 VDDQ VSSQ M5 M5 VSSQ VDDQ L2
M1 VDDQ VSSQ N1 N1 VSSQ VDDQ M1
N10 VDDQ VSSQ R1 R1 VSSQ VDDQ N10
N5 VDDQ VSSQ R11 R11 VSSQ VDDQ N5
P1 VDDQ VSSQ R12 R12 VSSQ VDDQ P1
T1 VDDQ VSSQ V1 V1 VSSQ VDDQ T1
K4G80325FB-HC25
D GND GND D
Title
[19,20,21,22,23,24,27,32,63] FBVDDQ
[25] Frame Buffer Partition C_D
A3 P650RP 6-71-P65P0-D02A D03B

1 2 3 4 5 6 7 8
B - 26 Frame Buffer Partition C_D

GPU Decoupling B - 27
Schematic Diagrams
GPU Decoupling
Sheet 26 of 81
D
A
D03B
Rev
C232
C221
C151
82
1u_6.3V_X6S_04 1u_6.3V_X6S_04
10u_6.3V_X5R_06
GND
GND
GND
x11 10uF X5R 0603
x49 1uF X6S 0402
C220
C249
of
NVVDDS
C153
1u_6.3V_X6S_04
NVVDD
1u_6.3V_X6S_04
6-71-P65P0-D02A
10u_6.3V_X5R_06
8
8
26
C204
C231
[32,60]
[32,61]
C215
1u_6.3V_X6S_04
1u_6.3V_X6S_04
Sheet
[26] GPU Decoupling1
10u_6.3V_X5R_06
C189
C157
C226
1u_6.3V_X6S_04
1u_6.3V_X6S_04
10u_6.3V_X5R_06
PLACE Under GPU
C233
Tuesday, July 19, 2016

C160
C229
1u_6.3V_X6S_04
1u_6.3V_X6S_04
10u_6.3V_X5R_06
Document Number
C244
C219
C225
1u_6.3V_X6S_04
1u_6.3V_X6S_04
10u_6.3V_X5R_06
P650RP
7
7
C207
C230
C163
1u_6.3V_X6S_04
1u_6.3V_X6S_04
10u_6.3V_X5R_06
Date:
Size
Title
A3
C147
C134
C145
1u_6.3V_X6S_04
1u_6.3V_X6S_04
10u_6.3V_X5R_06
C159
C133
NVVDD
C129
1u_6.3V_X6S_04
1u_6.3V_X6S_04
10u_6.3V_X5R_06
C206
C181
C107
1u_6.3V_X6S_04
PLACE Near GPU
1u_6.3V_X6S_04
10u_6.3V_X5R_06
6
6
C186
C187
C214
1u_6.3V_X6S_04 1u_6.3V_X6S_04
NVVDD
10u_6.3V_X5R_06
C148
C162
C132
1u_6.3V_X6S_04 1u_6.3V_X6S_04
1u_6.3V_X6S_04
GND
x4 22uF X5R 0805
x2 47uF X5R 0805
C146
C136
C190
1u_6.3V_X6S_04 1u_6.3V_X6S_04
1u_6.3V_X6S_04
C188
C234
C202
1u_6.3V_X6S_04 1u_6.3V_X6S_04
1u_6.3V_X6S_04
C73
22u_6.3V_X5R_08
5
5
C158
C223
C176
1u_6.3V_X6S_04 1u_6.3V_X6S_04
1u_6.3V_X6S_04
C61
22u_6.3V_X5R_08
MID-FREQ CERAMICS
C111
C135
C205
CLOSE TO GPU
C175
4.7u_6.3V_X6S_06
1u_6.3V_X6S_04 1u_6.3V_X6S_04
1u_6.3V_X6S_04
x2 4.7UF 0603 X6S

x1 47uF X5R 0805
C47
47uF_6.3V_X5R_08
C110
C191
C113
C161
4.7u_6.3V_X6S_06
1u_6.3V_X6S_04 1u_6.3V_X6S_04
1u_6.3V_X6S_04
NVVDDS
x1 330uF
C78
47uF_6.3V_X5R_08
C105
C120
C193
C144
47uF_6.3V_X5R_08
1u_6.3V_X6S_04 1u_6.3V_X6S_04
1u_6.3V_X6S_04
C79
22u_6.3V_X5R_08
C156
C122
C813
4
4
C130
1u_6.3V_X6S_04 1u_6.3V_X6S_04 330uF_2.5V_12m_6.6*6.6*4.2

1u_6.3V_X6S_04
GND
C58
NVVDD
22u_6.3V_X5R_08
C119
C149
C178
GND
NVVDDS
1u_6.3V_X6S_04 1u_6.3V_X6S_04 1u_6.3V_X6S_04
NVVDD
GPU DECOUPLING1
NVVDDS
C807
C801
*330uF_2.5V_12m_6.6*6.6*4.2 10u_4V_X6S_06
x2 330uF
GND
GND
3
3
C806
C799
10u_4V_X6S_06
NVVDD
*330uF_2.5V_12m_6.6*6.6*4.2
+
C243
1u_6.3V_X6S_04
C49
C100
10u_4V_X6S_06
GND
1u_6.3V_X6S_04
C44
C208
10u_4V_X6S_06
GND
GND 1u_6.3V_X6S_04
C38
C101
10u_4V_X6S_06
NV check 4.7u change to 10u
1u_6.3V_X6S_04
GPU Decoupling
C210
C74
10u_4V_X6S_06 1u_6.3V_X6S_04
C52
C102
10u_4V_X6S_06
PLACE Under GPU

1u_6.3V_X6S_04
C121
1u_6.3V_X6S_04
C39
C45
C814
10u_4V_X6S_06 10u_4V_X6S_06
1u_6.3V_X6S_04
C246
2
2
1u_6.3V_X6S_04
C46
C50
C209
10u_4V_X6S_06 10u_4V_X6S_06
1u_6.3V_X6S_04
C247
PLACE Near GPU
C803
1u_6.3V_X6S_04
C43
C104
10u_4V_X6S_06 10u_4V_X6S_06
1u_6.3V_X6S_04
C40
C59
C203
C810
10u_4V_X6S_06 10u_4V_X6S_06
1u_6.3V_X6S_04
10u_6.3V_X5R_06
GND
NVVDD
4/15 D02
C804
C41
C180
x16 1uF X6S 0402

x4 10uF X6S 0603
C103
10u_4V_X6S_06 10u_4V_X6S_06
1u_6.3V_X6S_04
10u_6.3V_X5R_06
x12 10uF 0603 X5R

x9 4.7uF 0603 X6S
C802
C42
C179
C123
10u_4V_X6S_06 10u_4V_X6S_06
1u_6.3V_X6S_04
10u_6.3V_X5R_06
1
1
C805
C51
C248
C106
10u_4V_X6S_06 10u_4V_X6S_06
1u_6.3V_X6S_04
10u_6.3V_X5R_06
NVVDD
NVVDDS
D
A
B
C
D
A
D03B
Rev
82
C285
0.1u_10V_X7R_04
GND
8
8
of
C284
6-71-P65P0-D02A
0.1u_10V_X7R_04
PLACE Near GPU
27
C286
C290
1u_6.3V_X6S_04 22u_6.3V_X5R_08
x9 22uF X5R 0805
GND
[27] GPU Decoupling2
Sheet
C315
1V8_AON
C213
4.7u_6.3V_X6S_06
22u_6.3V_X5R_08
C116
7
22u_6.3V_X5R_08
Tuesday, July 19, 2016
GPU DECOUPLING
C267
Document Number
C60
0.1u_10V_X7R_04
22u_6.3V_X5R_08
MID-FREQ CERAMICS
GND
C268
0.1u_10V_X7R_04
P650RP
C65
22u_6.3V_X5R_08
C177
0.1u_10V_X7R_04
C71
Date:
Size
Title
22u_6.3V_X5R_08
C270
A4
GND
6
0.1u_10V_X7R_04
C67
10u_6.3V_X5R_06
C80
C170
22u_6.3V_X5R_08
1u_6.3V_X6S_04
x4 10uF
C66
C251
C262
10u_6.3V_X5R_06
22u_6.3V_X5R_08
1V8_AON
1V8_RUN
FBVDDQ
1u_6.3V_X6S_04
C269
C222
C62
FBVDDQ
1u_6.3V_X6S_04 10u_6.3V_X5R_06 22u_6.3V_X5R_08

[18,19,28,31,32,59]
[19,20,21,22,23,24,25,32,63]
[3,18,28,30,31,32,59,60,61,63]
5
5
C303
C273
4.7u_6.3V_X6S_06
10u_6.3V_X5R_06
FBVDDQ
C304
4.7u_6.3V_X6S_06
C305
1V8_RUN
4.7u_6.3V_X6S_06
C1288
C1290
C1292
1u_6.3V_X6S_04 1u_6.3V_X6S_04 1u_6.3V_X6S_04

4
4
C272 C1287
C93 C1289
C185 C1291
1u_6.3V_X6S_04 1u_6.3V_X6S_04 1u_6.3V_X6S_04

PLACE Under GPU
1u_6.3V_X6S_04 1u_6.3V_X6S_04
1u_6.3V_X6S_04
GND
GND
GND
C271
C94
C240
1u_6.3V_X6S_04 1u_6.3V_X6S_04
x2 10uF, x6 1uF
x2 10uF, x6 1uF
1u_6.3V_X6S_04
x2 10uF, x6 1uF
3
3
C265
C88
C143
1u_6.3V_X6S_04 1u_6.3V_X6S_04
1u_6.3V_X6S_04
GPU Decoupling 2
C259
C85
C169
1u_6.3V_X6S_04 1u_6.3V_X6S_04
1u_6.3V_X6S_04
C263
C91
C126
1u_6.3V_X6S_04 1u_6.3V_X6S_04
1u_6.3V_X6S_04
Total :
x24 1uF
x8 10uF
2
2
C264
C92
C108
Partition A
Partition B
1u_6.3V_X6S_04 1u_6.3V_X6S_04
Partition C 1u_6.3V_X6S_04
FBVDDQ
C276
C1294
C95
C89
10u_6.3V_X5R_06 10u_6.3V_X5R_06
10u_6.3V_X5R_06 10u_6.3V_X5R_06
GND
C275
C1293
C90
C197
10u_6.3V_X5R_06 10u_6.3V_X5R_06
10u_6.3V_X5R_06 10u_6.3V_X5R_06
1
1
FBVDDQ
B - 28 GPU Decoupling 2
C
D
A
B
Schematic Diagrams
GPU Decoupling 2
Sheet 27 of 81
Schematic Diagrams
Straps and XTAL

1 2 3 4 5
G1S
INS128012352
XTAL
BGA2152
COMMON
30ohm ESR 10mohm bead
[29] GPU_PLLVDD 14/23 XTAL/PLL
LB1 . HCB1608KF-300T60 40mil GPU_PLLVDD BD12 SP_PLLVDD

1V8_RUN
R56 0_06 20mil
Near to GPU BC12 VID_PLLVDD
C306
C309
A C277 C279 A
22u_6.3V_X5R_08 4.7u_6.3V_X5R_06
C274
C310
47uF_6.3V_X5R_08
10u_6.3V_X5R_06
0.1u_10V_X7R_04
0.1u_10V_X7R_04
GND
GND
Strap 2 Strap 1 Strap 0 RAMCFG[4:0] GPU under 40mil U42 GPCPLL_AVDD0
0 0 0 0 (0x0000) AF11
0 0 1 1 (0x0001) GPU near GPCPLL_AVDD1
0 1 0 2 (0x0002) BB24 XS_PLLVDD

C261 C260 C198 C311 C282 C281 1V8_AON
0 1 1 3 (0x0003)
0.1u_10V_X7R_04
0.1u_10V_X7R_04
0.1u_10V_X7R_04
0.1u_10V_X7R_04
0.1u_10V_X7R_04
0.1u_10V_X7R_04
1 0 0 4 (0x0004)
1 0 1 5 (0x0005)
1 1 0 6 (0x0006) R544
*100K_04
1 1 1 7 (0x0007)
0 0 M 8 (0x0008) XTALSSIN BJ6 BK6 XTALOUTBUFF
XTALSSIN XTALOUTBUFF
0 M 0 9 (0x0009) GPU under
Sheet 28 of 81
0 M 1 10 (0x000A) BL6 XTALIN XTALOUT BM6
R556
0 1 M 11 (0x000B) R545
10K_04
10K_04
M 0 0 12 (0x000C) GND
X1
B
M
M
0
1
1
0
13 (0x000D)
14 (0x000E) XTALIN
GND
4
1
3
2
GND
XTALOUT
B Straps and XTAL
M 1 1 15 (0x000F) GND
C823 FSX-3M_27.000MHz C822
GND
1 0 M 16 (0x0010) 12p_50V_NPO_04
fsx3m
6-22-27R00-1BG 12p_50V_NPO_04
1 M 0 17 (0x0011) 6-22-27R00-1BH
1 M 1 18 (0x0012) XTAL
1 1 M 19 (0x0013) GND GND
0 M M 20 (0x0014) 1 = HIGH : Tied to 1.8V
M 0 M 21 (0x0015) M = Middle : Tied to 0.9V
M M 0 22 (0x0016) 0 = Low : Tied to 0V
M M 1 23 (0x0017)
M 1 M 24 (0x0018)
1
M
M
M
M
M
25 (0x0019)
26 (0x001A) 1:Enable 0:Disable MULTI-LEVEL STRAPS
Strap 2 Strap 1 Strap 0 RAMCFG[4:0] SOR 0/1/2/3 ENABLE
1V8_AON
0 0 0 00000
0 1 0 00010
0 1 1 00011 R579 R580 R581 R583 R582 R578
1 1 0 00110
*100K_04
*100K_04
*100K_04
100K_04
*100K_04
*100K_04
1 1 1 00111 1= SMB_ALT_ADDR Enable 1V8_AON
C C
0= SMB_ALT_ADDR Disable
ROM_SO ROM_SI ROM_SCLK SOR_EXPOSED[3:0] Setting RAM type
[30] STRAP0
0 0 0 1111 1= DEVID_SEL Rebrand [30] STRAP1
0 0 1 1110 0= DEVID_SEL Orignal R91 R90 R85 [30] STRAP2 Strap5
0 1 0 1101 *100K_1%_04 *100K_1%_04 *100K_1%_04
[30] STRAP3
eDP = L
0 1 1 1100 1= PCIE_CFG Low Power Rc Re [30] STRAP4
Gsync= H
1 0 0 1011 0= PCIE_CFG High Power
[30] VGA_ROM_SI [30,42] STRAP5
1 0 1 1010 1= VGA_DEVICE Enable [30] VGA_ROM_SO
1 1 1 1000 R566 R567 R568 R570 R569 R565
0= VGA_DEVICE Disable [30] VGA_ROM_SCLK
1 1 M 0000
100K_04
100K_04
100K_04
*100K_04
100K_04
100K_04
Strap 5 Strap 4 Strap 3 SMB_ALT_ADDR DEVID_SEL PCIE_CFG VGA_DEVICE R82 R87 R81
100K_1%_04 100K_1%_04 100K_1%_04
0 0 0 0 0 0 0
0 0 1 eDP ID 0 0 0 1 Rd Rf
0 1 0 0 0 1 0
DG P.65 recommend strap resistor 5%
0 1 1 0 1 0 0 or better , voltage use 1V8_AON GND
1 0 0 0 0 1 1 GND
1 0 1 GSYNC ID 0 1 0 0 DG P.73 recommend Pull down resistor 100k

1 1 0 0 1 0 1 [3,18,27,30,31,32,59,60,61,63] 1V8_AON
1 1 1 0 1 1 0
D 1 1 1 0 1 1 1 D
0 0 M 1 0 0 0 [18,19,27,31,32,59] 1V8_RUN
0 M 0 1 0 0 1
Setting RAM type
0 M 1 1 0 1 0 Strap
0 1 M 1 0 1 1 default Samsung K4G80325FB-HC25 B-die 0 X 0 4000MHz 256Mx32
M 0 0 1 1 0 0 Micron MT51J256M32HF-80:A A-die 0 X 1 4000MHz 256Mx32 Title
M 0 1 1 1 0 1 Hynix H5GQ8H24MJR-R4C M-die 0 X 2 4000MHz 256Mx32 [28] STRAPS and XTAL
M 1 0 1 1 1 0 Size Document Number Rev
M 1 1 1 1 1 1 A3 P650RP 6-71-P65P0-D02A D03B

1 2 3 4 5
Straps and XTAL B - 29

Schematic Diagrams
IFP I/O Interface

1 2 3 4 5
G1V G1U
INS127649324 INS127649444
BGA2152 BGA2152
COMMON COMMON
IFP I/O INTERFACE 11/23 MIOA 12/23 MIOB
G1N MIOAD0 AN9 MIOBD0 AT3

INS127648990 MIOAD1 AM2 MIOBD1 AV6
BGA2152 AN7 AT2
COMMON MIOAD2 MIOBD2
MIOAD3 AN6 MIOBD3 AT1
MIOAD4 AR1 MIOBD4 AW6
7/23 IFPAB MIOAD5 AR6 MIOBD5 AV2
MIOAD6 AR5 MIOBD6 AV1
DL-DVI DVI/HDMI DP MIOAD7 AM8 MIOBD7 AV3
MIOAD8 AN3 MIOBD8 AW3
MIOAD9 AR8 MIOBD9 BA8
IFPA_AUX BH11 MIOAD10 AR3 MIOBD10 AW7
A SDA SDA A
SCL SCL IFPA_AUX BG11 AM5 MIOACAL_PD_VDDQ MIOAD11 AR2 AV7 MIOBCAL_PD_VDDQ MIOBD11 BB8
AM6 MIOACAL_PU_GND AV8 MIOBCAL_PU_GND

IFPA_L3 BF21
TXC TXC
BD23 IFPAB_RSET IFPA_L3 BG21
TXC TXC
AM7 MIOA_VREF AW9 MIOB_VREF

TXD0 TXD0 IFPA_L2 BG23
TXD0 TXD0 IFPA_L2 BH23
BD21 IFPAB_PLLVDD
IFPA_L1 BF23
TXD1 TXD1
TXD1 TXD1 IFPA_L1 BE23 MIOA_CTL3 AT7 MIOB_CTL3 BB7
MIOA_HSYNC AM1 MIOB_HSYNC AV5
MIOA_VSYNC AR7 MIOB_VSYNC BA7
TXD2 TXD2 IFPA_L0 BF24 MIOA_DE AN1 MIOB_DE AW2
TXD2 TXD2 IFPA_L0 BG24
GP104 GP106
MIOA_CLKOUT AN2 MIOB_CLKOUT AW1
MIOA_CLKIN AM3 MIOB UNUSED MIOB_CLKIN AT6
SDA IFPB_AUX BG12

G1R
INS127649613
BGA2152
HDMI
Sheet 29 of 81 SCL IFPB_AUX BH12 COMMON
8/23 IFPC ŉŅŎŊ
IFPB_L3 BL18
TXC R535 1K_1%_04 BD20 IFPCD_RSET
BB17 IFP_IOVDD IFPB_L3 BK18 GND
IFP I/O Interface

TXC
BB15 IFP_IOVDD DVI/HDMI DP
40 mil PLACE AT BALLS
BB18 IFP_IOVDD IFPB_L2 BK20 IF_PLLVDD
BB20 IFP_IOVDD
TXD3
TXD3
TXD0
TXD0 IFPB_L2 BL20 [28] GPU_PLLVDD
L5 . HCB1608KF-300T60 BD18 IFPCD_PLLVDD SDA IFPC_AUX BL9
BK9
HDMI_CTRLDATA [17]
SCL IFPC_AUX HDMI_CTRLCLK [17]
C235
B B
IFPB_L1 BM20
TXD4 TXD1 0.1u_10V_X7R_04 IFPC_L3 BF17
IFPB_L1 BM21 TXC HDMI_CLOCKN [17]
TXD4 TXD1
IFPC_L3 BE17
TXC HDMI_CLOCKP [17]
GND IFPC_L2 BF18
TXD5 TXD2 IFPB_L0 BL21 TXD0 HDMI_DATA0N [17]
IFPC_L2 BG18
TXD5 TXD2 IFPB_L0 BK21 TXD0 HDMI_DATA0P [17]
IFPC BG20
IFPAB TXD1 IFPC_L1
IFPC_L1 BH20
HDMI_DATA1N [17]
TXD1 HDMI_DATA1P [17]
IFPC_L0 BF20
TXD2 HDMI_DATA2N [17]
PLACE Under GPU PLACE Near GPU IFPC_L0 BE20
PEX_VDD TXD2 HDMI_DATA2P [17]
PLACE Under GPU
40 mil
BB21 IFP_IOVDD
BB23 IFP_IOVDD
C237 C227
GND C76
C217 1u_6.3V_X5R_04 0.1u_10V_X7R_04
G1P 4.7u_6.3V_X6S_06
0.1u_10V_X7R_04
INS128002456
BGA2152
COMMON
DP R349 R348
GND
ŮŪůŪġġŅőŠņ
10/23 IFPE 100K_04 100K_04 GND GND
GND
DVI/HDMI DP
G1Q
GND
R575 1K_1%_04 BD17 IFPEF_RSET SDA IFPE_AUX
IFPE_AUX
BL8 MDP_E_AUX#_SDA
BK8 MDP_E_AUX_SCL
MDP_E_AUX#_SDA [14]
INS127649903
BGA2152
COMMON
eDP
SCL MDP_E_AUX_SCL [14]
20 mil 9/23 IFPD
R67 R65
PLACE AT BALLS BG14 MDP_E#3_RE_R
IF_PLLVDD BD15 IFPEF_PLLVDD
TXC
TXC
IFPE_L3
IFPE_L3 BH14 MDP_E3_RE_R
MDP_E#3_RE_R
MDP_E3_RE_R
[14]
[14] DVI/HDMI DP 100K_04 100K_04
ŦŅőŠŅ
C BF14 MDP_E#2_RE_R C
C252 TXD0 IFPE_L2 MDP_E#2_RE_R [14]
IFPE_L2 BE14 MDP_E2_RE_R
TXD0 MDP_E2_RE_R [14] IFPD_AUX BF11 DEDP_D_AUX#_R
SDA DEDP_D_AUX#_R [3]
0.1u_10V_X7R_04 IFPD_AUX BE11 DEDP_D_AUX_R
TXD1 IFPE_L1 BF15 MDP_E#1_RE_R SCL DEDP_D_AUX_R [3]
MDP_E#1_RE_R [14]
TXD1 IFPE_L1 BG15 MDP_E1_RE_R
MDP_E1_RE_R [14]
IFPE BM14 DEDP_D#3_R
GND BG17 MDP_E#0_RE_R TXC IFPD_L3 DEDP_D#3_R [3]
TXD2 IFPE_L0 MDP_E#0_RE_R [14] BM15 DEDP_D3_R
BH17 MDP_E0_RE_R TXC IFPD_L3 DEDP_D3_R [3]
TXD2 IFPE_L0 MDP_E0_RE_R [14]
IFPD_L2 BL15 DEDP_D#2_R
TXD0 DEDP_D#2_R [3]
IFPD_L2 BK15 DEDP_D2_R
TXD0 DEDP_D2_R [3]
BC18 IFP_IOVDD IFPD BK17 DEDP_D#1_R
BC20 TXD1 IFPD_L1 DEDP_D#1_R [3]
IFP_IOVDD BL17 DEDP_D1_R
TXD1 IFPD_L1 DEDP_D1_R [3]
IFPD_L0 BM17 DEDP_D#0_R
TXD2 DEDP_D#0_R [3]
IFPD_L0 BM18 DEDP_D0_R
GND PLACE Under GPU TXD2 DEDP_D0_R [3]
G1O
INS128002153
BGA2152
DP 20 mil BC15 IFP_IOVDD
COMMON
6/23 IFPF
ŮŪůŪġġŅőŠŇ C257 C250
BC17 IFP_IOVDD
R546 R551
1u_6.3V_X5R_04
DVI/HDMI DP 0.1u_10V_X7R_04
100K_04 100K_04
PLACE Near GPU PLACE Under GPU BC21 BM9 MDP_F_AUX#_SDA
IFP_IOVDD SDA IFPF_AUX MDP_F_AUX#_SDA [14]
PEX_VDD
20 mil BC23 IFP_IOVDD IFPF_AUX BM8 MDP_F_AUX_SCL GND
SCL MDP_F_AUX_SCL [14]
C82 C211 C218
IFPF_L3 BK11 MDP_F#3_RE_R
TXC MDP_F#3_RE_R [14]
4.7u_6.3V_X6S_06 0.1u_10V_X7R_04 0.1u_10V_X7R_04 IFPF_L3 BL11 MDP_F3_RE_R
TXC MDP_F3_RE_R [14]
IFPF_L2 BM11 MDP_F#2_RE_R
TXD0 MDP_F#2_RE_R [14]
IFPF_L2 BM12 MDP_F2_RE_R
D TXD0 MDP_F2_RE_R [14] D
GND GND
IFPF_L1 BL12 MDP_F#1_RE_R
IFPF_L1 BK12 MDP_F1_RE_R
TXD1 MDP_F1_RE_R [14]
IFPF_L0 BK14 MDP_F#0_RE_R
IFPF TXD2 IFPF_L0 BL14 MDP_F0_RE_R
MDP_F0_RE_R [14]
Title
[29] IFP I/O Interface
[18,62] PEX_VDD Custom P650RP 6-71-P65P0-D02A D03B

1 2 3 4 5
B - 30 IFP I/O Interface

Schematic Diagrams
Misc - GPIO, I2C and ROM

1 2 3 4 5 6 7 8
L :PORT1 (INTEL)
1V8_AON H: PORT2 (NV)
G1T
INS128018475 0.1u_16V_Y5V_04 C855 12
U48
2 IVGA_ROM_CS# R608 0_04
MISC: GPIO, I2C, and ROM
BGA2152 VCC 0B0 DVGA_ROM_CS# PS8331_SW [3,13,38,52]
COMMON 11
VGA_ROM_CS# 1 1B0
15/23 MISC 2 3 A0 10
GND S0 R605
ROM_CS BJ4 VGA_ROM_CS#
9
VCC 0B1
5 IVGA_ROM_SO *12K_04 1V8_AON VBIOS ROM 1M 1V8_AON
VBIOS ROM 4M
DVGA_ROM_SO
ROM_SI
ROM_SO
BK2 VGA_ROM_SI
BK4 VGA_ROM_SO
VGA_ROM_SI [28] VGA_ROM_SO 4
A1
1B1
8
(OPTIMUS) 1V8_AON (DGPU)
VGA_ROM_SO [28] 6 7
BL3 STRAP0 ROM_SCLK BK3 VGA_ROM_SCLK GND S1 INS128016128 1V8_AON
[28] STRAP0 VGA_ROM_SCLK [28]
BL4 STRAP1
SO8
[28] STRAP1 PI5A3158BZAE R591 SO8 U52 R606
BM4 STRAP2
[28] STRAP2 P/N = 6-03-53158-0J1 COMMON U53
BM5 STRAP3
A [28] STRAP3 10K_04 7 HOLD VCC
8 10K_04 7 HOLD VCC
8 A
BK5
[28]
[28,42]
STRAP4
STRAP5
BJ5
STRAP4
STRAP5 śɥ IVGA_ROM_CS# R592 33_04 IVGA_ROM_CS#_R
3
1
WP
DVGA_ROM_CS# R611 33_04 DVGA_ROM_CS#_R
3
1
WP
śɨ CS
C857
CS
VGA_ROM_SI R594 33_04 IVGA_ROM_SI 5 0.1u_16V_Y5V_04 VGA_ROM_SI R615 33_04 DVGA_ROM_SI 5 C856
SI SI
IVGA_ROM_SO R593 0_04 IVGA_ROM_SO_R 2 DVGA_ROM_SO R623 0_04 DVGA_ROM_SO_R 2 0.1u_16V_Y5V_04
BUFRST BF9 GPU_BUFRST# VGA_ROM_SCLK R595 IVGA_ROM_SCLK
SO
VGA_ROM_SCLK R610 DVGA_ROM_SCLK
SO
33_04 6 SCK GND 4 33_04 6 SCK GND 4
W25Q40EW 1.8V W25Q80EWSNIG

6-04-02540-A71 PCB Footprint = M-SO8
6-04-02580-A71
NV3V3
1V8_AON
0.1u_16V_X7R_04 C319
GND
R106 R107
NV3V3 R102 10K_04
0_04 *0_04
G1W R105 2.2K_04

Q5A Sheet 30 of 81
2
MTDK3S6R
G
INS128334089
BGA2152 R98 2.2K_04
COMMON
13/23 MISC 1
1 6 SMC_VGA_THERM
SMC_VGA_THERM [43,49,71]
Misc - GPIO, I2C
S
D
Q5B
5 G
MTDK3S6R
BJ8 SMC_VGA_THERM1
and ROM
OVERT# BG5 OVERT I2CS_SCL
[31] OVERT#
I2CS_SDA BH8 SMD_VGA_THERM1 4 3 SMD_VGA_THERM
SMD_VGA_THERM [43,49,71]
B B
S
D
TS_VREF BF12 TS_VREF
I2CC_SCL BG9 I2CC_SCL
I2CC_SCL [62]
I2CC_SDA BH9 I2CC_SDA
I2CC_SDA [62]
I2CB_SCL BG8 R1018 2K_04 1V8_AON

I2CB_SDA BF8 R1019 2K_04
1V8_AON
BJ1 THERMDN
R100
BJ2 THERMDP R562
10K_04
10K_04
GPIO0 BD6
GPIO1_GC6_FB_EN GPIO0_NVVDD_PWM_VID [60]
GPIO1 BB5 R101 0_04
GPIO2_GPU_EVENT# GC6_FB_EN [31]
GPIO2 BD1
BE4 GPIO3_PS_NVVDDS_VID D40 A C RB751V-40(lision) 5/27 D02A
GPIO3 GPIO3_PS_NVVDDS_VID [61] GPU_EVENT# [38] 3.3VS
GPIO4 BE1 GPIO4_1V8_MAIN_EN
GPIO5_FRAME_LOCK# GPIO4_1V8_MAIN_EN [31]
GPIO5 BG2
GPIO6_NVVDD_PSI# GPIO5_FRAME_LOCK# [13] GPU_PEX_RST#
GPIO6 BD2
GPIO7_BL_PWM_GPU GPIO6_NVVDD_PSI# [60]
GPIO7 BD7 Q47A
GPIO7_BL_PWM_GPU [31]
2
BK24 BH4 GPIO8_MEM_VDD_CTL *MTDK3S6R R92
G
JTAG_TCK GPIO8 GPIO8_MEM_VDD_CTL [63]
BL23 JTAG_TMS GPIO9 BJ3 GPIO9_THERM_ALERT#
GPIO10_ALT_MEM_VREF GPIO9_THERM_ALERT# d_GPIO9_ALERT_FAN *10K_04
BM23 JTAG_TDI GPIO10 BD3 1 6
GPIO11_PPEN GPIO10_ALT_MEM_VREF [20,21,24]
BM24 JTAG_TDO GPIO11 BH3 C307 0.1u_10V_X7R_04
JTAG_TRST GPIO12_AC_DETECT_R
D
BL24 JTAG_TRST GPIO12 BE6 R93 10K_04
BB1 GPIO13_BLEN
5
GPIO13 GPIO13_BLEN [31]
GPIO14 BG4 GC6_FB_EN 1
R533 GPIO15 BG1
GPIO16_SYS_PEX_RST_MON# 4
10K_04 BK23 NVJTAG_SEL GPIO16 BE2 GPIO11_PPEN VGA_ENAVDD [13]
2
GPIO17 BH1 R635 *10K_04
GPIO18_IFPE_HPD_R GPIO17_IFPD_HPD_R [3] VDD3 U4
GPIO18 BE3
C SN74LV1T32DCKR C
R534 BD4
3
S
D
GPIO19
10K_04 GPIO20 BE5 OVERT# 4 3 dGPU_OVERT#_EC 1V8 in 3V3 out
GPIO21_RASTER_SYNC0 GPIO20_NVVDDS_PSI [61]
GPIO21 BA5
GND GPIO22 BB6 *MTDK3S6R
G
BG3 GPIO23_GPU_PEX_RST_HOLD#
GPIO23 Q47B
5
GPIO24 BD5 GPIO24_IFPF_HPD_R
GPIO25 BB2 GPU_PEX_RST#
GND
GPIO26 BE7 1V8_AON
GPIO27 BA4 GPIO27_IFPC_HPD_R
GPIO28 BB4 GPIO28_OC_WARN#
GPIO28_OC_WARN# [62] GPIO12_AC_DETECT_R
GPIO29 BA3 R80 100K_04
GPIO29_VRDUTY [60] GPIO6_NVVDD_PSI#
GPIO30 BB3 R561 10K_04
GPIO31_RFU BA2 DG P.279 Note: GPIO can 3V3 input , R572 10K_04 GPIO4_1V8_MAIN_EN
BA1 R577 10K_04 GPIO5_FRAME_LOCK#
GPIO32_RFU and can not drive a 3V3 levelin push-pull mode. GPIO9_THERM_ALERT#
1V8_AON R79 10K_04
1V8_AON R86 10K_04 OVERT#
R604 10K_04 U50

5
*SN74LV1T08DCKR VDD3
GPIO23_GPU_PEX_RST_HOLD# 1
GPU_PEX_RST# R96 4.7K_04 SMC_VGA_THERM
4
GPIO16_SYS_PEX_RST_MON# GPU_PEX_RST# [18,31] R103 4.7K_04 SMD_VGA_THERM
R588 *0_04 2
NV3V3 DG P.261 use 2.2k pull-up
R587 0_04
[38] PERSTB# 1V8_AON on both I2C_SDA/SCL
3
R613 100K_04 I2CC_SCL

R68 2.2K_04
U49 I2CC_SDA
R66 2.2K_04
SN74LV1T32DCKR
5
R586 0_04 1
GPIO12_AC_DETECT_R VBATT_BOOST# [43]
4 C291 470p_50V_X7R_04
2 AC/BATL# [57] C292 470p_50V_X7R_04
NV ⺢嬘
3
GPIO7_BL_PWM_GPU R618 100K_04
D
HDMI DP_E DP_F GPIO10_ALT_MEM_VREF R563 100K_04 D
GPIO27_IFPC_HPD_R
GPIO18_IFPE_HPD_R GPIO11_PPEN R564 100K_04
GPIO24_IFPF_HPD_R
R558 10K_04 GPIO8_MEM_VDD_CTL R83 10K_04
1V8_AON R559 10K_04 1V8_AON R560 10K_04 GPIO21_RASTER_SYNC0 R576 100K_04
Q40 1V8_AON
Q41
BTN3904 Q39
C
FROM HDMI REDRIVER BTN3904

C
M-SOT23-CBE FROM DP REDRIVER BTN3904

C
M-SOT23-CBE FROM DP REDRIVER

B R598 100K_04 M-SOT23-CBE
HDMI_HPD [17,38] B R601 100K_04
MDP_E_HPD_RE [14,38] B R597 100K_04
R599 100K_04 MDP_F_HPD_RE [14,38]
R600 100K_04 [14,17,18,31,59,60,61,62] NV3V3
R596 100K_04
E
[5,34,37,40,42,43,46,49,51,54,55,56,57,58,59,60,61,62,63,68] VDD3
E
C839 220p_50V_NPO_04
E
C841 220p_50V_NPO_04 Title

C840 *220p_50V_NPO_04
C842 *220p_50V_NPO_04
C837 220p_50V_NPO_04
[18,19,27,28,31,32,59] 1V8_RUN [30] Misc-GPIO_I2C_ROM
C838 *220p_50V_NPO_04 [2,13,17,31,44,45,46,47,50,52,53,55,56,58,59,60,62,70] 3.3V
[3,18,27,28,31,32,59,60,61,63] 1V8_AON Size Document Number Rev
[3,9,10,11,12,13,14,15,17,31,34,36,37,38,39,40,42,43,46,47,48,49,50,51,52,55,59,64,66,68,70] 3.3VS

1 2 3 4 5 6 7 8
Misc - GPIO, I2C and ROM B - 31

Schematic Diagrams
NVIDIA Power Sequence
1 2 3 4 5 6 7 8
3.3VS
3.3VS 0.1u_10V_X7R_04
C773
3.3VS
DEFAULT HW POWER SEQUENCE
U76
5
SN74LV1T32DCKR 1V8_RUN_EN
R508 10k_04
5
U41 1 1V8_RUN
[59] 1V8_AON_PWRGD NV3V3 R509 0_04 NV_1V8RUN_EN
5
SN74LV1T08DCKR 1 4
NV_1V8RUN_EN [59] 1V8_AON
1 4 2
[30,31] GPIO4_1V8_MAIN_EN GFX_ON 1.8V 3.3VS
4 2
U75 NV3V3
2 3.3V
[38,43,52,59] DGPU_PWR_EN 74AHC1G08GW
3
05/20 D02A NET CHANGE
5
3.3V U83
3
R1045 1 *SLG4U41161
20
19
18
4 NV_PEXVDD_EN
1 VDD GPIO17
100K_04 2
GPIO
GPIO
GPIO
[36] GPPG2_PCH_1V8RUN_EN U77
3.3V GFX_ON 2 GPI
PCH GPIO *74AHC1G08GW GPIO16 OVERT#
3
A 5/19 D02A ADD NV_FBVDDQ_EN_AND R1023 *0_04 3 GPIO GPIO15 NV_NV3V3_EN A
NV_FBVDDQ_EN R1024 *0_04
NVVDD_PWRGD 4 GPIO GPIO14 NV_1V8RUN_EN
3.3VS 3.3VS
NVVDDS_PWRGD 5 GPIO GPIO13 NV_NVVDD_EN
3.3VS 0.1u_10V_X7R_04 C1325 U79 D37
C A RB751V-40(lision) PEX_VDD_PWRGD NV_NVVDDS_EN
74AHC1G08GW 6 GPIO GPIO12
5
NV3V3_EN
8 GPIO
9 GPIO
10 GPIO
R1021 1V8_AON_PWRGD
3.3VS 1 1V8_AON_PWRGD
10K_04 0.1u_10V_X7R_04 R519 20K_1%_04 R516 0_04 NV_NV3V3_EN 7 GPIO GND 11
4PS_NV3V3_EN
C791 NV_NV3V3_EN [59]
2 3.3VS
R1020
3.3V C1326 4/14 枸䔁 Silego GPAK
100K_1%_04
*0.1u_10V_X7R_04 GC6_FB_EN_R [31,38]
3
6
5
D Q70A
5
C1324 1 GPIO4_1V8_MAIN_EN
MTDK3S6R 1
2 G
4 5/23 D02A 㓡ᶵᶲ 4
S 2 DGPU_PWRGD [31,63]
GFX_ON 2 [36] GPPG9_PCH_NV3V3_EN U44
1
0.47u_6.3V_X5R_04 1.8V U78 3.3V
PCH GPIO *74AHC1G08GW
3
D SN74LV1T32DCKR
3
HW POWER DOWN SEQUENCE
3
Sheet 31 of 81
NVVDD_PWRGD 5 G
S
Q70B NV_1V8RUN_EN
4
NV_NV3V3_EN
MTDK3S6R
NV_NVVDD_EN
D
3.3VS
NVIDIA Power
D
U80
D
0.1u_10V_X7R_04 C1327 NV_EN_DOWN Q6
*SN74LV1T08DCKR G
5
NV_EN_DOWN Q28 2SK3018S3
NVVDD_EN [43] NV_EN_DOWN G
R1070 *0_04 1
S
[36] GPPG10_PCH_NVVDD_EN 2SK3018S3 NV_EN_DOWN Q32
G
4
S
NV_NVVDD_EN [60] 2SK3018S3
PCH GPIO
Sequence D20 R1071 *0_04 2 C322
S
A C 1.8V C756 *0.1u_10V_X7R_04
RB751V-40(lision) *0.1u_10V_X7R_04 C793
3
3.3VS *0.1u_10V_X7R_04
R491 24K_1%_04 R492 0_04 R490 0_04
B B
0.1u_10V_X7R_04 C765 3.3VS
C1328 NV_NVVDDS_EN
0.1u_10V_X7R_04 NV_FBVDDQ_EN
0.22u_10V_X5R_04 C1329 NV_PEXVDD_EN
3.3VS R494 1K_1%_04
U39 D35
5
SN74LV1T08DCKR BAT54AN3
D
NVVDDS_EN
5
GFX_ON 1 C 1
D
[36] GPPG11_PCH_NVVDDS_EN
A 3 1 1 C 4
From NV NV_NVVDDS_EN [61] NV_EN_DOWN Q46 NV_EN_DOWN Q33
OVERT# 2 C 4 A 3 2 NV_EN_DOWN Q44 G G
U81 G 2SK3018S3 2SK3018S3
2 2 C 3.3V 2SK3018S3
*74AHC1G08GW
S
D36 BAT54AN3 1.8V R517
S
3
*100K_04 R489
C863 C792
NV_1V8RUN_EN 3 R487 15K_1%_04 C760 20K_1%_04 C854
R497 0_04 *0.1u_10V_X7R_04 *0.1u_10V_X7R_04
0.1u_10V_X7R_04 *0.1u_10V_X7R_04
NV_NVVDDS_EN_CTL [61]
NVIDIA GPIO LEVEL SHIFT

3.3VS NV_PEXVDD_EN
3.3VS 0.1u_10V_X7R_04
C860
U51 U82 3.3VS

5
3.3VS
SN74LV1T32DCKR 74AHC1G08GW
5
GFX_ON 1
4 1 3.3VS
R1022 3.3VS
NVVDDS_PWRGD 2 4 0_04 NV_PEXVDD_EN
NVVDD_PWRGD NV_PEXVDD_EN [62] R1026
1.8V 2 R1028
3.3V 3.3VS 100K_04
100K_04
3
R1027
R1029
3
Q71A
5
[38] DGPU_PWRGD_R 100K_04 Q72A
MTDK3S6R [37] GPIO4_1V8_MAIN_EN_R 100K_04
6
1 D MTDK3S6R
6
D
4
C 2 G2 C
PCH GPIO [36] GPPG0_PCH_PEXVDD_EN U37 G2
3.3V S
*74AHC1G08GW Q71B S
1
Q72B
1
3
D MTDK3S6R
3
3
D MTDK3S6R
G5
3.3VS DGPU_PWRGD [31,63] G5
NV_FBVDDQ_EN S GPIO4_1V8_MAIN_EN [30,31]
S
4
0.1u_10V_X7R_04 C764 3.3VS
U40 3/18 ᾖ㬋䶂嶗 3/18 ᾖ㬋䶂嶗
R496 0_04 *74AHC1G08GW C788 0.1u_10V_X7R_04
5
[18,31,60] NVVDD_PWRGD 5
[62] PEX_VDD_PWRGD R493 *0_04 1
4 NV_FBVDDQ_EN_AND 1
R503 *0_04 2 4 NV_FBVDDQ_EN 3.3VS
PCH GPIO [36] GPPG1_PCH_FBVDDQ_EN NV_FBVDDQ_EN [63] 3.3VS
3.3V 2
U42
1.8V C859
SN74LV1T32DCKR C321 0.1u_10V_X7R_04
3
5
0.1u_10V_X7R_04
1V8 in
5
3.3VS R495 0_04 1V8 in 1
R505 *10K_04 4 1
R504 *0_04 VGA_BKLPWM [13] [30] GC6_FB_EN
2 4
[30] GPIO7_BL_PWM_GPU GC6_FB_EN_R [31,38]
U54 2
From NV [31,38] GC6_FB_EN_R SN74LV1T08DCKR U6 R1072
3
SN74LV1T08DCKR
3
*100K_04
3.3VS
NVVDD POWER GOOD LOOPBACK C843

0.1u_10V_X7R_04
1V8 in
5
1
R110 10K_04 [30] GPIO13_BLEN
[18,30] GPU_PEX_RST# 4
VGA_BKLTEN [13]
D 2 D
U47
D41 OVERT# OVERT# [30] SN74LV1T08DCKR
BAT54AN3
3
D
1 C
Q9
A 3 NVVDD_PWRGD_LOOP_OVERT G 2SK3018S3
2 C
D
[3,9,10,11,12,13,14,15,17,30,34,36,37,38,39,40,42,43,46,47,48,49,50,51,52,55,59,64,66,68,70] 3.3VS
D
R111 *0_04 Q8 [2,13,17,44,45,46,47,50,52,53,55,56,58,59,60,62,70] 3.3V

[18,31,60] NVVDD_PWRGD Q7
R628 0_04 G 2SK3018S3
[61] NVVDDS_PWRGD G 2SK3018S3 [14,17,18,30,59,60,61,62] NV3V3 Title
[31] NVIDIA POWER SEQUENCE
S
[18,19,27,28,32,59] 1V8_RUN
S
[3,18,27,28,30,32,59,60,61,63] 1V8_AON
[31,38] GC6_FB_EN_R Custom P650RP 6-71-P65P0-D02A D03B

1 2 3 4 5 6 7 8
B - 32 NVIDIA Power Sequence

Schematic Diagrams
GPU NVVDD, FBVDDQ
1 2 3 4 5 6 7 8
G1F G1G G1H
NVVDD
INS127547041
BGA2152
COMMON NVVDD
NVVDD
INS127550888
BGA2152
COMMON
FBVDDQ
NVVDD
INS127611495
BGA2152
COMMON
FBVDDQ GPU NVVDD, FBVDDQ
18/21 VDD_1/2 19/23 VDD_2/2 20/23 FBVDDQ
AA14 VDD VDD AG22 AP21 VDD VDD BB45 AA10 FBVDDQ FBVDDQ AT43 G1J
AA15 VDD VDD AG23 AP22 VDD VDD BB46 AA11 FBVDDQ FBVDDQ K12
INS127602129
AA16 VDD VDD AG40 AP23 VDD VDD BB47 AA42 FBVDDQ FBVDDQ K14 BGA2152
AA17 VDD VDD AH14 AP30 VDD VDD BB48 AA43 FBVDDQ FBVDDQ K15 COMMON
AA18 VDD VDD AH15 AP31 VDD VDD BC38 AC10 FBVDDQ FBVDDQ K17 NVVDDS 23/23 VDDS
NVVDDS
AA19 VDD VDD AH16 AP32 VDD VDD BC39 AC11 FBVDDQ FBVDDQ K18
AA20 VDD VDD AH17 AP33 VDD VDD BC40 AC42 FBVDDQ FBVDDQ K20
AA21 VDD VDD AH18 AP34 VDD VDD BC41 AC43 FBVDDQ FBVDDQ K21 AP27 VDDS VDDS AC14
AA22 VDD VDD AH19 AR13 VDD VDD BC45 AD10 FBVDDQ FBVDDQ K23 AP28 VDDS VDDS AC15
A AA23 VDD VDD AH20 AR40 VDD VDD BC47 AD11 FBVDDQ FBVDDQ K24 AP29 VDDS VDDS AC16 A
AA24 VDD VDD AH21 AT14 VDD VDD BC49 AD42 FBVDDQ FBVDDQ K26 AP35 VDDS VDDS AC17
AA25 VDD VDD AH22 AT15 VDD VDD BD39 AD43 FBVDDQ FBVDDQ K27 AP36 VDDS VDDS AC18
AA26 VDD VDD AH23 AT16 VDD VDD BD41 AF10 FBVDDQ FBVDDQ K29 AP37 VDDS VDDS AC24
AA27 VDD VDD AH24 AT17 VDD VDD BD46 AF43 FBVDDQ FBVDDQ K30 AP38 VDDS VDDS AC25
AA28 VDD VDD AH25 AT18 VDD VDD BD47 AG10 FBVDDQ FBVDDQ K32 AP39 VDDS VDDS AC26
AA29 VDD VDD AH26 AT19 VDD VDD BD48 AG11 FBVDDQ FBVDDQ K33 AV14 VDDS VDDS AC27
AA32 VDD VDD AH29 AT22 VDD VDD BD51 AJ10 FBVDDQ FBVDDQ K38 AV17 VDDS VDDS AC35
AA33 VDD VDD AH30 AT23 VDD VDD BE41 AJ11 FBVDDQ FBVDDQ K39 AV18 VDDS VDDS AC36
AA34 VDD VDD AH31 AT24 VDD VDD BE42 AJ42 FBVDDQ FBVDDQ K41 AV24 VDDS VDDS AC37
AA35 VDD VDD AH32 AT25 VDD VDD BE43 AJ43 FBVDDQ FBVDDQ L14 AV25 VDDS VDDS AC38
AA36 VDD VDD AH33 AT26 VDD VDD BE46 AK10 FBVDDQ FBVDDQ L15 AV26 VDDS VDDS AC39
AA37 VDD VDD AH34 AT27 VDD VDD BE47 AK11 FBVDDQ FBVDDQ L18 AV27 VDDS VDDS AF14
AA38 AH35 AT28 BE48 AK42 L20 AV28 AF15
VDD VDD VDD VDD FBVDDQ FBVDDQ VDDS VDDS
AA39 VDD VDD AH36 AT29 VDD VDD BE49 AK43 FBVDDQ FBVDDQ L21 AV29 VDDS VDDS AF16
AB13 VDD VDD AH37 AT30 VDD VDD BE50 AM42 FBVDDQ FBVDDQ L23 AV35 VDDS VDDS AF17
AB40 VDD VDD AH38 AT31 VDD VDD BE51 AM43 FBVDDQ FBVDDQ L24 AV36 VDDS VDDS AF18
AC19 VDD VDD AH39 AT32 VDD VDD BE52 AN43 FBVDDQ FBVDDQ L26 AV37 VDDS VDDS AF24
Sheet 32 of 81
AC20 VDD VDD AK19 AT33 VDD VDD BF42 AR42 FBVDDQ FBVDDQ L27 AV38 VDDS VDDS AF25
AC21 VDD VDD AK20 AT34 VDD VDD BF44 AR43 FBVDDQ FBVDDQ L30 AV39 VDDS VDDS AF26
AC22 VDD VDD AK21 AT35 VDD VDD BF45 R42 FBVDDQ FBVDDQ L32 R14 VDDS VDDS AG27
AC23 VDD VDD AK22 AT36 VDD VDD BF47 R43 FBVDDQ FBVDDQ L33 R15 VDDS VDDS AG28
AC30 VDD VDD AK23 AT37 VDD VDD BF49 U10 FBVDDQ FBVDDQ L35 R16 VDDS VDDS AG29
AC31
AC32
AC33
AC34
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
AK30
AK31
AK32
AK33
AT38
AT39
AT42
AU43
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
BF51
BG43
BG44
U16
U11
U43
V10
V42
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
FBVDDQ
L36
L39
M10
M43
R17
R18
R24
R25
VDDS
VDDS
VDDS
VDDS
VDDS
VDDS
VDDS
VDDS
AG35
AG36
AG37
AG38
GPU NVVDD,
AE14 AK34 AV19 U17 V43 P10 R26 AG39
FBVDDQ
VDD VDD VDD VDD FBVDDQ FBVDDQ VDDS VDDS
AE15 VDD VDD AL13 AV20 VDD VDD U18 Y10 FBVDDQ FBVDDQ P11 R27 VDDS VDDS AK14
AE16 VDD VDD AL40 AV21 VDD VDD U19 Y11 FBVDDQ FBVDDQ P42 R28 VDDS VDDS AK15
AE17 VDD VDD AM14 AV22 VDD VDD U20 Y42 FBVDDQ FBVDDQ P43 R29 VDDS VDDS AK16
AE18 VDD VDD AM15 AV23 VDD VDD U21 Y43 FBVDDQ FBVDDQ R10 PLACE WEST EDGE OF FBD R35 VDDS VDDS AK17
AE19 VDD VDD AM16 AV30 VDD VDD U22 FBVDDQ R11 R36 VDDS VDDS AK18
B AE20 AM17 AV31 U23 R37 AK24 B
VDD VDD VDD VDD R27 *2.2_04 FBVDDQ VDDS VDDS
AE21 VDD VDD AM18 AV32 VDD VDD U24 R38 VDDS VDDS AK25
AE22 VDD VDD AM19 AV33 VDD VDD U25 R39 VDDS VDDS AK26
AE23 VDD VDD AM20 AV34 VDD VDD U26 W14 VDDS VDDS AK27
AE24 VDD VDD AM21 AV42 VDD VDD U27 FBVDDQ_SENSE E52 FBVDDQ_SENSE_R49 R28 2.2_04 FBVDDQ_SENSE W15 VDDS VDDS AK28
FBVDDQ_SENSE [62,63]
AE25 VDD VDD AM22 AV43 VDD VDD U28 W16 VDDS VDDS AK29
AE26 VDD VDD AM23 AV44 VDD VDD U29 R29 *2.2_04 FBVDDQ_SENSE_RTN W17 VDDS VDDS AK35
GND FBVDDQ_SENSE_RTN [62,63]
AE27 VDD VDD AM24 AW13 VDD VDD U30 W18 VDDS VDDS AK36
AE28 VDD VDD AM25 AW40 VDD VDD U31 FB_VREF P45 FB_VREF_PROBE PLACE NEAR G1 PIN E52 W24 VDDS VDDS AK37
AE29 VDD VDD AM26 AW42 VDD VDD U32 W25 VDDS VDDS AK38
AE30 VDD VDD AM27 AW43 VDD VDD U33 FBVDDQ W26 VDDS VDDS AK39
AE31 VDD VDD AM28 AW44 VDD VDD U34 W27 VDDS VDDS AP14
AE32 VDD VDD AM29 AW45 VDD VDD U35 W28 VDDS VDDS AP15
AE33 VDD VDD AM30 AY14 VDD VDD U36 W29 VDDS VDDS AP16
AE34 VDD VDD AM31 AY18 VDD VDD U37 FB_CAL_PD_VDDQ R44 FB_CAL_PD_VDDQ R38 40.2_1%_04 W35 VDDS VDDS AP17
AE35 VDD VDD AM32 AY22 VDD VDD U38 W36 VDDS VDDS AP18
AE36 VDD VDD AM33 AY26 VDD VDD U39 FB_CAL_PU_GND P44 FB_CAL_PU_GND R32 40.2_1%_04 W37 VDDS VDDS AP24
AE37 VDD VDD AM34 AY27 VDD VDD V13 W38 VDDS VDDS AP25
AE38 VDD VDD AM35 AY31 VDD VDD V40 FB_CALTERM_GND R45 FB_CAL_TERM_GND R33 60.4_1%_04 W39 VDDS VDDS AP26
AE39 VDD VDD AM36 AY35 VDD VDD W19
AF13 VDD VDD AM37 AY39 VDD VDD W20
AF30 VDD VDD AM38 AY43 VDD VDD W21
AF31 VDD VDD AM39 AY45 VDD VDD W22 GND
AF32 VDD VDD AP19 BA43 VDD VDD W23
AF33 VDD VDD AP20 BA44 VDD VDD W30
AF34 VDD VDD BK52 BA45 VDD VDD W31 VDDS_SENSE BM45
GPU_VDDS_SENSE [61]
AF40 VDD VDD BL46 BA46 VDD VDD W32 GNDS_SENSE BM44
GPU_GNDS_SENSE [61]
AG13 VDD VDD BL47 BA47 VDD VDD W33
AG19 VDD VDD BL48 BB38 VDD VDD W34
AG20 VDD VDD BL49 BB39 VDD
AG21 VDD VDD BL50
BG45 VDD VDD BL51
BG46 VDD VDD BL52
BG47 VDD VDD BM47
C BG48 VDD VDD BM48 C
BG49 VDD VDD BM49
BG50 VDD VDD BM50
BG51 VDD VDD BM51
BG52 VDD VDD N14
BH44 VDD VDD N18
BH45 VDD VDD N22
BH47 VDD VDD N26
BH48 VDD VDD N27
BH49 VDD VDD N31
BH50 VDD VDD N35 NVVDD_SENSE BK45
GPU_NVVDD_SENSE [60,62]
BH51 VDD VDD N39 GND_SENSE BL45
GPU_GND_SENSE [60,62]
BH52 VDD VDD P13
BJ44 VDD VDD P40
BJ45 VDD VDD R19
BJ46 VDD VDD R20
BJ47 VDD VDD R21
G1I
BJ48 VDD VDD R22
INS127599917 1V8_AON
BJ49 VDD VDD R23 BGA2152
BJ50 VDD VDD R30 COMMON
BJ51 VDD VDD R31 21/23 NC/1V8
BJ52 VDD VDD R32
BK47 VDD VDD R33 AT9 NC 1V8_AON BA10
BK48 VDD VDD R34 BA6 NC 1V8_AON BB14
BK49 VDD VDD U14 BA9 NC 1V8_AON BC14
BK50 VDD VDD U15 BD14 NC
BK51 VDD BE12 NC
BG6 NC
BH6 NC 1V8_RUN
BJ11 NC
BJ9 NC
BK44 NC
VDD18 AM10
VDD18 AM11
VDD18 AN10
D AN11 D
VDD18
VDD18 AR10
VDD18 AR11
VDD18 AT10
VDD18 AT11
VDD18 AV10
VDD18 AV11
VDD18 AW10 [18,19,27,28,31,59] 1V8_RUN
VDD18 AW11 [3,18,27,28,30,31,59,60,61,63] 1V8_AON
[19,20,21,22,23,24,25,27,63] FBVDDQ
[26,60] NVVDD Title
[26,61] NVVDDS [32] GPU NVVDD, FBVDDQ

1 2 3 4 5 6 7 8
GPU NVVDD, FBVDDQ B - 33

Schematic Diagrams
GPU GND
1 2 3 4 5 6 7 8
G1K G1L G1M

INS127621373
BGA2152
COMMON
INS127622592
BGA2152
COMMON
INS127623759
BGA2152
COMMON
GPU GND
16/23 GND_1/3 17/23 GND_2/3 22/23 GND_3/3
A2 GND GND AH6 AR20 GND GND B52 BL43 GND GND N6
A26 GND GND AH8 AR21 GND GND B7 BL5 GND GND N8
A29 GND GND AJ14 AR22 GND GND BA48 BL7 GND GND P14
A3 GND GND AJ15 AR23 GND GND BB49 BM2 GND GND P15
A32 GND GND AJ16 AR24 GND GND BC13 BM3 GND GND P16
A50 GND GND AJ17 AR25 GND GND BC16 C1 GND GND P17
A51 GND GND AJ18 AR26 GND GND BC19 C29 GND GND P18
AA49 GND GND AJ19 AR27 GND GND BC2 C33 GND GND P19
AA8 GND GND AJ2 AR28 GND GND BC22 C5 GND GND P20
A A
AB10 GND GND AJ20 AR29 GND GND BC25 C51 GND GND P21
AB14 GND GND AJ21 AR30 GND GND BC28 C52 GND GND P22
AB15 GND GND AJ22 AR31 GND GND BC31 D10 GND GND P23
AB21 GND GND AJ29 AR38 GND GND BD26 D25 GND GND P30
AB26 GND GND AJ34 AT4 GND GND BD52 D37 GND GND P35
AB27 GND GND AJ35 AT5 GND GND BE10 D4 GND GND P36
AB31 GND GND AJ39 AU10 GND GND BE18 D49 GND GND P51
Sheet 33 of 81 AB32
AB33
AB34
AB35
GND
GND
GND
GND
GND
GND
GND
GND
AJ9
AK1
AK44
AK47
AU14
AU15
AU16
AU17
GND
GND
GND
GND
GND
GND
GND
GND
BE19
BE21
BE22
BE24
D7
E2
E4
E48
GND
GND
GND
GND
GND
GND
GND
GND
R49
R52
T10
T14
AB36 AL10 AU18 BE25 E5 T15
GPU GND
GND GND GND GND GND GND
AB37 GND GND AL14 AU19 GND GND BE27 E51 GND GND T16
AB38 GND GND AL15 AU2 GND GND BE28 E8 GND GND T17
AB39 GND GND AL16 AU20 GND GND BE30 F10 GND GND T18
B AB6 GND GND AL22 AU27 GND GND BE40 F25 GND GND T24 B
AB8 GND GND AL23 AU28 GND GND BF2 F28 GND GND T25
AD14 GND GND AL24 AU29 GND GND BF4 F31 GND GND T26
AD17 GND GND AL27 AU32 GND GND BG10 F37 GND GND T29
AD24 GND GND AL34 AU39 GND GND BG31 G2 GND GND T36
AD30 GND GND AL4 AU6 GND GND BH15 G6 GND GND T45
AD31 GND GND AL43 AU8 GND GND BH18 H1 GND GND T47
AD32 GND GND AL45 AV4 GND GND BH2 H10 GND GND T49
AD35 GND GND AL51 AW14 GND GND BH27 H19 GND GND T8
AD36 GND GND AL6 AW15 GND GND BH30 H22 GND GND U7
AD37 GND GND AL8 AW16 GND GND BH33 H25 GND GND U9
AD38 GND GND AM4 AW17 GND GND BH36 H28 GND GND V14
AD39 GND GND AM9 AW18 GND GND BH39 H31 GND GND V15
AD44 GND GND AN14 AW19 GND GND BH42 H34 GND GND V16
AE10 GND GND AN15 AW20 GND GND BH5 H37 GND GND V17
AE2 GND GND AN16 AW21 GND GND BJ10 H40 GND GND V18
AE4 GND GND AN17 AW22 GND GND BJ12 H43 GND GND V19
AE43 GND GND AN18 AW23 GND GND BJ13 J1 GND GND V20
C AE49 AN21 AW26 BJ16 J20 V23 C
GND GND GND GND GND GND
AF1 GND GND AN25 AW30 GND GND BJ20 K13 GND GND V27
AF5 GND GND AN4 AY10 GND GND BJ35 K51 GND GND W10
AG14 GND GND AN5 AY2 GND GND BJ36 K6 GND GND W2
AG15 GND GND AN8 AY4 GND GND BJ37 K8 GND GND W4
AG16 GND GND AP10 AY47 GND GND BJ38 M52 GND GND W43
AG17 GND GND AP2 AY49 GND GND BJ39 M6 GND GND W45
AG18 GND GND AP4 AY51 GND GND BJ40 N10 GND
AG26 GND GND AP47 B1 GND GND BJ43 N43 GND
AG3 AP49 B10 BJ7 N45 GND
GND GND GND GND GND
AG30 GND GND AP51 B13 GND GND BK1 N47 GND
AG31 GND GND AP6 B16 GND GND BL1 N49 GND
AG32 GND GND AP8 B19 GND GND BL10 N51 GND
AG33 GND GND AR14 B2 GND GND BL13 BL40 GND
AG34 GND GND AR15 B22 GND GND BL16
D AG44 GND GND AR16 B25 GND GND BL19 D
AH10 GND GND AR17 B28 GND GND BL2
AH2 GND GND AR18 B31 GND GND BL22 GND
AH4 GND GND AR19 B34 GND GND BL25
AH43 GND GND BL37 B37 GND GND BL28
AH45 GND GND BD24 B40 GND GND BL31
AH47 GND GND BC24 B43 GND GND BL34
AH49 B46 B5
GND GND GND
AH51 GND B48 GND GND B51
4/12 D02 ㍍GND

Title
GND GND GND GND [33] GPU NVVDD, FBVDDQ and GND

1 2 3 4 5 6 7 8
B - 34 GPU GND
Schematic Diagrams
PCH 1/9
5 4 3 2 1
BOOT HALT JTAG ODT ESPI FLASH SHARING MODE

ENABLE:LOW DISABLE:LOW MASTER ATTACHED FLASH SHARING:LOW
SLAVE ATTACEHD FLASH SHARING:HIGH
(INTERNAL WEAK PD) (INTERNAL WEAK PU) (INTERNAL WEAK PD)
VDD3 VDD3 3.3VA
R798 R808 R785
*20K_04 *20K_04 *4.7K_04

SPI_SI_R SPI_SO_R GPP_H_12 GPP_G_14_GSXDIN:
DMI AC COUPLING FULL VOLTAGE MODE
WHEN SAMPLED LOW 3.3VS
D R797 R807 R799 Modify(on TBT),6/13 Tim D
*4.7K_04 *4.7K_04 *20K_04 SPT-H_PCH TBCIO_PLUG_EVENT R284 *10K_04
U114A
R274 *1K_04
[43,68] LAN_W AKEUP#

R680 *0_04 BD17 BB27 PLT_RST# [38]
NEW
GPP_A11/PME# GPP_B13/PLTRST#
AG15 TBT_FRC_PW R
CONSENT STRAP PESONALITY STRAP RSVD P43 TBT_FRC_PW R [69] NEW
AG14 GPP_G16/GSXCLK TBCIO_PLUG_EVENT
ENABLE:LOW ENABLE:LOW RSVD R39 TBCIO_PLUG_EVENT [69]
AF17 GPP_G12/GSXDOUT
(INTERNAL WEAK PU) (INTERNAL WEAK PU) RSVD R36
AE17 GPP_G13/GSXSLOAD GPP_G_14_GSXDIN
RSVD R42 R834 *1K_04
VDD3 VDD3 GPP_G14/GSXDIN R41
AR19 GPP_G15/GSXSRESET# 3.3VS
AN17 TP2
TP1
AF41 EXTTS_SNI_DRV0_PCH R288 8.2K_04
R784 R822 SPI_SI_R BB29 GPP_E3/CPU_GP0
SPI0_MOSI AE44 TCH_PNL_INTR_N R823 10K_04 3.3VA
SPI_SO_R BE30 GPP_E7/CPU_GP1
SPI0_MISO BC23 BT_RF_KILL_R_N
*20K_04
SPI_IO2
*20K_04
SPI_IO3
SPI_CS_0#
SPI_SCLK_R
BD31
BC31
AW31
SPI0_CS0#
SPI0_CLK
SPI0_CS1#
GPP_B3/CPU_GP2
GPP_B4/CPU_GP3
GPP_H18/SML4ALERT#
BD24
BC36
EXTTS_SNI_DRV1_PCH R708
SML4ALERT# R855
8.2K_04
*100K_04
Sheet 34 of 81
SPI_W P# R774 33_04 SPI_IO2 BC29 BE34 SML4DATA R769 *100K_04
R783
*4.7K_04
R821
*1K_04
SPI_HOLD# R842
VDD3
33_04
R279
SPI_IO3 BD30
*2.2K_04 SPI_CS2# AT31
AN36
SPI0_IO2
SPI0_IO3
SPI0_CS2#
GPP_H17/SML4DATA
GPP_H16/SML4CLK
GPP_H15/SML3ALERT#
BD39
BB36
BA35
SML4CLK
SML3ALERT#
SML3DATA
R836 *10K_04
PCH 1/9
[52] PCH_HP_PLUG GPP_H14/SML3DATA BC35 SML3CLK
AL39 GPP_D1/SPI1_CLK
[71] TBTA_ACE_GPIO2 GPP_H13/SML3CLK BD35 GPP_H_12
AN41 GPP_D0/SPI1_CS#
[71] TBTA_ACE_GPIO3 GPP_H12/SML2ALERT# AW35 SML2DATA R267 *10K_04
AN38 GPP_D3/SPI1_MOSI
[71] TBTA_ACE_GPIO0 GPP_H11/SML2DATA BD34 SML2CLK
AH43 GPP_D2/SPI1_MISO
[71,72] TBTA_MRESET GPP_H10/SML2CLK
AG44 GPP_D22/SPI1_IO3 BE11 R670 1M_04
C [71,72] TBTA_ACE_GPIO7 GPP_D21/SPI1_IO2 INTRUDER# VCC_RTC C
QJHT 1 OF 12 REV = 1.3
For ITE IT8587B Test

HSPI_MSI R336 0_04 SPI_SI_R
B [43] HSPI_MSI HSPI_MSO SPI_SO_R B
R334 0_04
[43] HSPI_MSO HSPI_SCLK SPI_SCLK_R
R331 0_04
[43] HSPI_SCLK HSPI_CE# SPI_CS_0#
R317 0_04
[43] HSPI_CE#
SPI_* = 1"~6.5"
RTC Wake UP
VDD3
BIOS + ME ROM 8MB
U24
8 5 SPI_SI_M R335 33_04 SPI_SI_R
VDD SI
2 SPI_SO_M R327 33_04 SPI_SO_R
C564 SO
R340 3.3K_1%_04 SPI_W P# 3 1 SPI_CS0# R321 0_04 SPI_CS_0#
0.1u_16V_Y5V_04 WP# CE#
6 SPI_SCLK_M R330 33_04 SPI_SCLK_R
SCK
R320 3.3K_1%_04 SPI_HOLD# 7 4
HOLD# VSS
GD25B64CSIGR
A A
64M
GD:6-04-02564-A75
MXIC:6-04-25647-490
WINBOND: 6-04-02564-470
Title
3.3VA [5,35,36,37,38,40,42,55] [34] PCH 1/12-SPI/SMBUS
VCC_RTC [37,40]
Size Document Number
3.3VS [3,9,10,11,12,13,14,15,17,30,31,36,37,38,39,40,42,43,46,47,48,49,50,51,52,55,59,64,66,68,70] Rev
VDD3 [5,30,37,40,42,43,46,49,51,54,55,56,57,58,59,60,61,62,63,68] A3 P650RP 6-71-P65P0-D02A D03B

5 4 3 2 1
PCH 1/9 B - 35
Schematic Diagrams
PCH 2/9
5 4 3 2 1
SPT-H_PCH
U114B
L27
[2] DMI_MT_IR_0_DN DMI_RXN0 AF5 USB_PN1 [44]
N27 USB2N_1
[2] DMI_MT_IR_0_DP
C27 DMI_RXP0
USB2P_1
AG7
AD5
USB_PP1 [44] USB3 PORT1, ⶎ, C h a r g e r
[2] DMI_IT_MR_0_DN DMI_TXN0 USB_PN2 [73]
B27 USB2N_2
D
[2] DMI_IT_MR_0_DP
E24 DMI_TXP0
USB2P_2
AD7 USB_PP2 USB3 PORT2, ⎛
[73] D
[2] DMI_MT_IR_1_DN DMI_RXN1 AG8
DFX TEST MODE
XTAL INPUT IS SINGLE ENDED [2] DMI_MT_IR_1_DP
G24
DMI_RXP1
USB2N_3 AG10 TYPE A 㓡3.0 D02 3/10
B28 USB2P_3
IF SAMPLED LOW ELSE DIFFERENTIAL [2] DMI_IT_MR_1_DN DMI_TXN1 AE1
A28 USB2N_4
VISACH2_D3 [2] DMI_IT_MR_1_DP DMI_TXP1 DMI AE2
G27 USB2P_4
[2] DMI_MT_IR_2_DN DMI_RXN2 AC2 USB_PN5 [45]
E26 USB2N_5
[2] DMI_MT_IR_2_DP
B29 DMI_RXP2
USB2P_5
AC3 USB_PP5 [45] USB3 PORT5, ᶲ
R826 [2] DMI_IT_MR_2_DN DMI_TXN2 AF2 USB_PN6 [47]
C29 USB2N_6
[2] DMI_IT_MR_2_DP DMI_TXP2 AF3 USB_PP6 [47] 3G
*10K_04 L29 USB2P_6
[2] DMI_MT_IR_3_DN DMI_RXN3 AB3 USB_PN7 [52]
K29 USB2N_7
[2] DMI_MT_IR_3_DP DMI_RXP3 USB 2.0 AB2 USB_PP7 [52] FINGER
B30 USB2P_7
[2] DMI_IT_MR_3_DN DMI_TXN3 AL8 USB_PN8 [46]
A30 USB2N_8
[2] DMI_IT_MR_3_DP DMI_TXP3 AL7 USB_PP8 [46] NGFF WLAN+BT
USB2P_8 AA1
RING OSCILLATOR BYPASS USB 3.1 R676 100_1%_04 PCIECOMP_N B18 USB2N_9 AA2
USB_PN9 [50]
USB_OC0#
PCIECOMP_P C17 PCIE_RCOMPN
USB2P_9 AJ8
USB_PP9 [50] CCD
PCIE_RCOMPP
TWO TYPE C H15
USB2N_10
USB2P_10
AJ7
W2
R824 [69] PCIE_RXN1_TBT PCIE1_RXN/USB3_7_RXN USB2N_11
G15 W3
Sheet 35 of 81 C
*10K_04
[69]
[69]
PCIE_RXP1_TBT
PCIE_TXN1_TBT
C987
C994
0.22u_10V_X5R_04
0.22u_10V_X5R_04
PCIETXN1
PCIETXP1
A16
B16
PCIE1_RXP/USB3_7_RXP
PCIE1_TXN/USB3_7_TXN
USB2P_11
USB2N_12
AD3
AD2 C
PCIe/USB 3
[69] PCIE_TXP1_TBT PCIE1_TXP/USB3_7_TXP USB2P_12
C960 0.22u_10V_X5R_04 PCIETXN2 B19 V2
[69] PCIE_TXN2_TBT PCIE2_TXN/USB3_8_TXN USB2N_13
PCH 2/9 XTAL INPUT FREQUENCY[0]
[69]
[69]
[69]
PCIE_TXP2_TBT
PCIE_RXN2_TBT
PCIE_RXP2_TBT
C949 0.22u_10V_X5R_04 PCIETXP2 C19
E17
G17
PCIE2_TXP/USB3_8_TXP
PCIE2_RXN/USB3_8_RXN
PCIE2_RXP/USB3_8_RXP
USB2P_13
USB2N_14
USB2P_14
V1
AJ11
AJ13 USB_OC2#
RN2
10K_8P4R_04
1 8
3.3VA
USB_OC1# L17 VISACH2_D3

[69] PCIE_RXN3_TBT PCIE3_RXN/USB3_9_RXN 2 7
K17 USB_OC1#
[69] PCIE_RXP3_TBT PCIE3_RXP/USB3_9_RXP 3 6
C928 0.22u_10V_X5R_04 PCIETXN3 B20 USB_OC0#
[69] PCIE_TXN3_TBT PCIE3_TXN/USB3_9_TXN 4 5
R825 C927 0.22u_10V_X5R_04 PCIETXP3 C20 USB_OC0#
[69] PCIE_TXP3_TBT PCIE3_TXP/USB3_9_TXP AD43
E20 GPP_E9/USB2_OC0# USB_OC1# RN1
*10K_04 [69] PCIE_RXN4_TBT PCIE4_RXN/USB3_10_RXN AD42
G19 GPP_E10/USB2_OC1# USB_OC2# 10K_8P4R_04
[69] PCIE_RXP4_TBT PCIE4_RXP/USB3_10_RXP AD39 USB_OC5#
C938 0.22u_10V_X5R_04 PCIETXN4 B21 GPP_E11/USB2_OC2# VISACH2_D3 1 8
[69] PCIE_TXN4_TBT PCIE4_TXN/USB3_10_TXN AC44 USB_OC6#
C939 0.22u_10V_X5R_04 PCIETXP4 A21 GPP_E12/USB2_OC3# USB_OC4# 2 7
[69] PCIE_TXP4_TBT PCIE4_TXP/USB3_10_TXP Y43 USB_OC7#
K19 GPP_F15/USB2_OCB_4 USB_OC5# 3 6
[68] PCIE_RXN5_GLAN PCIE5_RXN Y41
XTAL INPUT FREQUENCY[1] GLAN [68] PCIE_RXP5_GLAN
L19
D22 PCIE5_RXP
GPP_F16/USB2_OCB_5
GPP_F17/USB2_OCB_6
W44
W43
USB_OC6#
USB_OC7#
USB_OC4# 4 5
USB_OC2# [68] PCIETXN5 PCIE5_TXN

C22 GPP_F18/USB2_OCB_7
[68] PCIETXP5 PCIE5_TXP
G22
E22 PCIE6_RXN
R276
B22 PCIE6_RXP AG3 USB2_COMP R647 113_1%_04 DESIGN NOTE:
B
PCIE6_TXN
USB2_COMP AD10 USB2_VBUSSENSE R172 1K_04 USB2 COMP RES: PLACE WITHIN 1 INCH B
*10K_04 A23 USB2_VBUSSENSE
PCIE6_TXP AB13
L22 RSVD_AB13
[46] PCIE_RXN7_WLAN PCIE7_RXN AG2 USB2_ID R646 1K_04
WLAN [46] PCIE_RXP7_WLAN
K22
C23 PCIE7_RXP
USB2_ID
[46] PCIETXN7 PCIE7_TXN
B23
K24 BD14
[46] PCIE_RXN8_WIGIG PCIE8_RXN GPD7/RSVD
L24
[46] PCIE_RXP8_WIGIG PCIE8_RXP
WIGIG [46] PCIETXN8
C24
B24 PCIE8_TXN

[5,34,36,37,38,40,42,55] 3.3VA
[3,9,10,11,12,13,14,15,17,30,31,34,36,37,38,39,40,42,43,46,47,48,49,50,51,52,55,59,64,66,68,70] 3.3VS
A
ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/ A
Title
[35] PCH 2/12-DMI/PCIE/USB2.0

5 4 3 2 1
B - 36 PCH 2/9
Schematic Diagrams
PCH 3/9
5 4 3 2 1
BIOS RECOVERY PCH_RSVD

SPT-H_PCH
ENABLE :LOW U114C
3.3VS 3.3VS
[46] CL_CLK1 AV2
CL_CLK G31
BIOS SET GPIO pin [46] CL_DATA1 AV3 PCIE9_RXN/SATA0A_RXN PCIE_RXN9_SATA0A_RXN_SSD [46]
CL_DATA CLINK H31
AW2 PCIE9_RXP/SATA0A_RXP PCIE_RXP9_SATA0A_RXP_SSD [46]
R247 R268
NV power on/off timing [46] CL_RST#1
R44
CL_RST#
PCIE9_TXN/SATA0A_TXN
C31
B31
PCIE_TXN9_SATA0A_TXN_SSD [46]
PCIE_TXP9_SATA0A_TXP_SSD [46]
SSD_1
[59] GPPG8_PCH_1V8AON_EN PCIE9_TXP/SATA0A_TXP
10K_04 10K_04 R43 GPP_G8/FAN_PWM_0
[31] GPPG9_PCH_NV3V3_EN GPP_G9/FAN_PWM_1
U39 G29 PCIE_RXN10_SATA1A_SSD 3.3VS
BIOS_REC PCH_RSVD [31] GPPG10_PCH_NVVDD_EN GPP_G10/FAN_PWM_2 PCIE10_RXN/SATA1A_RXN
N42 E29 PCIE_RXP10_SATA1A_SSD
[31] GPPG11_PCH_NVVDDS_EN GPP_G11/FAN_PWM_3 PCIE10_RXP/SATA1A_RXP
R228 R261 [31] GPPG2_PCH_1V8RUN_EN
U43
FAN PCIE10_TXN/SATA1A_TXN
C32
B32
PCIE_TXN10_SATA1A_SSD
PCIE_TXP10_SATA1A_SSD SSD_1
D [31] GPPG0_PCH_PEXVDD_EN PCIE10_TXP/SATA1A_TXP D
*0_04 *10K_04 U42 GPP_G0/FAN_TACH_0
[31] GPPG1_PCH_FBVDDQ_EN GPP_G1/FAN_TACH_1 F41 SATA_RXN2
U41 PCIE15_RXN/SATA2_RXN SATA_RXP2 4/11D02 CHANGE NET SATAGP0 R296 43K_04
GPP_G2/FAN_TACH_2 E41
[43] SCI# C
D49
A SCI#_R
RB751V-40(lision)
M44
U36 GPP_G3/FAN_TACH_3
PCIE15_RXP/SATA2_RXP
PCIE15_TXN/SATA2_TXN
B39
A39
SATA_TXN2
SATA_TXP2
main HDD SATAGP1_R
SATAGP2
R226
R294
*43K_04
43K_04
P44 GPP_G4/FAN_TACH_4 SATAGP3 R269 43K_04
GFX SELECT TABLE PCIE15_TXP/SATA2_TXP
D53 C A SW I#_R T45 GPP_G5/FAN_TACH_5
MFG_MODE [43] SW I# D43
NORMAL GFX:LOW RB751V-40(lision) T44 GPP_G6/FAN_TACH_6 SATA_RXN3 [52] PCH_SATAHDD_LED# R287 10K_04
PCIe/SATA
PCIE16_RXN/SATA3_RXN E42
CUSTOMER GFX:HIGH GPP_G7/FAN_TACH_7 SATA_RXP3 [52]
3.3VS PCIE16_RXP/SATA3_RXP A41 SCI#_R R815 10K_04
3.3VS [46]
[46]
PCIE_TXP11_SSD
PCIE_TXN11_SSD
B33
C33 PCIE11_TXP
PCIE16_TXN/SATA3_TXN
PCIE16_TXP/SATA3_TXP
A40
SATA_TXN3 [52]
SATA_TXP3 [52] 2nd HDD
PCIE11_TXN
R846
SSD_1 [46]
[46]
PCIE_RXP11_SSD
PCIE_RXN11_SSD
K31
L31 PCIE11_RXP
PCIE17_RXN/SATA4_RXN
H42
H40
3.3VA
PCIE11_RXN
R845 PCIE17_RXP/SATA4_RXP SW I#_R
BIOS_REC E45 R832 10K_04
*10K_04 AB33 PCIE17_TXN/SATA4_TXN
GPP_F10/SCLOCK F45
HM170 䃉㬌PIN
*10K_04 PCH_RSVD AB35 PCIE17_TXP/SATA4_TXP
GP39_GFX_CRB_DETECT
MFG_MODE
GP39_GFX_CRB_DETECT
MFG_MODE
AA44
AA45
GPP_F11/SLOAD
GPP_F13/SDATAOUT0 K37
SSD_2
PCIE18_RXN/SATA5_RXN G37
GPP_F12/SDATAOUT1
PCIE_TXN14 B38 PCIE18_RXP/SATA5_RXP G45
R820 PCIE_TXP14 PCIE14_TXN/SATA1B_TXN PCIE18_TXN/SATA5_TXN
C38 G44
10K_04 PCIE_RXN14 D39 PCIE14_TXP/SATA1B_TXP PCIE18_TXP/SATA5_TXP
PCIE_RXP14 E37
C36
PCIE14_RXN/SATA1B_RXN
PCIE14_RXP/SATA1B_RXP
PCIE13_TXN/SATA0B_TXN
GPP_E8/SATALED#
GPP_E0/SATAXPCIE0/SATAGP0
AD44
AG36
AG35
PCH_SATAHDD_LED#
SATAGP0
SATAGP1_R
SATAGP0
PCH_SATAHDD_LED#
[46]
[52]
SATAGP0 & SATAGP1
Sheet 36 of 81
B36 GPP_E1/SATAXPCIE1/SATAGP1
3/18 D02 ᾖ㓡 H: SATA
G35
E35
PCIE13_TXP/SATA0B_TXP
PCIE13_RXN/SATA0B_RXN
PCIE13_RXP/SATA0B_RXP
GPP_E2/SATAXPCIE2/SATAGP2
GPP_F0/SATAXPCIE3/SATAGP3
AG39
AD35
AD31
AD38
SATAGP2
SATAGP3 L: PCIe
1.0V_VCCST PCH 3/9
A35 GPP_F2/SATAXPCIE5/SATAGP5
C [46] PCIE_TXP12_SSD PCIE12_TXP AC43 C
B35 GPP_F3/SATAXPCIE6/SATAGP6
[46] PCIE_TXN12_SSD PCIE12_TXN AB44
SSD_1 [46]
[46]
PCIE_RXP12_SSD
PCIE_RXN12_SSD
H33
G33 PCIE12_RXP
W36 R121
PCIE12_RXN EDP_BRIGHTNESS [13]
J45 GPP_F21/EDP_BKLTCTL W35
PCIE20_TXP/SATA7_TXP GPP_F20/EDP_BKLTEN BLON [13] 1K_04
K44 W42 NB_ENAVDD [13]
N38 PCIE20_TXN/SATA7_TXN GPP_F19/EDP_VDDEN
N39 PCIE20_RXP/SATA7_RXP HOST AJ3 PCH_THERMTRIP#_R R122 604_1%_04 PCH_THERMTRIP#
HM170 䃉㬌PIN PCIE20_RXN/SATA7_RXN THERMTRIP# PCH_THERMTRIP# [5]
SSD_2 H44
H43 PCIE19_TXP/SATA6_TXP PECI
AL3
AJ4
PCH_PECI
H_PM_SYNC_R R125 30.1_1%_04 H_PM_SYNC [5]
PCH_PECI [5]
L39 PCIE19_TXN/SATA6_TXN PM_SYNC AK2
PCIE19_RXP/SATA6_RXP PLTRST_PROC# PLTRST_CPU_N [5]
L37 AH2 H_PM_DOW N [5]
PCIE19_RXN/SATA6_RXN PM_DOWN
R134
QJHT 3 OF 12 REV = 1.3 *10K_04
3.3VS PLACE CLOSE TO PCH

PCH_THERMTRIP# R118 *1K_04
DIMM0_CHA_EVENT# [9]
R109 *1K_04
C689 C637 DIMM0_CHB_EVENT# [11]
10
U28 R116 *1K_04
6
1
*10u_6.3V_X5R_06 *0.1u_10V_X7R_04 DIMM1_CHA_EVENT# [10]
VDD3_3
VDD3_2
VDD3_1
R108 *1K_04
DIMM1_CHB_EVENT# [12]
B CBTL02043A B
CBTL02043A 19
B0+ PCIE_TXP10_SSD [46]
18
B0- PCIE_TXN10_SSD [46]
SATA PORT2
PCIE_TXP10_SATA1A_SSD C651 0.01u_16V_X7R_04 3 17 TO J_SSD1 PCIEX4
qfn20-4_5x2_5mm
PCIE_TXN10_SATA1A_SSD C655 A0+ B1+ PCIE_RXP10_SSD [46]

0.01u_16V_X7R_04 4 16
J_SATA1 A0- B1- PCIE_RXN10_SSD [46]
S1 PCIE_RXP10_SATA1A_SSD
SATA_TXP2 7 15
S2 SATATXP2 C1285 0.01u_16V_X7R_04 PCIE_RXN10_SATA1A_SSD A1+ C0+ SATA1_TXP1 [47]
SATA_TXN2 8 14
S3 SATATXN2 C1284 0.01u_16V_X7R_04 A1- C0- SATA1_TXN1 [47]
S4
S5 SATARXN2 C1283 0.01u_16V_X7R_04 SATA_RXN2 C1+
13
12
SATA1_RXP1 [47]
TO J_3G1 SATA1
S6 SATARXP2 C1282 0.01u_16V_X7R_04 SATA_RXP2 C1- SATA1_RXN1 [47]
S7 KEY SATAGP1_R
9 LTE_GPIO#
3.3VS SEL(L_B, H_C) R403 *0_04
OPTION M-KEY (J_SSD1) B-KEY (J_3G1) LTE_GPIO# [42] H: SATA,
THERMAL
P1 SATAGP1 3.3VS 4G_SATA_DET# L: USB3 (4G)

P2 1 PCIE x4, x2 USB3 L: PCIe H: SATA,
GND3
GND2
GND1
H: SATA
XSD
P3 C1280 C1281 U30

ᶵ㓗㎜ L: USB3 (4G)
5
P4 2 U122 4G_SATA_DET# SATAGP1 SATAGP1_R
P5 *0.01u_16V_X7R_04 *10u_6.3V_X5R_06 PCIE x4, x2 SATA 1 㰺㍺CARD PIN4 (J_3G1) (J_3G1)
4G_SATA_DET# [47]
P6 4
21
20
11
5
2
SATA USB3 L L PCIE

P7 5VS 3 2 L (Default) (Defaule)
SATAGP1 [47]
P8
P9 SATA SATA SATAGP1 L H PCIE
U74AHC1G08G-AL5-R L
3
P10 4 L: PCIe
4G CARD
P11 H
P12 C1277 C1278 C1279
GND 㰺㍺CARD H H SATA SATA
P13 R399 *0_04 H: SATA,USB3(4G)
A P14 0.1u_16V_Y5V_04 1u_6.3V_X5R_04 10u_6.3V_X5R_06 A
P15
GND1
GND2
[5,34,35,37,38,40,42,55]
[3,9,10,11,12,13,14,15,17,30,31,34,37,38,39,40,42,43,46,47,48,49,50,51,52,55,59,64,66,68,70]
3.3VA
3.3VS
[13,17,48,49,50,51,52,55,60,61] 5VS Title
For P650RP: TBF0-02103-0021A
PCB Footprint = 193705-1 PN = 6-21-43750-022
[5,7,37,56,64,66] 1.0V_VCCST [36] PCH 3/12-PCIE/SATA/HOST
A3 P650RP 6-71-P65P0-D02A D03B

5 4 3 2 1
PCH 3/9 B - 37
Schematic Diagrams
PCH 4/9
5 4 3 2 1
SPT-H_PCH
VDD3 U114D
R162 22_04 HDA_BITCLK_R BA9 BB17 ISH_GP_6_R

[48] HDA_BITCLK HDA_BCLK GPP_A12/BMBUSY#/ISH_GP6/SX_EXIT_HOLDOFF#
R156 22_04 HDA_RST#_R BD8 AW22 PM_CLKRUN#
SKL䘬VCCRTC天㯪⮷㕤3.2Vẍᶳ [48] HDA_RST# HDA_RST# GPP_A8/CLKRUN# PM_CLKRUN# [50]
BE7
(Skarkbay⎗3.3V) ㇨ẍPDG⺢嬘㍉䓐ẍᶳ暣嶗(1.5K,45.3K)℞ῤ⎗婧㔜 [48] HDA_SDIN0 HDA_SDI0
BC8 AR15
R145 1.5K_1%_04 R141 45.3K_1%_04 HDA_SDI1 GPD11/LANPHYPC
R154 22_04 HDA_SDOUT#_R BB7 AV13
[37,48] HDA_SDOUT HDA_SDO GPD9/SLP_WLAN#
ĳıŮŪŭŴ [48] HDA_SYNC
R155 22_04 HDA_SYNC#_R BD9
HDA_SYNC
D
D12 VCC_RTC DRAM_RESET#
BC14 DDR4_DRAMRST# 忂䞍BIOS姕⭂PIN D
BD1 BD23 '1' 1.20V
1 A BE2 RSVD_BD1 GPP_B2/VRALERT# AL27 DESIGN NOTE:
RSVD_BE2 GPP_B1 '0' 1.35V
C 3 CLOSE TO PCH AR27
AUDIO GPP_B0 DDR_VOL_SEL [53]
2 A R644 30.1_1%_04 AUD_AZACPU_SDO AM1 N44
[3] AUD_AZACPU_SDO_R DISPA_SDO GPP_G17/ADR_COMPLETE
AN2 AN24
RTC_VBAT_1
[3] AUD_AZACPU_SDI DISPA_SDI GPP_B11
BAT54CS3 R643 30.1_1%_04 AUD_AZACPU_SCLK_R AM2 AY1 SYS_PW ROK [42]
C363 R669 R666 [3] AUD_AZACPU_SCLK DISPA_BCLK SYS_PWROK
ĲıŮŪŭŴ 20K_1%_04 20K_1%_04 BC13 PCIE_W AKE#
1u_6.3V_X5R_04 AL42 WAKE# PCIE_W AKE# [46,68,69]
[31] GPIO4_1V8_MAIN_EN_R GPP_D8/I2S0_SCLK BC15 SLP_A#
AN42 GPD6/SLP_A# PM_SLP_LAN#
GPP_D7/I2S0_RXD AV15
AM43 SLP_LAN#
GPP_D6/I2S0_TXD BC26
AJ33 GPP_B12/SLP_S0#
R278 [72] TBTB_ACE_GPIO0 GPP_D5/I2S0_SFRM AW15
AH44 GPD4/SLP_S3# SUSB# [13,42,43,44,49,55,56,69]
GPP_D20/DMIC_DATA0 BD15
1
C972 AJ35 GPD5/SLP_S4# SUSC# [43,53,56,58]
1K_04 GPP_D19/DMIC_CLK0 BA13
JOPEN2 AJ38 GPD10/SLP_S5#

1u_6.3V_X5R_04 *OPEN_10mil-1MM AJ42 GPP_D18/DMIC_DATA1
GPP_D17/DMIC_CLK1 AN15 SUS_CLK R180 0_04 SUSCLK [46]
J_CBAT1 GPD8/SUSCLK BD13 PM_BATLOW #
2
GPD0/BATLOW# BB19 SUS_PW R_ACK# R695 *0_04
1 GPP_A15/SUSACK# SUS_PW R_ACK#_EC [43]
RTC_RST# BC10 BD19 SUSW ARN#
2 SRTC_RST# BB10 RTCRST# GPP_A13/SUSWARN#/SUSPWRDNACK
50271-0020N-001 SRTCRST#
P/N = 6-20-43130-102 AW11 BD11 LAN_W AKE#
[42] PM_PCH_PW ROK PCH_PWROK GPD2/LAN_WAKE# AC_PRESENT
PCB Footprint = 85204-02R C991 RSMRST# BA11 BB15
Sheet 37 of 81 1u_6.3V_X5R_04
RSMRST# R174
[43] RSMRST#
*0402_short PCH_DPW ROK AV11

RSMRST#
DSW_PWROK
GPD1/ACPRESENT
SLP_SUS#
GPD3/PWRBTN#
BB13
AT13
AW1
SLP_SUS#_R R189
PW R_BTN#
SYS_RESET#
AC_PRESENT
*0_04
PW R_BTN# [43]
[43]
EC_SLP_SUS# [43,54,55,56]
SKIN_THRM_SNSR_ALERT_N BB41 SYS_RESET# SPKR_SMC_EXTSMI R727

PCH 4/9 GPP_C2/SMBALERT# BD26 0_04
SMBUS
SMB_CLK AW44 GPP_B14/SPKR PCH_SPKR [48]
[50,52,53] SMB_CLK GPP_C0/SMBCLK AM3
C SMB_DATA BB43 PROCPWRGD H_PW RGD [5] C
[50,52,53] SMB_DATA GPP_C1/SMBDATA
GPP_C5 BA40
GPP_C5/SML0ALERT# AT2 ITP_PMODE
SML0_CLK AY44 ITP_PMODE 1.0V_VCCST
GPP_C3/SML0CLK AR3 PCH_JTAGX
SML0_DATA BB39 JTAGX
GPP_C4/SML0DATA JTAG AR2 PCH_JTAG_TMS
PCH_HOT_GNSS_DISABLE AT27 JTAG_TMS
GPP_B23/SML1ALERT#/PCHHOT# AP1 PCH_JTAG_TDO R641 51_04
R879 *0_04 SMC_CPU_THERM_RAW42 JTAG_TDO
[43] SMC_CPU_THERM GPP_C6/SML1CLK AP2 PCH_JTAG_TDI
SMD_CPU_THERM AW45 JTAG_TDI
[43] SMD_CPU_THERM GPP_C7/SML1DATA AN3 PCH_JTAG_TCK R642 51_04
JTAG_TCK
SUSW ARN# R686 0_04 SUS_PW R_ACK#

3.3VS
3.3VA
RN3
1K_8P4R_04
C1136 *100p_50V_NPO_04 SMC_CPU_THERM_R 1 8
DRAM_RST# VDDQ C1135 *100p_50V_NPO_04 SMD_CPU_THERM 2 7
R903 R905 SMB_CLK
C1134 *100p_50V_NPO_04 3 6
C521 *100p_50V_NPO_04 SMB_DATA 4 5
1K_04 1K_04
2
Q59A R702
G
MTDK3S6R 470_04
1 6 SMB_CLK
[3,9,10,11,12,17,52] SMB_CLK_R
S
D
SML0_CLK R301 499_1%_04
5
Q59B DDR4_DRAMRST#
DDR4_DRAMRST# [9,10,11,12]
G
MTDK3S6R SML0_DATA R835 499_1%_04
4 3 SMB_DATA
[3,9,10,11,12,17,52] SMB_DATA_R
S
D
C1023 SUSW ARN# R692 1K_04
B *0.1u_10V_X7R_04 R685 *1K_04 B
VDD3
SUS_PW R_ACK# R703 *10K_04

Flash Descriptor Security Overide
Low = Disabled-(Default) PW R_BTN# R178 *10K_04
High = Enabled PM_BATLOW #
JOPEN1 R674 8.2K_04
*OPEN_10mil-1MM
PM_SLP_LAN# R170 *10K_04
3.3VA R144 *1K_04 1 2 R157 1K_04
ME_W E [43] PCIE_W AKE# R181 1K_04
R146 *910_04 A C HDA_SDOUT AC_PRESENT R187 10K_04

HDA_SDOUT [37,48]
D14 RB751V-40(lision)
ESPI/LPC SELECT STARP TOP SWAP OVERRIDE STRAP EXI BOOT STALL BYPASS 3.3VS
LPC : LOW (DEFAULT) SWAP ENABLE: HIGH ENABLE:HIGH
eSPI: HIGH SWAP DISABLE(DEFAULT): LOW (INTERNAL WEAK PD) PM_CLKRUN# R204 8.2K_04
(INTERNAL WEAK PD) (INTERNAL WEAK PD)
SYS_RESET# R649 10K_04
3.3VA 3.3VS 3.3VA TLS CONFIDENTITALITY RSMRST# R175 10K_04
ENABLE: HIGH
A
(INTERNAL WEAK PD) SUS_CLK R182 *1.5K_04 A
R295 R722 R300 KW>>sZE>/^>t,E^DW>>Kt

*4.7K_04 150K_1%_04 *4.7K_04
VDDQ [7,9,10,11,12,53,58]
GPP_C5 SPKR_SMC_EXTSMI PCH_HOT_GNSS_DISABLE
3.3VA R272 *4.7K_04 3.3VA [5,34,35,36,38,40,42,55]
1.0V_VCCST [5,7,36,56,64,66] Title
R292 R721 R291
*20K_04 *20K_04 *20K_04
R262 *20K_04 SKIN_THRM_SNSR_ALERT_N VCC_RTC [34,40]
[37] PCH 4/12-HDA/SMBUS/RTC
3.3V [2,13,17,31,44,45,46,47,50,52,53,55,56,58,59,60,62,70] Size Document Number Rev
3.3VS [3,9,10,11,12,13,14,15,17,30,31,34,36,38,39,40,42,43,46,47,48,49,50,51,52,55,59,64,66,68,70]
VDD3 [5,30,34,40,42,43,46,49,51,54,55,56,57,58,59,60,61,62,63,68] A3 P650RP 6-71-P65P0-D02A D03B

5 4 3 2 1
B - 38 PCH 4/9
Schematic Diagrams
PCH 5/9
5 4 3 2 1
D D
U114E
R787 100K_04 SPT-H_PCH
BB3 3.3VS
FROM DP REDRIVER AW4 GPP_I7/DDPC_CTRLCLK
[14,30] MDP_F_HPD_RE GPP_I0/DDPB_HPD0 BD6
AY2 GPP_I8/DDPC_CTRLDATA
[17,30] HDMI_HPD GPP_I1/DDPC_HPD1 BA5
AV4 GPP_I5/DDPB_CTRLCLK
[3] W IGIG_HPD_RE GPP_I2/DDPD_HPD2 BC4
R974 *0_04 BA4 GPP_I6/DDPB_CTRLDATA
GPP_I3/DDPE_HPD3 BE5 DGPU_RST#_PCH R286 *10K_04
R902 100K_04 GPP_I9/DDPD_CTRLCLK BE6 DGPU_SELECT# R804
GPP_I10/DDPD_CTRLDATA 10K_04
R975 0_04 R653 *100K_04
Y44 H_SKTOCC_N [5] DGPU_PRSNT#
FROM DP REDRIVER [14,30] MDP_E_HPD_RE GPP_F14 R285 10K_04
V44
GPP_F23 DGPU_RST#_PCH DGPU_PW R_EN [31,43,52,59]
R976 *0_04 W39
BD7 GPP_F22
[3] SB_IEDP_HPD GPP_I4/EDP_HPD L43 DGPU_PRSNT#
GPP_G23 L44 DGPU_PW RGD_RR R780 0_04
R655 GPP_G22 DGPU_PW RGD_R [31]
Sheet 38 of 81
U35 GC6_FB_EN_R
GPP_G21 GPU_EVENT# GC6_FB_EN_R [31]
100K_04 R35
GPP_G20 DGPU_SELECT# GPU_EVENT# [30]
BD36
GPP_H23
3.3VS
C
GC6_FB_EN_R R256 *10K_04 C PCH 5/9
GPU_EVENT# R252 *10K_04
R246 *10K_04
SPT-H_PCH
U114F
C11 AT22
LPC/eSPI
[44] USB3_TXN1 USB3_1_TXN GPP_A1/LAD0/ESPI_IO0 LPC_AD0 [43,50]
B11 AV22
[44] USB3_TXP1 USB3_1_TXP GPP_A2/LAD1/ESPI_IO1 LPC_AD1 [43,50]
USB3 PORT1, ⶎ, C h a r g e r [44] USB3_RXN1
B7
A7 USB3_1_RXN GPP_A3/LAD2/ESPI_IO2
AT19
BD16
LPC_AD2 [43,50]
[44] USB3_RXP1 USB3_1_RXP GPP_A4/LAD3/ESPI_IO3 LPC_AD3 [43,50] 3.3VA
B12 LPC_PIRQA#
[47] USB3_TXP2 USB3_2_TXN/SSIC_1_TXN R191 *10K_04
A12 BE16 LPC_FRAME# [43,50]
[47] USB3_TXN2 USB3_2_TXP/SSIC_1_TXP GPP_A5/LFRAME#/ESPI_CS0# 3.3VS
4G LTE C8 BA17 SERIRQ SERIRQ [43,50]
[47] USB3_RXP2 USB3_2_RXN/SSIC_1_RXN GPP_A6/SERIRQ/ESPI_CS1# LPC_PIRQA#
B8 AW17
[47] USB3_RXN2 USB3_2_RXP/SSIC_1_RXP GPP_A7/PIRQA#/ESPI_ALERT0# SB_KBCRST#
AT17
B15 GPP_A0/RCIN#/ESPI_ALERT1# SB_KBCRST# [43] SERIRQ R193 10K_04
[73] USB3_TXN6 USB3_6_TXN BC18 SB_KBCRST# R217
C15 GPP_A14/SUS_STAT#/ESPI_RESET# 10K_04
[73] USB3_TXP6 USB3_6_TXP
TYPE A 㓡3.0 D02 3/10 [73] USB3_RXN6
K15
USB3_6_RXN
USB
K13 BC17 CLK_PCI_KBC_R R675 22_04

[73] USB3_RXP6 USB3_6_RXP GPP_A9/CLKOUT_LPC0/ESPI_CLK PCLK_KBC [43]
AV19 CLK_PCI_TPM_R R219 22_04
B14 GPP_A10/CLKOUT_LPC1 PCLK_TPM [50]24 Mhz
[45] USB3_TXN5 USB3_5_TXN
C14
COMBO, ᶲ [45] USB3_TXP5
G13 USB3_5_TXP
GPP_G19/SMI#
M45
N43
[45] USB3_RXN5 USB3_5_RXN
H13 GPP_G18/NMI#
[45] USB3_RXP5 USB3_5_RXP
B B
D13
USB3_3_TXP/SSIC_2_TXP AE45 PCH_MUTE# [49]
C13 GPP_E6/DEVSLP2
USB3_3_TXN/SSIC_2_TXN AG43
A9 GPP_E5/DEVSLP1
USB3_3_RXP/SSIC_2_RXP AG42
B10 GPP_E4/DEVSLP0
NEW USB3_3_RXN/SSIC_2_RXN AB39 PS8331_SW _R R298 0_04 PS8331_SW [3,13,30,52]
GPP_F9/DEVSLP7 AB36 3.3VA
SATA
B13 GPP_F8/DEVSLP6
USB3_4_TXP AB43 L :PORT1 (INTEL) (DEFAULT)
5
A14 GPP_F7/DEVSLP5
USB3_4_TXN AB42 H: PORT2 (NV)
G11 GPP_F6/DEVSLP4 1
USB3_4_RXP AB41
E11 GPP_F5/DEVSLP3 4
USB3_4_RXN 2
U20
QJHT 6 OF 12 REV = 1.3 *MC74VHC1G08DFT2G
3
3.3VS KBLED_DET [51]
PERSTB#
C1111 BUF_PLT_RST# 3.3VS
[3,18,27,28,30,31,32,59,60,61,63] 1V8_AON
U65 *1u_6.3V_X5R_04 U17 [5,34,35,36,37,40,42,55] 3.3VA
5
C490 0.1u_10V_X7R_04 [18,19,27,28,31,32,59] 1V8_RUN

74AHC1G08GW 1 DGPU_RESET# R768 0_04 DGPU_RST#_PCH 74AHC1G08GW
5
A 4 A
[30] PERSTB# PLT_RST# [3,9,10,11,12,13,14,15,17,30,31,34,36,37,39,40,42,43,46,47,48,49,50,51,52,55,59,64,66,68,70] 3.3VS
2 PLT_RST# [34] 1
[13,17,36,48,49,50,51,52,55,60,61] 5VS
R795 4
PLT_RST# BUF_PLT_RST# [43,46,50,68,69]
2
3
10K_04 R796
R271
3
100K_04
100K_04 Title
[38] PCH 5_6/12-DPP/ESPI/USB3.0
A3 P650RP 6-71-P65P0-D02A D03B

5 4 3 2 1
PCH 5/9 B - 39
Schematic Diagrams
PCH 6/9
5 4 3 2 1
W 76-147_24MHZ
C896 24MHZ
12p_50V_NPO_04 fsx3m
6-22-24R00-1B9
6-22-24R00-1BA
1
4
R650
X3
1M_04
2
3
C915
12p_50V_NPO_04
SPT-H_PCH
U114G
D D
RTC (10 MOHM RES): DO NOT CHANGE TO 0402 AR17
GPP_A16/CLKOUT_48
L1 PCH_XDP_CLK_DN
G1 CLKOUT_ITPXDP PCH_XDP_CLK_DP
[5] CPU_24MHZ_R_DP CLKOUT_CPUNSSC_P L2
C948 [5] CPU_24MHZ_R_DN F1 CLKOUT_ITPXDP_P
32.768Khz暨␴SOC or PCH ⎴ᶨ朊ᶵ⎗ㇻVIA 15p_50V_NPO_04 CLKOUT_CPUNSSC J1
, XTALᶳ㕡ᶵ⎗㚱POWER or ᾉ嘇 CLKOUT_CPUPCIBCLK PCH_CPU_PCIBCLK_R_DN [5]
G2 J2
2015/10/08 [5] PCH_CPU_BCLK_R_DP CLKOUT_CPUBCLK_P CLKOUT_CPUPCIBCLK_P PCH_CPU_PCIBCLK_R_DP [5]
[5] PCH_CPU_BCLK_R_DN H2
CLKOUT_CPUBCLK
N7
2
1
X4 R661 A5 CLKOUT_PCIE_N0 CLK_PCIE_TBT# [69]
XTAL24_OUT N8
A6 CLKOUT_PCIE_P0 CLK_PCIE_TBT [69]
10M_04 XTAL24_IN
XCLK_RBIAS L7
VDD1.0 R129 2.7K_1%_04 E1 CLKOUT_PCIE_N1 L5
3
4
C966 1TJS125DJ4A420P_32.768KHz XCLK_BIASREF
CLKOUT_PCIE_P1
RTC_X1 BC9
15p_50V_NPO_04 CM200S
RTC_X2 RTCX1 D3
BD10 CLKOUT_PCIE_N2
RTCX2 F2
CLKOUT_PCIE_P2
32.768KHZ R981 0_04 TBT_CLKREQ#_R BC24
[69] TBT_CLKREQ# GPP_B5/SRCCLKREQ0# E5
6-22-32R76-0B2 AW24 CLKOUT_PCIE_N3
3.3VS GPP_B6/SRCCLKREQ1# G4
6-22-32R76-0BJ PCIECLKRQ2# AT24 CLKOUT_PCIE_P3
PCIECLKRQ3# BD25 GPP_B7/SRCCLKREQ2#
GPP_B8/SRCCLKREQ3# D5
R223 *10K_04LAN_CLKREQ# LAN_CLKREQ# BB24 CLKOUT_PCIE_N4 CLK_PCIE_GLAN# [68]
[68] LAN_CLKREQ# GPP_B9/SRCCLKREQ4# E6
R202 *10K_04W LAN_CLKREQ# W LAN_CLKREQ# BE25 CLKOUT_PCIE_P4 CLK_PCIE_GLAN [68]
[46] W LAN_CLKREQ# GPP_B10/SRCCLKREQ5#
Sheet 39 of 81 R260 *10K_04SSD_CLKREQ#

[46]
[18]
W IGIG_CLKREQ#
PEG_CLKREQ#
W IGIG_CLKREQ#
PEG_CLKREQ#
SSD_CLKREQ#
AT33
AR31
BD32
BC32
GPP_H0/SRCCLKREQ6#
GPP_H1/SRCCLKREQ7#
GPP_H2/SRCCLKREQ8#
CLKOUT_PCIE_N5
CLKOUT_PCIE_P5
D8
D7
CLK_PCIE_MINI#
CLK_PCIE_MINI
[46]
[46]
[46] SSD_CLKREQ# GPP_H3/SRCCLKREQ9# R8
PCH 6/9 C
R263 *10K_04 W IGIG_CLKREQ# BB31
BC33
BA33
AW33
GPP_H4/SRCCLKREQ10#
GPP_H5/SRCCLKREQ11#
GPP_H6/SRCCLKREQ12#
CLKOUT_PCIE_N6
CLKOUT_PCIE_P6
R7
U5
CLK_PCIE_W IGIG#
CLK_PCIE_W IGIG
[46]
[46]
C
R290 *100K_04 PCIECLKRQ2# CLKOUT_PCIE_N7
GPP_H7/SRCCLKREQ13# U7
R715 *100K_04 PCIECLKRQ3# BB33 CLKOUT_PCIE_P7
BD33 GPP_H8/SRCCLKREQ14#
R253 10K_04 PEG_CLKREQ# GPP_H9/SRCCLKREQ15# W10
CLKOUT_PCIE_N8 VGA_PEXCLK# [18]
R250 *10K_04 W11 VGA_PEXCLK [18]
R13 CLKOUT_PCIE_P8
R720 *100K_04 TBT_CLKREQ#_R R11 CLKOUT_PCIE_N15
CLKOUT_PCIE_P15 N3
CLKOUT_PCIE_N9 CLK_PCIE_SSD# [46]
N2
P1 CLKOUT_PCIE_P9 CLK_PCIE_SSD [46]
R2 CLKOUT_PCIE_N14
CLKOUT_PCIE_P14 P3
CLKOUT_PCIE_N10 P2
PCI-E CLK Usage W7 CLKOUT_PCIE_P10
Y5 CLKOUT_PCIE_N13
CLKOUT_PCIE_P13 R3
CLKOUT_PCIE_N11 R4
5 GLAN U2 CLKOUT_PCIE_P11
6 WLAN U3 CLKOUT_PCIE_N12
CLKOUT_PCIE_P12
8 PEG(NV)
9 SSD (X 4 LANE) QJHT 7 OF 12 REV = 1.3
14 SSD (X 2 LANE)
B B
A VDD1.0 [40,56,58] A
3.3VS [3,9,10,11,12,13,14,15,17,30,31,34,36,37,38,40,42,43,46,47,48,49,50,51,52,55,59,64,66,68,70]
Title
[39] PCH 7/12-CLKOUT
A3 P650RP 6-71-P65P0-D02A D03B

5 4 3 2 1
B - 40 PCH 6/9
Schematic Diagrams
PCH 7/9
5 4 3 2 1
D D
VDD1.0
VDD3
VDD1.0 SPT-H_PCH
DEFAULT SHORT +VCCPRIM_1P0 U114H
eSPI:1.8V
1 2 +VCCPRIM_1P0 2.899A AA23 3.3VA LPC:3.3V
AA26 VCCPRIM_1P0
VCCPRIM_1P0 㺷暣 R281 *28mil short-p
PJ19 2mm AA28 AL22 0.0908A 3.3VA
VCCPRIM_1P0 VCCPRIM_1P0
CORE
AC23 C497
AC26 VCCPRIM_1P0 BA24 0.403A 3.3VA
AC28 VCCPRIM_1P0 VCCDSW_3P3 0.1u_10V_X7R_04 C496
R227 *0_04 VCCPRIM_1P0 BA31 0.082A
VCCGPIO
AE23 VCCPGPPA 3.3VA
VCCPRIM_1P0 CLOSE TO PCH
CLOSE TO PCH C453 AE26 BC42 0.229A +V3.3A_VCCPGPPBCH (1-3 mm) 0.1u_10V_X7R_04 C491
(3-5 mm) Y23 VCCPRIM_1P0 VCCPGPPBCH BD40
VCCPRIM_1P0 VCCPGPPBCH CLOSE TO PCH
1u_6.3V_X5R_04 Y25 AJ41 0.114A (1-3 mm) 0.1u_10V_X7R_04
+VCCDSW _1P0 0.0454A BA29 VCCPRIM_1P0 VCCPGPPEF AL41 CLOSE TO PCH
DCPDSW_1P0 VCCPGPPEF AD41 0.065A (1-3 mm)
0.021A N17 VCCPGPPG AN5 0.2875A
VCCCLK1 VCCPRIM_3P3 3.3VA
0.05A R19 VDD1.0
0.024A U20 VCCCLK3 C380
VCCCLK4 3.3VS
0.137A V17 AD15 0.0061A
VCCCLK2 VCCPRIM_1P0 C406
R17 AD13 0.007A 0.1u_10V_X7R_04
VDD1.0 L8 . HCB1608KF-121T30
C360 C359
CLOSE TO PCH
C362
+VCCF24_1P0_L 0.006A K2
K3
VCCCLK2
VCCCLK5
VCCCLK5
VCCATS
VCCRTCPRIM_3P3
VCCRTC
DCPRTC
BA20 0.0002A
BA22 0.0002A
BA26 +VCC_RTCEXT_CAP
1u_6.3V_X5R_04
CLOSE TO PCH
(3-5 mm)
CLOSE TO PCH
(1-3 mm) Sheet 40 of 81
C 3.3VA C
*22u_6.3V_X5R_06 *22u_6.3V_X5R_06
1u_6.3V_X5R_04
+VCCMPHY_1P0 3.53A U21
VCCMPHY_1P0 AJ20
C452
C435 C416
PCH 7/9
MPHY
U23 VCCPRIM_1P0 1u_6.3V_X5R_04
DEFAULT SHORT VCCMPHY_1P0 AJ21 1u_6.3V_X5R_04 0.1u_10V_X7R_04
CLOSE TO PCH U25 VCCPRIM_1P0 CLOSE TO PCH
(3-5 mm) VCCMPHY_1P0 AJ23 (3-5 mm)
U26 VCCPRIM_1P0
VDD1.0 1 2 VCCMPHY_1P0 AJ25 +VCCPRIM_1P0
CLOSE TO PCH
V26 VCCPRIM_1P0 (1-3 mm)
C448 +VCCAMPHYPLL_1P0 0.11A A43 VCCMPHY_1P0 VCC_RTC
PJ24 2mm C413 VCCMPHYPLL_1P0
B43 BE41 0.029A
VDD3 C442 C444
22u_6.3V_X5R_08 1u_6.3V_X5R_04 C44 VCCMPHYPLL_1P0 VCCSPI BE43
VCCPCIE3PLL_1P0 VCCSPI 1u_6.3V_X5R_04 0.1u_10V_X7R_04 R203
CLOSE TO PCH C45 BE42
VCCPCIE3PLL_1P0 VCCSPI *100K_04
(3-5 mm) 0.030A V28 BC44 0.078A
VCCAPLLEBB_1P0 VCCPGPPD
L10 . HCB1608KF-121T30 0.533A AC17 BA45
USB
0.012A AJ5 VCCPRIM_1P0 VCCPGPPD BC45
C517 C518 VCCUSB2PLL_1P0 VCCPGPPD
C498 AL5 BB45
0.033A AN19 VCCUSB2PLL_1P0 VCCPGPPD +V3.3A_V1.8A_VCCPGPPD 2 1
VCCHDAPLL_1P0 3.3VA
*22u_6.3V_X5R_06 *22u_6.3V_X5R_06 1u_6.3V_X5R_04 0.075A BA15
BD3 0.0811A PJ54 1mm DEFAULE ᶲ
VCCPRIM_3P3 BE3
CLOSE TO PCH VCCHDA
W15 VCCPRIM_3P3 BE4
(3-5 mm) VCCDSW_3P3 VCCPRIM_3P3 3.3VA
C415 C404
VDD1.0 0.1u_10V_X7R_04
*1u_6.3V_X5R_04 CLOSE TO PCH
CLOSE TO PCH (3-5 mm)
C420 (3-5 mm)
1u_6.3V_X5R_04
+VCCAAZPLL_1P0
B VDD1.0 L9 . HCB1608KF-121T30 B
C392 C375
*22u_6.3V_X5R_06 *22u_6.3V_X5R_06
CLOSE TO PCH 3.3VA
(3-5 mm)
VDD3
C414
*0.1u_10V_X7R_04
[39,56,58] VDD1.0
[5,30,34,37,42,43,46,49,51,54,55,56,57,58,59,60,61,62,63,68] VDD3
[3,9,10,11,12,13,14,15,17,30,31,34,36,37,38,39,42,43,46,47,48,49,50,51,52,55,59,64,66,68,70] 3.3VS
[34,37] VCC_RTC
[5,34,35,36,37,38,42,55] 3.3VA
A A
Title
[40] PCH 8/12-POWER
A3 P650RP 6-71-P65P0-D02A D03B

5 4 3 2 1
PCH 7/9 B - 41
Schematic Diagrams
PCH 8/9
5 U114I 4 SPT-H_PCH
U114L
3 2 1
SPT-H_PCH
AC18 AR5
AN4 VSS VSS AR7 C42 AB11
AN10 VSS VSS U15 D10 VSS VSS AB7
BE14 VSS VSS AL4 D12 VSS VSS AB14
BE18 VSS VSS AE29 D15 VSS VSS AB31
BE32 VSS VSS AF18 D19 VSS VSS AB4
BE37 VSS VSS AF20 D21 VSS VSS AB5
BE40 VSS VSS AF21 D24 VSS VSS AC1
BE9 VSS VSS AF23 D25 VSS VSS AC20
VSS VSS VSS VSS
D C10
C2 VSS VSS
AF25
AF26
D27
D29 VSS VSS
AC21
AC25
D
C28 VSS VSS AF28 D30 VSS VSS AC29
C37 VSS VSS AF29 D31 VSS VSS AC45
J7 VSS VSS AG11 D33 VSS VSS AB8
K10 VSS VSS AG13 D35 VSS VSS AD11
K27 VSS VSS AG31 D36 VSS VSS AD14
K33 VSS VSS AG32 E13 VSS VSS AB15
K36 VSS VSS AG33 E15 VSS VSS AD32
K43 VSS VSS AH1 F44 VSS VSS AD4

L12 VSS VSS AH17 F8 VSS VSS AD8
L13 VSS VSS AH18 G42 VSS VSS AE18
L15 VSS VSS AH20 G9 VSS VSS AE20
L4 VSS VSS AH21 H17 VSS VSS AE21
M35 VSS VSS AH26 H24 VSS VSS AL10
VSS VSS VSS VSS
Sheet 41 of 81 M42
N10
N15
N19
VSS
VSS
VSS
VSS
VSS
VSS
AH28
AH29
AH45
AJ10
H27
H29
H3
H35
VSS
VSS
VSS
VSS
VSS
VSS
AL11
AL13
AL17
AL19
VSS VSS VSS VSS
PCH 8/9 N22

N24
N35
N36
VSS
VSS
VSS
VSS
VSS
VSS
AJ14
AJ15
AJ17
AJ18
J10
J11
J3
J39
VSS
VSS
VSS
VSS
VSS
VSS
AL24
AL29
AL32
AL33
N4 VSS VSS AJ26 J5 VSS VSS AL38
N41 VSS VSS AJ28 T42 VSS VSS AM15
VSS VSS VSS VSS
C N5
P17 VSS VSS
AJ29
AJ31
U10
U11 VSS VSS
AM17
AM19 C
P19 VSS VSS AJ32 U14 VSS VSS AM22
P22 VSS VSS AJ36 U17 VSS VSS AM24
P45 VSS VSS AK4 U18 VSS VSS AM27
R10 VSS VSS AK42 U28 VSS VSS AM29
R14 VSS VSS AU7 U29 VSS VSS AM45
R22 VSS VSS AV17 U31 VSS VSS AN11
T1 VSS VSS AV6 U8 VSS VSS AN7
T2 VSS VSS AW13 V18 VSS VSS AN8
T4 VSS VSS AW19 V20 VSS VSS AP11
Y18 VSS VSS AW29 V21 VSS VSS AP4
Y20 VSS VSS AW37 V23 VSS VSS AR33
Y21 VSS VSS AW9 V25 VSS VSS AR34
Y26 VSS VSS AY38 V29 VSS VSS AR42
Y28 VSS VSS AY45 V3 VSS VSS AR9
Y29 VSS VSS B25 V45 VSS VSS AT10
A18 VSS VSS B3 W14 VSS VSS AT15
A37 VSS VSS B6 W33 VSS VSS AU1
AA17 VSS VSS BA1 W38 VSS VSS AU35
AA18 VSS VSS BB11 W4 VSS VSS AU36
AA20 VSS VSS BB16 W8 VSS VSS AU39
AA21 VSS VSS BB21 Y17 VSS VSS AU45
AA25 VSS VSS BB25 VSS VSS C4
B AA29 VSS
VSS
VSS
VSS
BB30 VSS B
AA4 BB34
AA42 VSS VSS BC2
AB10 VSS VSS BD43 12 OF 12
VSS VSS
9 OF 12 QJHT REV = 1.3
QJHT REV = 1.3
A A
Title
[41] PCH 9_12/12-VSS
A3 P650RP 6-71-P65P0-D02A D03B
5 4 3 2 1
B - 42 PCH 8/9
Schematic Diagrams
PCH 9/9
NO REBOOT STARP 5 4 3 2 1
ENABLE: HIGH U114J SPT-H_PCH
(INTERNAL WEAK PD) DFX TEST MODE QUALIFIER FOR OTHER
3.3VS DFX STRAP WHEN SAMPLED LOW
(WEAK INTERNAL PU)
BD2 AR22 R200 *1K_04
BD45 VSS RSVD W13
R757 VSS RSVD
BD44 U13
BE44 VSS RSVD
*4.7K_04 VSS P31
D45 RSVD
LPSS_GSPI0_MOSI VSS N31
A42 RSVD
B45 VSS P27
B44 VSS RSVD R27
P65x: 00 P67x: 10
R756 VSS RSVD ID2 ID1 ID2 ID1
A4 N29
D *20K_04 A3 VSS
VSS
RSVD
RSVD
P29 D
B2 AN29 R277 R671 R277 R671
A2 VSS RSVD R24 H H
B1 VSS RSVD P24
NC NC 10K_04 NC
BB1 VSS RSVD
VSS AT3 PCH_XDP_PREQ#_R R648 *0_04 H_PREQ# [5] R292 R702 R292 R702
BOOT STARP BC1 PREQ# L L
VSS AT4 PCH_XDP_PRDY#_R R640 *0_04 H_PRDY# [5]
ENABLE:LPC IS SELECT A44 PRDY# 10K_04 10K_04 NC 10K_04
VSS AY5 H_TRST#_R R136 *0_04 H_TRST# [5]
(INTERNAL WEAK PD) C1 CPU_TRST# AL2 PCH_2_CPU_TRIGGER_R R645 30.1_1%_04
3.3VA RSVD PCH_TRIGOUT PCH_2_CPU_TRIGGER [7]
D1 AK1 CPU_2_PCH_TRIGGER [7]
RSVD PCH_TRIGIN
BOARD_ID[2:1]
P650Rx, P655Rx:00
R222
QJHT 10 OF 12 REV = 1.3
P670Rx:10
*4.7K_04 3.3VS 3.3VS
LPSS_GSPI1_MOSI
R220
P670Rx
*20K_04
LPSS_GSPI1_MOSI AT29
U114K SPT-H_PCH 暨ᶲẞ
R289
*10K_04
R819
*10K_04 Sheet 42 of 81
GPP_B22/GSPI1_MOSI AL44 BOARD_ID1
[43] SMI# D52 C A

RB751V-40(lision)
SMI#_RR
AR29
AV29
BC27
GPP_B21/GSPI1_MISO
GPP_B20/GSPI1_CLK
GPP_B19/GSPI1_CS#
GPP_D9
GPP_D10
GPP_D11
GPP_D12
AL36
AL35
AJ39
TPM_DET [50]
GSYNC_DET
BOARD_ID2
EDP: H
PCH 9/9
SMI# 䓙GPP_G19䦣军 GPP_B20 , BIOS天㯪 LPSS_GSPI0_MOSI BD28 3.3VS GSYNC: L R283 R849
BD27 GPP_B18/GSPI0_MOSI AJ43 BOARD_ID3 3.3VS STRAP5 [28,30]
P650Rx
GPP_B16 GPP_B17/GSPI0_MISO GPP_D16/ISH_UART0_CTS# BOARD_ID4 暨ᶲẞ 10K_04
C GPP_B15
AW27
AR24 GPP_B16/GSPI0_CLK GPP_D15/ISH_UART0_RTS#
AL43
AK44
10K_04
C
GPP_B15/GSPI0_CS# GPP_D14/ISH_UART0_TXD/SML0BCLK/I2C2_SCL R631
AK45
D
GPP_D13/ISH_UART0_RXD/SML0BDATA/I2C2_SDA R853
AV44 100K_04
BA41 GPP_C9/UART0_TXD 100K_04 NONGSYNC Q48
GPP_C8/UART0_RXD G
AU44 *2SK3018S3
AV43 GPP_C11/UART0_CTS# 3.3VS 3.3VS
S
GPP_C10/UART0_RTS# GSYNC_ID [13]
NVSR1_DET AU41 BC38 NVSR-GSYNC: L R630
NVSR2_DET AT44 GPP_C15/UART1_CTS#/ISH_UART1_CTS# GPP_H20/ISH_I2C0_SCL BB38 R872
GPP_C14/UART1_RTS#/ISH_UART1_RTS# GPP_H19/ISH_I2C0_SDA *100K_04
AT43
GPP_C13/UART1_TXD/ISH_UART1_TXD *100K_04 GSYNC R901 R870
AU43 BD38
GPP_C12/UART1_RXD/ISH_UART1_RXD GPP_H22/ISH_I2C1_SCL BE39 *10K_04 *10K_04
3.3VS GPP_H21/ISH_I2C1_SDA
UART2_CTS# AN43
UART2_RTS# AN44 GPP_C23/UART2_CTS# BOARD_ID3
DEBUG GPP_C22/UART2_RTS#
TX -> D+ R880 *49.9K_1%_06 UART2_TXD AR39 3.3VS BOARD_ID4
R856 *49.9K_1%_06 UART2_RXD AR45 GPP_C21/UART2_TXD BC22
RX -> D- GPP_C20/UART2_RXD GPP_A23/ISH_GP5 BD18 3G_CONFIG0 [47] SMI#_RR
GPP_A22/ISH_GP4 R850 10K_04
AR41 BE21 3G_CONFIG1 [47] R887 R876
AR44 GPP_C19/I2C1_SCL GPP_A21/ISH_GP3 BD22
GPP_C18/I2C1_SDA GPP_A20/ISH_GP2 3G_CONFIG2 [47] *10K_04
AR38 BD21 3G_CONFIG3 [47] *10K_04
AT42 GPP_C17/I2C0_SCL GPP_A19/ISH_GP1 BB22 SB_BLON
GPP_C16/I2C0_SDA GPP_A18/ISH_GP0 SB_BLON [13] VDD3
3.3VS 3.3VS BC19 LTE_GPIO#
AM44 GPP_A17/ISH_GP7 LTE_GPIO# [36]
AJ44 GPP_D4/ISH_I2C2_SDA/ISH_I2C3_SDA SB_BLON R216 *10K_04
GPP_D23/ISH_I2C2_SCL/ISH_I2C3_SCL
R280 R852 QJHT 11 OF 12 REV = 1.3

*10K_04 *10K_04 2/5 BIOS 枸䔁
B NVSR1_DET
B
NVSR2_DET
R270 R818
*10K_04
*10K_04
EC DELAY ALL_SYS_PWRGD 200ms VDD3
VDD3 =PM_PWROK
VDD3
[43] PM_PW ROK
U60B U60D
14
14
74LVC08APW U60C 74LVC08APW
14
4 74LVC08APW 12
[64] VCORE_PG DELAY_PW RGD
R738 *0_04 6 9 11 SYS_PW ROK_R R664 1K_04
SYS_PW ROK [37]
VDD3 5 8 13
[66] VCCGT_PG ALL_SYS_PW RGD 10
7
7
R739
7
10K_04
U60A
14
74LVC08APW
1
[56] VCCIO_PW RGD ALL_SYS_PW RGD
3 PM_PCH_PW ROK [37]
ALL_SYS_PW RGD [5,13,43,64,66]
2
[13,37,43,44,49,55,56,69] SUSB#
TO VR_ON & EC
7
A R752 C1060 A
10K_04 *0.1u_10V_X7R_04
ON
Title
[5,34,35,36,37,38,40,55] 3.3VA
[42] PCH 10_11/12-UART/I2C/GPIO
[5,30,34,37,40,43,46,49,51,54,55,56,57,58,59,60,61,62,63,68]
[3,9,10,11,12,13,14,15,17,30,31,34,36,37,38,39,40,43,46,47,48,49,50,51,52,55,59,64,66,68,70]
VDD3
3.3VS
A3 P650RP 6-71-P65P0-D02A D03B
5 4 3 2 1
PCH 9/9 B - 43
Schematic Diagrams
KBC IT8587
5 4 3 2 1
IT8587(Follow IT8991 PIN Define) KBC_AVDD L34 VDD3

VGA Chipset RB (PL) RA (PH)
HCB1005KF-121T20 N17E-G1 10K X

. MODEL_ID RA R435 *10K_04
VDD3 VDD3 10K 10K
N17E-G2
C665 C711 C754 C753 C722 RB R433 10K_04
N17E-G3 x 10K
10u_6.3V_X5R_06 0.1u_16V_Y5V_04 0.1u_16V_Y5V_04 0.1u_16V_Y5V_04 0.1u_16V_Y5V_04
C742
D KBC_AGND OPTION (⎗ẍ嬲≽ὅEC㍸ὃ䘬EXECL堐) D
L37 HCB1005KF-121T20 0.1u_16V_Y5V_04 6-20-94AF0-124 㛒⛐EXECL堐ᷕ䘬≇傥⎗ẍ冒埴␥⎵ AUTO_LOAD_MODE
3.3VS
. P650RE D03A
EMI Solution 1 J_KB1 24 R381 *100K_04
[51] KBLIGHT_ADJ
114
121
127
J_KB1 VDD3
11
26
50
92
74
3
U35A 85208-24051
U35B R479
VSTBY1
VSTBY2
VSTBY3
VSTBY4
VSTBY5
VSTBY6
VCC
AVCC
VBAT
10 58 KB-SI0 4 DSx 10K_04
[38,50] LPC_AD0 GPM0/LAD0 KSI0/STB#
9 59 KB-SI1 5 76 100
[38,50] LPC_AD1 GPM1/LAD1 KSI1/AFD# [37] SUS_PW R_ACK#_EC GPJ0/TACH2 5VT/SSCE0#/GPG2
8 60 KB-SI2 6 80
[38,50] LPC_AD2 GPM2/LAD2 KSI2/INIT# [51] VGA_FAN2 GPJ4/DAC4/DCD0#
7 61 KB-SI3 8 81
[38,50] LPC_AD3 GPM3/LAD3 KSI3/SLIN# [51] VGA_FAN1 GPJ5/DAC5/RIG0#
13 62 KB-SI4 11
[38] PCLK_KBC GPM4/LPCCLK KSI4
6 LPC 63 KB-SI5 12 78 56 KB-SO16
[38,50] LPC_FRAME# GPM5/LFRAME# KSI5 GPJ2/DAC2//TACH0B KSO16/SMOSI/GPC3
5 64 KB-SI6 14 57 KB-SO17
[38,50] SERIRQ GPM6/SERIRQ KSI6 KSO17/SMISO/GPC5
22 65 KB-SI7 15 68
[38,46,50,68,69] BUF_PLT_RST# GPD2/LPCRST#/5VT KSI7 [37] ME_W E GPI2/ADC2
K/B MATRIX IT8587
VDD3 R445 100K_04 KBC_W RESET# 14 36 KB-SO0 1
C731 0.1u_16V_Y5V_04 WRST# KSO0/PD0 37 KB-SO1 2 VBATT_BOOST# 71 93
KSO1/PD1 [30] VBATT_BOOST# GPI5/ADC5/DCD1# 5VT/CLKRUN#/ID0/GPH0 SUSB# [13,37,42,44,49,55,56,69]
GA20 126 38 KB-SO2 3 72
GPB5/GA20 KSO2/PD2 [51] VGASEN_SEL GPI6/ADC6/DSR1#
4 39 KB-SO3 7 94
[57] AC_IN# GPB6/KBRST# KSO3/PD3 5VT/CRX1/SIN1/SMCLK3/ID1/GPH1 SUSC# [37,53,56,58]
16 40 KB-SO4 9
[52] LED_ACIN GPC7/PWUREQ#/BBO/SMCLK2ALT KSO4/PD4
20 41 KB-SO5 10
[37] AC_PRESENT GPE7/L80LLAT/5VT KSO5/PD5
Sheet 43 of 81 [42] SMI#
23
15 GPD3/ECSCI#/5VT
KSO6/PD6
KSO7/PD7
KSO8/ACK#
42
43
44
45
KB-SO6
KB-SO7
KB-SO8
13
16
17
18
[30,49,71] SMC_VGA_THERM
[30,49,71] SMD_VGA_THERM
115
116
118
GPC1/SMCLK1/5VT
GPC2/SMDAT1/5VT
5VT/ID3/GPH3
5VT/ID4/GPH4
5VT/ID5/GPH5
96
97
98
99
EC_AUDIO_DET
W LAN_EN [46]
[52]
3G_RST# [47]
KB-SO9
KBC IT8587
[36] SCI# GPD4/ECSMI# KSO9/BUSY [37] SMD_CPU_THERM GPF7/SMDAT2/PECIRQT# 5VT/ID6/GPH6 W LAN_PW R_EN [46]
46 KB-SO10 19
77 KSO10/PE 51 KB-SO11 20 82
[49] KBC_MUTE# GPJ1
DAC KSO11/ERR# 5VT/EGAD/GPE1 P670RG-M_TPLED [52]
C 52 KB-SO12 21 24 83 KB-DET C
KSO12/SLCT [52] EC_SSD_LED# GPA0/PWM0/5VT 5VT/EGCS#/GPE2
53 KB-SO13 22 84 R457 0_04
[51] CPU_FAN
C735
CPU_FAN
0.1u_16V_Y5V_04
79
GPJ3/DAC3/TACH1B
IT8587 KSO13
KSO14
54
55
KB-SO14
KB-SO15
23
24
[52] LED_SCROLL#
28
29 GPA2/PWM2/5VT
5VT/EGCLK/GPE3
48
DGPU_PW R_EN [31,38,52,59]
KSO15 [52] LED_NUM# GPA3/PWM3/5VT TACH1/TMA1/GPD7 VGA_FANSEN [51]

ADC 30 119
BAT_DET [52] LED_CAP# GPA4/PWM4/5VT 5VT/CRX0/GPC0 ALL_SYS_PW RGD [5,13,42,64,66]
66
67 GPI0/ADC0 2
[57] BAT_VOLT GPI1/ADC1 CK32KE/GPJ7 3G_PW R_EN [47]
69 128
[2] THERM_VOLT GPI3/ADC3 CK32K/GPJ6
70 125 EC_SLP_SUS#_R
[57] TOTAL_CUR GPI4/ADC4 [44,54,55] DD_ON GPE4/PWRSW
106 EC_SLP_SUS# [37,54,55
MODEL_ID 5VT/SSCE1#/VCEN/TM/GPG0 CCD_EN [50] R462 0_04
73
GPI7/ADC7/CTS1# IT8587E/FX VDD3
107
5VT/( PD )DTR1#/SBUSY/ID7/GPG1 3G_EN [47] R467 *10K_04
SMBUS
[43,57] SMC_BAT
R477 47_04 SMC_BAT_EC 110
GPB3/SMCLK0/5VT
R476 *10K_04
VDD3 RSMRST# PCH & EC ⎒暨PULL DOWNᶨ怲,㑯1 R466 10K_04
R469 47_04 SMD_BAT_EC 111 95
[43,57] SMD_BAT GPB4/SMDAT0/5VT 5VT/CTX1/SOUT1/DAT3/ID2/GPH2 BKL_EN [13] DEFAULT㓡ᶲẞ, (⤪㰺㚱ᶲẞ, RTC便暣忶⣏) VDD3
R470 *0_04 EC_PECI 117 R392 10K_04
[37] SMC_CPU_THERM GPF6/SMCLK2/PECI EC_RSMRST#
R471 43_1%_04 35
[5] H_PECI 5VT/RTS1#/GPE5 VBATT_BOOST#R432
17 *10K_04
5VT/LPCPD#/GPE6 SB_KBCRST# [38]
C752 5p_50V_NPO_04
PWM 47 RGB䘤⃱K/B䓐
TACH0A/GPD6 CPU_FANSEN [51] 3G_RST#
25 R460 10K_04
[48] KBC_BEEP GPA1/PWM1/5VT
31 120
[52] LED_BAT_CHG GPA5/PWM5/5VT TMRI0/GPC4 LOT6_CHG [57] SMC_BAT
32 124 J_KBLED_2 R481 1.5K_04
[52] LED_BAT_FULL GPA6/PWM6/SSCK/5VT TMRI1/GPC6 PM_PW ROK [42] SMD_BAT
34 KB-SO16 R480 1.5K_04
[52] LED_PW R GPA7/PWM7/RIG1#/5VT 1 BAT_DET
KB-SO17 R459 10K_1%_04
PS/2 123 NC1 2 KB-DET R977 100K_04
CTX0/TMA0/GPB2 LAN_W AKEUP# [34,68] NC2 3
80CLK 85 KB-DET
B 3IN1 87 GPF0/PS2CLK0/TMB0/CEC/5VT 4 B
GPF2/PS2CLK1/DTR0#/5VT 19 FP215H-004S1BM
5VT/L80HLAT/BAO/GPE0 SW I# [36] BAT_VOLT
86 PCB Footprint = 85201-0405R C707 1u_6.3V_X5R_04
[44,54,55] USB_CHARGE_EN GPF1/PS2DAT0/TMB1/5VT
88 6-20-94A30-004
[46] BT_EN GPF3/PS2DAT1/RTS0#/5VT 112
5VT/RING#/PWRFAIL#/CK32KOUT/LPCRST#/GPB7 PMOSFET_CONTROL# [57]
89
[50] TP_CLK GPF4/PS2CLK2/5VT
90
[50] TP_DATA GPF5/PS2DAT2/5VT VDD3
WAKE UP
[55] PW R_SW #
18
GPD0/RI1#
BCN-0024 ㎃6-20-41120-104 C
21 AC
[13,51] LID_SW # GPD1/RI2#/5VT [43,57] SMC_BAT
D31 A
5VT/FSCE#/GPG3
101 ALSPI_CE# R472 0_04
HSPI_CE# [34]
DEBUG PORT BAV99 RECTIFIER
GP INTERRUPT 102 ALSPI_MSI R473 0_04 C
5VT/FMOSI/GPG4 ALSPI_MSO HSPI_MSI [34] J_80DEBUG1
33 103 R474 0_04 AC
[37] PW R_BTN# GPD5/GINT/CTS0#/5VT 5VT/FMISO/GPG5 ALSPI_SCLK HSPI_MSO [34] [43,57] SMD_BAT
105 R475 0_04 D33 A
5VT/FSCK/GPG7 HSPI_SCLK [34]
UART 1 BAV99 RECTIFIER
80CLK
108 104 2 C
[49] EC_CTRL_EN# GPB0/RXD/SIN0/5VT 5VT/DSR0#/GPG6 AIRPLAN_LED# [52] 3IN1
109 3 AC
[5] H_PROCHOT_EC GPB1/TXD/SOUT0/5VT VDD3 [57] BAT_DET
4 D28 A
VDD3 BAV99 RECTIFIER
85205-04001
VCORE
PCB Footprint = 85205-0400M

AVSS
VSS1
VSS3
VSS4
VSS5
VSS6
VSS7
VDD3 VDD3
R230
IT8587E/FX U27
12
1
27
49
91
113
122
75
5
47K_04 74AHC1G08GW
R245 1
A
4
D
RSMRST# [37] A
C736 R444 47K_04 EC_RSMRST# 2
*20mil_short-p Q15
0.1u_16V_Y5V_04 G 2SK3018S3
[31] NV_EN_DOW N
3
C
S
D21
KBC_AGND C A R257 90.9K_1%_04 B Q16
VIN
BTN3904
ZD5231BS2 C482 M-SOT23-CBE Title
[43] KBC 8587
E
3.3VS [3,9,10,11,12,13,14,15,17,30,31,34,36,37,38,39,40,42,43,46,47,48,49,50,51,52,55,59,64,66,68,70] R254
VDD3 [5,30,34,37,40,42,46,49,51,54,55,56,57,58,59,60,61,62,63,68] *0.1u_16V_Y5V_04
20K_1%_04 Size Document Number Rev
3.3VS [3,9,10,11,12,13,14,15,17,30,31,34,36,37,38,39,40,42,43,46,47,48,49,50,51,52,55,59,64,66,68,70]
VIN [13,49,52,53,54,55,56,57,62,64,65,66,67] A3 P650RP 6-71-P65P0-D02A D03B

5 4 3 2 1
B - 44 KBC IT8587
Schematic Diagrams
USB Charger
1 2 3 4 5
3.3V
USB3.0 re-driver
R838 *0_04
R828 *4.7K_04
R810 *4.7K_04
R802 2K_1%_04
A A
6
U67
25
VCC
EN_RXD
EQ_A
DE_A
SW_A
GND
R871 *4.7K_04 I2C_SDA_P1 24 GND 7 I2C_SCK_P1 R782 *4.7K_04
SMB_DATA SMB_SCK
TXN1 0.1u_10V_X7R_04 C1159 23 8 C1102 0.1u_10V_X7R_04 USB3_TXN1
TX1- RX1- USB3_TXN1 [38] VDD5 VDD5
TXP1 0.1u_10V_X7R_04 C1158 22 9 C1101 0.1u_10V_X7R_04 USB3_TXP1 5/13 D02A LOCATION
TX1+ RX+ USB3_TXP1 [38]
EMI EMI
21 10 C1357 C1358
To Conn. TYPE_IND# CHIP_EN# From PCH
RXN1 0.1u_10V_X7R_04 C1157 20 11 C1100 0.1u_10V_X7R_04 USB3_RXN1 *100p_50V_NPO_04 *0.1u_16V_Y5V_04
Reserverd
RX2- TX2- USB3_RXN1 [38]
SW_B
EQ_B
USB3_RXP1
DE_B
RXP1 0.1u_10V_X7R_04 C1156 19 12 C1099 0.1u_10V_X7R_04
GND
VCC
RX2+ TX2+ USB3_RXP1 [38]
3.3V
18
17
16
15
14
13
ASM1464
PCB Footprint = QFN24-4X4MM
3.3V
Sheet 44 of 81
B
R813 *0_04 R806
R831
R841
*4.7K_04
*4.7K_04
*4.7K_04
C1140 C1107 C1112 B
USB Charger
R847 *0_04 0.01u_16V_X7R_04 0.1u_10V_X7R_04 1u_6.3V_X5R_04
USB3.0 PORT1 (MBⶎ)
VDD5 USBVCC_CH
U72 80 mil
5 1
VIN VOUT
C1200 C1189
+ C539
2 C520 C1185
10u_6.3V_X5R_06 GND EEFCX0J221YR 22u_6.3V_X5R_08 22u_6.3V_X5R_08
0.1u_16V_Y5V_04
USB_DD_ON# 4 3
EN# OC# 220u,6.3V,ESR=15mȍ,H=1.9mm
uP7549UMA5-20
J_USB3_1
SLG55593VTR USB Charging PORT TXP1_J 9

1 SSTX+ SHIELD
GND1
GND3
Standard-A
TXN1_J 8 VBUS SHIELD
USB_PN1_J 2 SSTX-
4 D-
USB_PP1_J 3 GND
VDD5 D+
RXP1_J 6
C 7 SSRX+ GND4 C
W/ USB CHARGER [43,54,55] USB_CHARGE_EN

R329
100K_04
USB3.0 Max Trace length
RXN1_J 5 GND_D
SSRX-
SHIELD
SHIELD
GND2
C19007-90905-L NEW
USB_DD_ON# Follow Design Guide EMI_GND PCB Footprint = USB-C19005
VDD5 R346 P/N = 6-21-B4A30-009
1M_04
D22
6
D R380 0_04
PRE#_R 2 G 10 1
R328 S Q21A 9 2 EMI㒢㓦
1
10K_04 MTDK3S6R 8 3 EMI_GND

C590 USB_PN1_A L13 4 3 USB_PN1_CON 7 4 USB_PN1_J
3
R307 *0_04 D USB_PP1_CON 6 5 USB_PP1_J

[13,37,42,43,49,55,56,69] SUSB# USB_PP1_A
U21 Default Low5 0.1u_16V_Y5V_04 1 2
R313 0_04 8 1 PRE# G *W CM2012F2S-161T03-short
[43,54,55] DD_ON CB PRE# S Q21B DT1140-04LP-7
4
USB_PN1 7 2 USB_PN1_A MTDK3S6R

[35] USB_PN1 TDM DM R343
USB_PP1 6 3 USB_PP1_A 100K_04
[35] USB_PP1 TDP DP
GND
D56
VDD5 5 4
VCC CDP
C566 SLG55593VTR RXN1 10 1 RXN1_J
9
PCB Footprint = TDFN8-2X2MM RXP1 9 2 RXP1_J

0.1u_16V_Y5V_04 䚖⇵ἧ䓐㬌㕁SLG55593VTR 8 3
TXN1 7 4 TXN1_J
:6-02-55593-9D0 TXP1_J
D TXP1 6 5 D
PRE# R310 *0_04 USB_DD_ON#

DT1140-04LP-7
Title
VDD5 [54,55,56]
[44] USB CHARGER
5V [17,45,48,52,53,55,58,59,62,63,64,65,66,67,71,73] Size Document Number Rev
3.3VS [3,9,10,11,12,13,14,15,17,30,31,34,36,37,38,39,40,42,43,46,47,48,49,50,51,52,55,59,64,66,68,70]
3.3V [2,13,17,31,45,46,47,50,52,53,55,56,58,59,60,62,70] A3 6-71-P65P0-D02A D03B

1 2 3 4 5
USB Charger B - 45
Schematic Diagrams
USB
5 4 3 2 1
3.3V
USB3.0 re-driver USB3.0 PORT5 (MBᶲ)
USBVCC3.0_5
R16 *0_04 U43
R19 *4.7K_04
5V
5 1 100 mil
R21 *4.7K_04 VIN VOUT
C22 C15
2
R23 *2K_1%_04 10u_6.3V_X5R_06 GND 0.1u_16V_Y5V_04
D D
4 3
EN# OC#
R511 *0402_short uP7549UMA5-20
[53,55,73] DD_ON#
6
U1
25
VCC
EN_RXD
EQ_A
DE_A
SW_A
GND
R15 *4.7K_04 I2C_SDA_P5 24 GND 7 I2C_SCK_P5 R25 *4.7K_04
SMB_DATA SMB_SCK
TXN5 *0.1u_10V_X7R_04 C27 23 8 C53 *0.1u_10V_X7R_04 USB3_TXN5
TX1- RX1- USB3_TXN5 [38]
TXP5 *0.1u_10V_X7R_04 C28 22 9 C54 *0.1u_10V_X7R_04 USB3_TXP5
TX1+ RX+ USB3_TXP5 [38]
21 10
To Conn. TYPE_IND# CHIP_EN# From PCH C783 22u_6.3V_X5R_08
RXN5 *0.1u_10V_X7R_04 C29 20 11 C55 *0.1u_10V_X7R_04 USB3_RXN5 100 mil
Reserverd
RX2- TX2- USB3_RXN5 [38] USBVCC3.0_5 C16 22u_6.3V_X5R_08
SW_B
EQ_B
USB3_RXP5
DE_B
RXP5 *0.1u_10V_X7R_04 C30 19 12 C56 *0.1u_10V_X7R_04
GND
VCC
USB3_RXP5 [38]
GND1
RX2+ TX2+
3.3V USB3.0 Max Trace length J_USB3_2
Follow Design Guide
18
17
16
15
14
13
Sheet 45 of 81 *ASM1464
SHIELD
PCB Footprint = QFN24-4X4MM TXP5_J 9
3.3V 1 SSTX+
Standard-A
TXN5_J 8 VBUS
SSTX-
USB C R520 *0_04 R22 *4.7K_04 10
9
D1
1
2
USB_PN5_J
USB_PP5_J
RXP5_J
2
4
3
6
D-
GND
D+
C
R20 *4.7K_04 C798 C795 C797
8 3 7 SSRX+
SHIELD
R18 *4.7K_04
GND_D
*0.01u_16V_X7R_04
*0.1u_10V_X7R_04
*1u_6.3V_X5R_04
R17 *0_04 4 L4 3 USB_PN5_CON 7 4 USB_PN5_J RXN5_J 5
[35] USB_PN5 SSRX-
USB_PP5_CON 6 5 USB_PP5_J
[35] USB_PP5 1 2
DT1140-04LP-7 93-0022-02
*W CM2012F2S-161T03-short
GND2
PCB Footprint = USB-93-0022-01
D38
co-lay, place under ASM1464 RXN5_J
RXN5 10 1
RXP5 9 2 RXP5_J
TXN5 R515 0_04 U3_TXN5 R524 0_04 USB3_TXN5
8 3 6-20-B4A30-009
TXN5 C790 0.1u_10V_X7R_04 TXN5_C 7 4 TXN5_J
TXP5 R514 0_04 U3_TXP5 R523 0_04 USB3_TXP5
TXP5_C 6 5 TXP5_J
U3_RXN5 R522 USB3_RXN5 TXP5 C789 0.1u_10V_X7R_04
RXN5 R513 0_04 0_04
DT1140-04LP-7
RXP5 R512 0_04 U3_RXP5 R521 0_04 USB3_RXP5
B B
A A
[17,48,52,53,55,58,59,62,63,64,65,66,67,71,73] 5V
[2,13,17,31,44,46,47,50,52,53,55,56,58,59,60,62,70] 3.3V
Title
[45] USB3.0
A3 6-71-P65P0-D02A D03B

5 4 3 2 1
B - 46 USB
Schematic Diagrams
M.2 WLAN+BT, PCIE4X SSD

5 4 3 2 1
WLAN+BT+WIGIG 75
J_W LAN1
74
40 mil
GND14 3.3V3 W LAN_3.3V
73 72
[39] CLK_PCIE_W IGIG# REFCLKN1 3.3V2 C1009
71 70 R677 0_04 C335
[39] CLK_PCIE_W IGIG REFCLKP1 PEWake1# (IO)(0/3.3V) PCIE_W AKE# [37,46,68,69]
69 68 R723 0_04
GND13 CLKREQ1# (IO)(0/3.3V) W IGIG_CLKREQ# [39]
WiGig 67 66 R671 0_04 22u_6.3V_X5R_08 0.1u_16V_Y5V_04
[35] PCIE_RXN8_W IGIG PERn1 PERST1# (I)(0/3.3V) BUF_PLT_RST# [38,43,46,50,68,69]
65 64
[35] PCIE_RXP8_W IGIG PERp1 RESERVED1
63 62
C998 0.1u_10V_X7R_04 PCIE_TXN8_W IGIG 61 GND12 ALERT# (O)(0/3.3) 60 R186 10K_04 PJ15 2 1 *2mm
[35] PCIETXN8 PETn1 I2C CLK (I)(0/3.3) W LAN_3.3V 3.3V
C992 0.1u_10V_X7R_04 PCIE_TXP8_W IGIG 59 58 R177 10K_04
[35] PCIETXP8 PETp1 I2C DATA (IO)(0/3.3) VDD3 W LAN_3.3V
57 56 R183 0_04
GND11 W_DISABLE#1 (I)(0/3.3V) W LAN_EN [43] U8
D R176 *0_04 55 54 >120 mil >120 mil D
[37,46,68,69] PCIE_W AKE# PEWake0# (IO)(0/3.3V)Reserved/W _DISABLE#2 (I)(0/3.3V) BT_EN [43]
53 52 5 1
[39] W LAN_CLKREQ# CLKREQ0# (IO)(0/3.3V) PERST0#(I)(O/3.3V) BUF_PLT_RST# [38,43,46,50,68,69] VIN VOUT
3.3VS R179 10K_04 51 50 SUSCLK SUSCLK [37]
R1013 *10K_04 49 GND10 SUSCLK(32kHz) (I)(0/3.3V) 48 4
W LAN_3.3V REFCLKN0 COEX1 (I/O)(0/1.8V) VIN/SS
[39] CLK_PCIE_MINI# 47 46 32Khz C350 C332
[39] CLK_PCIE_MINI 45 REFCLKP0 COEX2 (I/O)(0/1.8V) 44 3 2
43 GND9 COEX3 (I/O)(0/1.8V) 42 R158 *0_04 1u_6.3V_X5R_04 EN GND 0.1u_16V_Y5V_04
WLAN [35] PCIE_RXN7_W LAN PERn0 VENDOR DEFINED2 CL_CLK1 [36]
41 40 R148 *0_04 UP7553
[35] PCIE_RXP7_W LAN PERp0 VENDOR DEFINED1 CL_DATA1 [36]
39 38 R142 *0_04
GND8 VENDOR DEFINED0 CL_RST#1 [36]
C976 0.1u_10V_X7R_04 PCIE_TXN7_W LAN 37 18 M: NCT3522U -- 6-02-03522-9C0
[35] PCIETXN7 PETn0 GND6
C977 0.1u_10V_X7R_04 PCIE_TXP7_W LAN 35 34 C943 *0.1u_10V_X7R_04 DDI3_TXP0 [3] S: G5243A ---- 6-02-05243-9C0
[35] PCIETXP7 PETp0 DP_ML0p [43] W LAN_PW R_EN
33 32 C933 *0.1u_10V_X7R_04 AP2821KTR-G1 6-02-02821-9C0
GND7 DP_ML0n DDI3_TXN0 [3]
[3] W IGIG_HPD 31
DP_HPD (IO)(0/3.3V) GND6
30 ㍍⇘EC ,枰冯EC䡢娵
29 28 C916 *0.1u_10V_X7R_04 DDI3_TXP1 [3]
*0.1u_10V_X7R_04 C952 27 GND5 DP_ML1p 26 C907 *0.1u_10V_X7R_04
[3] DDI3_TXP2 DP_ML2p DP_ML1n DDI3_TXN1 [3]
*0.1u_10V_X7R_04 C953 25 24
[3] DDI3_TXN2 DP_ML2n GND4
23 22 C898 *0.1u_10V_X7R_04 DDI3_AUX [3]
*0.1u_10V_X7R_04 C910 21 GND3 DP_AUXp 20 C891 *0.1u_10V_X7R_04
[3] DDI3_TXP3 DP_ML3p DP_AUXn DDI3_AUX# [3]
*0.1u_10V_X7R_04 C903 19 18
[3] DDI3_TXN3 DP_ML3n GND2
17 16
DP_MLDIR GND (In)/ 3.3V (Out)/NC (IO) LED#2 (O)(OD)
A KEY
3.3V [2,13,17,31,44,45,47,50,52,53,55,56,58,59,60,62,70]
7 6
[35]
[35]
USB_PN8
USB_PP8
5
3
1
GND1
USB_D-
USB_D+
GND0
LED#1 (O)(OD)
3.3V1
3.3V0
4
2
40 mil
C346
W LAN_3.3V
普ᷕ㷔溆 BOT
W LAN_EN
3.3VS [3,9,10,11,12,13,14,15,17,30,31,34,36,37,38,39,40,42,43,47,48,49,50,51,52,55,59,64,66,68,70]
VDD3 [5,30,34,37,40,42,43,49,51,54,55,56,57,58,59,60,61,62,63,68]
Sheet 46 of 81
C
NFSA0-S6701-TP40
6-21-84K20-075
22u_6.3V_X5R_08
BT_EN
W LAN_PW R_EN
C
M.2 WLAN+BT,
W LAN_3.3V
PCB Footprint婳䡢娵㨇㥳ἧ䓐䘬Connector
PCIE4X SSD
NGFF_M (M2) SSD_1 (PCIE 4X)
KEY
3.3VS M-KEY (J_SSD1) B-KEY (J_3G1)
>120 mil OPTION
3.3VS 1 PCIE x4, x2 USB3
J_SSD1
R955 C705 C704 C690
[36] SATAGP0
75 ᶵ㓗㎜
2
D
10K_04 73 GND13 74 0.1u_10V_X7R_04 0.1u_10V_X7R_04 10u_6.3V_X5R_06 PCIE x4, x2 SATA

SATAGP0 GND12 3.3V8
L: PCIe 71 72
G PCIE_SATA_0 69 GND11 3.3V7 70 SATA USB3
H: SATA PEDET(NC-PCIe/GND-SATA) 3.3V6 3
Q67 67 68 GND GND
S
2SK3018S3 NC18 SUSCLK(32Khz)(O) GND SATA SATA

B 4 B
M KEY
57 58
55 GND10 NC17 56
[39] CLK_PCIE_SSD REFCLKP NC16
53 54
[39] CLK_PCIE_SSD# REFCLKN PEWake#(IO)
51 52
GND9 CLKREQ#(IO) SSD_CLKREQ# [39]
C1259 0.22u_10V_X5R_04 49 50
[36] PCIE_TXP9_SATA0A_TXP_SSD PETp0/SATA-A+ PERST#(O) BUF_PLT_RST# [38,43,46,50,68,69]
C1258 0.22u_10V_X5R_04 47 48
[36] PCIE_TXN9_SATA0A_TXN_SSD PETn0/SATA-A- NC15
45 46
43 GND8 NC14 44
[36] PCIE_RXN9_SATA0A_RXN_SSD PERp0/SATA-B- NC13
41 42
[36] PCIE_RXP9_SATA0A_RXP_SSD PERn0/SATA-B+ NC12
39 40
C1257 0.22u_10V_X5R_04 37 GND7 NC11 38
[36] PCIE_TXP10_SSD PETp1 DEVSLP(O)
C1256 0.22u_10V_X5R_04 35 36
[36] PCIE_TXN10_SSD PETn1 NC10
33 34
31 GND6 NC9 32
[36] PCIE_RXP10_SSD PERp1 NC8
29 30 >120 mil
[36] PCIE_RXN10_SSD PERn1 NC7
27 28 3.3VS
C1255 0.22u_10V_X5R_04 25 GND5 NC6 26
[36] PCIE_TXP11_SSD PETp2 NC5
C1254 0.22u_10V_X5R_04 23 24 C680 C687 C682
[36] PCIE_TXN11_SSD PETn2 NC4
21 22
19 GND4 NC3 20 0.1u_10V_X7R_04 0.1u_10V_X7R_04 10u_6.3V_X5R_06
[36] PCIE_RXP11_SSD PERp2 NC2
17 18
[36] PCIE_RXN11_SSD PERn2 3.3V5
15 16
C1261 0.22u_10V_X5R_04 13 GND3 3.3V4 14 GND GND GND
[36] PCIE_TXP12_SSD PETp3 3.3V3
C1260 0.22u_10V_X5R_04 11 12
[36] PCIE_TXN12_SSD PETn3 3.3V2 M2M_SSD_LED#R
9 10
7 GND2 DAS/DSS#(I)(OD) 8
A [36] PCIE_RXP12_SSD PERp3 NC1 A
5 6 80 mils
[36] PCIE_RXN12_SSD PERn3 NC0
3 4 3.3VS
close to J_SSD2 conn 1 GND1 3.3V1 2
GND0 3.3V0
C698
NFSM0-S6701-TP40 0.1u_10V_X7R_04
P/N = 6-21-84K70-075
GND PCB Footprint = NXSM0-S67XX-XX40 Title
PCB Footprint婳䡢娵㨇㥳ἧ䓐䘬Connector [46] M.2 WLAN+BT, PCIE4X SSD
GND
A3 P650RP 6-71-P65P0-D02A D03B

5 4 3 2 1
M.2 WLAN+BT, PCIE4X SSD B - 47

Schematic Diagrams
M.2 3G/LTE
5 4 3 2 1
3G /LTE CARD USB3.0 / M.2 SATA

CURRENT2A㗪,DON'T DROP BELOW 3.135V
3G_3.3V 80 milsP670 MSATA Only, ⣏暣⭡ᶵᶲẞ
J_3G1 C1234 220u_6.3V_6.3*6.3*4.2
+
75 74 C667 0.1u_16V_Y5V_04 GND
[42] 3G_CONFIG2 CONFIG_2 3.3V4
73 72
71 GND10 3.3V3 70 C668 0.1u_16V_Y5V_04
69 GND9 3.3V2 68
D [42] 3G_CONFIG1 D
R478 *0_04 67 CONFIG_1 SUSCLK(32Khz)(O) 66 SIM_DET
[43] 3G_RST# Reset#(O)1.8V SIM Detect(O)
65 64 M.2 3G/4G-LTE module SIM Detect
CHECK BIOS C645 63 ANTCTL3(I)1.8V COEX1(I/O)1.8V 62 C683
ANTCTL2(I)1.8V COEX2(I/O)1.8V Pin 66炻ℏ悐䁢1.8V with
& EC, 1.8V LEVEL 61 60 Pull-up暣旣
CLOSED *33p_50V_NPO_04 59 ANTCTL1(I)1.8V COEX3(I/O)1.8V 58 470p_50V_X7R_04
57 ANTCTL0(I)1.8V NC1 56
CONNECTOR GND8 NC0
55 54
GND 53 REFCLKP PEWake#(IO) 52 GND
Close to J_3G1 51 REFCLKN CLKREQ#(IO) 50
C692 0.01u_16V_X7R_04 SATA1_TXP1_R 49 GND7 PERST#(O) 48 R440 *10K_04
[36] SATA1_TXP1 PETp0/SATA-A+ GPIO_4(IO)1.8V 3.3V
C695 0.01u_16V_X7R_04 SATA1_TXN1_R 47 46
[36] SATA1_TXN1 PETn0/SATA-A- GPIO_3(IO)1.8V
45 44
C700 0.01u_16V_X7R_04 SATA1_RXN1_R 43 GND6 GPIO_2(IO)1.8V 42
[36] SATA1_RXN1 SATA1_RXP1_R PERp0/SATA-B- GPIO_1(IO)1.8V
C703 0.01u_16V_X7R_04 41 40
[36] SATA1_RXP1 PERn0/SATA-B+ GPIO_0(IO)1.8V

39 38
L31 USB3_TXP2_R GND5 DEVSLP(O) UIM_PW R
C710 0.1u_10V_X7R_04 1 2 37 36
[38] USB3_TXP2 USB3_TXN2_R PETp1/USB3.0-Tx+/SSIC-TxP UIM_PWR(I) UIM_DATA
35 34
C713 0.1u_10V_X7R_04 4 3 33 PETn1/USB3.0-Tx-/SSIC-TxN UIM_DATA(IO) 32 UIM_CLK C714
[38] USB3_TXN2 USB3_RXP2_R GND4 UIM_CLK(I) UIM_RST
*W CM2012F2S-SHORT 31 30
USB3_RXN2_R 29 PERp1/USB3.0-Rx+/SSIC-RxP UIM_RESET(I) 28 0.1u_16V_Y5V_04
4G LTE 1
L33
2 27 PERn1/USB3.0-Rx-/SSIC-RxN GPIO_8(IO)1.8V 26 GPS_DISABLE# R434 0_04
[38] USB3_RXP2 BODYSAR_N GND3 GPIO_10(IO)1.8V
25 24
4 3 3G_W AKE# 23 GPIO_12(IO)1.8V GPIO_7(IO)1.8V 22 GND
Sheet 47 of 81 [38] USB3_RXN2

*W CM2012F2S-SHORT
Close to J_3G1
[42] 3G_CONFIG0
3G_CONFIG0 21 GPIO_11(IO)1.8V
CONFIG_0
GPIO_6(IO)1.8V
GPIO_5(IO)1.8V
20 GND
B KEY HUAWEI MU736 ⎗㍍⍿3.3V

M.2 3G/LTE C Reserved
[35] USB_PN6
4 3
11
9 GND2 GPIO_9/DAS/DSS#(I)(OD)
10
8
M2B_3GSSD_LED#R
3G_EN [43]
C
SATAGP1 R371 *0_04 3G_CONFIG1 7 USB_D- W_DISABLE#1(O) 6 PW R_ON_OFF R441 10K_04

1 2 5 USB_D+ Full_Card_Power_Off#(O)1.8V 4
[35] USB_PP6 GND1 3.3V1 80 mils
L35 *W CM2012F2S-SHORT 3 2
GND0 3.3V0 3G_3.3V
1
[42] 3G_CONFIG3 CONFIG_3 C1276
+ C1235 C1275
3.3VS 10u_6.3V_X5R_06
NFSB0-S6701-TP40
10K_04 220u_6.3V_6.3*6.3*4.2
R368 P/N = 6-21-84K50-075 0.1u_16V_Y5V_04
3.3VS
GND PCB Footprint = NXSB0-S67XX-XX40 P670 MSATA Only, ⣏暣⭡ᶵᶲẞ
PCB Footprint婳䡢娵㨇㥳ἧ䓐䘬Connector
SATAGP1 R367 GND GND
[36] SATAGP1
D
10K_04
SATAGP1 Windows 8 3G_POWEREN 普ᷕ㷔溆 BOT
L: PCIe
㰺㍺CARD Q22
G 3G_CONFIG1
3G POWER Always hi.
3G_EN
S
H: SATA,USB3(4G) 2SK3018S3 3G_CONFIG1
GPS_DISABLE#
H: PCIe(NC)
㰺㍺CARD 6-14-0003B-11D 3G_PW R_EN
R973 *0_06 2A
L: SATA,USB3(4G) 3.3VS
R972 *0_06 3G_3.3V
3.3VS
10K_04 Rd R446 *0_06 2A
3.3VS R414
Re R451 *0_06 3G_3.3V
B B
[36] 4G_SATA_DET#
R417 >120 mil >120 mil Default ᶵᶲẞ
4 3 3G_PW R_EN
D
3.3V S2 D2
10K_04 Qb
4G_SATA_DET#
G2
G 3G_CONFIG0 Ca C751
H: SATA,
Q24 C737 0.1u_16V_Y5V_04 Q26A
L: USB3 (4G)
5
S
2SK3018S3 3G_CONFIG0 MTS3572G6 0.1u_16V_Y5V_04

㰺㍺CARD C741
R450
L: SATA (GND)
H: USB3(4G) (NC) Rc Ra *100_06
1u_6.3V_X5R_04 R461 R468
㰺㍺CARD 100K_04 10_06 PW R_ON_OFF
Rb
R448 330K_04
D
6
Qa R449
D1
G Q27
3G_PW R_EN *12K_06
1 Q26B 2SK3018S3
SIM CONN [43] 3G_PW R_EN
S
R393 *4.7K_04 G1 MTS3572G6
S1
䔞LTE䓙PIN6㍏⇞㗪Rd,Re天ᶲ,
2
J_SIM1 Qa, Qb, Ra, Rb, Rc, Caᶵ䓐ᶲ GND
SIM_DET R397 0_04
(TOP VIEW) R390
R369 9 8 *0402_short
*0402_short 7 DETECT_SW UIM_MCMD 6 UIM_DATA_R UIM_DATA
UIM_CLK UIM_CLK_R 5 UIM_DATA UIM_I/O 4 UIM_VPP
UIM_RST 3 UIM_CLK UIM_VPP 2
1 UIM_RST UIM_GND
GNG
GND
GND
GND
A UIM_PWR A
UIM_PW R
GND1
GND2
GND3
GND4
C619
6-86-2B010-003
Layout㗪
1. SIMᷳ㇨㚱ᾉ嘇䶂≈䰿(10mil)
*22p_50V_NPO_04 ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
SIMLOCK MEGA SIM W / SW STANDARD
2. ㇨㚱ᾉ嘇䶂ᷳ攻≈GND Title
[47] M.2 3G / LTE,SIM
3. SIM hold 㛔橼⚃␐≈GND⚵丆 MSMPS-SN2(01T) 5VS [13,17,36,48,49,50,51,52,55,60,61]
3.3VS [3,9,10,11,12,13,14,15,17,30,31,34,36,37,38,39,40,42,43,46,48,49,50,51,52,55,59,64,66,68,70]
4.SIM CONN 月役 MINI CARD CONN 5V [17,45,48,52,53,55,58,59,62,63,64,65,66,67,71,73] Size Document Number Rev
5. SIMᷳ㭷ᶨᾉ嘇䶂䘬Layout嵹䶂暨⮷㕤10℔↮. 3.3V [2,13,17,31,44,45,46,50,52,53,55,56,58,59,60,62,70] A3 P650RP 6-71-P65P0-D02A D03B

5 4 3 2 1
B - 48
Schematic Diagrams
Realtek ALC892
5 4 3 2 1
C672 0.1u_16V_Y5V_04
C640 0.1u_16V_Y5V_04
C614 0.1u_16V_Y5V_04
Layout Note:
U43 pin 1 ~ pin 11 and pin 47 and pin 48 C659 0.1u_16V_Y5V_04
are Digital signals.
C718 0.1u_16V_Y5V_04
The others are Analog signals. 898: ᶲẞ
D 892: ᶵᶲẞ 898: ᶲẞ C1330 0.1u_16V_Y5V_04 D
892: ᶵᶲẞ
reltek check
reltek check 898: ᶲẞ C1331 0.1u_16V_Y5V_04
892: ᶵᶲẞ
3.3VS_AUD reltek check C1332 0.1u_16V_Y5V_04
3.3VS 5VS_AUD
Layout Note: L36 HCB1005KF-121T20
40mil 40mil L26 *HCB1005KF-121T20
5VS AUDG
(1)MIC1-L (U13.21) (2)MIC1-R (U13.22) R447 HCB1005KF-121T20
(3)LINE-L (U13.23) (4)LINE-R (U13.24) C743 C747 C746 C748 C745 C706 C702 C696
C697
␐⚵⽭枰⊭央 AUDG, ᶼ⃀慷性⃵嶐崲 0.1u_16V_Y5V_04 10u_6.3V_X5R_06 0.1u_16V_Y5V_04 *10u_6.3V_X5R_06 0.1u_16V_Y5V_04 1u_6.3V_X5R_04 10u_6.3V_X5R_06 *10u_6.3V_X5R_06
*1u_6.3V_X5R_04
+5VS & +VIN plane.
AUDG
MIC2-VREFO
AUDG AUDG AUDG
898: ᶲẞ0R AUDG
25
38
892: ᶲẞHCB1005KF-121T20
1
9
U33 898: ᶵᶲẞ
reltek check 892: ᶲẞ R405 MIC1-VREFO-L
H47
DVDD1
LDO_OUT1
LDO_OUT2
DVDD-IO
DVSS
H7_5D3_7 MIC_CLK HCB1005KF-121T20 1 2 R463 reltek check
[50] MIC_CLK MIC_DATA *2.2K_04
HCB1005KF-121T20 1 2 R464 C691 0.1u_16V_Y5V_04
[50] MIC_DATA R409
C749 47p_50V_NPO_04 2 INT_MIC_OUT
GPIO0/DMIC-CLK/SPDIFO_2*
C744 10u_6.3V_X5R_06 4 27 C684 10u_6.3V_X5R_06
GPIO1/DMIC_DAT VREF 2.2K_04
C750 47p_50V_NPO_04 3
C REGREF C663 C
MIC1_L_M
5 28 MIC1-VREFO-L AUDG
[37] HDA_SDOUT SDATA-OUT MIC1-VREFO-L *330p_50V_X7R_04
6 32 MIC1-VREFO-R
[37] HDA_BITCLK BIT-CLK VREFO-B(2) C678
AUDG R465 22_04 HDA_SDIN0_R8
[37] HDA_SDIN0 SDATA-IN
10 39
DIGITAL
SRUW$
NGFF 3G [37] HDA_SYNC SYNC SURR-L AUDG *680p_50V_X5R_04
11 41
[37] HDA_RST# RESET# SURR-R
6-34-M56AS-011-1
PC BEEP
[49] EAPD_MODE
Max: 0.5inch
EAPD_MODE 47
SPDIFI/EAPD VREFO-F
VREFO-E
30
31
MIC2-VREFO
T48
T47
898: R407,R406 75_04
892: 0_04
02/24 AUDG Sheet 48 of 81
D30 48
Realtek ALC892
898: R454 160K_1%_04, [52] SPDIFO SPDIF-OUT
R455 2K_04 1 A 35 FRONT_LL R407 0_04
892: R454 47K_04 ,
[43] KBC_BEEP
2 A
C 3 BEEPR454
R455
47K_04
4.7K_04
C738 1u_6.3V_X5R_04 12
PCBEEP SRUW' FRONT-OUT-L
FRONT-OUT-R
36 FRONT_RR R406 0_04
FRONT_L
FRONT_R
[49]
[49]
MIC1-VREFO-R
02/24 R455 4.7K_04 [37] PCH_SPKR

C739 *0.1u_10V_X5R_04 14
SRUW( LINE2-R
LINE2-L HEADPHONE-L [52] R404
BAT54CS3 15
JD_SENSEA HEADPHONE-R [52]
13
[52] JD_SENSEA Sense A 2.2K_04
34 43
5VS_AUD [52]
ANALOG SRUW*
JD_SENSEB Sense B CENTER
L19 44 C719 10u_6.3V_X5R_06 R438 75_1%_04 MIC1_R_M
898: ᶲẞ0R LFE SIDE_L [52]
HCB1005KF-121T20 R980 *0_04 37 C724 10u_6.3V_X5R_06 R439 75_1%_04
892: ᶵᶲẞ LDO_IN VRP SIDE-L_R SIDE_R [52]
29 45
5V
ALC889
LDO-IN
SRUW+ SIDE-R
SIDE-L 46 SIDE-R_R C686 *0.1u_16V_Y5V_04
C662
C
B C723 *4.7u_6.3V_X5R_06 MIC2_L 16 B

INTERNAL PU 50K
D25 ᶵᶲẞ. C664
INT_MIC_OUT R394 *1K_04 INT_MIC_R C717 *4.7u_6.3V_X5R_06 MIC2_R 17 MIC2-L
MIC2-R SRUW) GPIO2
33 C677 *10u_6.3V_X5R_06
*680p_50V_X5R_04
*ZD5231BS2
22u_6.3V_X5R_08 18 40 JDREF R430 20K_1%_04
CD-L JDREF AUDG AUDG
19 AUDG
A
20 CD-GND 23 R431 *5.1K_1%_04

CD-R
SRUW& LINE1-R
LINE1-L 24
AVSS1
AVSS2
AUDG MIC1_L_M R429
AUDG 1K_04 C715 4.7u_6.3V_X5R_06 21
SRUW%
[52] MIC1_L_M MIC1_R_M R422 MIC1-L
Connect standby power(for 1K_04 C709 4.7u_6.3V_X5R_06 22 C716 *100p_50V_NPO_04
[52] MIC1_R_M MIC1-R
pop noise)
898: R429,R422 75_04 ALC892
26
42
892: 1K_04
02/24
* ALC889:Pin2->GPIO0/DMIC_CLK/SPDIF02;Pin3->GPIO1/DMIC_DATA;Pin4->DVSS;Pin29->LINE1-VREFO
* ALC892:Pin2->GPIO0/DMIC_CLK/SPDIFO_2;Pin3->REGREF;Pin4->GPIO1/DMIC_DATA;Pin29->LDOVDD
* ALC898:Pin2->GPIO0/DMIC_CLK/SPDIFO_2;Pin3->REGREF;Pin4->GPIO1/DMIC_DATA;Pin29->LDOVDD
AUDG * ALC898R:Pin2->GPIO0/DMIC_CLK/SPDIFO_2;Pin3->REGREF;Pin4->GPIO1/DMIC_DATA;Pin29->LINE1-VREFO
A A
[2,13,17,31,44,45,46,47,50,52,53,55,56,58,59,60,62,70] 3.3V Title
[3,9,10,11,12,13,14,15,17,30,31,34,36,37,38,39,40,42,43,46,47,49,50,51,52,55,59,64,66,68,70]
[17,45,52,53,55,58,59,62,63,64,65,66,67,71,73]
3.3VS
5V
[48] Realtek ALC892
[13,17,36,49,50,51,52,55,60,61] 5VS Size Document Number Rev
[13,43,49,52,53,54,55,56,57,62,64,65,66,67] VIN

5 4 3 2 1
Realtek ALC892 B - 49
Schematic Diagrams
TPA2008D2
5 4 3 2 1
AMP_5VS
L25
AUDIO AMP Enable
The volume control.the gain range is from TPA2008D2 HCB1608KF-121T30
5VS
-80db(Vvolume=5V) to +20db(Vvolume=0V) with
64 steps precise control. P2P BA20550 C679 C669 C660
3.3VS
(TSSOP24) 0.1u_10V_X7R_04 0.1u_10V_X7R_04 22u_6.3V_X5R_08
U32
AUDG AUDG AUDG
Front Speaker R / L C740
D D
AMP_EN 3 20 ROUTP L21 FCM1005KF-121T03 ROUT+
SHUTDOWN ROUTP
. 4 Ohm 2W Speaker 100K_1%_04 R456 *0.1u_10V_X5R_04
AUDG C674 2.2u_6.3V_X5R_04 22 21 20 Mil J_SPK1 D32

20 Mil BYPASS PVDDR1 ROUT+
FRONT_R 1 ROUT- C A
[48] FRONT_R R401 3.01K_1%_04 C676 24 17 ROUTN L22 . FCM1005KF-121T03 ROUT- [13,37,42,43,44,49,55,56,69] SUSB#
RINN ROUTN 2 LOUT+
0.1u_10V_X7R_04
3 LOUT- RB751V-40(lision)
C673 0.1u_10V_X7R_04 23 16 20 Mil
C654
C653
C650
C652
AUDG RINP PVDDR2 4 D29
C A
6 18 85204-04001 [38] PCH_MUTE# U36
PGNDL1 PGNDR1
5
6-20-43130-104 74AHC1G08GW
1000p_50V_X7R_04
1000p_50V_X7R_04
1000p_50V_X7R_04
1000p_50V_X7R_04
*RB751V-40(lision)
7 19 [48] EAPD_MODE 1
20 Mil PGNDL2 PGNDR2 20 Mil 4 AMP_EN
FRONT_L AMP_EN [52]
[48] FRONT_L R442 3.01K_1%_04 C727 1 5 LOUTP L24 FCM1005KF-121T03 LOUT+
. 2
[43] KBC_MUTE#
0.1u_10V_X7R_04 LINN LOUTP C729

AUDG C728 0.1u_10V_X7R_04 2 9
3
LINP PVDDL1 *0.1u_16V_Y5V_04
5VS R391 6.98K_1%_04 14 4
On VOLUME PVDDL2
AUDG R400 10K_1%_04 15 13
NC VDD
Thermal_Pad
20 Mil
10 8 LOUTN L23 FCM1005KF-121T03 LOUT-
. C733 C732
COSC LOUTN
11 12 0.1u_16V_Y5V_04 1000p_50V_X7R_04
Sheet 49 of 81 C730 R443

ROSC
TPA2008D2
AGND
Speaker wire length less than 8000mils , It don't need LC Filter.
25
SPKOUTR+,R-,L+,L- Trace width AUDG
TPA2008D2 C
220p_50V_NPO_04 120K_04
AUDG
Speaker 4 ohm------> 30mils, Via hole----->C40D20. C
AUDG
AUDG AUDG
BACKLIGHT KEYBOARD 3.3VS
U23
BACKLIGHT KEYBOARD
KB_VDD KBZONE1_B R384 *180k_1%_04
KB_5VS R345 *0_06 32 7
VDD LED0 8 KBZONE1_R
3.3VS R347 0_06 C594 LED1 KBZONE1_G
10
0.1u_16V_Y5V_04
[43] EC_CTRL_EN# LED2
2
3 A0 11 KBZONE2_B U25 *G5383A
*10K_04
4 A1 LED3 12 KBZONE2_R 25
R315
A2 LED4 VIN_PAD VIN
5 13 KBZONE2_G 23 3
R332 A3 LED5 TON VIN
R341 6 17 C1247 C1248 C627
28 A4 15 KBZONE3_B VIN 18
*10K_04 A5 LED6 KBZONE3_R VIN
*10K_04 29 16 19
A6 LED7 VIN *4.7u_25V_X5R_08 *4.7u_25V_X5R_08 *0.1u_25V_X7R_06
2
Q68A 17 KBZONE3_G 20 DEFAULT SHORT

LED8 VIN
*0.1u_10V_X5R_04
*MTDK3S6R R318 *0_04 EC_CTRL_EN#_R 27 21
G
SMC_VGA_THERM_R OE# VIN J6

6 1 30 18 5VS
[30,43,71] SMC_VGA_THERM SCL LED9 R383 *1.5_04
31 20 22 1 2
D
S
5
Q68B SDA LED10 21 BST

*MTDK3S6R 1 LED11 2mm
G
B B
3 4 SMD_VGA_THERM_R 9 VSS 22 G5383A_V5V 2 L14 KB_5VS_R KB_5VS
[30,43,71] SMD_VGA_THERM R325 VSS LED12 V5V C649 J2
14 23 *TMPC0402HP-4R7MG-Z02
D
0_04 VSS LED13 *4.7u_6.3V_X5R_04 2A 2A

19 25 8 1 2 1 2
24 VSS LED14 26 C634 LX 9
VSS LED16 LX
*22u_6.3V_X5R_06
*22u_6.3V_X5R_06
*22u_6.3V_X5R_06
10 C656 *2mm
*0.1u_50V_Y5V_06
LX R945
PCA9622 1 16
R338 0_04 AGND LX 26
C596
C609
C595
LX_PAD
C610
R333 0_04 *1K_04
*0.1u_25V_X7R_06 + C600
RGB_KB_GND C647
6
PGND *EEFCX0J221YR
5 11
EN PGND 12
J4 *CV-40mil PGND *100p_50V_NPO_04
*1000p_50V_X7R_04
13
VDD3 R366 *100K_04 1 2 PGND 220u,6.3V,ESR=15mȍ,H=1.9mm
14
PGND 15
1mm PGND
J3 1 2
[13,37,42,43,44,49,55,56,69] SUSB#
C646
㊧㌱PJ33 layout暨㲐シtrace⮔⹎ 9 C1286
4
J_KBLED_1 PGOOD
KB_5VS R377 0_06 *0.1u_10V_X5R_04 R388 *47K_1%_04
R382 49.9_1%_08 1
2 24
R389 0_06 FB
KBZONE1_R 3
KBZONE1_G 4 7 R387
C661 NC
4.7u_25V_X5R_08 KBZONE1_B 5 *10K_1%_04
KBZONE2_R 6 NC2 R978
A 7 G5383A_V5V A
KBZONE2_G
KBZONE2_B 8 NC1 *100K_04
KBZONE3_R 9 KB_5VS_PG R396 *28mil short-p
KBZONE3_G 10
11
KBZONE3_B RGB_KB_GND
12 RGB_KB_GND
FP225H-012S10M
6-20-94K50-012 [13,43,52,53,54,55,56,57,62,64,65,66,67] VIN Title
[2,13,17,31,44,45,46,47,50,52,53,55,56,58,59,60,62,70] 3.3V [49] TPA2008D2 , BLIGHT KEYBOARD
ἧ䓐ᶳ㍍妠CONN [5,30,34,37,40,42,43,46,51,54,55,56,57,58,59,60,61,62,63,68]
[13,17,36,48,50,51,52,55,60,61]
VDD3
5VS Size Document Number Rev
[3,9,10,11,12,13,14,15,17,30,31,34,36,37,38,39,40,42,43,46,47,48,50,51,52,55,59,64,66,68,70] 3.3VS Custom P650RP 6-71-P65P0-D02A D03B

5 4 3 2 1
B - 50 TPA2008D2
Schematic Diagrams
TPM, CCD, TP
5 4 3 2 1
TPM_PW R
R195
FOR TP TP_VCC
100K_04
GPIO
H: W / TPM (ᶲ R195 )
L: W/O TPM (ᶲ R196 )
SLB9665TT TPM_PW R
TP_VCC
R452 0_04
R436 R437 C734
TPM_DET [42] OQDU761΢ҹ 3.3VS

10K_04 10K_04 *10u_6.3V_X5R_06
R194 *0_04 3.3V R453 *0_04 5VS
R196 TP_CLK
*100K_04 C431 C433 C720 1u_6.3V_X5R_04 TP_DATA
R184 0_04 3.3VS J_TP1
D U14 0.1u_16V_Y5V_04 10u_6.3V_X5R_06 C721 0.1u_10V_X7R_04 C725 C726 D
26 5 PIN5 TMC:776071!΢ҹ
[38,43] LPC_AD0 LAD0 VDD1 1 TP_DATA
23 10 PIN5 47p_50V_NPO_04 47p_50V_NPO_04
[38,43] LPC_AD1 LAD1 VDD2 2 TP_CLK TP_DATA [43]
20 19
[38,43] LPC_AD2 LAD2 VDD3 3 TP_CLK [43]
17 24 3.3VS
[38,43] LPC_AD3 LAD3 VDD4 4 TP_SMB_DAT TP_VCC
㲐シPCLK_TPM⤪㚱ᷚ暣旣㚱ᶲTPM㗪暨⺢BOM 21 C397 C395 C427 5 TP_SMB_CLK
[38] PCLK_TPM LCLK TPM 6
22 0.1u_16V_Y5V_04 0.1u_16V_Y5V_04 *10u_6.3V_X5R_06 50501-0060N-001
[38,43] LPC_FRAME# BUF_PLT_RST# LFRAME#
16 88511-06L
[38,43,46,68,69] BUF_PLT_RST# LRESET#_1
LRESET# 9 PIN10 PIN19 PIN24 6-20-94K30-106
27 LRESET#_2 R411 R426
[38,43] SERIRQ SERIRQ
TPM_PP 7 6 TPM_GPIO 2.2K_04 2.2K_04
PP GPIO
2
Q25A
G
R192 1
4.7K_04 MTDK3S6R
NC_1
2 TP_SMB_CLK 1 6
NC_2 SMB_CLK [37,52,53]
D
3
OQDU761΢ҹ!1pin NC_3
5
8 Q25B
TMC:776071!΢ҹ!5/8L!pin NC_4 SMBUS address: 0x2C
G
12 4 MTDK3S6R
13 NC_5 GND_1 11 TP_SMB_DAT 4 3
OQDU761΢ҹTMC:776071!ό΢ҹ NC_6 GND_2 SMB_DATA [37,52,53]
D
14 18
R152 *0_04 CLKRUN# 15 NC_7 GND_3 25
[37] PM_CLKRUN# LPCPD#_TPM 28 NC_8 GND_4
NC_9 M19 M17 M9 M10 M15 M14
SLB9665TT
6-03-09665-0H1
BUF_PLT_RST# R135 *0_04 LRESET#
*M-MARK *M-MARK *M-MARK *M-MARK *M-MARK *M-MARK
Sheet 50 of 81
H12
C LPC_SIRQ & PM_CLKRUN# 䡢娵PCH䪗暨PULL HIGH
R143 *10K_04 H16
*H8_0D4_4
H17
*H8_0D4_4
H23
*H8_0D4_4
H22
*H8_0D4_4
*H7_5D2_8 C
TPM, CCD, TP
M20 M18 M16 M13 M11 M12
*M-MARK *M-MARK *M-MARK *M-MARK *M-MARK *M-MARK
CCD H9
*H6_0D3_3
H8
*H6_0D3_3
H6
*H6_0D3_3
H7
*H6_0D3_3 H43 H1 H2 H40
H20
H15
H37 *H4_2D2_2
*C111D111N *C111D111N *C111D111N *C111D111N *H4_2D2_2
CCD_PW R *C91D91N
U38
1A 1A 48 mil
3.3VS 4 1
5 VIN VOUT
C5 VIN
C761
1u_6.3V_X5R_04 CCD_EN3 2
EN GND 2.2u_6.3V_X5R_04
UP7553
H25 H31 H42 H21
M-SOT23-5
2 2 2 2 H10
5 5 5 5 *H8_0D5_5
[43] CCD_EN 3 1 3 1 3 1 3 1
4 4 4 4
From KBC default HI
B
Port 9 L1 *MTH7_0BC9_0D2_8 *MTH7_5D2_8 *MTH7_5BC9_0D2_8 *MTH9_5BC7_0D2_8 B
1 2
[35] USB_PN9 H3 H5 H26 H13 H11
2 2 2 2 2
4 3
[35] USB_PP9 5 5 5 5 5
*W CM2012F2S-SHORT J_CCD1 1 1 1 1 1
3 3 3 3 3
4 4 4 4 4
1
2 *MTH7_5D2_8 MTH7_5D3_0 *MTH7_5D2_8 *MTH7_5D2_8 *MTH7_5D2_8
L3 C7 47p_50V_NPO_04 3
FCM1005KF-121T03 4
MIC_DATA_L 3.3VS 5
1 2
[48] MIC_DATA MIC_CLK_L 6
1 2
[48] MIC_CLK 7 H52 H33 H27
FCM1005KF-121T03 C6 47p_50V_NPO_04 8 H4_6D2_6 *H6_0D3_2 *O5_2x4_2d3_2x2_2 H14 H32
L2 87213-0800G 2 2
5 5
BEAD & CAP FOR EMI 6-20-44A00-108 3 1 3 1
4 4
*MTH7_5D2_8 *MTH7_5D2_8
MAIN: 6-20-44A00-108
2ND: 6-21-C3A00-108 EMI_GND EMI_GND EMI_GND EMI_GND
EMI_GND
EMI㒢㓦
戭㞙BOT朊戭㞙 TOP朊戭㞙 TOP朊戭㞙 TOP朊戭㞙 TOP朊戭㞙 TOP朊戭㞙BOT朊 [13,17,36,48,49,51,52,55,60,61] 5VS

A [2,13,17,31,44,45,46,47,52,53,55,56,58,59,60,62,70] 3.3V A
H41 H49 H36 H35 H39 H38 H50 H46 H4
H48 H51 [3,9,10,11,12,13,14,15,17,30,31,34,36,37,38,39,40,42,43,46,47,48,49,51,52,55,59,64,66,68,70] 3.3VS
H7_5B5_7D3_7 H7_5D3_7 H7_5D3_7 H7_5D3_7 H7_5D3_7 H7_5D3_7 H7_5D3_7 H9_5B7_5D3_2 H7_5D3_7
H7_5D3_7 c315d110 [17,45,48,52,53,55,58,59,62,63,64,65,66,67,71,73] 5V
Title
[50] TPM, CCD, TP
NGFF WLAN USB LAN Board NGFF 3G HDD Board (P655xᶵᶲẞ) NGFF SSD P65 KB
6-34-P750S-010 6-34-M56AS-011-1 6-34-M56AS-011-1 6-34-T80VS-022 6-34-M56AS-011-1 6-34-T80VS-022 6-36-00380-25C-1 A3
P650RP 6-71-P65P0-D02A D03B

5 4 3 2 1
TPM, CCD, TP B - 51
Schematic Diagrams
Fan, LID, KB LED

5 4 3 2 1
VGA FAN CONTROL-Selector CPU FAN CONTROL

5VS
5VS
FON1# 1
U5
8
LID SWITCH IC
U18 2 FON GND 7 VDD3
2 12 C524 0.1u_16V_Y5V_04 3 VIN GND 6
D
11 0B0 VCC C301 C297 4 VOUT GND 5 R24 100K_04
D
1B0 1 VSET GND
10 A0 3 1u_6.3V_X5R_04 *4.7u_6.3V_X5R_06 NCT3940S-A U2
S0 GND 1 2
VGA_FAN2SEN 5 9
CPU_FAN
CPU_FAN
[43] VCC OUT LID_SW # [13,43]
GND
VGA_FAN1SEN 8 0B1 VCC
1B1 4 5VS_CPU_FAN C57 C48
A1 VGA_FANSEN [43]
7 6 J_FAN1
[43] VGASEN_SEL
3
S1 GND AH9249NTR-G1
0.1u_16V_Y5V_04 *100p_50V_NPO_04
PI5A3158BZAE 1
P/N = 6-03-53158-0J1 C825 2
3
śɥ 10u_6.3V_X5R_06 85204-03001
GND
PSU1, PSU2
śɨ GND GND 3
J_FAN1
[43] CPU_FANSEN 1 2
3
R553 4.7K_04 6-02-09249-LC0
3.3VS 2ND:6-02-08251-LC0
VGA FAN1 CONTROL 6-20-23120-003
1
Sheet 51 of 81 C 5VS
VFAN1ON# 1
2
U68
FON GND
8
7
C
Fan, LID, KB LED C1168 C1172

3
4
VIN
VOUT
VSET
GND
GND
GND
6
5 LED KEY BOARD 5VS L20 . *HCB1608KF-121T30
C648
KB_LED_PW R
1u_6.3V_X5R_04 *4.7u_6.3V_X5R_06 NCT3940S-A 3.3VS P650SE

VGA_FAN1 [43]
VGA_FAN1 GPIO J_LEDKB1
10u_6.3V_X5R_06
5VS_VGA_FAN1 R293 H: W / KB_LED

6 KB_LED_PW R 5VS
J_VFAN1 10K_04 L: W/O KB_LED U29
5 FON-KB 1 8
4 2 FON GND 7
1
3 3 VIN GND 6
C1173 2 KBLED_DET [38] KB_LED_PW R
2 C670 4 VOUT GND 5
3
1 VSET GND
10u_6.3V_X5R_06 85204-03001 R275
50501-0060N-001 0.1u_16V_Y5V_04 NCT3940S-A
*10K_04
VGA_FAN1SEN J_FAN1 6-20-94K30-106 KBLIGHT_ADJ [43]
3
R895 4.7K_04
3.3VS
1
B B
6-20-23120-003
VGA FAN2 CONTROL

5VS U62
VFAN2ON# 1 8
FON GND H55 H19 H44 H24
2 7 H18 H34
VIN GND *H7_5D2_8 *O5_2x4_2d3_2x2_2 *O5_2x4_2d3_2x2_2 *H7_5D2_8
3 6 *H4_2D2_2 *H9_5B6_5D2_8
C1024 C1014 4 VOUT GND 5
VSET GND 6-20-63130-103
1u_6.3V_X5R_04 *4.7u_6.3V_X5R_06 NCT3940S-A
VGA_FAN2 [43]
VGA_FAN2
5VS_VGA_FAN2
J_VFAN2
A 1 A
C1015 2
10u_6.3V_X5R_06
3
88266-03001 VDD3 [5,30,34,37,40,42,43,46,49,54,55,56,57,58,59,60,61,62,63,68] ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
VIN [13,43,49,52,53,54,55,56,57,62,64,65,66,67] Title
VGA_FAN2SEN J_FAN1
3.3VS [3,9,10,11,12,13,14,15,17,30,31,34,36,37,38,39,40,42,43,46,47,48,49,50,52,55,59,64,66,68,70]
3.3V [2,13,17,31,44,45,46,47,50,52,53,55,56,58,59,60,62,70]
[51] FAN, LID, KB LED
3 5VS [13,17,36,48,49,50,52,55,60,61] Size Document Number Rev
3.3VS
R790 4.7K_04
1

5 4 3 2 1
B - 52 Fan, LID, KB LED

Schematic Diagrams
Connector
5 4 3 2 1
3.3VS
Audio Connect
LED BOARD C477
J_LED1
*0.01u_16V_X7R_04
12 LED_ACIN [43]
11 LED_PW R [43]
10 LED_BAT_CHG [43]
9 LED_BAT_FULL [43]
8 LED_NUM# [43]
D NC27 LED_CAP# [43] D
R817 0_04 PS8331_SW [3,13,30,38]
6 LED_SCROLL# [43]
NC15 AIRPLAN_LED# [43]
R816 *0_04
4 LED_HDD# DGPU_PW R_EN [31,38,43,59]
3
2 GND
1 3.3VS
FP225H-012S10M
PCB Footprint = fp225-012g
3.3VS
婳EC PIN24復↢ầSSD
LED≽ἄ䘬㊯䣢炻德忶AP忂䞍BIOS ⛐⏲䞍EC ↢≽ἄ
5
1
LED_HDD# EC_SSD_LED# [43]
4
2
PCH_SATAHDD_LED# [36] PCB Footprint = 88107-30c
U34 5V 5VS 88107-30001 3.3VS 3.3V
3
74AHC1G08GW 5VS_PW R 3VS_PW R

29 30
Sheet 52 of 81
L46 . *HCB1005KF-121T20 L12 *HCB1005KF-121T20
.
. 27 29 30 28 L11 HCB1005KF-121T20
.
L47 HCB1005KF-121T20 25 27 28 26
23 25 26 24
23 24 22 5VS
C 3.3VS
[48] JD_SENSEA
JD_SENSEA
21
19
17
21
19
17
22 20
20 18
18 16
HEADPHONE-R
HEADPHONE-L
HEADPHONE-R [48]
HEADPHONE-L [48]
C
Connector
FP J_FP1
1
30mil L32 30mil
.FCM1005KF-121T03
[48] JD_SENSEB
[48] MIC1_R_M
[48] MIC1_L_M
JD_SENSEB
MIC1_R_M
MIC1_L_M
SPDIFO
15
13
11
9
15
13
11
16 14
14 12
12 10
EC_AUDIO_DET_R
AMP_EN
SMB_CLK AMP_EN [49]
NC1 2 [48] SPDIFO 9 10 8 SMB_CLK [37,50,53]
SIDE_R 7 SMB_DATA
NC2 3 USB_PN7 [35] [48] SIDE_R 7 8 6 SMB_DATA [37,50,53]
SIDE_L 5
4 USB_PP7 [35] C1346 [48] SIDE_L 5 6 4
3
100p_50V_NPO_04 3 4 2 HP_JSGND_EN 1M_04
FP226H-004S10M 1 VIN
EMI 1 2
PCB Footprint = JXT_FP226H-004XXAM
R351
6-20-94A40-004 alway ᶲẞ,close to J_AUDIO2 J_AUDIO2
6-21-41A00-215
AUDG
POWER BTN BOARD CONN from EC [43]

㏕惵3D AMP⮷㜧ᶲ㬌ẞ(J_AUDIO2)
EC_AUDIO_DET R339 0_04 EC_AUDIO_DET_R
3.3VS R342 *0_04
from PCH [34] PCH_HP_PLUG
J_BTN1 J_BTN1
1 1
2 NC1
[55] M_BTN# 3 NC2 4
4
FP226H-004S10M
PCB Footprint = JXT_FP226H-004XXAM
B
6-20-94A40-004 B
HDD BOARD (P655xᶵᶲẞ)

J_SATA2
2 1
4 2 1 3
6 4 3 5
6 5 SATA_TXP3 [36]
8 7
10 8 7 9
[3,9,10,11,12,17,37] SMB_DATA_R 10 9 SATA_TXN3 [36]
[3,9,10,11,12,17,37] SMB_CLK_R 12 11
14 12 11 13
14 13 SATA_RXN3 [36]
5V 40mil 16 15
18 16 15 17
18 17 SATA_RXP3 [36]
5VS 20 19
22 20 19 21
24 22 21 23
24 23 P670RG-M_TPLED [43]
26 25
28 26 25 27 5V
30 28 27 29
30 29 3.3VS
[2,13,17,31,44,45,46,47,50,53,55,56,58,59,60,62,70] 3.3V
50185-03041-001 C755
[3,9,10,11,12,13,14,15,17,30,31,34,36,37,38,39,40,42,43,46,47,48,49,50,51,55,59,64,66,68,70] 3.3VS
PCB Footprint = 50185-0304X [17,45,48,53,55,58,59,62,63,64,65,66,67,71,73] 5V
A *10u_6.3V_X5R_06 A
6-21-C1420-215 [13,17,36,48,49,50,51,55,60,61] 5VS
[5,30,34,37,40,42,43,46,49,51,54,55,56,57,58,59,60,61,62,63,68] VDD3
[13,43,49,53,54,55,56,57,62,64,65,66,67] VIN
Title
[52] CONNECTOR
A3 P650RP 6-71-P65P0-D02A D03B

5 4 3 2 1
Connector B - 53
Schematic Diagrams
DDR 1.2V / 0.6VS

5 4 3 2 1
DDR4 PD19
PQ35
2A VIN
5V A C MDU1516
D
ULTRASO-8 PC218 PC215 PC216
1.2V/0.6VS PU16
G5616BRZ1U *RB0540S2 G 0.1u_50V_Y5V_06 4.7u_25V_X5R_08 4.7u_25V_X5R_08
VTT_MEM(0.675V)
S
VDDQ_R
DEFAULT SHORT
PC231 10u_6.3V_X5R_06 19
VLDOIN VBST
18
PC236
VDDQ_VBST
0.1u_10V_X7R_04
R1033
1.2V
D
2 1
2A VTT_MEM_R 20 17 VDDQ_DRVH
0_04
VDDQ_R
13A D
VTT_MEM VTT DRVH DEFAULT SHORT

PL18
PJ60 2mm BCIHP0730-1R0M PJ61
PC223 VDDQ_L
PC213 PR320 1 16 1 2 1 2
VTTGND LL VDDQ
*15mil_short PCB Footprint = BCIHP0735A
22u_6.3V_X5R_08 *10u_6.3V_X5R_06 8mm
VTT_SNS 2 15 VDDQ_DRVL + PC251 PC86
11/17 VTTSNS DRVL PQ37 C1352
C
PD20 CSOD140SH
330uF_2V_5*4.2
0.1u_10V_X7R_04
MDU1512 EMI
3 14 ULTRASO-8 *2200p_50V_X7R_04
D
GND PGND PR348
6.19K_1%_06
PR334 560K_1%_04 VTT_TON 9 13 VDDQ_CS 5V G R1042
VIN
A
TON CS EMI
S
12 *2.2_1%_06
PC219 0.1u_10V_X7R_04 VTT_REF 4 PVCC5 11 VDDQ_VCC5 PR347 2_06
VTTREF VCC5
PC242 PC243
10
PGOOD
1u_6.3V_X5R_04
1u_6.3V_X5R_04
3.3V
VDDQ_SNS 5 8 VDDQ_S5
Sheet 53 of 81 VDDQSET 6
VDDQSNS S5
7
PR337
PR321
*15mil_short
VDDQSET S3 47K_04
DDR 1.2V / 0.6VS
GND
PR400 *0_04
C VDDQ_PW RGD [56] C
21
PR329 8.06K_1%_04
R925 47K_04 PR330 4.75K_1%_04

5V
PC229
D
R255 10K_04 VTTEN
D
5V
Q65 Q64 C1238 *100p_50V_NPO_04
R931 100K_04 G 2SK3018S3
D
*0.22u_10V_X5R_04
C1237 G
S
1
Q17 ⮔⹎≈⣏䁢8mil *2SK3018S3
S
PR78 *0_04 VTTEN_R G *0.1u_16V_Y5V_04 Q66 PJ64 3.3V
[15,17,55] SUSB
2SK3018S3 G *CV-40mil
[37,43,56,58] SUSC#
S
PR77 10K_04 2SK3018S3 CV Test
5V
2
S
1
3.3V
C
PJ26 PR401
*CV-40mil
PR79 1K_04 B PQ7 [45,55,73] DD_ON#
[5] DDR_VTT_PG_CTRL 100K_04
BTN3904
2
CV Test
M-SOT23-CBE PR402 VDDQ_PW RGD
E
C476
D
100K_04 PQ45
0.01u_16V_X7R_04
B
ON G 2SK3018S3
B
S
PR403
C
100_04
VDDQ_R B PQ46
BTN3904
E
M-SOT23-CBE
1.35V/1.5V ↯㎃䶂嶗ㇵ暨⮶ℍ
,╖ᶨ暣㸸䓐⍇㛔IC PG
VDDQSET_R PR84 *0_04 VDDQSET
5V 3.3V PR85 暣⡻ὅTABLE

*22K_1%_04
R337 PR94 GPIO DDR Vout

10_04
U22 *100K_04
1
R323 R322 PQ11 LOW 1.2V
1 8 VDDQSET PJ29
VCC OUT *2SK3018S3
2 7 0_04 0_04
BUS_SEL NC PR92 *0_04 G *CV-40mil
3 6 R308 [37] DDR_VOL_SEL
C581 4 GND NC 5
2
S
R1 SDA SCL SMB_CLK [37,50,52] HIGH 1.35V
1u_6.3V_X5R_04 R326 0_04 PR93
A UP1804AMA8 A
10K_04 C565
*10K_04
*1u_6.3V_X5R_04
R316
[37,50,52]
R2
SMB_DATA
0_04
[17,45,48,52,55,58,59,62,63,64,65,66,67,71,73]
[13,43,49,52,54,55,56,57,62,64,65,66,67]
5V
VIN
R319
[7,9,10,11,12,37,58] VDDQ Title
*0_04 [2,13,17,31,44,45,46,47,50,52,55,56,58,59,60,62,70] 3.3V
[9,10,11,12] VTT_MEM
[53 DDR 1.2V/0.6VS
A3 P650RP 6-71-P65P0-D02A D03B

5 4 3 2 1
B - 54 DDR 1.2V / 0.6VS

Schematic Diagrams
VDD3, VDD5
5 4 3 2 1
D D
VREF
PR312 *0_04 PR315 0_04

PC206
1u_10V_Y5V_06
PR86 PR89
EN_3V EN_5V
PC200
130K_1%_04 80.6K_1%_04 PC222
1000p_50V_X7R_04 1000p_50V_X7R_04 VIN
1
PU14
VREG3
EN2
TONSEL
VFB2
VFB1
EN1
VREF
VIN
PC240 PC241
PC73 PC74 PC75 7
VO2 VO1
24 EE PC275
Sheet 54 of 81
*EEEF1E101P
EEEF1E101P
PC250 + +
VDD3_5_POK [56]
0.1u_50V_Y5V_06
SCAR250-1
SCAR250-1
PC201
4.7u_25V_X5R_08
4.7u_25V_X5R_08
4.7u_25V_X5R_08
8 23 PR327 10K_04 0.1u_50V_Y5V_06
VDD3 1u_10V_X7R_06
9
LDO3 POK
22 PC226
SYS5V
PQ36
MDU1516
0.1u_10V_X7R_04 12 A
VDD5 VDD3, VDD5
D
BOOT2 BOOT1
5
5
5
5
PC202 ULTRASO-8
C 10A PQ32 0.1u_10V_X7R_04 TPS51125ARGER C
MDV1526URH 4 10 21 G
VDD3 SYS3V PL13 UGATE2 UGATE1 PL16 SYS5V VDD5
3
2
1
S
PJ56 BCIHP0730-4R7M C1356 BCIH1040-2R2M PJ62
2 1 2 1 *1000p_50V_X7R_04 11 20 PQ38 1 2
PHASE2 PHASE1 MDU1512
5mm PQ33 ULTRASO-8 C1353 5mm
R1
C
5
5
5
5
PC203
for EMI
EMI MDV1524URH 12 19 *1000p_50V_X7R_04 DEFAULT SHORT
GND PAD
SKIPSEL
C
DEFAULT SHORT PC189 LGATE2 LGATE1 PD8

EMI PC225 PR322
R1
VCLK
LDO5
PD18 4 G *1000p_50V_X7R_04 30.1K_1%_06
GND
EN0
VIN
0.1u_16V_Y5V_04
PC188 PR295
CSOD140SH
3
2
1
S
+
100p_50V_NPO_04
13K_1%_06 EMI FM5822 for EMI
PC234
A
220u_6.3V_6.3*6.3*4.2
R1044
R1043
*5.1_06
13
14
25
15
16
17
18
A
*5.1_06 PC252
+
PR296 EMI
EN_ALL R2 0.1u_16V_Y5V_04
R2
220u_6.3V_6.3*6.3*4.2
PR325 PR326 PR319
PR306 *680K_1%_04 19.1K_1%_06
PR316
20K_1%_06
VREF PR307 0_04 0_04 *0_04
PR311 *0_04
Vout=2*(1+R1/R2) VREG5
2.2_06
PR299 *0_04 Vout=2*(1+R1/R2)
=2*(1+13K/20K)
=3.3 VIN1
VREG5 =2*(1+30.1K/18.7K)
PD7
PC217
PC211 =5.219
B C A 1u_10V_X7R_06 B
VIN
4.7u_25V_X5R_08
RB751V-40(lision)
EE
PR91 *0_04 EN_3V
VREG5
EN_3V5V
Qpxfs!po!WEE40WEE6 PR90 0_04 EN_5V
QXN PR362
AC_IN VDD5 ᶵᶲẞ
6
10K_04 D
PQ10A
DD_ON_EN_VDD 2 G
PQ10B 3 S MTDK3S6R
D 1
MTDK3S6R
1
PR366
5 G PJ66
[43,44,55] DD_ON S *CV-40mil
100K_04
4
2
D
G
[43,44,55] USB_CHARGE_EN
A PQ39 A
S
2SK3018S3
D
[37,43,55,56] EC_SLP_SUS#
PQ31
G DMFWP!DP/!!ᙔϺႝတ
[56] VREG5
S
*2SK3018S3 Title
[5,30,34,37,40,42,43,46,49,51,55,56,57,58,59,60,61,62,63,68] VDD3
[44,55,56] VDD5
[54] VDD3,VDD5
[55] VIN1 Size Document Number Rev
[13,43,49,52,53,55,56,57,62,64,65,66,67] VIN A3 P650RP 6-71-P65P0-D02A D03B
5 4 3 2 1
VDD3, VDD5 B - 55
Schematic Diagrams
5V, 5VS, 3.3V, 3.3VS, 3.3VA

1 2 3 4 5
VIN1
U31
VIN VA VIN1 R408 10K_04 1 8 R416 100K_04 DD_ON
VA VA VIN1
R412 1_1%_06 2 7 R419 *100K_04
VIN VIN DD_ON_LATCH USB_CHARGE_EN [43,44,54]
C675 C685 C694
R420 10K_04 3 6 R423 10K_04 VDD3
[52] M_BTN# M_BTN# PWR_SW#
0.1u_50V_Y5V_06 0.1u_50V_Y5V_06 0.1u_50V_Y5V_06
R428 *100K_04 4 5 R427 1K_1%_04
INSTANT-ON GND PW R_SW # [43]
USB_CHARGE_EN R424 1K_1%_04 P2808B0
Clost to P2808B0
VDD3
A A
C1097 U63 G5016
3.3VA 0.1u_16V_Y5V_04 1
2 IN1
IN1
IN2
IN2
6
7
VDD3 VDD3 3.3VA 3A 13

14 OUT1 OUT2
8
9
C1035 OUT1 OUT2
12 10
PR81 PR80 VDD3 0.1u_16V_Y5V_04 CT1 CT2
VBIAS
R718
GND
GND
EN1
EN2
10K_04 10K_04 100_04 C1036
220p_50V_NPO_04
DD_ON# SUSB R742
DD_ON# [45,53,73] SUSB [15,17,53]
15
11
5
100K_04
6
PQ9 PQ8 Q54A D
R779
G 2SK3018S3 PC71 G 2SK3018S3 PC70 2G 10K_04
[43,44,54] DD_ON [13,37,42,43,44,49,56,69] SUSB# S 3.3VA_ON
MTDK3S6R VDD3
1
[37,43,54,56] EC_SLP_SUS#
S
*0.1u_16V_Y5V_04 *0.1u_16V_Y5V_04
3
PR83 PR82 Q54B D C1098 C1096
Sheet 55 of 81 100K_04 100K_04 3.3VA_ON 5G

MTDK3S6R S
VDD3 R778 *10K_04 0.1u_10V_X7R_04
1u_6.3V_X5R_04
4
5V, 5VS, 3.3V, B B
3.3VS, 3.3VA VDD5 VDD5

C618 U26 G5016 C641
0.1u_16V_Y5V_04 1 6 0.1u_16V_Y5V_04
5V
5V 6A
2
13
IN1
IN1
IN2
IN2
7
8 6A
5VS 5VS
14 OUT1 OUT2 9
C621 OUT1 OUT2 C644
R912 12 10 R324
0.1u_16V_Y5V_04 CT1 CT2 0.1u_16V_Y5V_04
*100_04 *100_04
VBIAS
GND
GND
EN1
EN2
C631 C636
220p_50V_NPO_04 470p_50V_X7R_04 Q20
D
Q63 PR110 10K_04 VDD3_R 1 2 2 1 VDD3_R *2SK3018S3
VDD3
15
11
5
DD_ON# G *2SK3018S3 PJ33 *CV-40mil PJ31*CV-40mil G SUSB
DEFAULT SHORT R364 R350 DEFAULT SHORT
S
S
10K_04 10K_04
DD_ON 1 2 DD_ON_EN SUSB#_EN 2 1 SUSB#
VDD5
PJ32 1mm C629 C632 C608 PJ30 1mm
EMI EMI 1u_6.3V_X5R_04
*0.1u_10V_X7R_04 *0.1u_10V_X7R_04
VIN VIN VIN ON
VIN SUSB#_EN [58]
C C
ON
C75 C1273 C399 VDD3 VDD3
C9
C537 U19 G5016 C499
1000p_50V_X7R_04
0.01u_50V_X7R_04
0.01u_50V_X7R_04
1000p_50V_X7R_04
0.1u_16V_Y5V_04 1 6 0.1u_16V_Y5V_04
6A
2 IN1
IN1
IN2
IN2
7
6A
3.3VS
3.3V 3.3V
C531
13
14 OUT1
OUT1
OUT2
OUT2
8
9
C516
3.3VS
12 10 VDD3
0.1u_16V_Y5V_04 CT1 CT2 0.1u_16V_Y5V_04 R265
VBIAS
R303 *100_04
GND
GND
EN1
EN2
*100_04 C525 C523
220p_50V_NPO_04 330p_50V_NPO_04 R244
*100K_04
15
11
6
D Q18A
D
Q19
R297 G2
DD_ON# G *2SK3018S3 10K_04 S *MTDK5S6R
1
DD_ON_EN 3.3VS_ON R282 10K_04 SUSB#_EN
VDD3
S
3
D Q18B
C530 C504 C500
1u_6.3V_X5R_04 G5 3.3VS_ON
*0.1u_10V_X7R_04 *0.1u_10V_X7R_04 S *MTDK5S6R
4
D D
[5,34,35,36,37,38,40,42] 3.3VA
[13,43,49,52,53,54,56,57,62,64,65,66,67] VIN
Title
[54] VIN1
[57] VA
[44,54,56]
[5,30,34,37,40,42,43,46,49,51,54,56,57,58,59,60,61,62,63,68]
VDD5
VDD3
[55] 5V,5VS,3.3V,3.3VS,3.3VA
[17,45,48,52,53,58,59,62,63,64,65,66,67,71,73] 5V Size Document Number Rev
[13,17,36,48,49,50,51,52,60,61]
[2,13,17,31,44,45,46,47,50,52,53,56,58,59,60,62,70]
5VS
3.3V A3 P650RP 6-71-P65P0-D02A D03B
[3,9,10,11,12,13,14,15,17,30,31,34,36,37,38,39,40,42,43,46,47,48,49,50,51,52,59,64,66,68,70] 3.3VS Date: Tuesday, July 19, 2016 Sheet 55 of 82
1 2 3 4 5
B - 56 5V, 5VS, 3.3V, 3.3VS, 3.3VA

Schematic Diagrams
Power 1.0V, VCCIO

1 2 3 4 5
EE For CV test VIN
VDD3
PR67 100K_04
PJ22
1 2
*CV-40mil
PR72 820K_1%_06
VDD1.0
PC60 15u_25V_SMD-B2 PC59 PC58
1 2 VDD1.0_EN 6-11-15612-8B0 PC57
[54] VDD3_5_POK 6-11-15612-8B1 +
PJ23 *1mm PU4
4.7u_25V_X5R_08
4.7u_25V_X5R_08
0.1u_50V_Y5V_06
15u_25V_SMD-B2
*TEPSLB21E156M8R
PC176
PR68 PC174
0_06 0.1u_10V_X7R_04
A 15 13 A
*0.01u_16V_X7R_04 EN_PSV BST
1 2
2
3
4
[37,43,54,55]
VTT_SELECT EC_SLP_SUS#
VTT VR Output Voltages
PJ50 1mm G5602_5V 16
TON DH
12
1 PL10
V1.0A 10A VDD1.0
low 1.1 V DEFAULT SHORT
BCIHP0730-3R3M
high (V1.1S_VTT) 1.05 V PR74 1 11 9 2 1 1 2
VOUT LX
6-19-41001-73J
2.2_04 8 PJ21 6mm
2 10 PR268 4.99K_1%_04
VCC ILIM C1351
*1000p_50V_X7R_04
5
6
7
PC55 PC56
3 9
C
G5602_5V EMI
VFB VDD for EMI *470u_2V_SMD-V 470u_2V_SMD-V
PC61 PQ29
PD17
MDU5693 COMMON COMMON
1u_6.3V_X5R_04 4 8 20% 20%
PGOOD DL R1041
2V 2V
AL POLYMER AL POLYMER
CSOD140SH
PC175 *5.1_06
A
3.0A@105C 3.0A@105C
M-SOD123
6 7 EMI 0.009R 0.009R
AGND PGND 17 1u_6.3V_X5R_04 SMD_7343 SMD_7343
PGND
Sheet 56 of 81
NC
NC
5
14
VDD3 PR73 10K_04 G5602R41U
VDD1.0_PW RGD Power 1.0V, VCCIO

B B
3.3V
G5602_5V PR76 36K_1%_04
VREG5 DEFAULT SHORT
20mil 2 1 20mil
PC62 *15p_50V_NPO_04 3.3V
PJ49 1mm R221
VDD5 10K_04
20mil 2 1 20mil ON
PR75 VCCIO_PW RGD
PJ51 *1mm
100K_1%_04 VCCIO_PW RGD [42]
R218
0.75*(1+36K/100K)=1.02 10K_04
D
Q14 C456
VCCIO G
2SK3018S3 *0.01u_16V_X7R_04
S
R190
1
B Q13
NOTE: 100K_04 BTN3904 PJ25
E
C426 M-SOT23-CBE *CV-40mil
1.0V_VCCST Ton need <10ms
2
G5016 TURN-ON TIME=1.21ms VDD1.0 VDD1.0 0.022u_16V_X7R_04
DEFAULT SHORT
C355 G5016 U11 C352
C 2 1 C
1.0V_VCCSFR
0.1u_16V_Y5V_04 6 1 0.1u_16V_Y5V_04
1.0V_VCCST
1mm
2
PJ17
1
1.0V 1A
7
8
IN2
IN2
IN1
IN1
2
13 6A
DEFAULT SHORT
1 2
VCCIO VCCIO
9 OUT2 OUT1 14
1mm PJ18 C366 OUT2 OUT1 C961 PJ20
C357 C358 VDD3
10 12 3mm
0.1u_16V_Y5V_04 CT2 CT1 0.1u_16V_Y5V_04 R131
*22u_6.3V_X5R_08
*22u_6.3V_X5R_08
VDD3
VBIAS
*100_04
GND
GND
R139
EN2
EN1
C367 C368
*100_04 220p_50V_NPO_04 R120
220p_50V_NPO_04
R163 *100K_04
5
11
15
6
D Q10A
*100K_04
6
Q12A D
R124 R119 G2
68K_1%_04 100K_04 S *MTDK5S6R
2G
1
SUSC# VCCIO_EN
*MTDK5S6R S
[37,43,53,58] SUSC#
3
D
1
C339 Q10B
C336
3
Q12B D VDD3
G5 VCCIO_EN
VCCIO_EN [58] S
C342 1u_6.3V_X5R_04 0.1u_10V_X7R_04 *MTDK5S6R
SUSC# 5G
4
S VREG5 [54]
*MTDK5S6R
4
0.1u_10V_X7R_04 VDD1.0 [39,40,58]

VDD3 VCCIO [2,3,7]
VDD3 [5,30,34,37,40,42,43,46,49,51,54,55,57,58,59,60,61,62,63,
VIN [13,43,49,52,53,54,55,57,62,64,65,66,67]
0.1u_10V_X7R_04 C338 VDD5 [44,54,55]
D 1.0V_VCCSFR [7] D
5
DEFAULT SHORT 1.0V_VCCST [5,7,36,37,64,66]

1 5V [17,45,48,52,53,55,58,59,62,63,64,65,66,67,71,73]
VDD1.0_PW RGD VDDQ_PW RGD [53]
1 2 1 2 4 3.3V [2,13,17,31,44,45,46,47,50,52,53,55,58,59,60,62,70]
2
SUSB# [13,37,42,43,44,49,55,69]
PJ12 *CV-40mil PJ14 1mm
U7 ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
3
For CV test 74AHC1G08GW

Title
[56] POWER 1.0V,VCCIO
A3 P650RP 6-71-P65P0-D02A D03B

1 2 3 4 5
Power 1.0V, VCCIO B - 57

Schematic Diagrams
AC_In, Charger
1 2 3 4 5
VA
470K_04
PC103
SMART CHARGER
0.1u_50V_Y5V_06
PR145
VIN
4
A A
1 5 V_BAT
2 6
8 3 7 PR153
7 3 PQ1 8
6 2 EMB20P03V
5 1 PC260 PQ41 20K_04
PC105 EMB20P03V
4
1500p_50V_04
0.1u_50V_Y5V_06
8 1 5
7 3 2 6
6 2 PQ3 3 7
L54 EMI 5 1 EMB20P03V 8
HCB2012KF-800T80
PQ42
PRS5 PRS7
4
J_DC_JACK1 L55 EMI VA EMB20P03V
HCB2012KF-800T80 VA1 6-19-41001-739
8 *0.01_1%_32 *0.01_1%_32
PL19
4
1 PD12 *FMS3004-AS-H
7 3 BCIHP0730-4R7M
2 PRS4 PRS6
3 C1350 PC17 6 2 C A
3
5
PC157 PC154 PR42 5 1
0.01_1%_32 0.01_1%_32
10u_25V_X5R_08
0_04
2DC3003-002211 PR378 PC98 PC99
EMI
C
*470K_04 PD21
0.1u_50V_Y5V_06
0.1u_50V_Y5V_06
PQ20 PR220 2.2_04 PC118
Sheet 57 of 81
0.1u_50V_Y5V_06
SK540SB
1
0_04
EMB20P03V 100K_04 PC19 PC247 PC249 PC248 PC258 PC114 PC116 PC115
PR238
4.7u_25V_X5R_08
4.7u_25V_X5R_08
+ +
+ PR387 PC253 PC117 15u_25V_SMD-B2
PR394
*TEPSLB21E156M8R
*TEPSLB21E156M8R
PC262
10u_25V_X5R_08
10u_25V_X5R_08
4.7u_25V_X5R_08
4.7u_25V_X5R_08
4.7u_25V_X5R_08
6-11-15612-8B0
15u_25V_6.3*4.4
0.1u_50V_Y5V_06
0_04
1500p_50V_04
1000p_50V_X7R_04
15u_25V_SMD-B2 0_04 6-11-15612-8B1
2
A
6-11-15612-8B0 4700p_50V_X7R_04
PR239
AC_In, Charger
6-11-15612-8B1
P/N = 6-20-B3J00-003 PR221

PCB Footprint = TDC-099DHSR2-L-005-J-1 15K_1%_04
PC108 PC109
PR156 PC119
34
14
15
16
17
18
19
24
25
26
20
21
22
23
27
33
PC266 PC265 4700p_50V_X7R_04
B 4700p_50V_X7R_04 B
Battery Voltage:
VSYS
VSYS
VSYS
VSYS
VSYS
VSYS
VSYS
GNDP
GNDP
GNDP
LX
LX
LX
LX
LX
LX
*0_06 4700p_50V_X7R_04 4700p_50V_X7R_04 0.22u_16V_X7R_06
VA PD15
S D A
MDL914S2
C
PR157
VAC ICHP
4 ICHP 12V~16.8V
BST 13 1 ICHM J_BAT1
PQ17 10_06 BST ICHM
PR391 MTE1K0P15KN3 C A VDDP 29 11 PR129 330_04 1
G
VDDP SDA 2
300K_1%_04 PD14 MDL914S2 IACM 32 10 PR128 330_04 SMC_BAT PL3 HCB1005KF-121T20 3
IACM SCL SMD_BAT PL2 HCB1005KF-121T20 4
PU18
C
IACP 31 6 IAC1 5
IACP IAC [43] BAT_DET 6
PD11 PD10 PD13 PD9
PQ40 1.0DX_VCCSTG 7
EMI C1349
G PR125 100K_1%_04 ACAV 9
ACAV 8
SS1040WG
*MMSZ5232BS
*MMSZ5232BS
EMI
PR396 MTN7002ZHS3
PR363
SS1040WG
30 12 50458-00801-002
A
100K_1%_04 VAC PROCHOT#
*51_04 6-21-63900-108
PMON
COMP
GNDA
GNDA
C1348
PSYS
5
FBV
IBSET
EMI C1347
PR126 PC268
D
30p_50V_NPO_04
PC254 PR364 *0_04
H_PROCHOT# [5,64,66] SMC_BAT [43]
PQ44 OZ8685
100K_04
28
35
8
1000p_50V_X7R_04
30p_50V_NPO_04
G PR365 0_04 1u_25V_X5R_06
[43] LOT6_CHG [43] PMOSFET_CONTROL#
2SK3018S3
S
PR377
PR382
PC269 PR371 PR138
PR135
30p_50V_NPO_04
Hi-----Battery in Charge 33_1%_04 V_BAT
Low-----Battery remove no
4.7u_25V_X5R_08
charge EC GPIO PD pin 470K_04 100K_1%_04 SMD_BAT [43]
PC256 PR134
27K_1%_04
PC100 24.9K_1%_04 PR373 10_04
*0_04
TOTAL_CUR [43]
4.7u_6.3V_X5R_06
0.1u_10V_X7R_04
PR139
PC104
PC259
24K_1%_04
47p_50V_NPO_04 1u_25V_X5R_06
GND_SIGNAL BAT DET(BATTERY INTERNAL) :
PR124
C
GND_SIGNAL GND_SIGNAL Option close to EC
2S / 5K / NT1912 C
*0_04 PR146 2S / 10K / NT1908

[64] PSYS *28mil_short-p
3S / 2K
PR379 3S/2800mAH / 4.02K
GND_SIGNAL
VDD3 10K_1%_04 4S / 390
4S/2800mAH /7.15K
PR384
10K_04
AC/BATL# [30]
D
VDD3
2SK3018S3
G PQ43
S
PR367
PQ15 PR375
47K_04
MTE1K0P15KN3 300K_1%_04
V_BAT S D
BAT_VOLT [43]
AC_IN# [43]
C
PD4
C
PR150 PR376 PC263
C A PR122 10K_04 B PQ13
G
VA PD22
100K_04 60.4K_1%_04 0.1u_16V_Y5V_04 *RB0540S2
ZD5245BS2 BTN3904
E
M-SOT23-CBE
PR127
A
D
D02A modify 10K_04
AC_IN
G PQ16
VDD3
2SK3018S3
S
D D
Title
[5,7,58] 1.0DX_VCCSTG
[55] VA
[57] AC_IN,CHARGER
[5,30,34,37,40,42,43,46,49,51,54,55,56,58,59,60,61,62,63,68] VDD3 Size Document Number Rev
[13,43,49,52,53,54,55,56,62,64,65,66,67] VIN

1 2 3 4 5
B - 58 AC_In, Charger
Schematic Diagrams
1.0DX_VCCSTG/VCCSFR_OC/2.5V
5 4 3 2 1
NOTE:
1.0DX_VCCSTG TURN-ON need <65us
M5938 TURN-ON TIME=60us 1.0DX_VCCSTG DEFAULT SHORT
1 2 1.0DX_VCCSTG
VCCSFR_OC DEFAULT SHORT
1 2 VCCSFR_OC
VDD1.0 VDDQ
U56 PJ47 1mm U57 PJ48 1mm
1A 9 8 1A 1A 9 8 1A
C893 C356 VIN VOUT C900 C979 C945 VIN VOUT C967
7 7
10u_6.3V_X5R_06
10u_6.3V_X5R_06
10u_6.3V_X5R_06
10u_6.3V_X5R_06
10u_6.3V_X5R_06
10u_6.3V_X5R_06
VOUT VOUT
D 6 6 D
VOUT VDD3 VOUT R667
R639 VDD3
5 5
VOUT VOUT *100_04
*100_04
M5938BRD1U M5938BRD1U
R636
*100K_04 R693
6
R629 10K_04 Q49A D *100K_04
[56] VCCIO_EN
6
Q50A D
2G
SUSB#_EN R654 *4.7K_04 VCCSTG_EN 2 4 *MTDK5S6R S SUSB#_EN R673 0_04 VCCSFROC_EN 2 4 2G
[55] SUSB#_EN 5V 5V
1
EN VBIAS EN VBIAS *MTDK5S6R S
1
3
R1 Q49B D
R672
3
C882 Q50B D
R652 VCCSTG_EN 5G R1
10K_04 S *10K_04 VCCSFROC_EN
0.22u_10V_X5R_04 *MTDK5S6R 5G
4
C934 C996 *MTDK5S6R S
4
A
A
1u_6.3V_X5R_04
1u_6.3V_X5R_04
D1 D43
D42 D1
RB0540S2 *RB0540S2
Sheet 58 of 81
C
C
1 3 1 3
GATE GND GATE GND
C908
6-15-59381-7B0
C995
6-15-59381-7B0 1.0DX_VCCSTG/
VCCSFR_OC/2.5V
C C1 C1 C
*0.01u_10V_X7R_04 *1 VOUT rising time can be speed up if adding *0.01u_16V_X7R_04 *1 VOUT rising time can be speed up if adding
R1 & D1 network between EN and GATE R1 & D1 network between EN and GATE
*2 VOUT rising time can be slow down if adding *2 VOUT rising time can be slow down if adding
C1 between GATE and GND C1 between GATE and GND
2.5V_LDO
3.3V
3A
PC279
5V
2.5V/3A
PC277 PC278 PR404
10u_6.3V_X5R_06 0.1u_10V_X7R_04 PU19 1u_6.3V_X5R_04
47K_04 G9661-25ADJF11U 天䦣月役PIN6儛 DEFAULT
3 4 V2.5_LDO 2.5V
VIN VCNTL SHORT
3A PJ68
B 2.5V_PG 1
POK VOUT
6 3A 1 2 B
PJ69 PR405 5 *2mm

1 2 2 NC PR406 PC280 PC281 PC282
[37,43,53,56] SUSC# EN
*OPEN_4mil 0_04 8 7
Ra 21.5K_1%_04
82p_50V_NPO_04
0.1u_16V_Y5V_04
22u_6.3V_X5R_08
9 GND VFB
GND
DEFAULT
PC283 PR407
PR408 PJ70 Rb
VDD3 1 2 0.1u_16V_Y5V_04 10K_1%_04
*CV-40mil
100K_04 For CV test
Vout = 0.8V ( 1 + Ra / Rb )
NB671_SIGNAL_GND2
A A
[2,13,17,31,44,45,46,47,50,52,53,55,56,59,60,62,70] 3.3V
[13,43,49,52,53,54,55,56,57,62,64,65,66,67] VIN
[9,10,11,12] 2.5V
[7,9,10,11,12,37,53] VDDQ
[7] VCCSFR_OC Title
[17,45,48,52,53,55,59,62,63,64,65,66,67,71,73] 5V [58]1.0DX_VCCSTG/VCCSFR_OC/2.5V
[5,7,57] 1.0DX_VCCSTG
[39,40,56] VDD1.0 Size Document Number Rev
[5,30,34,37,40,42,43,46,49,51,54,55,56,57,59,60,61,62,63,68] VDD3 A3 P650RP 6-71-P65P0-D02A D03B

5 4 3 2 1
1.0DX_VCCSTG/VCCSFR_OC/2.5V B - 59
Schematic Diagrams
1V8_RUN/AON, NV3V3
1 2 3 4 5 6 7 8
Open VREG Type 0

5V
1V8_AON 1V8_AON
PC2 PC6 2.6Amps @ 1.8V
PR169 PR18
22u_6.3V_X5R_08 10_06 PU2 0.1u_10V_X7R_04 10K_1%_04
3.3V PR171 10K_04
RT8071CZQW
DFN10
GND 1V8_AON
0.200 COMMON
PR19 *160K_04
GND
GND
1V8_AON_PW RGD 9 PGOOD VIN 3
A [31] 1V8_AON_PW RGD A
OpenVReg
PR24 10_04 2 1 DGPU_PW R_EN_R 10 EN/FS PC7 *0.01u_16V_X7R_04 4A PL1 2.4A
3.3V 3A 3A
BOOT/NC 8 0.400 1 2 1 2
*CV-40mil PJ3 BCIHP0412-2R2M
PR23 *0_04 PC11 2 VCC PJ1 PC4 PC3 PC5
[31,38,43,52] DGPU_PW R_EN
3.3VS SW 6 3mm
22u_6.3V_X5R_08
22u_6.3V_X5R_08
0.1u_10V_X7R_04
0.22u_10V_X5R_04 SW 7
PC8 GND 4
5
1 FB GND 5
1 1u_6.3V_X5R_04 THERM 11
4 PR15 *0_04 PR16 0_04
2 GND PC10 *3300p_50V_X7R_04
[36] GPPG8_PCH_1V8AON_EN
U84
SN74LV1T32DCKR GND GND
3
Rt PR20 20K_1%_04
GND VDD3
Vout= Vref * (1+(Rt/Rb)) R486 GND
Rb PR25 10K_1%_04
GND
1.8V= 0.6 * (1+(20K/10K)) 100_04
1V8_RUN DEFAULT SHORT R482
Sheet 59 of 81 1 2 100K_04
6
1V8_RUN Q29A D
1V8_AON
PU3 MTDK3S6R
PJ4 1mm
2G
3A 3A S
1V8_RUN/AON, 9 8
1
C3 C4 VIN VOUT C8
3
Q29B D
B 7 B
10u_6.3V_X5R_06
10u_6.3V_X5R_06
10u_6.3V_X5R_06
VOUT MTDK3S6R
DGPU_PW R_EN_R PR168
NV3V3 VOUT
6
R1
0_04 5G
S
4
5 VDD3
VOUT 100_04
M5938BRD1U
R2
100K_04
6
Q1A D
R484 0_04 1.8V_RUN_EN 2 4 2G

[31] NV_1V8RUN_EN EN VBIAS 5V
MTDK3S6R S
1
R485
3
Q1B D
Default C333 R1 *10K_04
5G
*0.1u_10V_X7R_04
C2 MTDK3S6R S
4
A
1u_6.3V_X5R_04
D34
D1
*RB0540S2
0_04 PR5 1.8V_RUN_EN
C
1 3
GATE GND
C D01A 6-15-59381-7B0 C
C1
C1 DEFAULT SHORT
*0.01u_16V_X7R_04
U55
1 2 NV3V3 NV3V3
PJ46 1mm
3.3V R627 0_04 1A 9 8 1A

C865 C864 VIN VOUT C861
7
10u_6.3V_X5R_06
10u_6.3V_X5R_06
10u_6.3V_X5R_06
VOUT
6
VOUT VDD3
R626
5
VOUT
100_04
M5938BRD1U
R612
[5,30,34,37,40,42,43,46,49,51,54,55,56,57,58,60,61,62,63,68] VDD3
100K_04 [18,29,62] PEX_VDD
6
Q45A D
[17,45,48,52,53,55,58,62,63,64,65,66,67,71,73] 5V
[3,18,27,28,30,31,32,60,61,63] 1V8_AON
2G
NV3V3_EN S [18,19,27,28,31,32] 1V8_RUN
R117 0_04 2 4 5V MTDK3S6R
[31] NV_NV3V3_EN
1
Default EN VBIAS [2,13,17,31,44,45,46,47,50,52,53,55,56,58,60,62,70] 3.3V
[14,17,18,30,31,60,61,62] NV3V3
3
R1 Q45B D
[3,9,10,11,12,13,14,15,17,30,31,34,36,37,38,39,40,42,43,46,47,48,49,50,51,52,55,64,66,68,70] 3.3VS
C877
R634
5G
*10K_04 S
0.01u_10V_X7R_04 MTDK3S6R
4
C878
D 5/23 D02A 㓡0.O1U D
A
1u_6.3V_X5R_04
D1
0_04 R632 NV3V3_EN
D7
*RB0540S2
C
C1
*0.01u_10V_X7R_04 C866 1 3 Title
GATE GND
[59] 1V8_MAIN, 1V8_AON , NV3V3
6-15-59381-7B0 Size Document Number Rev
A3 P650RP 6-71-P65P0-D02A D03B

1 2 3 4 5 6 7 8
B - 60 1V8_RUN/AON, NV3V3
Schematic Diagrams
NVVDD Phase 1 & 2

1 2 3 4 5 6 7 8
PJ6
*CV-40mil
1 2 PR36 4.7K_04 1V8_AON
1V8_AON NVVDD PHASE 1 ~ 2

A PR208 NVVDD FOR N17_VGA A
*0_04
PR217 0_04 NVVDD_EN PR39 10K_04

[30] GPIO0_NVVDD_PWM_VID NV_NVVDD_EN [31,60] Default
PC18
PR38
PR207
100K_04
*1500p_50V_X7R_04
*10K_04
1V8_AON
PR409 *1K_04 3.3V PWR_SRC_NV

PR34 1K_04 1V8_AON
UP9509_VREF PR430
PR35 *0_04
PS1_NVVDD_EN [62] NV_VDD_L *10K_04
PC142 PR223 *0_04 Default
PC22
PC25
PC33
PC31
PC28
GPIO6_NVVDD_PSI# [30] PR429 *0_04
*1500p_50V_04 GPIO29_VRDUTY [30]
PR192
PR431
D
5/30 D02A
PR222 PC156 + *30.1K_1%_04
20.5K_1%_04
PQ53
0.1u_50V_Y5V_06
10u_25V_X5R_08
10u_25V_X5R_08
4.7u_25V_X5R_06
*15u_25V_SMD-B2
PR203 G
UP9509_REFADJ *0_04 *47p_50V_NPO_04
6.19K_1%_04 PC137
*2SK3018S3
S
PR202 0.1u_10V_X7R_04 PR432
D1 1 D1 1 *10K_1%_04
4.32K_1%_04 2 2
PR201 16.5K_1%_04 EMI INS129806926 INS129806872

UGATE1_UPI_9509 PR227 3 G1 MLP08
COMMON
3 G1 MLP08
COMMON
*20mil_short_04 0.6V~1.2V
PR187 PC144 PC147 PR234 S1 4 S1 4 NV_VDD
PR229 PC161 PR233 6 6
PJ43 NVVDD
100K_04 D2 D2 PL7
309_1%_04 *0.01u_50V_X7R_04 4700p_50V_NPO_04 0_04 0.1u_50V_Y5V_06 0_04 8
7
8
7
25A NV_VDD_L
CMMS104T-R22MS
50A DEFAULT SHORT
1 2
PQ24 PQ23
PC23
PC24
PC35
PC29
PC41
PC27
Sheet 60 of 81
CSD87350Q5D CSD87350Q5D *OPEN-10mm
PD3 PR48
PU9 5 G2 5 G2 + + + + +
CSOD140SH
5.1_06
0.1u_10V_X7R_04
330u_2V_12m_V_B
330u_2V_12m_V_B
330u_2V_12m_V_B
330u_2V_12m_V_B
*330u_2V_12m_V_B
B 9 9 B
S2 S2
REFIN
VID
PSI
EN
UGATE1
BOOST1
A
PWR_SRC_NV PR232
NVVDD Phase 1 & 2

UP9509_REFADJ 6 PH1_UPI_9509
24 PC32
REFADJ PHASE1 *10K_1%_04
PC146 *0.01u_50V_X7R_04 UP9509_VREF 8 23 220p_50V_NPO_04
VREF LGATE1 05/18 D02A CHANGE
PR189 0_04 PR200 499K_1%_04 9 22
TON RT8813DGQW PWM3 PWR_SRC_NV
PR199 0_04 UP9509_FBDRTN 10 21 PVCC_UPI_9509 PR235 2.2_04
[32,62] GPU_GND_SENSE FBRTN PVCC 5VS
PR188 100_04 11 20
FB LGATE2
UGATE2
PC34
PC36
PC40
PC38
PC37
PR191 PC145 PC162
PGOOD
BOOT2
ISEN3
ISEN2
ISEN1
*0_04 *33p_50V_NPO_04 12 19
GND
PR183 0_04 COMP PHASE2 1u_6.3V_X5R_04
[32,62] GPU_NVVDD_SENSE +
0.1u_50V_Y5V_06
4.7u_25V_X5R_06
4.7u_25V_X5R_06
4.7u_25V_X5R_06
*15u_25V_SMD-B2
PR182 100_04
25
13
14
15
16
17
18
PR198 0_04
PH2_UPI_9509
NV_VDD 1 2
EMI
UGATE2_UPI_9509
PJ40 *CV-40mil
D1 1 D1 1
PR410 2 2
PR197
*100K_04
*0_04
PR226 INS129807422 INS129807343
UGATE2_UPI_9509 3 G1 MLP08
COMMON
3 G1 MLP08
COMMON
PC153 PC151 *20mil_short_04
PR219 PR49 S1 4 S1 4
*4700p_50V_X7R_04 *1000p_50V_X7R_04 *10K_04 PR230 100K_04 D2 6 D2 6 PL8
PH2_UPI_9509 0_04 8 8 CMMS104T-R22MS
PR224 7 7 25A
PR196 PR212 PR205 *10K_04 PQ26 PQ25
C
PH1_UPI_9509 CSD87350Q5D CSD87350Q5D
*0_04 *15.8K_1%_04 *51K_1%_04 PR228 PC160 PD5 PR50
PR435 PR436 5 G2 5 G2
CSOD140SH
10K_04 1K_04 0_04 0.1u_50V_Y5V_06 5.1_06
5VS S2 9 S2 9
A
PR231
PR211 PC39
*0_04
PR37
*0_04 220p_50V_NPO_04
C 10K_04 C
NV3V3 NVVDD_PWRGD [18,31]
PR415 PR414 PR413 PR416

㓦暣䶂嶗 VDD3
15_1%_06 15_1%_06 15_1%_06 15_1%_06
10u_6.3V_X5R_06 C781
R501
2K_04 PQ47
5
5
5
5
QM3006M3
1
2
3
D
PQ48
2SK3018S3
NV_NVVDD_EN PR216 0_04 G C787
[31,60] NV_NVVDD_EN
*10u_6.3V_X5R_06
S
[5,30,34,37,40,42,43,46,49,51,54,55,56,57,58,59,61,62,63,68] VDD3
D [3,18,27,28,30,31,32,59,61,63] 1V8_AON D
[18,19,27,28,31,32,59] 1V8_RUN
[3,9,10,11,12,13,14,15,17,30,31,34,36,37,38,39,40,42,43,46,47,48,49,50,51,52,55,59,64,66,68,70] 3.3VS
[2,13,17,31,44,45,46,47,50,52,53,55,56,58,59,62,70] 3.3V
[17,45,48,52,53,55,58,59,62,63,64,65,66,67,71,73] 5V
[13,17,36,48,49,50,51,52,55,61] 5VS
[62] PWR_SRC_NV
[26,32] NVVDD
[14,17,18,30,31,59,61,62] NV3V3
Title
[60] NVVDD PHASE 1~3

1 2 3 4 5 6 7 8
NVVDD Phase 1 & 2 B - 61

Schematic Diagrams
NVVDDS
1 2 3 4 5 6 7 8
NVVDDS PHASE 1 and 2

PJ11
*CV-40mil
1 2 PR60 4.7K_04 1V8_AON
1V8_AON
PR58 330K_1%_04 NV_NVVDDS_EN [31]

PR64 Default
*0_04
A
[30] GPIO3_PS_NVVDDS_VID PR63 0_04 NVVDDS_EN NVVDDS FOR N17_VGA A
PC170
PR264
*4700p_50V_X7R_04
*10K_04
PW R_SRC_NVVDDS
PR262 1K_04
UP1666_VREF 1V8_AON
PR261 *0_04
PC173 GPIO20_NVVDDS_PSI [30]
PC49
PC48
PC50
PC51
PC47
1500p_50V_04
PR61
PR254 PC171
+
20.5K_1%_04
0.1u_50V_Y5V_06
4.7u_25V_X5R_08
4.7u_25V_X5R_08
4.7u_25V_X5R_06
*15u_25V_SMD-B2
PR263 *0_04 *47p_50V_NPO_04
UP1666_REFADJ 6.19K_1%_04 PC52
Sheet 61 of 81 PR62
4.32K_1%_04
1u_6.3V_X5R_04
D1 1
2
D1 1
2
PR65 EMI
NVVDDS PR66 PC54
16.5K_1%_04
PC53
UGATE1_UPI_1666 PR250
*20mil_short_04
PR241
3 G1
S1 4
INS129810207
MLP08
COMMON
3 G1
S1
INS130223244
MLP08
COMMON
4 NV_VDDS
0.6V~1.2V
6 6
PJ44 NVVDDS
B
PR248 PC166 PR244 100K_04 D2 D2 PL9 B
309_1%_04 *0.01u_50V_X7R_04 4700p_50V_NPO_04 0_04 0.1u_50V_Y5V_06 0_04 8 8 CMMS104T-R22MS DEFAULT SHORT
PW R_SRC_NVVDDS
7 7 19A 19A 1 2
PQ28 PQ27
PC164
PC43
PC42
PC45
CSD87350Q5D *CSD87350Q5D *OPEN-10mm
PD16 PR54
PR57 499K_1%_04 PU10 5 G2 5 G2 + + +
CSOD140SH
5.1_06
0.1u_10V_X7R_04
330u_2V_12m_V_B
330u_2V_12m_V_B
330u_2V_12m_V_B
S2 9 S2 9
UGATE1
BOOST1
REFIN
VID
PSI
EN
A
PR245
PR59 *82K_1%_04 UP1666_REFADJ 6 20 LX1_UPI_1666 PC46
REFADJ PHASE1 *0_04
PC172 *0.01u_50V_X7R_04 UP1666_VREF 8 19 220p_50V_NPO_04
VREF LGATE1
UP1666_VREF PR259 *0_04 PR260 *51K_1%_04 9
FS/OC RT8816A
PR257 0_04 UP1666_FBDRTN 10 18 PVCC_UPI_1666 PR246 2.2_04
[32] GPU_GNDS_SENSE FBDRTN PVCC 5VS
PR428
PR56 100_04 11 17
FB LGATE2
UGATE2
PGOOD
PR256 PC169 PC165
BOOT2
*0_04
*0_04 *33p_50V_NPO_04 12 16
GND
PR258 0_04 COMP PHASE2 1u_6.3V_X5R_04
[32] GPU_VDDS_SENSE
PR418 PR420 PR417 PR419
PR255 100_04 VDD3
21
13
14
15
NV_VDDS 15_1%_06 15_1%_06 15_1%_06 15_1%_06
1 2 PR253
PJ45 *CV-40mil 1K_1%_04
PR251
R602
C *0_04 C
C828 2K_04
5
5
5
5
10u_6.3V_X5R_06
PC168 PC167 PQ49
4
QM3006M3
*4700p_50V_X7R_04 *1000p_50V_X7R_04
1
2
3
D
PQ50
2SK3018S3
PR252 PR249 PR247
PR266 0_04 G C858
PR242 [31] NV_NVVDDS_EN_CTL
*0_04 *15.8K_1%_04 *51K_1%_04 *10u_6.3V_X5R_06
S
180K_1%_04
PR243
*0_04
NV3V3 R64 10K_04 PR55 0_04 NVVDDS_PW RGD [31]
D D
[62] PW R_SRC_NVVDDS
[5,30,34,37,40,42,43,46,49,51,54,55,56,57,58,59,60,62,63,68] VDD3
[3,18,27,28,30,31,32,59,60,63]
[18,19,27,28,31,32,59]
1V8_AON
1V8_RUN ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
[3,9,10,11,12,13,14,15,17,30,31,34,36,37,38,39,40,42,43,46,47,48,49,50,51,52,55,59,64,66,68,70] 3.3VS
Title
[2,13,17,31,44,45,46,47,50,52,53,55,56,58,59,60,62,70]
[17,45,48,52,53,55,58,59,62,63,64,65,66,67,71,73]
3.3V
5V [61] NVVDDS
[14,17,18,30,31,59,60,62] NV3V3
[13,17,36,48,49,50,51,52,55,60] 5VS
[26,32] NVVDDS A3 P650RP 6-71-P65P0-D02A D03B

1 2 3 4 5 6 7 8
B - 62 NVVDDS
Schematic Diagrams
PEX_VDD
1 2 3 4 5 6 7 8
5V
Open VREG Type 0 PEX_VDD
PC132 PC131
2.6Amps @ 1.0V
PR11 PR22
22u_6.3V_X5R_08 10_06 PU7 0.1u_10V_X7R_04 10K_1%_04
RT8071CZQW
GND DFN10
PR167 10K_04 0.200 COMMON

PR21 *160K_04 PEX_VDD
GND
3.3V GND
9 PGOOD VIN 3
[31] PEX_VDD_PWRGD 1.1V
OpenVReg
PR162 10K_04 2 1 PEXVDD_EN 10 EN/FS PC130 *0.01u_16V_X7R_04 4A PL4 2.4A
3.3V PEX_VDD_R 1
A BOOT/NC 8 0.400 1 2 2 A
*CV-40mil PJ38 BCIHP0412-2R2M
PR161 0_04 PC124 2 VCC PJ39 PC127 PC126 PC125
SW 6 3mm
22u_6.3V_X5R_08
22u_6.3V_X5R_08
0.1u_10V_X7R_04
*0.22u_10V_X5R_04 SW 7
PC128 GND 4
1 FB GND 5 PEX_VDD_R
1u_6.3V_X5R_04 THERM 11
PR170 *0_04 PR164 0_04
GND PC129 *3300p_50V_X7R_04
VDD3
GND GND
R607
Rt 100_04
PR165 7.5K_1%_04
NV_PEXVDD_EN [31]
Vout= Vref * (1+(Rt/Rb)) GND R614
Rb PR163 10K_1%_04 Q42A
GND
6
100K_04
PS6_FB_RR_PEXVDD D
1.050V= 0.6 * (1+(7.5K/10K)) MTDK5S6R
PS6_FB_MARGIN_PEXVDD 2G
PR166 *10_1%_04 S
1
Q42B
3
D
MTDK5S6R
Cold boot/Optimus: 1V8_AONĺ1V8_RUNĺNVVDDĺNVVDDS ĺPEX_VDDĺFBVDDQ PEXVDD_EN PR265 0_04 5G
S
GC6 2.1 Exit: 1V8_RUNĺNVVDD_LĺNVVDD_SĺPEX_VDD or 1V8_RUNĺNVVDD_LĺNVVDD_S & PEX_VDD
4
Sheet 62 of 81
PWR_SRC_NV_FB VIN
PC276
*EEEF1E101P
NV3V3
PEX_VDD
+
PU1
0.400 0.400 GND INS128476380 NV3V3
PRS1
B
1V8_AON 10A 4 1 10A
SCAR250-1 QFN16
B
3 2 PWR_SRC_VINP_R PR6 10_1%_04 PWR_SRC_VINP COMMON PR14
1V8_MAIN SMDRL1632L4-R005-FNH 12
PC9
*10K_04
COMMON PC1 VIN1P 4 0.01u_16V_X7R_04
GC6_FB_EN NVVDD 1% 1206 GND
PR4 665K_1%_04 VS GND
10u_6.3V_X5R_06 SCL 6 PR7 *0_04

VR Complex NVVDDS 11 VIN1N SDA 7
PWR_SRC_VINN_R PR2 10_1%_04 PWR_SRC_VINN
1V8_MAIN_EN PEX&1.05V A0 5 I2CC_SCL
I2CC_SCL [30,62]
VIN PWR_SRC_NV PWR_SRC_NV_FB
FBVDD/Q I2CC_SDA
I2CC_SDA [30,62]
0.400 PR178 10_1%_04 VIN2P 15
PRS3 VIN2P
1 2 1 4
10A 2 3 PWR_SRC_NV_VINP_R PC139
PJ2 3mm SMDRL1632L4-R005-FNH PWR_SRC_IMON_A0 PR13 10K_04
PR181 665K_1%_04
COMMON GND 10u_6.3V_X5R_06 14 VIN2N
1% 1206
Place resistors close to IC
PWR_SRC_NV_VINN_R PR177 10_1%_04 VIN2N
GPU_PWR_EN GND
PWR_SRC_NVVDDS PWR_SRC_NV_FB
VIN
GPU_EVENT# 0.400 PR52 10_1%_04 VIN3P 2 VIN3P PV 10 PWR_SRC_VALID PR1 *0_04 PS1_NVVDD_EN
PRS2 SNN_TC PS1_NVVDD_EN [60]
1 2 1 4 TC 13
2 3 PWR_SRC_NVS_VINNP_R PC44 16 SNN_VPU
GPU GPU_RST# EC/PCH PJ7 3mm
10A
SMDRL1632L4-R005-FNH
VPU
SYS_PEX_RST_MON# PLATFORM_RST# COMMON

1% 1206
PR53
GND
665K_1%_04 10u_6.3V_X5R_06 1 VIN3N [61] PWR_SRC_NVVDDS
PWR_SRC_NVS_VINN_R [60] PWR_SRC_NV
PR51 10_1%_04 VIN3N
GPU_PEX_RST_HOLD# [63] PWR_SRC_NV_FB
8 WARN [18,29] PEX_VDD
3
GC6 2.1 Control Signals 9 CRIT
GND
PAD 17
[13,43,49,52,53,54,55,56,57,64,65,66,67] VIN
[2,13,17,31,44,45,46,47,50,52,53,55,56,58,59,60,70] 3.3V
1.1V8_MAIN_EN NV3V3
[17,45,48,52,53,55,58,59,63,64,65,66,67,71,73] 5V
2.GC6_FB_EN INA3221AIRGV
[18,19,27,28,31,32,59] 1V8_RUN
PWR_SRC_WARN [14,17,18,30,31,59,60,61] NV3V3
3.GPU_EVENT# PR8 10K_04 PR9 0_04 GND
[5,30,34,37,40,42,43,46,49,51,54,55,56,57,58,59,60,61,63,68] VDD3
C C
4.GPU_PEX_RST_HOLD# PR3 10K_04 PWR_SRC_CRTCAL PR10 0_04 GPIO28_OC_WARN# [30]
5.SYS_PEX_RST_MON#
GPU_PEX_RST# POWER RAIL State in GC6
1V8_AON ON
GPU_PWR_EN 1V8_MAIN OFF

EN PGOOD
(SYSTEM) GC6 2.1 - VR Complex
1V8_AON 1. GPU_PWR_EN PEX&1.05V OFF
2. 1V8_MAIN_EN
1V8_AON 3. GC6_FB_EN NVVDD OFF
DG P.93 note: t1(from 1V8_RUN_EN to PEX_VDD/NVVDD_PG) must NOT exceed 4ms.
NVVDDS OFF
FBVDD/Q ON
N17E POWER ON SEQUENCE POWER OFF SEQUENCE
PGOOD EN PGOOD
net PCH_GPIO Voltage
EN I2CC_SCL
PEX&1.05V DGPU_PWR_EN (GPP_F23) (1V8_AON) [30,62] I2CC_SCL
I2CC_SDA
1V8_MAIN_EN 1V8_MAIN [30,62] I2CC_SDA
GPU GPPG8_PCH_1V8RUN_EN (GPP_G8) (1V8_MAIN) GPU_GND_SENSE
[32,60] GPU_GND_SENSE
GPU_NVVDD_SENSE
EN PGOOD [32,60] GPU_NVVDD_SENSE
D
GPPG9_PCH_NV3V3_EN (GPP_G9) (NV3V3) FBVDDQ_SENSE
D
[32,63] FBVDDQ_SENSE
NVVDD FBVDDQ_SENSE_RTN
[32,63] FBVDDQ_SENSE_RTN
GPPG10_PCH_NVVDD_EN (GPP_G10) (NVVDD)
GPPG11_PCH_NVVDDS_EN (GPP_G11) (NVVDDS)

EN PGOOD GPPG0_PCH_PEXVDD_EN (GPP_G0) (PEX_VDD) Title
[62] PEX_VDD
FBVDD/Q FBVDDQ Size Document Number Rev
GC6_FB_EN Custom P650RP 6-71-P65P0-D02A D03B

1 2 3 4 5 6 7 8
PEX_VDD B - 63
Schematic Diagrams
FBVDDQ
1 2 3 4 5 6 7 8
PAGE22: FBVDDQ, and MXM Mounting Holes
FBVDDQ PHASE 1 and 2

PJ5
*CV-40mil
1 2 PR26 4.7K_04 1V8_AON
A A
FBVDDQ_EN PR27 20K_04 NV_FBVDDQ_EN

NV_FBVDDQ_EN [31] Default FBVDDQ FOR N17_VGA
PC134
0.1u_10V_X7R_04
PR174 1K_04 PWR_SRC_NV_FB

1V8_AON
FBVDDQ_VREF
PC141
PC143
PC12
PC13
PR28 PR12
+
19.6K_1%_04 *0_04
0.1u_50V_Y5V_06
4.7u_25V_X5R_08
4.7u_25V_X5R_08
*15u_25V_SMD-B2
PC136
1u_6.3V_X5R_04 PQ18
QM3004M3
5
5
5
5
PR175 10K_1%_04 0.704V VREFIN
PR176
EMI
UGATE1 4 1.35V
*20mil_short_04 PJ41
1
2
3
PR173 PC133 PC135 PR33 FBVDD FBVDDQ
PR184 PC140 PR194 100K_04
649_04 4700p_50V_NPO_04 0_04 0.1u_25V_X7R_06 0_04 PL5 DEFAULT SHORT
PWR_SRC_NV_FB
6A 1 2 12A 1 2
*0.01u_50V_X7R_04 PQ19 BCIHP0412-R24M
C
5
5
5
5
PC163
PC21
PC30
QM3006M3 *OPEN-10mm
PD1 PR40
PR180 499K_1%_04 PU8 4 + +
CSOD140SH
5.1_06
Sheet 63 of 81
1
2
3
0.1u_10V_X7R_04
330u_2V_12m_V_B
330u_2V_12m_V_B
REFIN
VID
PSI
EN
UGATE1
BOOST1
2
B PR204 B
PR185 *82K_1%_04 6 20 LX1 PC15 PR236 PJ42
REFADJ PHASE1 *0_04 100_04 *CV-40mil
PC138 *0.01u_50V_X7R_04 FBVDDQ_VREF 8 19 220p_50V_NPO_04
1
VREF LGATE1
FBVDDQ [32,62] FBVDDQ_SENSE_RTN

FBVDDQ_VREF PR186
PR190
PR193
*0_04 PR179
0_04
100_04
*51K_1%_04
FBDRTN
VDDQFB
9
10
11
FS/OC
FBDRTN
RT8816A
PVCC
18
17
PVCC PR30 2.2_04 5V
PWR_SRC_NV_FB
PR240 0_04 FBVDDQ_SENSE [32,62]

FB LGATE2
UGATE2
PC158
PC159
PC20
PC149
PGOOD
BOOT2
12 16
GND
COMP PHASE2 1u_6.3V_X5R_04
0.1u_50V_Y5V_06
4.7u_25V_X5R_08
4.7u_25V_X5R_08
21
13
14
15
PR237
24.3K_1%_04
EMI PQ22
QM3004M3
5
5
5
5
UGATE2
PR210 4
UGATE2
PC148 PC150 *20mil_short_04
1
2
3
PR43
*4700p_50V_X7R_04 *1000p_50V_X7R_04 PR214 100K_04
PR195 0_04 PL6
6A 1 2
PR209 PR213 220K_1%_04 PQ21 BCIHP0412-R24M
C
5
5
5
5
QM3006M3
*15.8K_1%_04 *51K_1%_04 PR215 PC155 PD2 PR41
4 VDDQFB
CSOD140SH
1V8_AON 0_04 0.1u_25V_X7R_06 5.1_06
1
2
3
A
PR206
PR218 PC16
*0_04
PR421
FBVDD
*0_04 220p_50V_NPO_04
10K_04
C C
DGPU_PWRGD [31]
PR424 PR425 PR422 PR423
VDD3 15_1%_06 15_1%_06 15_1%_06 15_1%_06
R518
C796 2K_04
5
5
5
5
10u_6.3V_X5R_06
PQ52
4 QM3006M3
1
2
3
D
NV_FBVDDQ_EN PR225 0_04 G C794
1V8_AON
1V8_AON PQ51 *10u_6.3V_X5R_06
S
VREFIN VDDQFB
2SK3018S3
Rbot2
PR44 PR31
PR46 10K_1%_04 47K_1%_04
Rbot1
*1K_1%_04
PR29
PR32 20K_1%_04
PR427 *0_04
C
2.2K_1%_04
from NV L = 1.55V B PQ2
C
H = 1.35V PR47
BTN3904
B PQ4 M-SOT23-CBE
[30] GPIO8_MEM_VDD_CTL
BTN3904 E PC14
[5,30,34,37,40,42,43,46,49,51,54,55,56,57,58,59,60,61,62,68] VDD3
PR45 M-SOT23-CBE *0.01u_16V_X7R_04 [18,19,27,28,31,32,59] 1V8_RUN
E
0_04 10K_1%_04 PC26

[3,18,27,28,30,31,32,59,60,61] 1V8_AON
[62] PWR_SRC_NV_FB
D 0.01u_16V_X7R_04 D
[13,43,49,52,53,54,55,56,57,62,64,65,66,67] VIN
GND
[2,13,17,31,44,45,46,47,50,52,53,55,56,58,59,60,62,70] 3.3V
GND
[17,45,48,52,53,55,58,59,62,64,65,66,67,71,73] 5V
GND
GND [19,20,21,22,23,24,25,27,32] FBVDDQ
0105
Vout = Vref * (1 + Rtop / Rbot)
1.55V = 0.704V * (1 + (24.3K/20K))

Title
1.35V = 0.6096V * (1 + 24.3k/20K) [63] FBVDDQ

1 2 3 4 5 6 7 8
B - 64 FBVDDQ
Schematic Diagrams
VCC_Core & VCCSA
8 7 6 5 4 3 2 1
VCORE_PROG
EE 3.3VS
,QWHO6.</$.(,09332:(5&.73+$6( 2+1
CONFIGURATION
3.3VS 5V VIN 1.0V_VCCST
PR343
PR354
13K_1%_04
PR111 1K_1%_04
PR120
PR342 PR116
2.2_06 PR350 PR352 PR351 PC245
100K_04 *1K_1%_04
D 100K_04 1u_6.3V_X5R_04 D
PC237
PC91
1
0.01u_50V_X7R_04
*CV-40mil
PC95 PC88 PU15
100_04 45.3_1%_04 *45.3_1%_04 PUT CLOSE
4.7u_6.3V_X5R_06 TO PWM VCORE_VBOOT/ADDR
DEFAULT SHORT
PJ35
*0.1u_16V_X7R_04 *0.1u_16V_X7R_04
NCP81203PMNTXG 6-02-81203-CQ0 DEFAULT SHORT
6X6 52PIN QFN PR339
9
2
PJ34 1mm PR341
1
3 10_04
VCC
VRMP
SDIO H_CPU_SVIDDAT [5,66] *CV-40mil
1 2 2 5 49.9_1%_04 PJ28
,13,42,43,66] ALL_SYS_PW RGD EN SCLK H_CPU_SVIDCLK [5,66]
4 0_04 PJ27
ALERT# H_CPU_SVIDALRT# [5,66] 1mm
PR340
2
PR115 0_04 6 35
[42] VCORE_PG VRDY DRVON DRVON1 [65]
34
PWM1 PW M11 [65]
50 38 CSN11 VCORE VBOOT
DIFF CSN1 CSN11 [65]
2200p_50V_X7R_04 39 PR298 *100K_1%_04
PR105 PC90 PR331 PC230 48 CSP1 SET AT 0V, PR88 PR87
COMP PR297 SVID
47.5_1%_04 3.01K_1%_04 CSP11 PC205
470p_50V_X7R_04 [65] CSP11 15K_1%_04 21.5K_1%_04
5.1K_1%_04 0.033u_16V_X7R_04 ADDRESS=00h
PR106 1K_1%_04 PC232 33
VCORE PWM2 PW M21 [65]
47p_50V_NPO_04 49 40 CSN21
FB CSN2 CSN21 [65]
41 PR96
CSP2 *100K_1%_04
PR313
Sheet 64 of 81
PR109 CSP21 PC207
[65] CSP21
100_04 5.1K_1%_04 0.033u_16V_X7R_04 VCORE_IMAX
32 5V
PR114 PWM3 42
0_04 51 CSN3 43 PR317 2K_1%_04
C
[6]
[6]
VCC_VCORE_SENSE
VSS_VCORE_SENSE
PR113
0_04
PC92
PR336
1K_1%_04 52
VSP CSP3
VCORE C
VCC_Core &
VSN 31 IMAX SET
PR117
1000p_50V_X7R_04 PC89
4700p_50V_X7R_04
PWM2A
CSN2A
CSP2A
24
23 PR314 2K_1%_04
AT 68A
PR100
53.6K_1%_04
VCCSA
100_04
1
IOUT 45 PR302 102K_1%_06 CSP11
CSSUM PR104 PR101
VCORE PORTION
PC87 47 36K_1%_04 150K_1%_04 PR308 102K_1%_06 CSP21 VCCSA_VBOOTA/ADDRA
PR107 CSCOMP
26.1K_1%_04 VCORE_PROG 10 1 2 PC214
470p_50V_X7R_04 VCORE_VBOOT/ADDR 28 PH/FDm/FDa/SR/DDR 46 PR324 PRT4 *220p_50V_NPO_04
VCORE_IMAX 36 VBOOT/ADDR ILIM 16.2K_1%_04 100k_1%_04_NTC PC82
ICCMAX 1000p_50V_X7R_04 VCCSA VBOOT
CSREF
44 PR294 10_04 CSN11 SET AT 1.05V,
SVID PR98
16 PR95 10_04 CSN21
PR333 PR328 PC224 DIFFA ADDRESS=02h
PC233 52.3K_1%_04
47.5_1%_04 3.01K_1%_04 18
COMPA PC84
470p_50V_X7R_04 2200p_50V_X7R_04
VCCSA
PR332 1K_1%_04 PC228 1000p_50V_X7R_04
47p_50V_NPO_04 17
FBA
PR108
30
100_04 PWM1A PW M1A [65]
26 CSN1A
B CSN1A CSN1A [65] PW M1A B
25 PR309 *100K_1%_04
CSP1A
PR310
PR112 0_04 15 CSP1A PC208
[7] VCCSA_SENSE VSPA [65] CSP1A
PC235 5.1K_1%_04 0.022u_16V_X7R_04
PR345 VCCSA
[7] VSS_SA_SENSE
PR346 0_04 1K_1%_04 14
VSNA CSSUMA
21 PR97 82K_1%_06 CSP1A IMAX SET PR99
36K_1%_04 PR318 AT 11A
1000p_50V_X7R_04 PC239 19 PR103
CSCOMPA 8.66K_1%_04
PR358
150K_1%_04
100_04 4700p_50V_X7R_04 1
PRT2 2
100k_1%_04_NTCPC210 *100p_50V_NPO_04
PR323
20
13 ILIMA PC81 820p_50V_X7R_04
IOUTA 12.7K_1%_04
22 PR102 10_04 CSN1A
PR118 CSREFA
1.0V_VCCST PC246
470p_50V_X7R_04
26.1K_1%_04 PC85
VCCSA_VBOOTA/ADDRA 27
PR357 29 VBOOTA/ADDRA 1000p_50V_X7R_04
PSYS SA PORTION
*1K_04 PR305 10K_1%_04
[57] PSYS [13,43,49,52,53,54,55,56,57,62,65,66,67] VIN
PR344 *100_04 12
[5,57,66] H_PROCHOT# VRHOT [17,45,48,52,53,55,58,59,62,63,65,66,67,71,73] 5V
11
TSENSEA [7,65] VCCSA
ROSC
EPAD
37
TSENSE [3,9,10,11,12,13,14,15,17,30,31,34,36,37,38,39,40,42,43,46,47,48,49,50,51,52,55,59,66,68,70] 3.3VS
[5,7,36,37,56,66] 1.0V_VCCST
PR355
[6,65] VCORE
A PR304 A
8
53
4.12K_1%_04 PUT CLOSE

4.12K_1%_04 PC238
TO VCCSA
1
0.1u_16V_X7R_04 PRT1
HOT SPOT
1
PUT CLOSE PRT3 PC80 PR353

0.1u_16V_X7R_04 BOTTOM PAD PR356 100k_1%_04_NTC
TO VCORE
2
PR303 Work F=
HOT SPOT 100k_1%_04_NTC 20K_1%_04
CONNECT TO 9.31K_1%_04 Title
430Khz [64] VCC_CORE & VCCSA
2
9.31K_1%_04 GND Through

5 VIAs
A3 P650RP 6-71-P65P0-D02A D03B

8 7 6 5 4 3 2 1
VCC_Core & VCCSA B - 65

Schematic Diagrams
VCore Output Stage

8 7 6 5 4 3 2 1
DEFAULT SHORT VCCVIN

5V
VIN
2
PJ52
1
05/25 D02A 㓡10U
VCORE & VCCSA OUTPUT STAGE
1
PC273 PC274 PC221 PC83 PC227 PC77
5mm +
1u_25V_X5R_06
10u_25V_X5R_08
10u_25V_X5R_08
*25TQC15MYFB
EEEF1E101P
*EEEF1E101P
+ +
SCAR250-1
SCAR250-1
2
PR286
2.2_06 PR288
PC76
2.2_06
PU12
D NCP81151MNTBG 0.22u_16V_X7R_06 1 1 D
D1 D1
2 2
1 8 PR289 1_1%_06
BST HG INS118403478 INS118404489
2 PR293 10K_06 3 G1 MLP08

3 G1 MLP08 6-19-41001-043
[64] PW M11 PWM SW 7 COMMON COMMON
PL15
4
3 S1 S1 CMME063T-R15MS0R907
[64,65] DRVON1 EN GND 6
D2 6 D2 6 2 1
VCORE
4 5 PR433 0_06 8 8 PCB Footprint = BCIHP0735A
VCC LG
7 7 0V~1.2V/68A
*20mil_Short-p
PR290 *20mil_Short-p
PAD
PR292
2.2_1%_06
05/23 D02A ADD
PC195
PQ12 PQ34
PC284
2.2u_6.3V_X5R_04 5 G2 CSD87350Q5D 5 G2 CSD87350Q5D
*2200p_50V_X7R_04 PC197
S2 9 S2 9
2200p_50V_X7R_04
PR291
BOTTOM PAD
CONNECT TO
GND Through
4 VIAs [64] CSP11
VCCVIN [64] CSN11
Sheet 65 of 81
1
PC66 PC182 PC65 PC64
+
4.7u_25V_X5R_08
4.7u_25V_X5R_08
1u_25V_X5R_06
VCore Output
5V
*25TQC15MYFB
C C
2
PC187
PR279
Stage PR278
2.2_06
2.2_06
PU11
0.22u_16V_X7R_06
D1 1
NCP81151MNTBG D1 1
2
2
1 8 PR274 1_1%_06 INS118408163
BST HG INS118411338
3 G1 MLP08 6-19-41001-043
2 PR277 10K_06 3 G1 MLP08 COMMON
[64] PW M21 PWM SW 7 COMMON PL12
OS-CON
4
S1 CMME063T-R15MS0R907
4
3 S1
[64,65] DRVON1 EN GND 6 D2 6 2 1
D2 6
8 PCB Footprint = BCIHP0735A
4 5 PR434 0_06 8
VCC LG 7
*20mil_Short-p
*20mil_Short-p
7
PR271
2.2_1%_06
PAD
05/23 D02A ADD PC67 PC72 PC68 PC69
PC186
PQ6 + + + +
PC285
PQ30
5 G2 CSD87350Q5D 6-11-3371C-AB0
2.2u_6.3V_X5R_04 5 G2 CSD87350Q5D
330u_2.5V_V_B
330u_2.5V_V_B
330u_2.5V_V_B
330u_2.5V_V_B
PC178
*2200p_50V_X7R_04 S2 9
S2 9
2200p_50V_X7R_04
PR276
PR275
BOTTOM PAD
CONNECT TO
GND Through
4 VIAs
B B
[64] CSP21
[64] CSN21
DEFAULT SHORT
VIN
PJ53 VSAVIN
1
3mm
2
2A
PC180 PC181
5V
4.7u_25V_X5R_08
4.7u_25V_X5R_08
PC177
PR69
PR270 2.2_06
2.2_06 0.22u_16V_X7R_06
PU5
NCP81151MNTBG
2
3
4
1 8 PR70 1_1%_06 VCCSA

BST HG 1 PL11
2 PR71 10K_06 BCIHP0730-R47M 10A
[64] PW M1A PWM SW 7
9 2 1
3 GND 6
PCB Footprint = BCIHP0735A
[64,65] DRVON1 EN 8 [13,43,49,52,53,54,55,56,57,62,64,66,67] VIN
PC185 PC184 PC183 [6,64] VCORE
PR269
2.2_1%_06
4 5
A VCC LG A
[7,64] VCCSA
PAD
5
6
7
2200p_50V_X7R_04
PC63 [17,45,48,52,53,55,58,59,62,63,64,66,67,71,73] 5V
*22u_6.3V_X5R_06
22u_6.3V_X5R_06
22u_6.3V_X5R_06
PQ5
2.2u_6.3V_X5R_04 MDU5693 PC179
BOTTOM PAD ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/

CONNECT TO Title
GND Through
4 VIAs
[65]VCORE OUTPUT STAGE
[64] CSP1A
[64] CSN1A A3 P650RP 6-71-P65P0-D02A D03B

8 7 6 5 4 3 2 1
B - 66 VCore Output Stage

Schematic Diagrams
VCCGT
8 7 6 5 4 3 2 1
,QWHO6.</$.(,09332:(5&.73+$6(
EE 3.3VS
3.3VS 5V VIN 1.0V_VCCST
PR131
PR133 1K_1%_04
PR149
D PR137 PR152 D
100K_04 *1K_1%_04 2.2_06 PR148 PR140 PR144 PC107
100K_04
1u_6.3V_X5R_04
PC255
PC102
1
*CV-40mil 0.01u_50V_X7R_04 *100_04 *45.3_1%_04 *45.3_1%_04 PUT CLOSE VCCGT_PROG

PC257 PC261 4.7u_6.3V_X5R_06
PU17 TO PWM
PJ36
DEFAULT SHORT *0.1u_16V_X7R_04 0.1u_16V_X7R_04
NCP81203PMNTXG 6-02-81203-CQ0 PR381
9
6X6 52PIN QFN 1+0
2
PJ37 1mm PR372

3 PR374 10_04 CONFIGURATION
VCC
VRMP
1 2 2 SDIO 5 H_CPU_SVIDDAT [5,64]
49.9_1%_04
[5,13,42,43,64] ALL_SYS_PWRGD EN SCLK H_CPU_SVIDCLK [5,64]
4 0_04
ALERT# H_CPU_SVIDALRT# [5,64]
PR136
PR369 0_04 6 35
[42] VCCGT_PG VRDY DRVON DRVON2 [67]
34 19.1K_1%_04
50 PW M1 38 PWM12 [67]
CSN12
DIFF CSN1 CSN12 [67]
39
PR388 PC272 PR158 PR383 *100K_1%_04
PC122 48 CSP1
47.5_1%_04 4.02K_1%_04
COMP CSP12 PR154 PC113
2200p_50V_X7R_04 [67] CSP12
470p_50V_X7R_04 5.1K_1%_04 0.033u_16V_X7R_04
PC267 33 5V
VCCGT PW M2
PR155 1K_1%_04 47p_50V_NPO_04 49 40
FB CSN2 41 PR385 2K_1%_04
CSP2 VCCGT_VBOOT/ADDR
PR399
100_04
PW M3
32
DEFAULT SHORT
Sheet 66 of 81
1
PR389 42
CSN3 *CV-40mil
0_04 51 43 PR392 2K_1%_04 PJ65
[8] VCCGT_SENSE VSP CSP3
VCCGT
PC121 PJ63
1mm
PR398 1000p_50V_X7R_04
2
C 0_04 52 C
[8] VSSGT_SENSE VSN 31
PR390
PC110 PW M2A 24 VCCGT VBOOT
1K_1%_04 CSN2A 23 SET AT 0V,
PR160 PR361 2K_1%_04 PR368 PR360
4700p_50V_X7R_04 CSP2A
100_04 SVID
41.2K_1%_04 49.9K_1%_04
ADDRESS=00h
1
IOUT 45 PR159 68K_1%_06 CSP12
CSSUM
VCORE PORTION PR397 PR395
PC264 47 36K_1%_04 150K_1%_04
PR151 CSCOMP
30.1K_1%_04 VCCGT_PROG 10 1 2 PC111 *220p_50V_NPO_04 VCCGT_IMAX
VCCGT_VBOOT/ADDR 28 PH/FDm/FDa/SR/DDR 46 PR393
470p_50V_X7R_04 PRT6
VCCGT_IMAX 36 VBOOT/ADDR ILIM 8.06K_1%_04
100k_1%_04_NTC
ICCMAX PC120 1000p_50V_X7R_04
44 PR386 10_04 CSN12
CSREF
VCCGT
16 PC112
DIFFA IMAX SET PR141
18 1000p_50V_X7R_04 AT 55A
COMPA 15.8K_1%_04
17 5V
FBA
30
PW M1A 26
CSN1A 25 PR123 2K_1%_04
CSP1A
B B
15
VSPA
14 21
VSNA CSSUMA
19
CSCOMPA
20
13 ILIMA
IOUTA 22
1.0V_VCCST CSREFA
27
29 VBOOTA/ADDRA
PR130 PR370 20K_1%_04
PSYS SA PORTION
*1K_04
PR132 *100_04 12
[5,57,64] H_PROCHOT# VRHOT 11
TSENSEA
ROSC
EPAD
37
TSENSE
PR380
8
53
4.12K_1%_04
1
A PUT CLOSE PRT5 PC106 PR142 A

TO VCORE 0.1u_16V_X7R_04 Work F= [17,45,48,52,53,55,58,59,62,63,64,65,67,71,73] 5V
HOT SPOT
PR147 430Khz 20K_1%_04 BOTTOM PAD [13,43,49,52,53,54,55,56,57,62,64,65,67] VIN
100k_1%_04_NTC [5,7,36,37,56,64] 1.0V_VCCST
CONNECT TO
2
9.31K_1%_04 [3,9,10,11,12,13,14,15,17,30,31,34,36,37,38,39,40,42,43,46,47,48,49,50,51,52,55,59,64,68,70] 3.3VS

GND Through [8,67] VCCGT
5 VIAs
Title
[66] VCCGT

8 7 6 5 4 3 2 1
VCCGT B - 67
Schematic Diagrams
VCCGT Output Stage

8 7 6 5 4 3 2 1
D D
DEFAULT SHORT VGTVIN
VIN
PJ67
2 1
PC123 PC270 PC271
PC192 5mm
5V
*EEEF1E101P
4.7u_25V_X5R_08
1u_25V_X5R_06
+
4.7u_25V_X5R_08
SCAR250-1
PR121
PC97
PR143 2.2_06
0.22u_16V_X7R_06
2.2_06 D1 1
PU6 2
NCP81151MNTBG
PR119 INS118517944
1_1%_06
1 8 3 G1 MLP08
COMMON
BST HG PL17 6-19-41001-043
4
PR359 S1 CMME063T-R15MS0R907
[66] PW M12 2
PWM SW 7 40A
10K_1%_04 D2 6 2 1
VCCGT
8 PCB Footprint = BCIHP0735A
PC79
PC96
PC78
[66] DRVON2 3 GND 6 PC94 PC93
EN 7 PR349
4 5 470u_2V_SMD-V *470u_2V_SMD-V
VCC LG
Sheet 67 of 81
2.2_1%_06 COMMON COMMON
PAD PQ14 20% 20%
22u_6.3V_X5R_08
*22u_6.3V_X5R_08
22u_6.3V_X5R_08
2V 2V
PC101 5 G2 CSD87350Q5D PC244 AL POLYMER AL POLYMER
3.0A@105C 3.0A@105C
VCCGT Output
2.2u_6.3V_X5R_04 S2 9 2200p_50V_X7R_04 0.009R 0.009R
SMD_7343 SMD_7343
C BOTTOM PAD C
CONNECT TO [66] CSP12
Stage GND Through

4 VIAs [66] CSN12
B B
[13,43,49,52,53,54,55,56,57,62,64,65,66] VIN
[8,66] VCCGT
A [17,45,48,52,53,55,58,59,62,63,64,65,66,71,73] 5V A
Title
[67] VCCGT OUTPUT STAGE
A3 P650RP 6-71-P65P0-D02A D03B

8 7 6 5 4 3 2 1
B - 68 VCCGT Output Stage

Schematic Diagrams
LAN RTL8411, Card Reader

1 2 3 4 5 6 7 8
LAN (RTL8411B) Switching Regulator close to PIN48

Ra 2 IN 1 SOCKET
(>20mil)
R950 0_06
KVDD10 㜧ᶲStandard PUSH PUSH CARD READER
La J_CARD1
KRSET R918 2.49K_1%_04 KREGOUT KVDD10
(>20mil) KSD_D2/MS_CLK_R P9
R940 *1K_04 SD_DATA2
KXTAL2 KSD_D3/MS_D3_R P1
R942 10K_04 SD_DATA3
KAVDD33
KAVDD33
R928 1M_04 KXTAL1 KSD_CMD/MS_D2_R P2
KVDD10
R949 *0402_short SD_CMD
A FOR S5 WAKE UP ON LAN P3 A
1 2 SD_VSS1
T109
C
D58
A
RB751S-40C2
PCIE_W AKE# [37,46,69] LDO Mode㗪: La,Ca,Cb ᶵᶲẞ,Raᶲẞ KVCC_CARD P4
4 3 SD_VDD
TO SB PCH WAKE#.
KSD_CD#
KLED_CR
X5 C286-001_25MHZ LAN_W AKEUP# C536 KSD_CLK/MS_D0_R P5
LAN_W AKEUP# [34,43]
KXTAL2
KXTAL1
C1246 SD_CLK
KEECS
PCB Footprint = FSX3M 1/22
C1242 TO EC8587 PIN123 LAN_WAKEUP# 0.1u_16V_Y5V_04 P6
SD_VSS2
10p_50V_NPO_04 KLED1/GPO T112
10p_50V_NPO_04 KLED2 T111 KSD_D0/MS_D1_R P7
SD_DATA0
BIOS pulls high or low to GPO pin, KSD_D1_R P8
48
47
46
45
44
43
42
41
40
39
38
37
U74 Pkease refer to LAN/PHY Disable SD_DATA1 GND1
Application Note. KMS_BS/SD_W P# P10 GND1 GND2
CKXTAL2
CKXTAL1
MS_CD#
SD_CD#
LED0
LED2
LED1/GPO
LV_CEN
HV_GIGA
LED_CR
RSET
LANWAKEB
49 SD_WP GND2 GND3
E_PAD KSD_CD# P11 GND3 GND4
R960 1K_04 SD_C/D GND4
3.3VS
C1262 CM2S-061-H-N
0.1u_16V_Y5V_04 PCB Footprint = SD-10395-001-3
R966 3.3VS
15K_04 6-21-A4450-111
KLAN_MDIP0 1 36 KREGOUT
MDIP0 REG_OUT KREGOUT
KLAN_MDIN0 2 35 Remind that R109 using the
MDIN0 VDDREG KD3V3 main power (S0 power).
3 34 KENSW REG R952
KVDD10
KLAN_MDIP1
KLAN_MDIN1
KLAN_MDIP2
4
5
6
AVDD10
MDIP1
MDIN1
ENSWREG
VDD1
VD33
33
32
31 KISOLATEB
KVDD10
KAVDD33 *10K_04
KSD_CMD/MS_D2 R924
KSD_D0/MS_D1 R916
0_04
0_04
KSD_CMD/MS_D2_R
KSD_D0/MS_D1_R
Sheet 68 of 81
KLAN_MDIN2 7 MDIP2 ISOLATEBPIN 30 KPERSTB R953 *0402_short
B
KVDD10 KLAN_MDIP3
KLAN_MDIN3
8
9
10
MDIN2
AVDD10
MDIP3
RTL8411B
QFN48
PERSTBPIN
CLKREQBPIN
MS_BS/SD_WP#
29
28
27
KCLKREQB
KMS_BS/SD_W P#
KVDD33/18
BUF_PLT_RST# [38,43,46,50,69]
R964 0_04 LAN_CLKREQ# [39] KSD_D1
KSD_D2/MS_CLK R932
R915 0_04 KSD_D1_R
KSD_D2/MS_CLK_R
B
LAN RTL8411, Card
MDIN3 DV33_18 KRTL8411B_HSON 0_04
11 26 C1267 0.1u_10V_X7R_04
KAVDD33
3.3VS 12 HV_GIGA
VDD3
HSON
HSOP
25 KRTL8411B_HSOP C1268 0.1u_10V_X7R_04
capacitors must be close to pin side.

PCIE_RXN5_GLAN
PCIE_RXP5_GLAN
[35]
[35] KSD_CLK/MS_D0 R922 0_04 KSD_CLK/MS_D0_R Reader
SD_CMD/MS_D2
KSD_D3/MS_D3 KSD_D3/MS_D3_R
SD_CLK/MS_D0
SD_D2/MS_CLK
R929 0_04
C1230
SD_D0/MS_D1
SD_D3/MS_D3
崘ℏⰌ.
REFCLK_N
REFCLK_P
CARD_3V3
0.1u_16V_Y5V_04 C1245
Close to chip
PIN12
VDDTX
*5p_50V_NPO_04
SD_D1
GIGA LAN KAVDD33

HSIN
PULL HIGH: SWR Mode

HSIP
KENSW REG R954 *0_04

RTL8411B
13
14
15
16
17
18
19
20
21
22
23
24
R958 *28mil short-p

KSD_CMD/MS_D2
KCARD_3V3 CLK_PCIE_GLAN# [39]

KSD_CLK/MS_D0
KSD_D2/MS_CLK
PULL LOW: LDO Mode

KSD_D0/MS_D1
KSD_D3/MS_D3
CLK_PCIE_GLAN [39]
KEVDD10
PCIE_TXN5_GLAN C1263 0.1u_10V_X7R_04

PCIE_TXP5_GLAN C1253 PCIETXN5 [35]
0.1u_10V_X7R_04
KSD_D1
PCIETXP5 [35]
KCARD_3V3 KVCC_CARD
Near Cardreader CONN
KVDD10 KVDD10 KVDD10 KVDD10 R302 0.2R_5%_06 40 mil 旸檀
KVCC_CARD
C550 C535 C533 C534
C1233 C1232 C1266 C1241 SD Card Remove
0.1u_16V_Y5V_04 0.1u_16V_Y5V_04 2.2u_6.3V_X5R_04 2.2u_6.3V_X5R_04
C 0.1u_16V_Y5V_04 0.1u_16V_Y5V_04 0.1u_16V_Y5V_04 0.1u_16V_Y5V_04
Fall time less than C
PIN3 PIN8 PIN32 PIN46 PIN13 1 ms when SD
card remove.
KVDD33/18 KVDD33/18 Near Cardreader CONN

J_RJ1
C1269 C1264 R616 0_04 KDLMX1+ 1 GND1
*2.2u_6.3V_X5R_04 R617 0_04 KDLMX1- 2 DA+ shield GND2
Pin#27 0.1u_16V_Y5V_04 4 L38 3 KDLMX1- KDLMX2+ 3 DA- shield
Pin#27 KDLMX2- 6 DB+
1 2 KDLMX1+ DB-
L42 *W CM2012F2S-161T03
KEVDD10 R624 0_04 KDLMX3+ 4
KLAN_MDIN0 12 13 KLMX1- R625 0_04 KDLMX3- 5 DC+
R943 0_06 KLAN_MDIP0 11 TD4- MX4- 14 KLMX1+ 4 L41 3 KDLMX2- KDLMX4+ 7 DC-
KVDD10 KLAN_MDIN1 TD4+ MX4+ DD+
9 16 KLMX2- KDLMX4- 8
C1251 C1250 KLAN_MDIP1 8 TD3- MX3- 17 KLMX2+ 1 2 KDLMX2+ DD-
TD3+ MX3+ *W CM2012F2S-161T03 PJS-08SL3B
VDD3 meet rising time 0.1u_16V_Y5V_04 1u_6.3V_X5R_04 R621 0_04 P/N = 6-21-B4000-008
PIN20 PIN20 KLAN_MDIN2 6 19 KLMX3- R622 0_04 PCB Footprint = PJS-08SL3B
>1ms KLAN_MDIP2 5 TD2- MX2- 20 KLMX3+ 4 L40 3 KDLMX3-
KLAN_MDIN3 TD2+ MX2+ [5,30,34,37,40,42,43,46,49,51,54,55,56,57,58,59,60,61,62,63] VDD3
KAVDD33 3 22 KLMX4-
KLAN_MDIP3 TD1- MX1- [2,13,17,31,44,45,46,47,50,52,53,55,56,58,59,60,62,70] 3.3V
2 23 KLMX4+ 1 2 KDLMX3+
TD1+ MX1+ [3,9,10,11,12,13,14,15,17,30,31,34,36,37,38,39,40,42,43,46,47,48,49,50,51,52,55,59,64,66,70] 3.3VS
VDD3 R962 *28mil short-p R963 *28mil short-p *W CM2012F2S-161T03
10 15 R619 0_04
C1231 C1265 C1236 7 TCT4 MCT4 18 R620 0_04
4 TCT3 MCT3 21 4 L39 3 KDLMX4-
D
0.1u_16V_Y5V_04 0.1u_16V_Y5V_04 0.1u_16V_Y5V_04
40 mil 1 TCT2 MCT2 24
D
PIN11 PIN32 PIN48 TCT1 MCT1 1 2 KDLMX4+

NS892402 *W CM2012F2S-161T03
C951
R957
60 mil
*28mil short-p
KD3V3
0.01u_16V_X7R_04 KNMCT_4
KNMCT_3
R112
R113
75_1%_04
75_1%_04
KNMCT_R ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/
KNMCT_2 R115 75_1%_04 C879 Title
LDO Mode KNMCT_1 R114 75_1%_04 [68] LAN RTL8411, Card Reader
MA1206CG-101J-202ER
A3 6-71-P65P0-D02A D02A

1 2 3 4 5 6 7 8
LAN RTL8411, Card Reader B - 69

Schematic Diagrams
AR_TBT
5 4 3 2 1
2/19 X2
NOTE:
XTAL X2 SNK0_DDC_data/clk ?connect to 2k PU only if SRC0 is connected and support HDMI (a.i HDMI or DP++ connector). Otherwise can be 100k PD.
KTBT_XTAL_25_IN SNK1_DDC_data ?connect to 100k PD. If SRC0 support HDMI, connect as SNK0_CFG1 to GPU and/or appropriate AUX/DDC demux control
2 1 SNK1_DDC_clk ?connect to 100k PD.
KTBT_XTAL_25_OUT
3 4 PCIE_TXP1_TBT Y23 V23 KPET0_P C981 0.22u_10V_X5R_04
[35] PCIE_TXP1_TBT PCIE_TXN1_TBT Y22 PCIE_RX0_P PCIE_TX0_P KPET0_N PCIE_RXP1_TBT [35]
V22 C970 0.22u_10V_X5R_04
CPU PCIE RX
FSX3L 25MHZ C942 [35] PCIE_TXN1_TBT PCIE_RX0_N PCIE_TX0_N PCIE_RXN1_TBT [35]
C941
6-07-5R074-1A0 PCIE_TXP2_TBT T23 P23 KPET1_P C922 0.22u_10V_X5R_04
CPU PCIE TX
5p_50V_NPO_04 [35] PCIE_TXP2_TBT PCIE_TXN2_TBT T22 PCIE_RX1_P PCIE_TX1_P KPET1_N PCIE_RXP2_TBT [35]
5p_50V_NPO_04 P22 C936 0.22u_10V_X5R_04
PCIe GEN3
[35] PCIE_TXN2_TBT PCIE_RX1_N PCIE_TX1_N PCIE_RXN2_TBT [35]
PCIE_TXP3_TBT M23 K23 KPET2_P C926 0.22u_10V_X5R_04
[35] PCIE_TXP3_TBT PCIE_TXN3_TBT M22 PCIE_RX2_P PCIE_TX2_P KPET2_N PCIE_RXP3_TBT [35]
K22 C925 0.22u_10V_X5R_04
[35] PCIE_TXN3_TBT PCIE_RX2_N PCIE_TX2_N PCIE_RXN3_TBT [35]
D PCIE_TXP4_TBT H23 F23 KPET3_P C902 0.22u_10V_X5R_04 D
[35] PCIE_TXP4_TBT PCIE_TXN4_TBT H22 PCIE_RX3_P PCIE_TX3_P KPET3_N PCIE_RXP4_TBT [35]
KVCC3V3_FLASH F22 C901 0.22u_10V_X5R_04
AR/PPS COMMON FLASH [35] PCIE_TXN4_TBT PCIE_RX3_N PCIE_TX3_N PCIE_RXN4_TBT [35]
V19 L4 BUF_PLT_RST#_AR
[39] CLK_PCIE_TBT PCIE_REFCLK_100_IN_P PERST_N
T19
[39] CLK_PCIE_TBT# PCIE_REFCLK_100_IN_N PCIe_RBIAS R147
AC5 N16 3.01K_1%_04
R309 R305 C558 R306 R312 [39] TBT_CLKREQ# PCIE_CLKREQ_N PCIE_RBIAS
AB7 R2
0.1u_10V_X7R_04 DPSNK0_ML0_P DPSRC_ML0_P
AC7 R1
3.3K_1%_04
3.3K_1%_04
DPSNK0_ML0_N DPSRC_ML0_N KVCC3V3_SX_SYS
3.3K_1%_04
3.3K_1%_04
AB9 N2 Add昼㺷暣,6/11 Tim
AC9 DPSNK0_ML1_P DPSRC_ML1_P N1
DPSNK0_ML1_N DPSRC_ML1_N U15
5
SOURCE PORT 0
U70
SINK PORT 0
AB11 L2 1
8 5 KTBT_EE_DI DPSNK0_ML2_P DPSRC_ML2_P BUF_PLT_RST#_AR 4
VDD SI AC11 L1
DPSNK0_ML2_N DPSRC_ML2_N 2
2 KTBT_EE_DO BUF_PLT_RST# [38,43,46,50,68]
SO AB13 J2
AC13 DPSNK0_ML3_P DPSRC_ML3_P J1
KTBT_EE_W P_N
3 1KTBT_EE_CS_N
3
DPSNK0_ML3_N DPSRC_ML3_N TC7SZ08FU
WP# CE#
Y11 W19
6KTBT_EE_CLK DPSNK0_AUX_P DPSRC_AUX_P
SCK W11 Y19
Sheet 69 of 81
DPSNK0_AUX_N DPSRC_AUX_N
KTBT_HOLD_N 7 4
HOLD# VSS KOUT2_HPD AA2 G1 KTBT_SRC_HPD
DPSNK0_HPD DPSRC_HPD
W 25Q80DV KTBT_SNK0_DDC_CLK KDPSRC_RBIAS
Y5 N6 R237 14K_1%_04
AR_TBT Modify,3/16 Tim KTBT_SNK0_DDC_DATA
AB15
R4 DPSNK0_DDC_CLK
DPSNK0_DDC_DATA
DPSNK1_ML0_P
DPSRC_RBIAS
GPIO_0
GPIO_1
U1
U2
KTBT_I2C_SDA
KTBT_I2C_SCL
AC15 V1 KTBT_EE_W P_N
C KRTD3_CIO_PW R_EN R238 *10K_04 DPSNK1_ML0_N GPIO_2 C
LC GPIO
KVCC3V3_S0_SYS V2 KTBT_TMU_CLK_OUT R973 check ,1/14
KRTD3_USB_PW R_EN R243 *10K_04 GPIO_3
AB17 W1 KTBT_PCIe_W AKE_N R719 0_04
TBT_CLKREQ# R682 10K_04 DPSNK1_ML1_P GPIO_4 PCIE_W AKE# [37,46,68]
AC17 W2 KTBT_CIO_PLUG_EVENT_N R750 0_04
KTBT_RESET_N R241 *10K_04 DPSNK1_ML1_N GPIO_5 TBCIO_PLUG_EVENT [34]
Y1 KTBT_HDMI_DDC_DATA
Manager
GPIO_6 KTBTA_HPD
Modify,3/18 Tim AB19 Y2 KTBT_HDMI_DDC_CLK KTBTA_HPD [69,71]
Policy
DPSNK1_ML2_P GPIO_7 KTBT_I2C_SDA
CPU /
SINK PORT 1
AC19 AA1 KTBT_SRC_CFG1 KTBT_I2C_SDA [71,72]
DPSNK1_ML2_N GPIO_8 KTBT_I2C_SCL
KTBT_I2C_SDA R735 2.2K_1%_04 J4 KTBTA_I2C_INT KTBT_I2C_SCL [71,72]
KVCC3V3_SX_SYS POC_GPIO_0 KTBTA_I2C_INT
KTBT_I2C_SCL R734 2.2K_1%_04 AB21 E2 KTBTB_I2C_INT KTBTA_I2C_INT [71]
DPSNK1_ML3_P POC_GPIO_1 KTBTB_I2C_INT
POC GPIO
KTBT_PCIe_W AKE_N R224 *10K_04 AC21 D4 KRTD3_USB_PW R_EN KTBTB_I2C_INT [72]
KTBT_CIO_PLUG_EVENT_N R737 10K_04 DPSNK1_ML3_N POC_GPIO_2 H4 KTBT_FORCE_PW R R239 0_04
POC_GPIO_3 TBT_FRC_PW R [34]
KTBT_SLP_S3_N R728 10K_04 follow intel,6/11 Tim Y12 F2 KTBT_BATLOW _N
KTBT_BATLOW _N R731 10K_04 W12 DPSNK1_AUX_P POC_GPIO_4 D2 KTBT_SLP_S3_N R264 *0_04
KTBTA_I2C_INT DPSNK1_AUX_N POC_GPIO_5 KRTD3_CIO_PW R_EN SUSB# [13,37,42,43,44
R839 10K_04 F1
KTBTB_I2C_INT R745 10K_04 KDPSNK1_HPD Y6 POC_GPIO_6 Modify,6/11 Tim
DPSNK1_HPD E1 KTBT_TEST_EN R729 100_04
KTBT_SNK1_DDC_CLK Y8 TEST_EN
DPSNK1_DDC_CLK
Misc
KSINK0_CFG1 N4 AB5 KTBT_TEST_PW G R679 100_04 KVCC3V3_SX_SYS
DPSNK1_DDC_DATA TEST_PWR_GOOD
R173 14K_1%_04 KDPSNK_RBIAS Y18 F4 U16
5
KTBT_HDMI_DDC_DATA R707 100K_04 DPSNK_RBIAS RESET_N KTBT_RESET_N [71]
KTBT_HDMI_DDC_CLK R713 100K_04 1
R231 *10K_04 KTBT_TDI Y4 D22 KTBT_XTAL_25_IN
KTBT_SNK0_DDC_CLK R205 *100K_04 KVCC3V3_LC TDI XTAL_25_IN 4
R233 *10K_04 KTBT_TMS V4 D23 KTBT_XTAL_25_OUT
KTBT_SNK0_DDC_DATA R235 *100K_04 TMS XTAL_25_OUT 2
Add,3/6 Tim R234 *10K_04 KTBT_TCK T4
KTBT_TMU_CLK_OUT R736 100K_04 TCK
R232 *10K_04 KTBT_TDO W4 MISC AB3
KTBT_FORCE_PW R R240 100K_04 TDO EE_DI KTBT_EE_DI [71]
AC4
3
KRTD3_CIO_PW R_EN KTBT_EE_DO [71] TC7SZ08FU
R730 100K_04 +/-0.5% R198 4.75K_0.5%_04 KTBT_RBIAS H6 EE_DO AC3
KRTD3_USB_PW R_EN R242 100K_04 7/30 RBIAS EE_CS_N KTBT_EE_CS_N [71]
KTBT_RSENSE J6 AB4
KDPSNK1_HPD R201 100K_04 RSENSE EE_CLK KTBT_EE_CLK [71] Add昼㺷暣,6/11 Tim
KOUT2_HPD R690 *100K_04
B KTBTA_LSRX A15 B7 B
R700 1M_04 [71] KTBTA_CA2HD_1_P PA_RX1_P PB_RX1_P KTBTB_CA2HD_1_P [72]
KTBTA_LSTX B15 A7
R688 1M_04 [71] KTBTA_CA2HD_1_N PA_RX1_N PB_RX1_N KTBTB_CA2HD_1_N [72]
KTBTA_HPD R829 100K_04
C993 0.22u_10V_X5R_04 KTBTA_TX1_P A17 A9 KTBTB_TX1_P 0.22u_10V_X5R_04 C1321
KTBT_SNK1_DDC_CLK R197 100K_04 [71] KTBTA_HD2CA_1_P PA_TX1_P PB_TX1_P KTBTB_HD2CA_1_P [72]
C986 0.22u_10V_X5R_04 KTBTA_TX1_N B17 B9 KTBTB_TX1_N 0.22u_10V_X5R_04 C1320
KSINK0_CFG1 R236 100K_04 [71] KTBTA_HD2CA_1_N PA_TX1_N PB_TX1_N KTBTB_HD2CA_1_N [72]
TBTB USB TYPE A

KTBTB_LSTX R704 1M_04
C969 0.22u_10V_X5R_04 KTBTA_TX0_P A19 A11 KTBTB_TX0_P 0.22u_10V_X5R_04 C1318
KTBTB_LSRX R689 1M_04 [71] KTBTA_HD2CA_0_P PA_TX0_P PB_TX0_P KTBTB_HD2CA_0_P [72]
TBT USB TYPE C
TBT USB TYPE C

Modify,3/12 Tim C980 0.22u_10V_X5R_04 KTBTA_TX0_N B19 B11 KTBTB_TX0_N 0.22u_10V_X5R_04 C1323
KTBTB_HPD R733 100K_04 [71] KTBTA_HD2CA_0_N PA_TX0_N PB_TX0_N KTBTB_HD2CA_0_N [72]
B21 A13
TBT PORTS
[71] KTBTA_CA2HD_0_P PA_RX0_P PB_RX0_P KTBTB_CA2HD_0_P [72]
A21 B13
NOTE: [71] KTBTA_CA2HD_0_N PA_RX0_N PB_RX0_N KTBTB_CA2HD_0_N [72]
Port A
Port B
DPSRC NOT IS USE:STUFF C400 0.1u_10V_X7R_04 KTBTA_AUX_P Y15 Y16 KTBTB_AUX_P 0.1u_10V_X7R_04 C1322
DPSRC IS USE:NO STUFF. [71] KTBTA_DPSRC_AUX_P KTBTA_AUX_N PA_DPSRC_AUX_P PB_DPSRC_AUX_P KTBTB_AUX_N KTBTB_DPSRC_AUX_P [72]
3/16 Tim C407 0.1u_10V_X7R_04 W15 W16 0.1u_10V_X7R_04 C1319
[71] KTBTA_DPSRC_AUX_N PA_DPSRC_AUX_N PB_DPSRC_AUX_N KTBTB_DPSRC_AUX_N [72]
KTBT_SRC_CFG1 R701 1M_04
E20 E19
[71] KTBTA_USB2_D_P PA_USB2_D_P PB_USB2_D_P KTBTB_USB2_D_P [72]
KTBT_SRC_HPD R732 D20 D19
1M_04 [71] KTBTA_USB2_D_N PA_USB2_D_N PB_USB2_D_N KTBTB_USB2_D_N [72]
A5 B4
[71] KTBTA_LSTX PA_LSTX PB_LSTX KTBTB_LSTX [72]
A4 B5
POC
[71] KTBTA_LSRX KTBTA_HPD PA_LSRX PB_LSRX KTBTB_HPD KTBTB_LSRX [72]
M4 G2
[69,71] KTBTA_HPD PA_DPSRC_HPD PB_DPSRC_HPD KTBTB_HPD [72]
IF SOME OF GPIOs ARE NOT IN USE FOLLOW TABLE BELOW: R159 499_1%_04 KPA_USB2_RBIAS H19 F19 KPB_USB2_RBIAS R160 499_1%_04
GPIO | TERMINATION | Power Rail PA_USB2_RBIAS PB_USB2_RBIAS
---------------------------------------------------- AC23 D6
GPIO_0 | 10K PU | VCC3V3_LC DEBUG PINs: AB23 THERMDA MONDC_SVR
GPIO_1 | 10K PU | VCC3V3_LC THERMDA A23
GPIO_2 | 100K PD | PIN | TERMINATION V18 ATEST_P B23
------------------------------- PCIE_ATEST ATEST_N
GPIO_3 | 100k PD |
A GPIO_4 | 10K PU | VCC3V3_LC MONDC_SVR | GND AC1 DEBUG E18 A
MONDC_DPSNK_0 | GND TEST_EDM USB2_ATEST
GPIO_5 | 10K PU | VCC3V3_LC
GPIO_6 | 100K PD | MONDC_DPSNK_1 | GND L15 W13
N15 FUSE_VQPS_64 MONDC_DPSNK_0
GPIO_7 | 100K PD | MONDC_DPSRC | GND FUSE_VQPS_128 W18
GPIO_8 | 100K PD | MONDC_CIO_0 | GND MONDC_DPSNK_1
MONDC_CIO_1 | GND C23
POC_GPIO_0 | 10K PU | VCC3V3_TBT_SX C22 MONDC_CIO_0 AB2
POC_GPIO_1 | 10K PU | VCC3V3_TBT_SX TEST_EDM | GND NC_C22 MONDC_DPSRC
FUSE_VQPS_64 | GND Title
POC_GPIO_2
POC_GPIO_3
| 100K PD
| 100K PD
|
| FUSE_VQPS_128 | GND [70] KVCC3V3_LC
U59A [69] P650RP AR_TBT 1/5
POC_GPIO_4 | 10K PU | VCC3V3_TBT_SX ATEST_P/N | FLOATING [71,72] KVCC3V3_FLASH
DSL6540
POC_GPIO_5
POC_GPIO_6
| 10K PU
| 100K PD
| VCC3V3_TBT_SX
|
USB2_ATEST
PCIE_ATEST
| FLOATING
[70,71,72]
| FLOATING [70]
KVCC3V3_SX_SYS
KVCC3V3_S0_SYS A3 P650RP 6-71-P65P0-D02A 1.0

5 4 3 2 1
B - 70 AR_TBT
Schematic Diagrams
AR_Power
5 4 3 2 1
KVCC0V9_DP KVCC3V3_LC KVCC3V3_SX_SYS KVCC3V3_S0_SYS
follow intel,6/13 Tim
check CRB schematic ,1/12
30mA C439
KVCC3V3_S0
C449 C443
1045mA
C1048 C1049 C1050 C1047
C451
0.1u_10V_X7R_04 1u_6.3V_X5R_04 1u_6.3V_X5R_04 *1u_6.3V_X5R_04
R13
10u_6.3V_X5R_06 10u_6.3V_X5R_06 10u_6.3V_X5R_06 10u_6.3V_X5R_06
R6
H9
F8
KVCC0V9_DP
700mA L8 A2
VCC3P3_S0
VCC3P3_LC
VCC3P3_SX
VCC3P3A
L11 VCC0P9_DP VCC3P3_SVR A3
L12 VCC0P9_DP VCC3P3_SVR B3
C419 C423 C450 C425 C411 C424 C422 M8 VCC0P9_DP VCC3P3_SVR
VCC0P9_DP
1u_6.3V_X5R_04 1u_6.3V_X5R_04 1u_6.3V_X5R_04 1u_6.3V_X5R_04 1u_6.3V_X5R_04 1u_6.3V_X5R_04 1u_6.3V_X5R_04
T11
T12 VCC0P9_DP L9 KVCC0V9_SVR 1830mA
L6 VCC0P9_DP VCC0P9_SVR M9
D D
M6 VCC0P9_ANA_DPSRC VCC0P9_SVR E12 C428 C417 C409 C432 C437 C430 C408
V11 VCC0P9_ANA_DPSRC VCC0P9_SVR_ANA E13
V12 VCC0P9_ANA_DPSNK VCC0P9_SVR_ANA F11 1u_6.3V_X5R_04 1u_6.3V_X5R_04 1u_6.3V_X5R_04 1u_6.3V_X5R_04 1u_6.3V_X5R_04 1u_6.3V_X5R_04 1u_6.3V_X5R_04
V13 VCC0P9_ANA_DPSNK VCC0P9_SVR_ANA F12
KVCC0V9_PCIE VCC0P9_ANA_DPSNK VCC0P9_SVR_ANA F13
M13 VCC0P9_SVR_ANA F15
KVCC0V9_USB M15 VCC0P9_PCIE VCC0P9_SVR_ANA J9 Modify Footprint(䇰㛔忚昶),3/9 Tim
VCC0P9_PCIE VCC0P9_SVR_SENSE
220mA M16
L19 VCC0P9_PCIE 1830mA XFL4012-601MEC 㧁姣䵈刚㟮㟮:Share same GND plane with SVR_VSS of AR
N19 VCC0P9_ANA_PCIE_1 C1 KTBT_SVR_IND L43 PCB Footprint = xfl4012-2
C389 C377 L18 VCC0P9_ANA_PCIE_1 SVR_IND C2
KVCC0V9_USB VCC0P9_ANA_PCIE_2 SVR_IND
M18 D1
VCC0P9_ANA_PCIE_2 SVR_IND
1u_6.3V_X5R_04 1u_6.3V_X5R_04 N18
VCC
VCC0P9_ANA_PCIE_2 C1108 C1132 C1094
KVCC0V9_CIO R15 A1
VCC0P9_USB SVR_VSS 47uF_6.3V_X5R_08 47uF_6.3V_X5R_08 47uF_6.3V_X5R_08
R16 B1 Modify,3/13 Tim
VCC0P9_USB SVR_VSS B2
R8 SVR_VSS
R9 VCC0P9_CIO
R11 VCC0P9_CIO
VCC0P9_CIO 55mA
Sheet 70 of 81
KVCC0V9_PCIE R12 F18 KVCC0V9_LVR_OUT
VCC0P9_CIO VCC0P9_LVR H18
VCC0P9_LVR
580mA KVCC3V3_ANA_PCIE L16
KVCC3V3_ANA_USB2 J16 VCC3P3_ANA_PCIE VCC0P9_LVR
J11
H11
C387 C388 C429 C398
VCC3P3_ANA_USB2 VCC0P9_LVR_SENSE
C393
1u_6.3V_X5R_04
C381
1u_6.3V_X5R_04
C410
1u_6.3V_X5R_04
C376
1u_6.3V_X5R_04
C384
1u_6.3V_X5R_04
C385
1u_6.3V_X5R_04
A6
A8
A10
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
V5
V6
V8
10u_6.3V_X5R_06 10u_6.3V_X5R_06 1u_6.3V_X5R_04 1u_6.3V_X5R_04
AR_Power
C A12 VSS_ANA VSS_ANA V9 C
A14 VSS_ANA VSS_ANA V15
A20 VSS_ANA VSS_ANA W5
A22 VSS_ANA VSS_ANA W6
B6 VSS_ANA VSS_ANA W8
KVCC0V9_CIO VSS_ANA VSS_ANA
B8 W9
280mA B10
B12
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
W20
W22
B14 VSS_ANA VSS_ANA W23
C446 C436 C418 VSS_ANA VSS_ANA
B16 Y9
B18 VSS_ANA VSS_ANA Y13
1u_6.3V_X5R_04 1u_6.3V_X5R_04 1u_6.3V_X5R_04 VSS_ANA VSS_ANA
B20 Y20
B22 VSS_ANA VSS_ANA AA22
D8 VSS_ANA VSS_ANA AA23
D9 VSS_ANA VSS_ANA AB6
GND
E8 VSS_ANA VSS_ANA AB20
E9 VSS_ANA VSS_ANA AB22
E11 VSS_ANA VSS_ANA AC6
B E23 VSS_ANA VSS_ANA AC14 B
DEFAULT SHORT VSS_ANA VSS_ANA
F9 AC16
PJ16 VSS_ANA VSS_ANA
Modify circuit, KVCC3V3_SX_SYS F16 AC18
6/11 Tim 2mm VSS_ANA VSS_ANA
F20 AC20
120MIL 1 2 VSS_ANA VSS_ANA
3.3V G22 AC22
G23 VSS_ANA VSS_ANA D5
H1 VSS_ANA VSS E4
R123 0_06 H2 VSS_ANA VSS E5
H12 VSS_ANA VSS E6
H13 VSS_ANA VSS F5
H15 VSS_ANA VSS F6
PJ13 KVCC3V3_S0 L7 KVCC3V3_S0_SYS VSS_ANA VSS
H16 H5
*2mm CPI160809UF-1R0M VSS_ANA VSS
H20 H8
3.3VS
120MIL 1 2 . J5 VSS_ANA VSS J8
J18 VSS_ANA VSS J12
J19 VSS_ANA VSS J13
C344 C341 C340 VSS_ANA VSS
J20 J15
J22 VSS_ANA VSS L13
1u_6.3V_X5R_04 47uF_6.3V_X5R_08 47uF_6.3V_X5R_08 VSS_ANA VSS
J23 M11
K1 VSS_ANA VSS M12
K2 VSS_ANA VSS N8
L5 VSS_ANA VSS N9
L20 VSS_ANA VSS N11
L22 VSS_ANA VSS N12
L23 VSS_ANA VSS N13
M1 VSS_ANA VSS T6
M2 VSS_ANA VSS T8
VSS_ANA VSS [69] KVCC3V3_LC
M5 T9 [69,71,72] KVCC3V3_SX_SYS
M19 VSS_ANA VSS T13
A VSS_ANA VSS [69] KVCC3V3_S0_SYS A
M20 T15 [2,13,17,31,44,45,46,47,50,52,53,55,56,58,59,60,62] 3.3V
N5 VSS_ANA VSS T16
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA
VSS_ANA VSS [3,9,10,11,12,13,14,15,17,30,31,34,36,37,38,39,40,42,43,46,47,48,49,50,51,52,55,59,64,66,68] 3.3VS

N20 T18
N22 VSS_ANA VSS AB1
VSS_ANA VSS
N23 AC2
VSS_ANA VSS
U59B
P1
P2
R5
R18
R19
R20
R22
R23
T1
T2
T5
T20
U22
U23
Title
DSL6540 [70] P650RP AR_Power 2/5
A3 P650RP 6-71-P65P0-D02A 1.0

5 4 3 2 1
AR_Power B - 71
Schematic Diagrams
TPS65982, Type C
5 4 3 2 1
KTBTA_VBUS
KVCC5V0_SYS
80Ohm, 0.01Ohm DCR, 8A Idc
KTBTA_LDO_BMC 3A
L44
HCB2012KF-800T80
5A
KVCC1V8D_TBTA_LDO
KVCC1V8A_TBTA_LDO C1162 C1167 C1183 C1169
C
C1070
22u_6.3V_X5R_06
22u_6.3V_X5R_06 22u_6.3V_X5R_06 22u_6.3V_X5R_06 D44
2/4 Tim 1u_25V_X5R_06
0_04
C1137 C1154 C1085
CSOD140SH
2/4 Tim
0_04
2.2u_6.3V_X5R_04 2.2u_6.3V_X5R_04 2.2u_6.3V_X5R_04
6-21-B4K30-024
A
4/6 DEL D02 J_TYPEC1 Modify Footprint,6/10 Tim
D UCF3T-21S01-0P11 D
Y C825~C828 change to 1u_25V_X5R_06
R860
close to pin,1/14 A1 B12
KVCC3V3_SX_SYS C1138 GND GND
R859
KTBTA_HD2CA_0_P A2 B11 KTBTA_CA2HD_0_P
0.1u_10V_X7R_04 KTBTA_HD2CA_0_N A3 TX0_P RX0_P B10 KTBTA_CA2HD_0_N
KVCC_HV_SYS
TX0_N RX0_N
G
C1007 1u_25V_X5R_06 A4 B9 C374 1u_25V_X5R_06
1u_6.3V_X5R_04
ACE_I2C_SCL2 1 6 KVCC3V3_SX_SYS VBUS VBUS
SMC_VGA_THERM [30,43,49]
C1141
C1191 KTBTA_CC1_J KTBTA_SBU2_J
A5 B8
D
2/4 Tim CC1 SBU2
Q69A 10u_6.3V_X5R_06
5
C1160 Modify net,6/11 Tim
G
*MTDK5S6R KTBTA_USB2_TP_J A6 B7 KTBTA_USB2_BN_J
10u_6.3V_X5R_06 KTBTA_USB2_TN_J USB2_P_T USB2_N_B KTBTA_USB2_BP_J
ACE_I2C_SDA2 4 A7 B6
3 USB2_N_T USB2_P_B
H10
C11
D11
SMD_VGA_THERM [30,43,49]
A11
B11
B10
A10
H1
B1
K1
A2
E1
A6
A7
A8
B7
B9
A9
KTBTA_SBU1_J A8 B5 KTBTA_CC2_J
D
R1002 SBU1 CC2
Q69B F1 Modify net,6/11 Tim
VIN_3V3
PP_5V0
PP_5V0
PP_5V0
PP_5V0
HV_GATE1
HV_GATE2
VDDIO
LDO_1V8D
LDO_BMC
LDO_1V8A
PP_CABLE
PP_HV
PP_HV
PP_HV
PP_HV
SENSEP
SENSEN
*MTDK5S6R I2C_ADDR C1006 1u_25V_X5R_06 A9 B4 C382 1u_25V_X5R_06
0_04 VBUS VBUS
D1 KTBTA_CA2HD_1_N KTBTA_HD2CA_1_N
[69,72] KTBT_I2C_SDA I2C_SDA1 A10 B3
D2 KTBTA_CA2HD_1_P RX1_N TX1_N KTBTA_HD2CA_1_P
[69,72] KTBT_I2C_SCL I2C_SCL1 A11 B2
Sheet 71 of 81
C1 RX1_P TX1_P
[69] KTBTA_I2C_INT I2C_IRQ1Z
A12 B1
4/6 㓡㍍EC 枸䔁 D02 A5 GND GND
[72] ACE_I2C_SDA2 I2C_SDA2 3A 3A
B5
GND1
GND2
GND3
GND4
GND5
GND6
GND7
GND8
[72] ACE_I2C_SCL2 I2C_SCL2
TPS65982, Type C [34] TBTA_ACE_GPIO0

[72] TBTA_I2C_IRQ2Z
R865 *0_04 GPIO_0 B2
C2
B6
I2C_IRQ2Z
GPIO_0
VBUS
VBUS
VBUS
H11
J10
J11
K11
Modify,4/9 Tim
GND1
GND2
GND3
GND4
GND5
GND6
GND7
GND8
R811 *0_04 D10 GPIO_1 VBUS
[34] TBTA_ACE_GPIO2 GPIO_2 C1109
C R781 *0_04 G11 H2 C
[34] TBTA_ACE_GPIO3
[69] KTBTA_HPD
C10
E10
GPIO_3
GPIO_4
GPIO_5
Primary VOUT_3V3
1u_6.3V_X5R_04 KVCC3V3_FLASH
TBTA_ACE_GPIO6 G10 G1
[72] TBTA_ACE_GPIO6 GPIO_7 GPIO_6 LDO_3V3
R892 *0_04 D7
[34,72] TBTA_ACE_GPIO7 GPIO_7
R1004 0_04 H6
[72] TBTB_I2C_IRQ2Z GPIO_8 C1114
[69] KTBT_EE_CLK
A3
SPI_CLK
C_USB_TP
C_USB_TN
K6 KTBTA_USB2_TP
L6 KTBTA_USB2_TN
10u_6.3V_X5R_06 NOTE:
B4
TO AP SPI ROM
[69] KTBT_EE_DI
[69] KTBT_EE_DO
A4
B3
SPI_MOSI
SPI_MISO
PAY ATTENTION SYMBOL
Modify,3/18 Tim
[69] KTBT_EE_CS_N
[69] KTBTA_USB2_D_P
L5
SPI_SS_Z
OF TPS65982 BASED ON DS R0.92
USB_RP_P
[69] KTBTA_USB2_D_N
K5
USB_RP_N C_USB_BP
C_USB_BN
K7 KTBTA_USB2_BP
L7 KTBTA_USB2_BN AND MIGHT BE FUTURE CHANGES.
E2
[72] UART_MOSI UART_TX
F2
[72] UART_MISO UART_RX 2/4 Tim
R827 1M_04 KTBTA_CC1 220p_50V_NPO_04
F4 L9 C1077
G4 SWD_DAT C_CC1 L10 KTBTA_CC2 C1076 220p_50V_NPO_04
SWD_CLK C_CC2
R803 100K_04 KTBTA_CA2HD_1_P
WHEN CONNECT BUSPOWERZ TO GND, [69] KTBTA_CA2HD_1_P KTBTA_CA2HD_1_N
CONNECT ALSO RPD_Gn to C_CCn [69] KTBTA_CA2HD_1_N
R812 *0_04 E11 K9 KTBTA_HD2CA_0_N
[34,72] TBTA_MRESET M_RESET RPD_G1
R1006 100K_04 D6 K10 [69] KTBTA_HD2CA_0_N KTBTA_HD2CA_0_P
HRESET RPD_G2 [69] KTBTA_HD2CA_0_P
KVCC3V3_FLASH
1
E4 KTBTA_DBG_CTL1 R894 10K_04
L4 DEBUG_CTL1 D5 KTBTA_DBG_CTL2 R893 10K_04
TEA10402V15A0
D16
TEA10402V15A0
D15
TEA10402V15A0
D13
TEA10402V15A0
D11
B [69] KTBTA_LSTX LSX_R2P DEBUG_CTL2 B
K4
[69] KTBTA_LSRX LSX_P2R
R746 100K_04 KTBTA_DIG_AUD_P L3
R747 100K_04 KTBTA_DIG_AUD_N K3 DEBUG3 K8 KTBTA_SBU1
2
DEBUG4 C_SBU1
R748 100K_04 KTBTA_DEBUG1 L2 L8 KTBTA_SBU2
R749 100K_04 KTBTA_DEBUG2 K2 DEBUG1 C_SBU2
DEBUG2
Add,3/12 Tim
J1
[69] KTBTA_DPSRC_AUX_P AUX_P
J2 F11 R801 0_04
[69] KTBTA_DPSRC_AUX_N AUX_N RESETZ KTBT_RESET_N [69]
KVCC3V3_FLASH R1007 100K_04 F10

BUSPOWERZ H7 KTBTA_SS KTBTA_CA2HD_0_P
KTBTA_ROSC SS [69] KTBTA_CA2HD_0_P KTBTA_CA2HD_0_N
G2
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
KVCC3V3_FLASH R_OSC [69] KTBTA_CA2HD_0_N
2/4 Tim 7/30 C1106 KTBTA_HD2CA_1_N
[69] KTBTA_HD2CA_1_N KTBTA_HD2CA_1_P
R809 U66
A1
B8
D8
E5
E6
E7
E8
F5
F6
F7
F8
G5
G6
G7
G8
H4
H5
H8
L1
0.22u_10V_X5R_04 [69] KTBTA_HD2CA_1_P
R788 100K_04 KTBTA_DPSRC_AUX_N 15K_0.1%_04 TPS65982ABZQZ
1
0.1% Y
R775 100K_04 KTBTA_DPSRC_AUX_P Modify value,8/6 Tim
TEA10402V15A0
D9
TEA10402V15A0
D10
TEA10402V15A0
D18
TEA10402V15A0
D17
R770 0_04
TI⺢嬘,2/5 Tim
KVCC3V3_SX_SYS
2
R864 *10K_04 GPIO_0 5V KVCC5V0_SYS D45 D46
PJ58 DT1140-04LP-7 DT1140-04LP-7
3mm
R891 *10K_04 GPIO_7
A 1 2 KTBTA_SBU2 KTBTA_SBU2_J KTBTA_USB2_TN KTBTA_USB2_TN_J
A
10 1 10 1
KTBTA_SBU1 9 2 KTBTA_SBU1_J KTBTA_USB2_TP 9 2 KTBTA_USB2_TP_J
R789 10K_04 TBTA_ACE_GPIO6 Add,3/6 Tim DEFAULT KTBTA_CC1
8 3
KTBTA_CC1_J KTBTA_USB2_BN
8 3
KTBTA_USB2_BN_J
7 4 7 4
Add,6/4 Tim
KTBTA_CC2 6 5 KTBTA_CC2_J KTBTA_USB2_BP 6 5 KTBTA_USB2_BP_J
KVCC3V3_SX_SYS
Title
R862 *3.3K_04 ACE_I2C_SDA2

[72] KVCC5V0_SYS
[69,72] KVCC3V3_FLASH
[71] P650RP TPS65982,TYPE C 3/5
R863 *3.3K_04 ACE_I2C_SCL2 Add,3/6 Tim [69,70,72] KVCC3V3_SX_SYS Size Document Number Rev
R861 100K_04 TBTA_I2C_IRQ2Z [17,45,48,52,53,55,58,59,62,63,64,65,66,67,73] 5V A3 P650RP 6-71-P65P0-D02A 1.0

5 4 3 2 1
B - 72 TPS65982, Type C
Schematic Diagrams
TPS65982, Type A
5 4 3 2 1
KTBTA_VBUS2
KVCC5V0_SYS
80Ohm, 0.01Ohm DCR, 8A Idc
3A
L45
HCB2012KF-800T80
5A
C1188 C1187 C1165 C1161
C
22u_6.3V_X5R_06 C1123
TBTB_LDO_BMC 22u_6.3V_X5R_06 22u_6.3V_X5R_06 22u_6.3V_X5R_06 D48
VCC1V8D_TBTB_LDO 1u_25V_X5R_06
0_04
VCC1V8A_TBTB_LDO
2/4 Tim
0_04
CSOD140SH
6-21-B4K30-024
A
2/4 Tim J_TYPEC2
C1155 C1171 C1105
D UCF3T-21S01-0P11 D
Y
R899
2.2u_6.3V_X5R_04 2.2u_6.3V_X5R_04 2.2u_6.3V_X5R_04 close to pin,1/14 A1 B12
C1139 GND GND
R898
KTBTB_HD2CA_0_P A2 B11 KTBTB_CA2HD_0_P
0.1u_10V_X7R_04 KTBTB_HD2CA_0_N A3 TX0_P RX0_P B10 KTBTB_CA2HD_0_N
TX0_N RX0_N
VCC_HV_SYS
KVCC3V3_SX_SYS
C1314 1u_25V_X5R_06 A4 B9 C1315 1u_25V_X5R_06
1u_6.3V_X5R_04
VBUS VBUS
C1133
C1186 KTBTB_CC1_J KTBTB_SBU2_J
A5 B8
2/4 Tim 10u_6.3V_X5R_06 CC1 SBU2
C1182 KTBTB_USB2_TP_J A6 B7 KTBTB_USB2_BN_J
10u_6.3V_X5R_06 KTBTB_USB2_TN_J A7 USB2_P_T USB2_N_B B6 KTBTB_USB2_BP_J
USB2_N_T USB2_P_B
H10
C11
D11
A11
B11
B10
A10
H1
R869 *220K_1%_04
B1
K1
A2
E1
A6
A7
A8
B7
B9
A9
KTBTB_SBU1_J A8 B5 KTBTB_CC2_J
SBU1 CC2
F1
VIN_3V3
PP_5V0
PP_5V0
PP_5V0
PP_5V0
HV_GATE1
HV_GATE2
VDDIO
LDO_1V8A
LDO_1V8D
LDO_BMC
PP_CABLE
SENSEN
PP_HV
PP_HV
PP_HV
PP_HV
SENSEP
I2C_ADDR C1312 1u_25V_X5R_06 A9 B4 C1313 1u_25V_X5R_06
5/16 D02A 㓡ᶵᶲẞ VBUS VBUS
D1 KTBTB_CA2HD_1_N KTBTB_HD2CA_1_N
[69,71] KTBT_I2C_SDA I2C_SDA1 A10 B3
D2 KTBTB_CA2HD_1_P RX1_N TX1_N KTBTB_HD2CA_1_P
[69,71] KTBT_I2C_SCL I2C_SCL1 A11 B2
C1 RX1_P TX1_P
[69] KTBTB_I2C_INT I2C_IRQ1Z
A12 B1
A5 GND GND
[71] ACE_I2C_SDA2 I2C_SDA2 3A 3A
B5
Sheet 72 of 81
GND1
GND2
GND3
GND4
GND5
GND6
GND7
GND8
[71] ACE_I2C_SCL2 I2C_SCL2
B6 H11
[71] TBTB_I2C_IRQ2Z I2C_IRQ2Z VBUS J10
R883 0_04 GPIO_0_B B2 VBUS J11
[37] TBTB_ACE_GPIO0 GPIO_0 VBUS Modify,4/9 Tim
C2 K11
TPS65982, Type A
GND1
GND2
GND3
GND4
GND5
GND6
GND7
GND8
D10 GPIO_1 VBUS
GPIO_2 C1113
G11 H2
C
RESERVED,3/6 Tim
[69] KTBTB_HPD
C10
E10
GPIO_3
GPIO_4
GPIO_5
secondary VOUT_3V3
1u_6.3V_X5R_04
VCC3V3_TBTB_LDO C
G10 G1
[71] TBTA_ACE_GPIO6 GPIO_7_B GPIO_6 LDO_3V3
R908 *0_04 D7
[34,71] TBTA_ACE_GPIO7 GPIO_7
R1003 0_04 H6
[71] TBTA_I2C_IRQ2Z GPIO_8 C1144
R1008 100K_04 A3
SPI_CLK
C_USB_TP
C_USB_TN
K6 KTBTB_USB2_TP
L6 KTBTB_USB2_TN
10u_6.3V_X5R_06 NOTE:
R1009 100K_04 B4
VCC3V3_TBTB_LDO R1010
R1011
100K_04
3.3K_1%_04
A4
B3
SPI_MOSI
SPI_MISO
PAY ATTENTION SYMBOL
[69] KTBTB_USB2_D_P
L5
SPI_SS_Z
OF TPS65982 BASED ON DS R0.92
USB_RP_P
[69] KTBTB_USB2_D_N
K5
USB_RP_N C_USB_BP
C_USB_BN
K7 KTBTB_USB2_BP
L7 KTBTB_USB2_BN AND MIGHT BE FUTURE CHANGES.
E2
[71] UART_MISO UART_TX
F2
[71] UART_MOSI UART_RX 2/4 Tim
R854 1M_04 KTBTB_CC1 220p_50V_NPO_04
F4 L9 C1317
2/5 Tim G4 SWD_DAT C_CC1 L10 KTBTB_CC2 C1316 220p_50V_NPO_04
SWD_CLK C_CC2 KTBTB_CA2HD_1_P
[69] KTBTB_CA2HD_1_P KTBTB_CA2HD_1_N
[69] KTBTB_CA2HD_1_N
R857 *0_04 TBTB_MRESET E11 K9 KTBTB_HD2CA_0_N
[34,71] TBTA_MRESET M_RESET RPD_G1 [69] KTBTB_HD2CA_0_N KTBTB_HD2CA_0_P
D6 K10
HRESET RPD_G2 [69] KTBTB_HD2CA_0_P
R866 100K_04 WHEN CONNECT BUSPOWERZ TO GND,
VCC3V3_TBTB_LDO
1
R1012 100K_04TBTB_HRESET CONNECT ALSO RPD_Gn to C_CCn
E4 TBTB_DBG_CTL1 R910 10K_04
DEBUG_CTL1
TEA10402V15A0
D66
TEA10402V15A0
D71
TEA10402V15A0
D69
TEA10402V15A0
D68
L4 D5 TBTB_DBG_CTL2 R909 10K_04
[69] KTBTB_LSTX LSX_R2P DEBUG_CTL2
B K4 B
[69] KTBTB_LSRX LSX_P2R
R761 100K_04 TBTB_DIG_AUD_P L3
2
R792 100K_04 TBTB_DIG_AUD_N K3 DEBUG3 K8 KTBTB_SBU1
DEBUG4 C_SBU1
R794 100K_04 TBTB_DEBUG1 L2 L8 KTBTB_SBU2
R793 100K_04 TBTB_DEBUG2 K2 DEBUG1 C_SBU2
DEBUG2
J1
[69] KTBTB_DPSRC_AUX_P AUX_P
J2 F11
[69] KTBTB_DPSRC_AUX_N AUX_N RESETZ
VCC3V3_TBTB_LDO R1025 100K_04 F10 KTBTB_CA2HD_0_P

BUSPOWERZ H7 TBTB_SS [69] KTBTB_CA2HD_0_P
SS KTBTB_CA2HD_0_N
TBTB_ROSC G2 [69] KTBTB_CA2HD_0_N
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
KVCC3V3_FLASH R_OSC
7/30 KTBTB_HD2CA_1_N
2/4 Tim C1086 [69] KTBTB_HD2CA_1_N KTBTB_HD2CA_1_P
R837 U69 [69] KTBTB_HD2CA_1_P
A1
B8
D8
E5
E6
E7
E8
F5
F6
F7
F8
G5
G6
G7
G8
H4
H5
H8
L1
0.22u_10V_X5R_04
R777 100K_04 KTBTB_DPSRC_AUX_N 15K_0.1%_04 TPS65982ABZQZ
1
0.1% Y
R786 100K_04 KTBTB_DPSRC_AUX_P Modify value,8/6 Tim
TEA10402V15A0
D73
TEA10402V15A0
D74
TEA10402V15A0
D70
TEA10402V15A0
D65
R760 0_04
TI⺢嬘,2/5 Tim
2
KVCC3V3_SX_SYS
D72 D67
R875 *10K_04 GPIO_0_B DT1140-04LP-7 DT1140-04LP-7
R907 *10K_04 GPIO_7_B KTBTB_SBU2 KTBTB_SBU2_J KTBTB_USB2_TN KTBTB_USB2_TN_J
A
10 1 10 1 A
KTBTB_SBU1 9 2 KTBTB_SBU1_J KTBTB_USB2_TP 9 2 KTBTB_USB2_TP_J
8 3 8 3
KTBTB_CC1 7 4 KTBTB_CC1_J KTBTB_USB2_BN 7 4 KTBTB_USB2_BN_J
KTBTB_CC2 6 5 KTBTB_CC2_J KTBTB_USB2_BP 6 5 KTBTB_USB2_BP_J
VCC3V3_TBTB_LDO
Title
[71] KVCC5V0_SYS [72] P650RP TPS65982,TYPE A 4/5
[69,71] KVCC3V3_FLASH Size Document Number Rev
R900 100K_04 TBTB_I2C_IRQ2Z [69,70,71] KVCC3V3_SX_SYS
[17,45,48,52,53,55,58,59,62,63,64,65,66,67,71,73] 5V
A3 P650RP 6-71-P65P0-D02A 1.0

5 4 3 2 1
TPS65982, Type A B - 73
Schematic Diagrams
USB, Type A
5 4 3 2 1
USB3.0 PORT6 (MBᶲ)
TYPE A 㓡USB3.0
USBVCC3.0_6
D02 3/10 5V
5
VIN
U10
VOUT
1 100 mil
C1311 C1310
2
10u_6.3V_X5R_06 GND 0.1u_16V_Y5V_04
D D
4 3
EN# OC#
R994 *0402_short uP7549UMA5-20
[45,53,55] DD_ON#
C1295 22u_6.3V_X5R_08
100 mil C1296 22u_6.3V_X5R_08
USBVCC3.0_6
USB3.0 Max Trace length

J_USB3_3
Follow Design Guide
Sheet 73 of 81 TXP6_J 9
1 SSTX+ SHIELD
GND1
GND3
Standard-A
TXN6_J 8 VBUS SHIELD
D64 USB_PN2_J 2 SSTX-
USB, Type A C
[35] USB_PN2 4 L52 3 USB_PN2_CON
USB_PP2_CON
10
9
1
2
USB_PN2_J
USB_PP2_J
USB_PP2_J
RXP6_J
4
3
6
D-
GND
D+
C
1 2 8 3 7 SSRX+ GND4
[35] USB_PP2 GND_D SHIELD
7 4 RXN6_J 5 GND2
*W CM2012F2S-161T03-short SSRX- SHIELD
6 5
DT1140-04LP-7 C19007-90905-L NEW

PCB Footprint = USB-C19005
P/N = 6-21-B4A30-009
D63
10 1 RXN6_J
[38] USB3_RXN6 RXP6_J
9 2
[38] USB3_RXP6
8 3 6-21-B4A30-009
C1298 0.1u_10V_X7R_04 TXN6_C 7 4 TXN6_J
[38] USB3_TXN6 TXP6_C TXP6_J
6 5
C1297 0.1u_10V_X7R_04
[38] USB3_TXP6
DT1140-04LP-7
B B
VDD3 [5,30,34,37,40,42,43,46,49,51,54,55,56,57,58,59,60,61,62,63,68]
5V [17,45,48,52,53,55,58,59,62,63,64,65,66,67,71]
A 3.3V [2,13,17,31,44,45,46,47,50,52,53,55,56,58,59,60,62,70] A
3.3VS [3,9,10,11,12,13,14,15,17,30,31,34,36,37,38,39,40,42,43,46,47,48,49,50,51,52,55,59,64,66,68,70]
Title
[73] TUSB211,USB 3.1 TYPE A 5/5
A3 P650RP 6-71-P65P0-D02A 1.0

5 4 3 2 1
B - 74
Schematic Diagrams
Audio Board_3D AMP

5 4 3 2 1
Ca EC37 *EEFCX0J221YR
+
3D HeadPhone AMP Ra
Rb
ER1
ER38
0_04
*0_04
E3D_HP_L
E_5V
Rc ER4 0_04 Rg
E3D_HP_L ER3 54.9_1%_04 EHEADPHONE-LC
Rd ER5 *0_04
EC34 EC36 EC38 EC31 EC33 E3D_HP_R ER7 54.9_1%_04 EHEADPHONE-RC
Re ER6 *0_04 EAMP_EN +
Rh
2.2u_6.3V_X5R_04
0.1u_16V_Y5V_04
22u_6.3V_X5R_08
*22u_6.3V_X5R_08
Ra,Rc,Rf,Rg,Rh Rb,Rd,Ca,Cb, Ua
Ri
220u_6.3V_SMD-D
EEFCX0J221YR
D ER8 *0_04 D
EHP_JSGND
SV3H612 Mount NC
SV3H615 NC Mount
16
15
14
13
EU3
Re, Ri烉612炻615䘮ᶵᶲẞ
OUTL
VDD
JD
SGND
EC39 0.01u_16V_X7R_04
EHEADPHONE-L E_HP_L ER11 470_04 E_HP_INL 1 12 EC9 0.01u_16V_X7R_04

EC35 2 INL C2_3DL 11 E_AUDG
1u_16V_X7R_06 3 VREF C1_3DL 10 ER41 15_1%_04 EHP_JSGND
REXT PGND E_AUDG
EHEADPHONE-R E_HP_R ER12 470_04 E_HP_INR 4 VSS 9 㬌悐↮劍㚱⮷㜧婳㓦㕤M/B PWR OFF, HP_JSGND=0V
INR C1_SDR RB
C2_3DR
EC10 EC32 0.01u_16V_X7R_04
PWR ON, HP_JSGND=2.5V
OUTA
EC40
EC14
EC15
ER40
1u_16V_X7R_06
SDA
SCL
17
D
EC41 0.01u_16V_X7R_04
VSS QB
SV3H612V EHP_JSGND_EN G
5
6
7
8
EQ2
pin SV3H612 SV3H615 RC MTN7002ZHS3
2200p_50V_X7R_04
2200p_50V_X7R_04
1u_6.3V_X5R_04
D
E_AUDG
S
QA ER37
*240K_04
EHP_SCL ER39 22_1%_04 ESMB_CLK
13 SGND JD EHP_SDA ER16 22_1%_04 ESMB_DATA
EHP_JSGND G 1M_04
EQ3 E_AUDG
S
14
15
JD
VDD
VDD
LS-IN
EC16
EC17
10p_50V_NPO_04
10p_50V_NPO_04
MTN7002ZHS3
Sheet 74 of 81
EGND EGND
Rf E3D_HP_R
Audio Board_3D
ER36 0_04
EGND
SV3H615 ARa ᶲ0ohm (AUDIO/B)
C Cb EC18 *EEFCX0J221YR C
+
SV3H612 QA,QB MTN7002ZHS3, RB,RC 1Mohm
E_AUDG
EHP_SENSE
AMP
D
AQa EQ4
2SK3018S3 G
S
EJ_SPDIF1
1
E_AUDG
EHEADPHONE-LC ER22 0_04 EL6 FCM1005KF-121T03 2
EHEADPHONE-RC ER23 0_04 EL7 FCM1005KF-121T03 3
ARc 4
EC25 EC26 ER46 47K_04 5
ER24 ER25 ER26 ER27 E_5VS
100p_50V_NPO_04 100p_50V_NPO_04 *1K_04 *1K_04 A
ARd ARc E_AUDG B DRIVE
22K_04 22K_04 ESPDIFO EL3 FCM1005KF-121T03 C IC
TX
EC22
6-20-51A40-215 E_AUDG E_AUDG EC21 TOJ-0015STR2-2-H4-PA9T-J
33p_50V_NPO_04
E_AUDG E_AUDG E_AUDG E_AUDG P/N = 6-20-B2820-005
E_5V 50238-0307N-001 E_3.3VS ER42
0.1u_16V_Y5V_04 PCB Footprint = TOJ-001ST-2-H4
220_04
29 30 VENDOR P/N = TOJ-0015STR2-2-H4-PA9T-J
27 29 30 28
25 27 28 26 E_5VS
23 25 26 24 EGND
23 24 EGND
21 22 EGND
19 21 22 20 EHEADPHONE-R
19 20 ARa
EJD_SENSEA 17
17 18
18 EHEADPHONE-L EHP_JSGND ER28 0_04 ARb ER29 *0_04 EHP_SENSE
EJD_SENSEB 15 16
B EMIC1-R 13 15 16 14 EEC_AUDIO_DET B
EMIC1-L 11 13 14 12 EAMP_EN
ESPDIFO 9 11 12 10 ESMB_CLK ER45
ARa ARb ARc, ARd
ESIDE_R 7 9 10 8 ESMB_DATA
ESIDE_L 5 7 8 6
10K_04 SV3H612 0_04 NC NC
3 5 6 4 LO: 3D Headphone SV3H615 NC 0_04 1K_04
NC1
NC2
1 3 4 2 EHP_JSGND_EN
1 2
EGND EJ_MIC1
EJ_AUDIO2
NC1
NC2
5
EMIC_SENSE 4
EGND E_AUDG EJD_SENSEA ER43 20K_1%_04 EMIC_SENSE EMIC1-R EL4 FCM1005KF-121T03 3
ER44 39.2K_1%_04 EHP_SENSE 6
EJD_SENSEB ER21 5.1K_1%_04 ESIDE_SENSE EMIC1-L EL5 FCM1005KF-121T03 2
1
EC23 EC24 JK06006BQ7648
PCB Footprint = 2SJ-T351-018-A
100p_50V_NPO_04 100p_50V_NPO_04 P/N = 6-20-B28L0-006
vendor P/N = 2SJ-T351-018
E_AUDG E_AUDG E_AUDG MAIN 6-20-B28L0-006

SECOND 6-20-B28M0-006
EH5 EH2 EH1 EH4 EH3
*H4_2D2_2 *H4_2D2_2 *H4_2D2_2 *H7_5D2_8 *H7_5D2_8
ESIDE_SENSE
EJ_SIDE1
EHP_PLUG 5
EC27 0.1u_16V_Y5V_04 E_AUDG
A 1ER *0_04 4ER *0_04 4 A
ESIDE_R EL1 FCM1005KF-121T03 3
EC28 0.1u_16V_Y5V_04
6
2ER *0_04 5ER *0_04 ESIDE_L EL2 FCM1005KF-121T03 2 EGND EGND EGND EGND
EC29 0.1u_16V_Y5V_04
1
EC19 EC20 JK06006BQ7648
EC30 0.1u_16V_Y5V_04
3ER *0_04 6ER *0_04 680p_50V_X7R_04 680p_50V_X7R_04 PCB Footprint = 2SJ-T351-018-A
ER47 0_04 E_AUDG E_AUDG P/N = 6-20-B28L0-006
vendor P/N = 2SJ-T351-018 Title
MAIN 6-20-B28L0-006
[74]P650RP AUDIO BOARD_3DAMP_E
SECOND 6-20-B28M0-006 Size Document Number Rev
EGND E_AUDG
A3 P650RP 6-71-P65P8-D12 D02
5 4 3 2 1
Audio Board_3D AMP B - 75

Schematic Diagrams
HDD Board
5 4 3 2 1
HJ_MB1
SATA PORT1 HGND 2
4 2 1
1
3
HGND
6 4 3 5 HSATA_TXP1
HJ_SATA1 6 5
8 7
S1 HSMB_SDA 8 7 HSATA_TXN1
H_SATA_TXP1 10 9
S2 HSMB_SCK 10 9
H_SATA_TXN1 12 11
S3 12 11 HSATA_RXN1
14 13
S4 14 13
H_SATA_RXN1 H_5V 16 15
S5 16 15 HSATA_RXP1
H_SATA_RXP1 18 17
S6 18 17
H_5VS 20 19
S7 20 19
22 21
D H_3.3VS 22 21 D
24 23
26 24 23 25
P1 26 25 H_3.3VS
28 27
P2 28 27
30 29
P3 HC13 HC11 30 29
P4
51049-03041-001
P5 *0.01u_16V_X7R_04 *10u_6.3V_X5R_06
P/N = 6-21-C2420-215
P6
PCB Footprint = 50008-0304X
P7 H_5VS
NC1
NC2
P8
P9
P10
HGND HGND
CONN 1/21 ㎃㕁
P11
P12 HC9 HC10 HC12 + HC8
HGND P13 EEFCX0J221YR
P14 0.1u_16V_Y5V_04 1u_6.3V_X5R_04 10u_6.3V_X5R_06 220u,6.3V,ESR=15mȍ,H=1.9mm
P15
220u_6.3V_SMD-D
51824-0227A-001
P/N = 6-20-437J0-022
PCB Footprint = 50887-0220A-XXX HGND
HGND
Sheet 75 of 81
HDD Board
C C
H_3.3VS
SATA re-driver HGND HR10 *0_04 HR9 *0_04
HC6 HC7 HC5
*0.01u_16V_X7R_04 *0.1u_16V_Y5V_04 *1u_6.3V_X5R_04 HR11

*4.7K_04
PIN6 PIN10 PIN16 Note:
HGND HGND HGND Close to Re-driver IC
10
16
20
Port 1
6
HU1
B 7 B
VCC33
VCC33
VCC33
VCC33
EN HC17 0.01u_16V_X7R_04 H_SATA_TXP1
HSATA_TXP1 HC4 *0.01u_16V_X7R_04 1 15 HTXP1
HSATA_TXN1 HC3 *0.01u_16V_X7R_04 2 AIP AOP 14 HTXN1 HC16 0.01u_16V_X7R_04 H_SATA_TXN1
AIN AON
From PCH HOST DEVICE
HSATA_RXN1 HC2 *0.01u_16V_X7R_04 4 12 HRXN1 HC15 0.01u_16V_X7R_04 H_SATA_RXN1 To Conn.
HSATA_RXP1 HC1 *0.01u_16V_X7R_04 5 BON BIN 11 HRXP1
BOP BIP HC14 0.01u_16V_X7R_04 H_SATA_RXP1
SMB_SCK
SMB_SDA
Note:
Close to Re-driver IC
T-PAD
REXT
DE_B
DE_A
GND
GND
H_3.3VS *ASM1466_new
8
17
21
3
13
18
19
co-lay, place under SN75LVCP601 HR12 *100K_04
HR21 *100K_04 HR15 *100K_04
HSATA_TXP1 HR1 0_04 HR8 0_04 HTXP1 HR16 *100K_04 HR19 *100K_04 H_3.3VS
HR22 *0_04 HSMB_SDA
HSATA_TXN1 HR2 0_04 HR7 0_04 HTXN1 HR13 *0_04 HGND
HR23 *0_04 HSMB_SCK
HR20 *0_04
HSATA_RXN1 HR3 0_04 HR5 0_04 HRXN1
HR14 *0_04
HSATA_RXP1 HR4 0_04 HR6 0_04 HRXP1 HR18 *0_04
HR17 *2K_1%_04
HGND
A HGND A
HH6 HH5 HH4 HH3 HH1

*H7_0D2_8 *H4_5D2_3 *H6_3D2_3 *H6_3D2_3 *H6_3D2_3
1HR *0_04 4HR *0_04 ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/

2HR *0_04 5HR *0_04 Title
[75] P650RP HDD BOARD_H
3HR *0_04 6HR *0_04
HGND HGND HGND HGND HGND
A3 P650RP 6-71-P65PN-D03 D01

5 4 3 2 1
B - 76 HDD Board
Schematic Diagrams
Power Board
5 4 3 2 1
B3.3VS
BJ_BTN1
D B3.3VS D
1
BM_BTN# 2 NC1
3 NC2
4
FP226H-004S10M 20mil
PCB Footprint = fp226h-004xxxm_r BR1
6-20-94A40-004 220_1%_04
BGND
20mil
B_SW1 20mil BC1
POWER BUTTON 5
1 2 *0.1u_16V_Y5V_04
B_SW1 3 4
3
4
TJE-532-Q-T/R
1
2
6
BM_BTN#
BGND Sheet 76 of 81
C C
Power Board
5
6
PCB Footprint = tje-53x-q
A
BD2 BC2
A
BD1
BGND 0.1u_50V_Y5V_06 BD3
*V15AVLC0402 BLUE RE2*0.8 2P
VARISTOR P/N = RY-SP190DNB84-5/1X *BLUE RE2*0.8 2P
2
6-24-30003-006 P650Rx, P670Rx P/N = RY-SP190DNB84-5/1X
C
POWER SWITCH P670RG-M
C
BGND LED POWER SWITCH
LED
BGND BGND
B B
3
1BR *0_04 4BR *0_04

6
2BR *0_04 5BR *0_04
3BR *0_04 6BR *0_04

BH1 BH3 BH4 BH2
*H6_3D2_3 *H6_3D2_3 *H3_0D2_2 *H3_0D2_2
A A
4
Title
[76] P650RP POWER BOARD
BGND BGND BGND BGND
A4 P650RP 6-71-P65PC-D01 D01

5 4 3 2 1
Power Board B - 77
Schematic Diagrams
LED Board
5 4 3 2 1
LJ_LED1
LLED_ACIN
12 LLED_PWR LD9 LD10
11 LLED_BAT_CHG LLED_ACIN LR9 680_04 1 2 LLED_BAT_CHG LR13 680_04 1 2
D 10 LLED_BAT_FULL D
NC1 9 LLED_NUM# Oragne UHY Oragne UHY
8 LLED_CAP#
7 LLED_SCROLL# LLED_PWR
UYG LLED_BAT_FULL
UYG
NC2 LR7 330_04 3 4 LR11 330_04 3 4
6 L_WLAN_AIRPLANE#
5 L_dGPU_LED Green RY-SP195UHYUYG4
Green RY-SP195UHYUYG4
4 LSATA_LED#
3 AC IN/POWER ON LED BAT CHARGE/FULL LED
LED_GND
2
1 L_3.3VS
FP225H-012S10M LED_GND
PCB Footprint = fp225-012g LED_GND
1LR *0_04 4LR *0_04
6-20-94K50-012
Sheet 77 of 81 2LR *0_04 5LR *0_04
L_3.3VS
3LR *0_04 6LR *0_04
LED Board
C C
LR3 LR2
LR6 LR5 LR4 LR1
330_04 330_04
330_04 330_04 330_04 330_04
A
A
LD4 LD7 LD6 LD5 LD3 LD2
RY-SP190YG34-5M RY-SP190YG34-5M RY-SP190YG34-5M RY-SP190YG34-5M RY-SP190YG34-5M RY-SP190YG34-5M

dGPU LED SCROLL CAPS LOCK NUM LOCK AIRPLANE LED HDD LED
LOCK LED LED
C
C
LR14 *0_04
LED
LLED_SCROLL# LLED_CAP# LLED_NUM# L_WLAN_AIRPLANE# LSATA_LED#
C
B B L_dGPU_LED B
LQ1
DTC114EUA
E
LED_GND
LH1 LH4 LH3 LH2

*H4_0B2_5D2_3 *H4_0B2_5D2_3 *H6_0D2_3 *H6_0D2_3
LED_GND LED_GND LED_GND LED_GND
A A
Title
[77] P650RP LED BOARD
A4 P650RP 6-71-P65P4-D03 D02
5 4 3 2 1
B - 78 LED Board
Schematic Diagrams
Click Board
5 4 3 2 1
T_TP_VCC
T3.3V
TJ_CLICK
W/O FP㗪炻⎒ᶲ㬌⋨暞ẞ TJ_TP1
TL1 1 T_TP_BTN_L 1 T_TP_CLK

NC1 2 2 T_TP_DATA
TO BOTTOM/B
.
FCM1005KF-121T03 NC2 3 T_TP_BTN_R 3 T_TP_BTN_L
4 4
FP226H-004S10M
TO T/P 5
T_TP_BTN_R
JXT_FP226H-004XXAM 8 PIN 6
7
T_TP_SMB_CLK
1
TJ_FP1 6-20-94A40-004 T_TP_VCC T_TP_SMB_DAT
TGND 8 TD1 TD2
1 TJ_MB FP225H-008S11M
2
*V15AVLC0402
*V15AVLC0402
D
NC1 TR5 27.4_1%_04 TUSB_PN10 fp225h-008gxxxm_r TGND D
NC2 3 TR6 27.4_1%_04 TUSB_PP10 1 T_TP_DATA TD3 TD4
4 2 6-20-94K30-108
T_TP_CLK TC9
2
3
TO M/B
*V15AVLC0402
*V15AVLC0402
FP226H-004S10M TGND TH2 TH1
PCB Footprint = fp226h-004xxxm_r 4 T_TP_SMB_DAT 0.1u_10V_X7R_04 H7_0B5_7D3_7 H7_0B5_7D3_7
5 T_TP_SMB_CLK
2
6 TGND
50501-0060N-001
TGND
88511-06R
6-20-94K30-106 TGND
It is strongly recommended that the TESD_GND has
a dedicated connection to the system chassis or TGND TGND
cable shield.
T3.3V
TU1
6 1
VP NC
TC8 5 2
NC VN
0.1u_10V_X7R_04 TUSB_PP10 4
CH2 CH1
CM1293A-02SO
3 TUSB_PN10
Sheet 78 of 81
C
TGND
FOR ESD, 月役FFC CONNECTOR㒢㓦

TGND
C
Click Board
T_XIN TJ_FPB1
TR2 1M_04 T_XOUT T2.5V 1 2

3 4
TGND TMOSI 5 6
3 4 TMCLK 7 8 TLED1
TGND TMCS 9 10 TLED2
2 1 TMISO 11 12 TDISCON
TX1 13 14 NOTE: MODE
TC4 HSX321G_12Mhz TC5 T_XIN 15 16 MODE=HIGH (NC) , USB MODE
T_XOUT 17 18 MODE=LOW , SPI MODE
15p_50V_NPO_04 15p_50V_NPO_04 T_RST_N 19 20
21 22 TUSB_PN10
T3.3V 23 24 TUSB_PP10
*CON24A
TGND TGND QPOFZ-24R2-XD-Z-LD
TGND Place Botton TGND

B B
T2.5V T3.3V
TLED1 TR3 10K_04
TC3 TC7 TC1 TC6 TLED2 TR4 10K_04
0.1u_10V_X7R_04 4.7u_6.3V_X5R_06 0.1u_10V_X7R_04 4.7u_6.3V_X5R_06
TGND NOTE: CLK_SEL

CLK_SEL=HIGH (NC) , FREQ=12MHz Crystal
CLK_SEL=LOW , FREQ=48MHz OSC
TGND TGND
T3.3V
CLOSE TO SENSOR POWER PIN
S
G TDISCON 1TR *0_04 4TR *0_04
TQ1 2TR *0_04 5TR *0_04

AO3415
D
3TR *0_04 6TR *0_04

TUSB_PP10 TR7 1.5K_04
A A
TR1 47K_04 T_RST_N

T3.3V
TC2
1u_6.3V_X5R_04
Title
[78] P650RP CLICK BOARD_T
TGND Size Document Number Rev
A3
P650RP 6-71-P65P2-D01 D02

5 4 3 2 1
Click Board B - 79
Schematic Diagrams
Finger Sensor Board
5 4 3 2 1
NOTE: MODE
MODE=HIGH (NC) , USB MODE
FU1 MODE=LOW , SPI MODE
1 30
D EGND MODE D
2 29 FUSB_PP FJ1
F3.3V AVDD DP
3 28 FUSB_PN F2.5V 1 2
F2.5V DVDD DN 3 4
F3.3V 4 27 F3.3V FMOSI 5 6
VDDIO UVDD FMCLK 7 8 FLED1
FLED1 5 26 FMCS FMCS 9 10 FLED2

LED1 SPI_CS FMISO 11 12 FDISCON
FMOSI 6 25 FMISO 13 14
SPI_MOSI SPI_MISO F_XIN 15 16
FMCLK 7 24 FLED2 F_XOUT 17 18
SPI_CLK LED2 F_RST_N 19 20
FDISCON 8 23 21 22 FUSB_PN
Sheet 79 of 81 9
DISCON DVSS_1
22
F3.3V F3.3V 23 24 FUSB_PP
UVSS AVSS_1
Finger Sensor F_XOUT 10
XO XI
21 F_XIN
SPNZ-24S1-B-017-1-R
P/N = 6-21-41700-212
FGND FGND
Board C
F2.5V 11
DVDD_1 AVSS
20
C
F3.3V 12 19 F3.3V
RVDD AVDD_1
F_RST_N 13 18
RESETN CLK_SEL NOTE: CLK_SEL
14 17 CLK_SEL=HIGH (NC) , FREQ=12MHz Crystal
DVSS EGND_2 CLK_SEL=LOW , FREQ=48MHz OSC
15 16
SGND EGND_1
ES603-WB
FGND FGND
ES603-LGA30 : 6-03-00603-0N0
PCB Footprint:
ES603-LGA30 CHANGE ES603-LGA30-1
2015/8/10
B B
**GU1㕩怲ᶵ⎗≈㷔溆,ẍ⃵ᶲẞ⼴䞕嶗
FJ1
1 23 23 1
2 24 24 2
BOTTON VIEW TOP VIEW
A A
Title
[79] FINGER SENSOR BOARD
A4 P650RP 6-71-P65PF-D01 D01B

5 4 3 2 1
B - 80 Finger Sensor Board

Schematic Diagrams
Power Board
5 4 3 2 1
I3.3VS
IJ_BTN1
1
D IM_BTN# 2 NC1 D
3 NC2
4
FP226H-004S10M
PCB Footprint = fp226h-004xxxm_r
6-20-94A40-004
IGND
I3.3VS
POWER BUTTON
POWER
I_SW1 1IR *0_04 4IR *0_04
SWITCH
3
TJE-532-Q-T/R
1 LED 2IR *0_04 5IR *0_04
Sheet 80 of 81
IM_BTN#
C
4 2 20mil
IR1 3IR *0_04 6IR *0_04 C
Power Board
5
6
330_04
1
PCB Footprint = tje-53x-q

ID2 IC2 20mil
IGND 0.1u_50V_Y5V_06 20mil IC1

*V15AVLC0402
VARISTOR BSW1 *0.1u_16V_Y5V_04
2
6-24-30003-006 5
1 2
3 4 IGND
A
IGND 6
ID1
BLUE RE2*0.8 2P
P/N = RY-SP190DNB84-5/1X
PCB Footprint = RY-SP190YG34-5M
C
B B
IH1 IH2
*H6_0D2_2 *H6_0D2_2
3
IGND
IGND IGND
6
A ᙔ!Ϻ!ႝ!တ!!DMFWP!DP/ A
Title
[80] P655RE POWER BOARD_I
4

A P650RP 6-71-P655C-DP1 D01

5 4 3 2 1
Power Board B - 81
Schematic Diagrams
LED Board
5 4 3 2 1
6-20-94K50-012 OLED_ACIN OR7 330_04 1

OD9
2 OLED_BAT_CHG
LOT3
OR11 330_04 1
OD8
2
PCB Footprint = fp225-012g
FP225H-012S10M Oragne UHY Oragne UHY
OLED_ACIN
1 OLED_PWR OLED_PWR
UYG OLED_BAT_FULL
UYG
OR9 330_04 3 4 OR13 330_04 3 4
2 OLED_BAT_CHG
D 3 OLED_BAT_FULL Green RY-SP195UHYUYG4
Green RY-SP195UHYUYG4 D
4 OLED_NUM#
5 OLED_CAP#
NC2 6 OLED_SCROLL#
7 O_WLAN_AIRPLANE#
AC IN/POWER ON LED BAT CHARGE/FULL LED
NC1 8 O_dGPU_LED O_GND
9 OSATA_LED# O_GND
10
11 O_GND
12 O_3.3VS
OJ_LED1
Sheet 81 of 81
LED Board C C
OH3 OH4
OH1 OH2 2 2
*C91D91N *C91D91N 5 5
3 1 3 1
4 4
*MTH7_0D2_3 *MTH7_0D2_3
O_3.3VS
O_GND O_GND O_GND
B B
OR3 OR6 OR5 OR4 OR2 OR1
330_04 330_04 330_04 330_04 330_04 330_04

A
A
OD4 OD7 OD6 OD5 OD3 OD2
RY-SP190YG34-5M RY-SP190YG34-5M RY-SP190YG34-5M RY-SP190YG34-5M RY-SP190YG34-5M RY-SP190YG34-5M

dGPU LED SCROLL CAPS LOCK NUM LOCK AIRPLANE LED HDD LED
LOCK LED LED
C
C
OR14 *0_04 LED
OLED_SCROLL# OLED_CAP# OLED_NUM# O_WLAN_AIRPLANE# OSATA_LED#
C
B O_dGPU_LED
OQ1
DTC114EUA
A A
E
Title
O_GND
[81] P655RE LED BOARD
A4 P650RP 6-71-P6554-DP3 D02A
5 4 3 2 1
B - 82 LED Board
BIOS Update
Appendix C:Updating the FLASH ROM BIOS 

BIOS Version
To update the FLASH ROM BIOS, you must: Make sure you down-
• Download the BIOS update from the web site. load the latest correct
• Unzip the files onto a bootable CD/DVD/USB Flash Drive. version of the BIOS ap-
propriate for the com-
• Reboot your computer from an external CD/DVD/USB Flash Drive. puter model you are
• Use the flash tools to update the flash BIOS using the commands indicated below. working on.
• Restart the computer booting from the HDD and press F2 at startup enter the BIOS.
You should only
• Load setup defaults from the BIOS and save the default settings and exit the BIOS to restart the computer.
download BIOS ver-
• After rebooting the computer you may restart the computer again and make any required changes to the default BIOS sions that are
settings.
C:BIOS Update
V1.0X.XX or higher as
appropriate for your
Download the BIOS computer model.
1. Go to www.clevo.com.tw and point to E-Services and click E-Channel. Note that BIOS versions
2. Use your user ID and password to access the appropriate download area (BIOS), and download the latest BIOS files are not backward com-
(the BIOS file will be contained in a batch file that may be run directly once unzipped) for your computer model patible and therefore
(see sidebar for important information on BIOS versions). you may not down-
grade your BIOS to an
older version after up-
Unzip the downloaded files to a bootable CD/DVD or USB Flash drive grading to a later ver-
1. Insert a bootable CD/DVD/USB flash drive into the CD/DVD drive/USB port of the computer containing the sion (e.g if you upgrade
a BIOS to ver 1.00.05,
downloaded files.
you MAY NOT then go
2. Use a tool such as Winzip or Winrar to unzip all the BIOS files and refresh tools to your bootable CD/DVD/USB back and flash the BIOS
flash drive (you may need to create a bootable CD/DVD with the files using a 3rd party software). to ver 1.00.04).
Set the computer to boot from the external drive

1. With the bootable CD/DVD/USB flash drive containing the BIOS files in your CD/DVD drive/USB port, restart the
computer and press F2 (in most cases) to enter the BIOS.
2. Use the arrow keys to highlight the Boot menu.
3. Use the “+” and “-” keys to move boot devices up and down the priority order.
4. Make sure that the CD/DVD drive/USB flash drive is set first in the boot priority of the BIOS.
5. Press F4 to save any changes you have made and exit the BIOS to restart the computer.
C - 1
BIOS Update
Use the flash tools to update the BIOS

1. Make sure you are not loading any memory management programs such as HIMEM by holding the F8 key as you
see the message “EFI Shell”. You will then be prompted to give “Y” or “N” responses to the programs being
loaded by EFI Shell. Choose “N” for any memory management programs.
2. You should now see DISK fsX:\> (X is the designated drive number for the CD/DVD drive/USB flash drive).
3. Type the following command:
fsX:\> Flash.nsh
4. The utility will then proceed to flash the BIOS.
5. You should then be prompted to press any key to restart the system or turn the power off, and then on again but
make sure you remove the CD/DVD/USB flash drive from the CD/DVD drive/USB port before the computer
restarts.
C:BIOS Update
Restart the computer (booting from the HDD)

1. With the CD/DVD/USB flash drive removed from the CD/DVD drive/USB port the computer should restart from
the HDD.
2. Press F2 as the computer restarts to enter the BIOS.
3. Use the arrow keys to highlight the Exit menu.
4. Select Load Setup Defaults (or press F3) and select “Yes” to confirm the selection.
5. Press F4 to save any changes you have made and exit the BIOS to restart the computer.
Your computer is now running normally with the updated BIOS

You may now enter the BIOS and make any changes you require to the default settings.
C-2

Clevo P655RP6 Service Manual

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Clevo P655RP6 Service Manual

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P655RP6(-G)

About this Manual

The following information is included:

Appendix A, Part Lists

IMPORTANT SAFETY INSTRUCTIONS

Instructions for Care and Operation

Use only approved brands of Unplug the power cord before

The computer has specific power requirements:

User’s Manual on CD/DVD

Click the icon in the Start Screen and

GPU Decoupling 2 ....................................................................... B-28 1V8_RUN/AON, NV3V3 .............................................................B-60

PCH 8/9 ........................................................................................ B-42 USB, Type A ................................................................................B-74

Specifications Processor Options Security

i7-6820HK (2.70GHz), i7-6700HQ (2.60GHz) Security (Kensington® Type) Lock Slot

AMI BIOS (64Mb SPI Flash-ROM) Intel Integrated GPU

Storage Communication Features

1 - 4 External Locator - Top View with LCD Panel Open

External Locator - Front & Right Side Views Figure 2

External Locator - Front & Right Side Views 1 - 5

External Locator - Left Side & Rear View

Figure 5 REAR VIEW

1 - 6 External Locator - Left Side & Rear View

External Locator - Bottom View

To prevent your com-

External Locator - Bottom View 1 - 7

Figure 7 Mainboard Overview - Top (Key Parts)

1 - 8 Mainboard Overview - Top (Key Parts)

Mainboard Overview - Bottom (Key Parts) Figure 8

Mainboard Overview - Bottom (Key Parts) 1 - 9

Figure 9 Mainboard Overview - Top (Connectors)

1 - 10 Mainboard Overview - Top (Connectors)

Mainboard Overview - Bottom (Connectors) Figure 10

Mainboard Overview - Bottom (Connectors) 1 - 11

An example of these types of boxes are shown in the sidebar.

To remove the Keyboard:

1. Remove the battery page 2 - 6

Removing the Keyboard Figure 1

8 8 When re-inserting the

Removing the Keyboard 2 - 5

Figure 2 Removing the Battery

2 - 6 Removing the Battery

5. Carefully disconnect the cable 19 , then remove screws 20 - 22 (Figure 3b).

Removing the Battery 2 - 7

Figure 4 Removing the Hard Disk Drive

New HDD’s are blank. Before you

You have all the CD-ROMs and

2 - 8 Removing the Hard Disk Drive

Note that the hard disks pic- 9

In some cases 7.0mm(h) hard 

For more information, contact • 4 Screws

Removing the Hard Disk Drive 2 - 9

Figure 6 Removing the System Memory (RAM)

2 - 10 Removing the System Memory (RAM)

8 Be careful not to touch

Removing the System Memory (RAM) 2 - 11

Figure 8 Memory-2 Upgrade Process

Be careful not to touch

2 - 12 Removing the System Memory (RAM)

Removing the M.2 SSD Module Figure 9

Be sure to place the thermal pad’s adhesive side down onto

Note that the thermal pad may be subject to change in de-

Removing the M.2 SSD Module 2 - 13

Figure 10 Removing the Wireless LAN Module

R659 10K_04 C_OP_1 R150 4.7K_04 3.3VS

10u_6.3V_X5R_04 10u_6.3V_X5R_04 10u_6.3V_X5R_04 10u_6.3V_X5R_04 10u_6.3V_X5R_04 10u_6.3V_X5R_04 10u_6.3V_X5R_04 10u_6.3V_X5R_04 R764