2/19/24

Fernando Victor V. de Vera, ECE, M.Tech

Electronics Engineering Department

Part 2

SAP-1 COMPUTER

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SAP Computer
Ø Simple as Possible Computer
Ø The beginner s computer
Ø SAP-I is the first stage in the
evolution toward modern
computers.

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Program Counter
Ø A 4-bit Counter
Ø Counts from 0000 to 1111
Ø Sometimes called a POINTER
‒ It points to an address in
memory where something
important is being stored.

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Input and MAR

Ø MAR ‒ Memory Address
Register
Ø It includes the address and
data switch registers,
Ø These switch registers, which
are part of the input unit,
allow you to send 4 address
bits and 8 data bits to the
RAM.

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Random Access Memory

Ø 16 x 8 static TTL RAM
Ø You can program the RAM by
means of the address and
data switch registers.
Ø This allows you to store a
program and data in the
memory before a computer
run.

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Instruction Register
Ø The instruction register is part of the
control unit.
Ø To fetch instruction from the memory
the computer does a memory read
operation.
Ø This places the contents of the
addressed memory location on the W
bus.
Ø At the same time, the instruction
register is set up for loading on the
next positive clock edge.
Ø The contents of the instruction
register are split into two nibbles.
§ Upper nibble is a two-state output that
goes directly to the block labeled
"Controller-sequencer. "
§ Lower nibble is a three-state output
that is read onto the W bus when
needed.
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Controller/ Sequencer
Ø A combinational circuit that
produces a 12-bit word that
controls the rest of a
computer.
Ø It supervises the over-all
operation

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Accumulator A
Ø A buffer register that
contains the immediate
answers
Ø Has two output:
§ Goes to the W bus
§ Goes to the Adder/ Subtractor

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Adder/ Subtracter
Ø A combinational circuit used
to perform addition or
subtraction
Ø The contents coming from
accumulator A and B register
is added or subtracted

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B Register
Ø Another buffer register
Ø Holds the number coming
from the W bus to be added
or subtracted from the
content of the accumulator A

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Output Register
Ø This is where the output is
temporarily stored

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Binary Display
Ø Has 8 LEDs to display the 8-
bit output data word

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SAP-1 Instruction Set

INSTRUCTION SET Ø SAP-1 Instruction Set:
1. LDA ‒ Load the Accumulator
Ø The basic operations that can 2. ADD ‒ Add a value to the
be performed by the SAP-1 contents of the accumulator
computer 3. SUB ‒ Subtract a value from
contents of the accumulator
4. OUT ‒ Transfer the contents
of the accumulator to the
output port
5. HLT - halt

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LDA
Ø Load the Accumulator
Ø Example:
LDA AH
Ø Put the contents of the
memory location AH (1010)
to the Accumulator A
Ø This is a MEMORY REFERENCE
INSTRUCTION because it
involves data stored in the
memory.

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ADD
Ø Add a value to the contents
of the accumulator.
Ø Example:
ADD 8H
Ø Add the value in the
memory location 8H (1000)
to the contents of the
Accumulator
Ø This is a memory reference
instruction

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SUB
Ø Subtract a value from
contents of the accumulator
Ø Example:
SUB DH
Ø Subtract the value in the
memory location DH (1101)
from the contents of the
Accumulator
Ø This is a memory reference
instruction

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OUT
Ø The instruction OUT tells the
SAP-I computer to transfer
the accumulator contents to
the output port.
Ø Example:
OUT
Ø Complete by itself, no
memory address is required

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HLT
Ø Stands for halt
Ø This tells the computer to
stop processing data
Ø Marks the end of a program
Ø Example:
HLT

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Summary of Instruction Sets of SAP-1

MNEMONICS
MNEMONIC OPERATION Ø Memory aids
LDA Load RAM data into
accumulator Ø Abbreviated instructions
ADD Add RAM data to Ø Popular in computer work
accumulator
because they remind you of
SUB Subtract RAM data from
accumulator the operation that will take
OUT Load accumulator data into place when the instruction is
output register executed.
HLT Stop processing

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SAP and 8080/8085

8080 Ø The SAP-I instructions LDA,
Ø The first widely used ADD, SUB, OUT, and HLT are
microprocessor 8080/8085 instructions.
Ø Has 72 instructions
Ø The SAP-2 and SAP3
8085 instructions will be part of
the 8080/8085 instruction
Ø An enhanced version of the set.
8080 with essentially the
same instruction set.

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Op Codes
Ø Binary representation of the Mnemonic Op Code
LDA 0000
instructions to load it to the
ADD 0001
computer. SUB 0010
Ø This tells the computer which OUT 1110
operation to perform HLT 1111

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Assembly and Machine Languages

ASSEMBLY LANGUAGE MACHINE LANGUAGE

Ø Involves working with Ø Involves working with binary

mnemonics when writing a (1s and 0s)
program. Ø The program is the OBJECT
Ø The program is the SOURCE PROGRAM
PROGRAM

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Address Mnemonics

SAP-1 Programming 0H
1H
LDA 8H
ADD 9H
2H ADD AH
Ø EXAMPLE 1: Simulate the 3H SUB BH
SAP-1 program shown. 4H SUB CH
5H OUT
6H HLT
7H FFH
8H 0AH
9H 05H
AH 07H
BH 0CH
CH 09H
DH FFH
EH FFH
FH FFH
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Address Mnemonics

SAP-1 Programming 0H
1H
2H
Ø EXAMPLE 2: Create a SAP-1 3H
program that performs the 4H
5H
following operation:
6H
7H
Decimal: 55 ‒ 10 + 39 ‒ 73 + 21 8H
9H
AH
BH
CH
DH
EH
FH
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Address Mnemonics Machine Language

SAP-1 Programming 0000

0001
0010
Ø EXAMPLE 3: Create a SAP-1 0011
machine program that 0100

performs the following 0101

0110
operation:
0111
1000
Decimal: 55 ‒ 10 + 39 ‒ 73 + 21 1001
1010
1011
1100
1101
1110
1111
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Fetch Cycle
Ø The control unit generates the Ø Ring Counter
control words that fetch and
execute each instruction.
Ø While each instruction is
fetched and executed, the
computer passes through
different timing states (T
states), periods during register
contents change.
Ø The ADDRESS, INCREMENT, and
MEMORY states are called the
fetch cycle of SAP-I.

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Address State (T1)

Ø T1 state is called the address
state because the address the
program counter (PC) is
transferred to the memory
address register (MAR)
during this state.

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Increment State (T2)

Ø This state is called the
increment state because the
program counter is
incremented.

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Memory State (T3)

Ø The T3 state is called the
memory state because the
addressed RAM instruction is
transferred from the memory
to the instruction register.

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Execution Cycle
Ø The next three states (T4, T5, Ø Different SAP-I instructions
and T6) are the execution has different control
cycle of SAP-I. routines.

Ø The register transfers during Ø Example: LDA 9H requires

the execution cycle depend different register transfers
on the particular instruction than ADD BH.
being executed.

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LDA Routine

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ADD and SUB Routines

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OUT Routine
Ø Suppose the instruction
register contains the OUT
instruction at the end of a fetch
cycle. Then

IR = 1110 XXXX

Ø The instruction field goes to the

controller-sequencer for
decoding. Then the controller-
sequencer sends out the
control word needed to load
the accumulator contents into
drs the output register.
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HLT
Ø HLT does not require a Ø The controller-sequencer
control routine because no stops the computer by
registers are involved in the turning off the clock.
execution of an HLT
instruction.
Ø When the IR = 1111 XXXX, the
instruction field 1111 signals
the controller-sequencer to
stop processing data.

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SAP-1 Micro Program

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ASSIGNMENT 2.1
ØSAP-1 Programming.
1. Write a SAP-1 assembly and machine program that
performs the following operations: Decimal: 176 + 191
‒ 43 + 113 + 384. Simulate your program by
identifying the hex and binary content of the
accumulator in each step of your program. Explain the
output of the program.
2. Explain how the product of 12 x 21 can (or cannot) be
programmed using the SAP 1 computer.
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ASSIGNMENT 2.2
ØSAP Computer Generations.
1. Compare and contrast SAP1, SAP2 and SAP3
computers in terms of their Hardware Architecture and
Instruction Sets.
2. Create an infographic about the evolution of
microprocessors and write a discussion about it.

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