GOVERNMENT POLYTECHNIC AMBAD

Mhadha Colony, Pachod Road, Ambad, Dist. Jalna (M.S.)

Telephone No. 95-2483-220010 Fax – 02483- 220010
E-mail : gpambad.dte@gmail.com

DEPARTMENT OF COMPUTER ENGINEERING

( MICROPROCESSOR – 22415 )

A MICRO-PROJECT REPORT ON

“ IDENTIFY THE VARIOUS PINS OF THE 8086 MICROPROCESSOR ”

FOR THE AWARD OF

DIPLOMA IN COMPUTER ENGINEERING

( SECOND YEAR, SEM -IV )

2020-21
UNDER THE GUIDANCE OF
Prof. P.K.WARKEY

SUBMITTED BY

1. AKASH SAHANE.
2. KRUSHNA SAHANE.
3. BABASAHEB SONONE.

CERTIFICATE

1
 CERTIFICATE

GOVERNMENT POLYTECHNIC AMBAD

DEPARTMENT OF COMPUTER ENGINEERING

( MICROPROCESSOR – 22415 )

This is to certify that the Micro-project entitled “IDENTIFY THE VARIOUS PINS OF
THE 8086 MICROPROCESSOR” being submitted herewith for the award of DIPLOMA IN
COMPUTER ENGINEERING of MAHARASHTRA STATE BOARD & TECHNICAL
EDUCATION (MSBTE) is the result of Micro-project work completed This is to certify that the
Micro-project entitled “MIC” being submitted herewith by ALL GROUP MEMBER under
my supervision and guidance PROF P.K.WARKEY

To the best of my knowledge and belief, the work embodied in this Micro-project has not formed
earlier the basis for the award of any degree or diploma of this or any other Board or examining
body.

( Prof. P.K.WARKEY)

Micro-project Guide
Place: Ambad

Date:

2
 DECLARATION

We, the undesired, hereby declare that the project entitled “IDENTIFY THE

VARIOUS PINS OF THE 8086 MICROPROCESSOR” is written and submitted

by us to Government Polytechnic Ambad during Year 2020-21, Second year for

partial fulfillment of the ‘Micro Project’ requirement of “MICROPROCESSOR -

22415 ” subject under Maharashtra State Board of Technical Education, Mumbai

curriculum, under the guidance of Prof. P.K.WARKEY is our original work.

1. AAKASH SAHANE. (1911620091) Signature:- ___________

2. KRUSHNA SAHANE. (1911620092) Signature:- ___________

3. BABASAHEB SONONE. (1911620099) Signature:- ___________

3
 ACKNOWLEDGEMENTS

I have great pleasure to express my immense gratitude towards a dynamic person and my
project guide Prof. P.K.WARKEY Lecturer in Computer Engineering, Government Polytechnic,
Ambad for giving me an opportunity to work on an interesting topic over one semester. The work
presented here could not have been accomplished without her most competent and inspiring
guidance, incessant encouragement, constructive criticism and constant motivation during all phases
of our group Micro-project work. I am greatly indebted to her.

I am very much thankful to Prof. G.U.JADHAV , Head, Department of Computer

Engineering, all HODs of various departments and Prof. Dr.A. M. JINTURKAR, Principal,
Government Polytechnic, Ambad, for his encouragement and providing me a motivating
environment and project facilities in the Institute to carry out experiments and complete this
Microproject work.

I would like to extend our thanks to all our professors, staff members and all our friends
who extended their co-operation to complete the project.

I am indeed indebted to my parents and other family members for their immense help at all
levels with moral, social & financial support, care and support throughout my studies without which
my work would not have seen light of the day.

With warm regards,

Yours Sincerely,
1. AAKASH SAHANE.
2. KRUSHNA SAHANE
3. BABASAHEB SONONE

Place: Ambad
Date:____________

4
 INDEX

Sr.no. Subject No. Page No.

Chapter 1 Abstract 6

Chapter 2 Introduction to 8086 6

microprocessor
Chapter 3 Features of 8086 6

Chapter 4 Addressing modes 6

Chapter 5 Instruction set 7

Chapter 6 Architecture of 8086 7

Chapter 7 8086 Pin Diagram and signals 8-11

Chapter 8 Conclusion 12

Chapter 9 Reference 12

Chapter Resources used 12

10

5
 “IDENTIFY THE VARIOUS PINS OF THE 8086 MICROPROCESSOR”

ABSTRACT

Intel 8086 is a 16-bit HMOS microprocessor. It is available in 40 pin DIP chip. It

uses a 5V DC supply for its operation. The 8086 uses 20-line address bus. It has
a 16-line data bus. The 20 lines of the address bus operate in multiplexed mode.
The 16-low order address bus lines have been multiplexed with data and 4 high-
order address bus lines have been multiplexed with status signals.

Introduction to 8086 microprocessor:

This paper discusses the features and working of 8086 microprocessor. 8086 is
a 16 bit device designed by intel in 1976. It has many advantages when
compared to other microprocessors.

Features of 8086:
1. Single +5V power supply
2. Clock speed range of 5-10MHz
3. capable of executing about 0.33 MIPS (Millions instructions per second)
4. It is 16-bit processor having 16-bit ALU, 16-bit registers, internal data bus,
and 16-bit external data bus resulting in faster processing.
5. It uses two stages of pipelining, i.e. Fetch Stage and Execute Stage, which
improves performance.
6. Fetch stage can prefetch up to 6 bytes of instructions and stores them in the
queue.
7. It has 256 interrupts.

Addressing modes:
To address the present in the memory locations addressing modes are used by
which the operand can be accessed. The 8086 microprocessor consists of 12
addressing modes. For direct accessing of operand we use direct or indirect
addressing mode. For accessing the operands present in the registers we use
register direct or indirect addressing mode. For the transfer of control to the
segments we use intersegment direct or in direct addressing mode.

6
Instruction set:
In order to perform the arithmetic and logical operations we use these logical
instructions. For making the program to wait of halt we use machine control
instruction. For transferring the controls to the instruction we use branch
instructions. We implementation of conditional and unconditional instructions we
use loop instructions. Thus we can conclude that the 8086 processor is suitable
device for embedded applications.

Architecture of 8086
The following diagram depicts the architecture of a 8086 Microprocessor −

7
8086 Pin Diagram And Signals
Here is the pin diagram of 8086 microprocessor –

AD0-AD15 : Address/Data bus. These are low order address bus. They are
multiplexed with data. When AD lines are used to transmit memory address the
symbol A is used instead of AD, for example A0-A15. When data are transmitted
over AD lines the symbol D is used in place of AD, for example D0-D7, D8-D15
or D0-D15.

A16-A19 : High order address bus. These are multiplexed with status signals.

8
S2, S1, S0 : Status pins. These pins are active during T4, T1 and T2 states and
is returned to passive state (1,1,1 during T3 or Tw (when ready is inactive).
These are used by the 8288 bus controller for generating all the memory and I/O
operation) access control signals. Any change in S2, S1, S0 during T4 indicates
the beginning of a bus cycle.

A16/S3, A17/S4, A18/S5, A19/S6 : The specified address lines are multiplexed
with corresponding status signals.

9
BHE’/S7 : Bus High Enable/Status. During T1 it is low. It is used to enable data
onto the most significant half of data bus, D8-D15. 8-bit device connected to
upper half of the data bus use BHE (Active Low) signal. It is multiplexed with
status signal S7. S7 signal is available during T2, T3 and T4.

RD’: This is used for read operation. It is an output signal. It is active when low.

READY : This is the acknowledgement from the memory or slow device that
they have completed the data transfer. The signal made available by the devices
is synchronized by the 8284A clock generator to provide ready input to the
microprocessor. The signal is active high(1).

INTR : Interrupt Request. This is triggered input. This is sampled during the last
clock cycles of each instruction for determining the availability of the request. If
any interrupt request is found pending, the processor enters the interrupt
acknowledge cycle. This can be internally masked after resulting the interrupt
enable flag. This signal is active high(1) and has been synchronized internally.

NMI : Non maskable interrupt. This is an edge triggered input which results in a
type II interrupt. A subroutine is then vectored through an interrupt vector lookup
table which is located in the system memory. NMI is non-maskable internally by
software. A transition made from low(0) to high(1) initiates the interrupt at the
end of the current instruction. This input has been synchronized internally.

INTA : Interrupt acknowledge. It is active low(0) during T2, T3 and Tw of each

interrupt acknowledge cycle.

MN/MX’ : Minimum/Maximum. This pin signal indicates what mode the

processor will operate in.

RQ’/GT1′, RQ’/GT0′ : Request/Grant. These pins are used by local bus masters
used to force the microprocessor to release the local bus at the end of the
microprocessor’s current bus cycle. Each of the pin is bi-directional. RQ’/GT0′
have higher priority than RQ’/GT1′.

LOCK’ : Its an active low pin. It indicates that other system bus masters have
not been allowed to gain control of the system bus while LOCK’ is active low(0).
The LOCK signal will be active until the completion of the next instruction.

TEST’ : This examined by a ‘WAIT’ instruction. If the TEST pin goes low(0),
execution will continue, else the processor remains in an idle state. The input is
internally synchronized during each of the clock cycle on leading edge of the
clock.

10
CLK : Clock Input. The clock input provides the basic timing for processing
operation and bus control activity. Its an asymmetric square wave with a 33%
duty cycle.

RESET : This pin requires the microprocessor to terminate its present activity
immediately. The signal must be active high(1) for at least four clock cycles.

Vcc : Power Supply( +5V D.C.)

GND : Ground

QS1,QS0 : Queue Status. These signals indicate the status of the internal 8086
instruction queue according to the table shown below

DT/R : Data Transmit/Receive. This pin is required in minimum systems, that

want to use an 8286 or 8287 data bus transceiver. The direction of data flow is
controlled through the transceiver.

DEN : Data enable. This pin is provided as an output enable for the 8286/8287
in a minimum system which uses transceiver. DEN is active low(0) during each
memory and input-output access and for INTA cycles.

HOLD/HOLDA : HOLD indicates that another master has been requesting a

local bus .This is an active high(1). The microprocessor receiving the HOLD
request will issue HLDA (high) as an acknowledgement in the middle of a T4 or
T1 clock cycle.

ALE : Address Latch Enable. ALE is provided by the microprocessor to latch the
address into the 8282 or 8283 address latch. It is an active high(1) pulse during
T1 of any bus cycle. ALE signal is never floated, is always integer.

11
CONCLUSION
8086 Microprocessor is an enhanced version of 8085Microprocessor that
was designed by Intel in 1976. It is a 16-bit Microprocessor having 20 address
lines and16 data lines that provides up to 1MB storage. It consists of powerful
instruction set, which provides operations like multiplication and division easily.
It used where intensive processing is required. It is used in personal computers,
laptops, mobiles, video games, etc.

REFERECE:
1. https://www.geeksforgeeks.org/pin-diagram-8086-microprocessor/
2. MIC LAB MANUAL

RESOURCES USED

1. Hp laptop pavilion dv6 (4GB RAM, 500 GB HDD)

2. Microsoft Word 2013

12
13