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(CE-313)
Lecture – 3
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In Today's Lecture ...
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Register Transfer
Language
◼ Digital System: A digital system is an
interconnection of digital hardware modules
that accomplish a specific information-
processing task.
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Register Transfer
Language
◼ Digital Modules: The digital modules
are best defined by the registers they
contain and the operations that are
performed on the data stored in them.
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Register Transfer
Language
◼ Microoperation: The operations executed
on data stored in registers are called
microoperations.
◼ Examples of microoperations are:
◼ Shift,
◼ Count,
◼ Clear
◼ Load
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Register Transfer
Language
Why not computer operations in words?
◼ Though it is possible to specify the sequence of
microoperations in a computer by explaining
every operation in words, but this procedure
usually involves a lengthy descriptive
explanation.
◼ It is more convenient to adopt a suitable
symbology to describe the sequence of transfers
between registers and the various arithmetic
and logic microoperations associated with the
transfers.
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Register Transfer
Language
Register Transfer Language:
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Register
Computer registers are designated by capital
letters (some times followed by numerals) to
denote the function of the register.
Examples:
◼ Memory address register (MAR): the register
that hold an address for the memory unit
◼ Program counter (PC) : the register that hold an
address of the next instruction to be executed by the
computer.
◼ Instruction register (IR): Stores the current
instruction.
◼ processor register (R1): holds the data 8
Register
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Register
◼ The individual flip-flop in an n-bit register are
numbered in sequence from 0 through n-1,
starting from 0 in the rightmost position and
increasing the numbers toward the left as shown
in Figure 2-11.
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Register
◼ The numbering in a 16-bit register can be
marked on top of the box as shown in Figure
2-12.
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Register
◼ A 16-bit register can be partitioned into two
parts as shown in Figure 2-13. Bits 0-7 are
assigned the symbol L (for low byte) and bits
8-15 are assigned the symbol H (for high
byte). The number of the 16-bit register is
PC. The sybmol PC(0-7) or PC(L) refers to the
low-order byte and PC(8-15) or PC(H) to the
high-order byte.
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Register Transfer Notations
Table
◼ The basic symbols of the register transfer
notation are listed in Table 2-7.
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Register Transfer Notations
Table
◼ The statement
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Computer Organization
(CE-313)
Lecture – 4
18
In Today's Lecture ...
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Bus Transfer
◼ Rather than connecting wires between all
registers, a common bus is used
◼ A bus structure consists of a set of common
lines, one for each bit of a register
◼ Control signals determine which register is
selected by the bus during each transfer
◼ Multiplexers can be used to construct a
common bus
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Bus Transfer
◼ Multiplexers select the source register whose
binary information is then placed on the bus
◼ The select lines are connected to the
selection inputs of the multiplexers and
choose the bits of one register.
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Bus Transfer
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Bus Transfer
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Bus Transfer
◼ In general, a bus system will mutiplex k
registers of n bits each to produce an n-line
common bus
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Bus Transfer
◼ For example, a common bus for eight
registers of 16 bits each require 16
multiplexers, one for each line in the bus.
◼ Each multiplexer must have eight data input
lines and three selection lines to multiplex
one significant bit in the eight registers.
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Bus Transfer
◼ To transfer information from the bus to a
register, the bus lines are connected to the
inputs of all destination registers and the
corresponding load control line must be
activated.
◼ Rather than listing each step as
BUS ← C, R1 ← BUS,
Use R1 ← C, since the bus is implied
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Bus Transfer
Example#1:
Having a digital System that has 2
Registers (A and B) each of 2 bit size.
Implement the Bus Circuit that Selects
any ONE of them to be provided as an
input to any other circuit.
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Bus Transfer
Example#1: (Solution)
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Bus Transfer
Example#2:
Having a digital System that has 4
Registers (A, B, C and D) each of 4 bit
size. Implement the Bus Circuit that
Selects any ONE of them to be provided as
an input to any other circuit.
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Bus Transfer
Example#2: (Solution)
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Bus Transfer
Example#3:
Having a digital System that has 4
Registers (A,B,C and D) each of 4 bits
size, Implement the Bus Circuit that
Selects any TWO of them to be provided
as an input to any other circuit.
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Bus Transfer
Example#3: (Solution)
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Bus Transfer
Example#4:
Having a digital System that has 4
Registers (A,B,C and D) each of 3 bits
size, Implement the Bus Circuit that
Selects any TWO of them to be
provided as an input to any other circuit.
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Bus Transfer (Three state
gates)
◼ Instead of using multiplexers, three-state
gates can be used to construct the bus
system
◼ A three-state gate is a digital circuit that
exhibits three states
◼ Two of the states are signals equivalent to
logic 1 and 0
◼ The third state is a high-impedance state –
this behaves like an open circuit, which
means the output is disconnected and does
not have a logic significance 34
Bus Transfer (Three state
gates)
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Bus Transfer (Three state
gates)
◼ The three-state buffer gate has a normal
input and a control input which determines
the output state
◼ With control 1; the output equal the normal
input
◼ With control 0, the gate goes to a high-
impedance state
◼ This enables a large number of three-state
gate outputs to be connected with wires to
from a common bus line without endangering
loading effects. 36
Bus Transfer (Three state
gates)
R3 R2 R1 R0
REGISTERS
A
A3
A2 D3 Q3
A1 D2 Q2
A0 D1 Q1
D0 Q0
ED1
ED0
EO1
EO0
CP
MR
B
B3
B2 D3 Q3
B1 D2 Q2
B0 D1 Q1
D0 Q0
ED1
ED0
EO1
EO0
CP1 Q1 CP
CP2 Q2 MR
C
C3
C2 D3 Q3
C1 D2 Q2
C0 D1 Q1
D0 Q0
ED1
ED0
EO1
EO0
CP
MR
D
D3
D2 D3 Q3
D1 D2 Q2
D0 D1 Q1
D0 Q0
ED1
ED0
EO1
EO0
CP
MR
Decoder
S1 1/2
A1 Q3
A0 Q2
S0 Q1
E Q0
Enable 38
2 x 4 Line Decoder
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Bus Transfer
◼ Decoders are used to ensure that no more than
one control input is active at any given time
◼ To construct a common bus for four registers for
n bits each using three-state buffers, we need n
circuits with four buffers in each
◼ Only one decoder is necessary to select between
the four registers
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Memory Transfer
◼ The transfer of information from a memory word
to the outside environment is called a read
operation.
◼ The transfer of new information to be stored
into memory is called a write operation.
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Memory Transfer
◼ Designate a memory word by the letter M
◼ It is necessary to specify the address of M when
writing memory transfer operations
◼ Designate the address register by AR and the
data register by DR
◼ The read operation can be stated as:
Read: DR ← M[AR]
◼ The write operation can be stated as:
Write: M[AR] ← R1
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Computer Organization
(CE-313)
Lecture – 5
43
In Today's Lecture ...
◼ Categories of Microoperations
◼ Arithmetic Microoperations
◼ Binary Adder
◼ Binary Adder-Subtractor
◼ Binary-Incrementor
◼ Composite Arithmetic Circuit
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Categories of Microoperations
◼ Register Transfer Microoperations:
◼ Transfer binary information from one register to another
◼ Arithmetic Microoperations:
◼ Performs arithmetic operations on numeric data stored
in registers.
◼ Logic Microoperations:
◼ Perform bit manipulation operations on non-numeric
data stored in registers
◼ Shift Microoperations:
◼ Perform shift operations on data stored in registers.
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Arithmetic Microoperations
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Arithmetic Microoperations
◼ The basic arithmetic microopertions:
◼ Addition
◼ Example of addition: R3 ←R1 + R2
◼ subtraction,
◼ Subtraction is most often implemented through
complementation and addition
◼ Example of subtraction: R3←R1+R2’+1 ( the prime sign ‘
denotes 1’s complement of R2)
◼ Adding 1 to the 1’s complenent produce the 2’s complement
◼ Adding the content of R1 to the 2’s complement of R2 is
equivalent to subtracting 47
Arithmetic Microoperations
◼ Increment
◼ Example of increment: R3 ←R1 + 1
◼ Decrement
◼ Example of decrement: R3 ←R1 - 1
◼ Shift (Right, Left)
◼ Example of shift right : R3 ←SHR(R1)
◼ if R1 = 0010 then R3 = 0001
◼ Example of shift left : R4 ←SHL(R1)
◼ if R1 = 0010 then R3 = 0100
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Arithmetic Microoperations
◼ Multiplication
◼ Multiplication operation is implemented with the
sequence of add and shift microoperations
◼ Division
◼ Division is implemented by a sequence of Subtract
and shift microoperations
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Binary Adder
◼ To implement the add microoperation with
hardware, we need the registers that hold the
data and the digital component that performs
the addition
◼ A digital circuit that performs arithmetic sum of
two bits and previous carry is called full-adder
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Binary Adder
◼ A binary adder is a digital circuit that generates
the arithmetic sum of two binary numbers of any
length
◼ A binary adder is constructed with full-adder
circuits connected in cascade
◼ An n-bit binary adder requires n full-adders
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Arithmetic Microoperations
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Excercise
◼ Design a combinational circuit for 4-bit binary
subtractor.
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Binary Adder-Subtractor
◼ The subtraction A – B can be carried out by the
following steps
◼ Take the 1’s complement of B (invert each bit)
◼ Get the 2’c complement by adding 1
◼ Add the result to A
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Binary Adder-Subtractor
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Binary Adder-Subtractor
◼ The addition and subtraction operations can be
combined into one common circuit by including
an XOR gate with each full-adder
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Binary Adder-Subtractor
◼ The mode input M controls the operation.
◼ When M = 0, the circuit works as Adder
◼ When M =1, the circuits works as Subtractor
◼ When M = 0, we have B + 0 = B. The full adder
receives the value of B, input carry is 0, and
circuit performs A plus B
◼ When M = 1, we have B + 1 = B’ and C0=1. The
B inputs are all complemented and a 1 is added
through the input carry.
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Binary Incrementer
◼ The increment microoperatioin adds one to a
number in a register
◼ This can be implemented by using a binary
counter – every time the count enable is active,
the count is incremented by one
◼ If the increment is to be performed independent
of a particular register, then use half-adders
connected in cascade
◼ An n bit binary incrementer requires n half
adders 58
Binary Incrementer
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Try it
◼ Design a combinational circuit for 4-bit Binary
Decrementor.
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Composite Arithmetic Circuit
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Composite Arithmetic Circuit
◼ The basic component for an arithmetic circuit is
the parallel adder
◼ By controlling the data inputs to the adder, it is
possible to obtain different types of arithmetic
operations.
◼ The diagram of 4-bit arithmetic circuit is shown
in Figure 4-9
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Composite Arithmetic Circuit
◼ Multiplexers are used to choose between the
different operations
◼ The output of the binary adder is calculated
from the following sum
D = A + Y + Cin
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Composite Arithmetic Circuit
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