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5 4 3 2 1

Power Shape
45w
Adapter 65w
PWM Regulator LDO Switch
AD+

AON7403 DCBATOUT

D
AON7403 D

RT3602AJGQW G5416QS1U AOZ2262QI-10 RT8812AGQW AOZ2261QI-10


BT+

Charger
Battery HPA02224

2D5V_S3 1D2V_S3 0D6V_S0 1D0V_S5 1V_VGA_CORE 1D35V_VGA_S0

SO-DIMM(VPP) VDDQ(CPU), 3.3A VTT, 0.7A VCCPRIM_1P05, 2.104A GPU_VDD, 53A FBVDD+FBVDDQ, 7.2A
5V_AUX_S5 SY8288CRAC SY8286BRAC 3D3V_AUX_S5 AOZ5049QI-1 AOZ5049QI-1 RT9610BZQW 0.5A VCCPRIM_CORE, 4.26A
VDDQ (DRAM), 7.4A
KBC, 8mA VccPLL_OC, 0.12A

5V_S5 3D3V_DSW 1V_CPU_CORE 1V_VCCGT 1V_VCCSA

G-SENSOR (angle), 0.5mA Vcore, 70A VCCGT, 31A VCCSA, 5.1A


HDMI/FAN/KB-BL VCCDSW_3P3, 4mA
HP AMP/Codec(5V) TPM, 0.1A
HDD WLAN1, 1A

C C

G2898KD1U
TPS25810R RT9742CGJ5 G2898KD1U G9661
G2898KD1U SY6288C20AAC
27m ohm
CClogic 2A 6A 2A 6A

4.02A 0.19A
5V_USB30_C 5V_USB30 5V_S0 3D3V_S0 3D3V_CARD 3D3V_S5 3D3V_WLAN 1D8V_S5 1V_VCCIO 1V_S3
TYPE C, 3A USB3.1x2, 4A HDD, 1.3 Codec, 0.1A Crad, 0.8A VCCPRIM_3P3, 0.207A WLAN, 1A VCCPRIM_1P8, 702mA VCCIO ( CPU) VccPLL (CPU)
CODEC, 1A MSATA1, 2.5A VccSTG (CPU) VccST ( CPU)
HDMI, 0.5A CAM, 0.5A
FAN, 0.5A 3D3V_MAIN
KB_BL1, 0.1A 3D3V_AON
Touch Screen, 45mA

SY6288C20AAC RT9013-18GB G2898KD1U


RT5797ALGQW
1A 0.5A 6A

B B
3D5V_S0 3D3V_LCDVDD 1D8V_S0 3D3V_AON 1D0V_VGA_S0
IR CAM, 1A LCDVDD, 0.5A Codec(1.8V) PEX_PLL_HVDD PEX_IOVDD, 21A
Fingerprint(1.8V)

A A

Wistron Confidential document, Anyone can not


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application without get Wistron permission
UMA

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
Power Block Diagram
Size Document Number Rev
A2
FAROE 14" Pavilion SA
Date: Monday, August 06, 2018 Sheet 103 of 106

5 4 3 2 1
A B C D E

PCH SMBus/ I2C Block Diagram KBC SMBus/ I2C Block Diagram
3D3V_S5 3D3V_S0 3D3V_S0

3D3V_S0

1 1
DDR4 CHA &B TPAD conn.
DM_SMB_SCL_CN TPCLK
DM_SMB_SCL_CPU SCL PSCLK3
SMBCLK SCL
DM_SMB_SDA_CN
SMBDATA DM_SMB_SDA_CPU SDA PSDAT3 TPDATA SDA

3D3V_AUX_KBC 3D3V_AUX_KBC
2N7002SPT

TPAD conn.
SMB_CLK
SCL
SMB_DATA 3D3V_AUX_KBC
SDA
3D3V_S0 3D3V_S0
TP_I2C_SCL_CN
Battery Conn.
SCL
Reserved TP_I2C_SDA_CN SDA KBC SCL1 BAT_SMB_SCL BAT_SMB_SCL_Q BAT_SMB_SCL_CN
CLK_SMB
SDA1 BAT_SMB_SDA BAT_SMB_SDA_Q BAT_SMB_SDA_CN
DAT_SMB
3D3V_S0 KBC9028Q
PCH DY DY
2N7002SPT

DY
I2C0_SCL
TP_I2C_SCL_CPU HPA02224RGRR
I2C0_SDA TP_I2C_SDA_CPU
SCL
SDA
3D3V_AON
2N7002SPT
2 2

3D3V_MAIN

3D3V_S5 3D3V_S0
GPU1
EC_SMB_SCL_CPU
SCL0 THERM_SMB_SCL_NV
I2CS_SCL
EC_SMB_SDA_CPU
SDA0 THERM_SMB_SDA_NV
I2CS_SDA
3D3V_S0

G-Sensor 2N7002SPT

SML1CLK for HDD Protect


EC_SMB_SCL_CPU EC_SMB_SCL_Q
SCL
SML1DATA EC_SMB_SDA_CPU EC_SMB_SDA_Q
SDA
HP9DS1
SENSOR_I2C_SCL_R EC_SMB_SCL_Q
on Touch control BD
2N7002SPT PSCLK1 SCL
PSDAT1 SENSOR_I2C_SDA_R EC_SMB_SDA_Q
SDA

G-Sensor
3D3V_S0 3D3V_SENSORHUB for LCD angle
SCL
3 SDA 3

3D3V_S0

ISH_I2C_SCL_CPU SENSOR_I2C_SCL_Q ISH_I2C_SCL_CPU


ISH_I2C0_SCL
ISH_I2C_SDA_CPU DY SENSOR_I2C_SDA_Q ISH_I2C_SDA_CPU
ISH_I2C0_SDA
DY

2N7002SPT

3D3V_S0

eKTH6318
TOUCH_I2C_SCL_CPU TOUCH_I2C_SCL_CN on Touch control BD
I2C1_SCL SCL
4 TOUCH_I2C_SDA_CPU TOUCH_I2C_SDA_CN 4
I2C1_SDA SDA
Wistron Confidential document, Anyone can not
Duplicate, Modify, Forward or any other purpose
application without get Wistron permission
UMA

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
SMBUS/I2C BLOCK DIAGRAM
Size Document Number Rev
A2
FAROE 14" Pavilion SA
Date: Monday, August 06, 2018 Sheet 104 of 106
A B C D E
A B C D E

Thermal Block Diagram Audio Block Diagram


3D3V_AUX_S5 3D3V_AUX_S5
SPK-OUT-L-
SPK-OUT-L+
SPEAKER
1 1

VD_IN1
GPXIOD00 SPK-OUT-R-
GPXIOA05 VD_IN2 SPK-OUT-R+
SPEAKER
Codec
KBC remote T8
ALC3258
KBC9028Q
HP_OUT_L
HP_OUT_R
HP
FANPWM0 FANFB0
OUT
FAN_TACH1
FAN1_PWM

5V

2 2
VIN MIC_L
FAN Conn. MIC
IN

DMIC-CLK
DMIC-DATA
DMIC

3 3

Wistron Confidential document, Anyone can not


Duplicate, Modify, Forward or any other purpose
application without get Wistron permission
UMA
4 4

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
THERMAL/AUDIO BLOCK DIAGRAM
Size Document Number Rev
A3
FAROE 14" Pavilion SA
Date: Monday, August 06, 2018 Sheet 105 of 106

A B C D E
5 4 3 2 1

Intel-Power Up Sequence
WHL U POWER UP SEQUENCE DIAGRAM
(AC mode) 3D3V_RTC_AUX(VCCRTC)
AC Adapter in 3D3V_DSW -3
RTC_RST# (DCIN1) PWR_3D3V_EN (3D3V_DSW)
43 -4 EN1 3V_VOUT
BATLOW# -7 AD+
SY8288BRAC
3D3V_AUX_S5 -5
PM_SUSACK# EN2 LOD
VIN PGOOD
SWITCH
3D3V_AUX_S5/5V_AUX_S5 (PU4406) 45
D
AD_OFF D
ECREST 5V_S5 -3
44 -4 PWR_5V_EN (5V_S5)
EN1 5V_VOUT
3V_S5_EN/5V_S5_EN
SY8288CRAC
5V_S5/3D3V_S5 5V_AUX_S5 -5
19V_DCBATOUT
EN2 LDO
3V_5V_POK -6 VIN PGOOD
1D8V_S5 45

PM_RSMRST# S5_ENABLE
-5 3D3V_AUX_KBC -4 VCCST_PWRGD 8
(3D3V_AUX_S5)
PM_SUSWARN# AD+_IN_G SWITCH
(PU4408) 5V_S5_EN 11 PROCPWRGD
SLP_SUS# 44
-4
PCH_PWROK 10
1D0V_S5 GPXIOA04 GPXIOD05
VCC
1 PM_SLP_S4#
AC_PRESENT KBC 2
KBC_PWRBTN#
GPXIOD03 KBC9028Q
KBC_PWRBTN#_R (U2402) 0 PM_SLP_S3#
-7 BT+ AC_IN# 5
GPXIOD01 RSMRST#_KBC WHL CPU
PM_PWRBTN# GPIO56 RSMRST#
PM_SLP_S4#
(CPU1)
PM_PWRBTN# PM_SLP_SUS#
DA2 GPIO5E PWRBTN# -2
PM_SLP_S3# GPXIOA09
1a
DC Battery HPA02224 GPIO04
(delay 99ms)
(BATT1) Charger GPXIOD04 24 13 PLT_RST#
43 (PU4404)
(DC mode) PM_SLP_A# 44
ALL_SYS_PWRGD SYS_PWROK
DDR_VTT_CNTL
SM_PGCNTL
PM_SLP_S4# 7 12 SYS_PWROK 3b
1V_VCCST(1V_S3)

1D2V_S3 SLP_SUS# ON POWER SLP_S3# ON POWER ALL_SYS_PWRGD ON POWER


C C

RUNPWROK(VDDQPG) 3D3V_DSW
3D3V_S0
PM_SLP_S3# 3D3V_S0
ALL_SYS_PWRGD
VIN 6 7
VTT_CNTL 3D3V_S5 5 Q4001
PM_SLP_SUS# VIN PM_SLP_S3#
-2 EN SWITCH VOUT 1D8V_S0 VCORE_EN
0D6V_S0 PM_SLP_S3# SWITCH 5 40 7
U4003 EN U4002 VOUT
40 40
1V_VCCIO
3D3V_S5
3D3V_DSW
+VCCIO 3D3V_DSW 5V_S5
VCCST_GD_R
5V_S0 (VCCST_PWRGD)
ALL_SYS_PWRGD 8
VIN VIN1 VIN2 7 A Buffer
3D3V_S0 1D8V_S5 U2001
PM_SLP_SUS# SWITCH
-2 EN PU5301 VOUT (U4001) 20
1D0V_S5_EN 3D3V_S0 6
PGOOD -1 EN1 VOUT1 19V_DCBATOUT
ALL_SYS_PWRGD 53 5V_S0
EN2 VOUT2 5V_S5
VR_EN 3D3V_DSW
40 VIN VCC PWR_VCORE_PWM
DDR_VTT_CTL VR A PWR_VCORE_FCCM# 9
1V_CPU_CORE VIN 5V_S0
1D0V_S5 PWR_VCCGT_PWMA
1D0V_S5_EN
1V_VCCSA -1 EN PU5201 VOUT VR B PWR_VCCGT_FCCM# 9
VIN
3D5V_S0 VCORE_EN
1V_VCCGT PGOOD PU5601 7 EN
EN VOUT PWR_VCCSA_PWM
52
VR_RDY 56 IMVP8 VR C PWR_VCCSA_FCCM 9
RT3602AJGQW
PCH_PWROK (PU4601)
3D3V_S5 PCH_PWROK
PCH CLOCK OUTOUT VR_READY 10
46
B
VCC B
SYS_PWROK PM_SLP_S3#
A AND
U4009 Y 19V_DCBATOUT
PLT_RST# CPU_C10_GATE#
B 40 5V_S5
DDR_RESET#
VIN VCC
SLP_S4# ON POWER PWR_VCORE_PWM 1V_CPU_CORE
#575412 Rev0.8 P.557 OUTPUT
1D0V_S5 9 PWR_VCORE_FCCM# EN

AOZ5049QI
1D0V_S5 VIN (PU4701)
SWITCH
1V_VCCIO (PU4702) 47
EN U4004 VOUT
PM_SLP_S4# SWITCH 1V_S3 40
2 19V_DCBATOUT
U4004
40 5V_S5
U4004
VIN VCC
PWR_VCCGT_PWMA 1V_VCCGT
3D3V_DSW
9 PWR_VCCGT_FCCM# EN OUTPUT

PU4601 VIN
3
AOZ5049QI
PM_SLP_S4# 2D5V_S3 (PU4801)
2 S5 V2P5
PU5101 48
G5416 3a
U2001 for VDDQ 1D2V_S3 (delay 0.8ms) 19V_DCBATOUT
(PU5101) VOUT
5V_S5

PWR_VDDQ_VTT VIN VCC


U4004 VTT_CNTL PWR_VCCSA_PWM 1V_VCCSA
4 S3 VTT
9 PWR_VCCSA_FCCM EN OUTPUT
PGOOD
RT9610BZQW
51 (PU5004)
50
A
U4004 A
U2402 1D2V_S3
Q4001

3a VTT_CNTL
SWITCH
4
(Q401)
U4001 3b SM_PGCNTL
4 Wistron Confidential document, Anyone can not
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WistronModify, Forwarddocument,
Confidential or any other purpose
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any other purpose
UMA application without get Wistron permission

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
Power Sequence
Size Document Number Rev
A1
FAROE 14" Pavilion SA
Date: Monday, August 06, 2018 Sheet 102 of 106

5 4 3 2 1
5 4 3 2 1

Battery Connector
BATT1 BT+ ED4302
9
1 2018.2.23 ->name LID_WAKEBAT BAT_SMB_SCL_CN 1 6 BAT_SMB_SCL_CN
3D3V_AUX_S5 I/O1 I/O4
2 3D3V_BATT_RTC BT+ 2 5
BAT_SMB_SCL_CN GND VDD 3D3V_RTC_PWR
3
4 BAT_SMB_SDA_CN 3D3V_BATT_RTC 1 AFTP4301 Do Not Stuff BAT_SMB_SDA_CN 3 4 BAT_SMB_SDA_CN
I/O2 I/O3

2
5 1 AFTP4302 Do Not Stuff

4
3
6 BAT_SMB_SDA_CN 1 AFTP4303 Do Not Stuff R4301
7 BAT_SMB_SCL_CN 1 AFTP4304 Do Not Stuff RN4301 AZC099-04S-2-GP 2018.7.31
47KR2J-L2-GP
8 1 AFTP4305 Do Not Stuff SRN100KJ-6-GP 3D3V_AUX_KBC Add net
10 1 AFTP4306 Do Not Stuff
075.09904.0A7C

1
1 AFTP4307 Do Not Stuff LID_CLOSE# 6,24 75.27002.F7C
ALP-CON8-31-GP 1 AFTP4317 Do Not Stuff

1
2
D 020.81150.0008 D
Q4301 BAT_SMB_SCL_CN BAT_SMB_SCL_Q 6 1

Note:ZZ.27002.F7C01
S BAT_SMB_SCL 24,44
AFTP PLACE CLOSE TO BATT1
5 2
D LID_SHIP#
R4313 1 2 100R2F-L3-GP 4 3
G R4314 1 2 100R2F-L3-GP
2N7002KDW-1-GP
Q4302 3D3V_AUX_S5
2N7002K-2-GP BAT_SMB_SDA_CN
BAT_SMB_SDA 24,44
84.2N702.J31
BAT_SMB_SDA_Q

B
Q4303
Main Battery

R1
LMUN5212T1G-GP 3D3V_RTC_PWR

R2
3D3V_LID 3D3V_RTC_PWR 84.05212.B11
2018.2.21 ->P/N

R4302 1 2 KBC POWER


KBC Power

1
Do Not Stuff R4303
3D3V_AUX_S5

Q4308_E
100KR2J-4-GP
K A

2
2
D4301
RB551V30-GP

1
83.R5003.H8H
R4304 R4305
47KR2J-L2-GP Do Not Stuff DY

1
43,66 LID_SHIP#
C4302

2
Do Not Stuff

2
BT+
1 2U4302_CP
43,66 LID_SHIP#

1
R4311 10R2J-L-GP

3D3V_RTC_PWR R4306
C 10KR2J-L-GP C

2
1

1
PD4302 U4302_D
RB551V30-GP PC4301 R4307
83.R5003.H8H SC10U25V3MX-GP 10KR2J-L-GP U4301

2
1
74LVC1G74DP-GP

A
73.01G74.0HB

CP

D
2
U4302_R# 6 7 U4302_S#
R# S#
4 8 U4302_VCC 1 2
GNDVCC 3D3V_RTC_PWR
2018.7.25 100R2J-L-GP R4312
Change to 0603

Q#

Q
3

5
U4302_Q_TP 1

U4302_Q#
TP4301 Do Not Stuff

A K LID_WAKEBAT_R 1 2 LID_WAKEBAT
D4302 RB520S30-GP R4308
3D3V_AUX_S5 83.R2003.A8M Do Not Stuff

A K
D4303 RB520S30-GP
83.R2003.A8M

DCIN JACK LIMIT_SIGNAL 19V_AD_JK

9
1
DCIN1

2 19V_AD_JK
AFTP test point

K
LIMIT_SIGNAL 3

1
4 1 AFTP4308
PC4302 remove PD4301 PC4303 R4309 5 1
DY DY C4303 DY C4301 AFTP4309

SC1KP50V2KX-L-1-GP

P6SMBJ20A-GP-U

Do Not Stuff

Do Not Stuff

Do Not Stuff
PD4303 6 1 AFTP4310
DY

2
B 84.2N702.J31 5V_AUX_S5 CHG_AMBER 7 B

A
2N7002K-2-GP CHG_WHITE 8 1 AFTP4311

2
10 1 AFTP4312
CHARGE_LED G 1 AFTP4313
E

1 AFTP4314
DCIN_CHG_G DCIN_CHG_G_R LMBT3906LT1G-1-GP LIMIT_SIGNAL CHG_WHITE
D 1 2 B ETY-CON8-29-GP 1 AFTP4315
PR4302 PQ4302 CHG_AMBER 1 AFTP4316
S 10KR2J-L-GP 84.T3906.E11 83.P6SMB.AAG Do Not Stuff 020.F0323.0008
C

CHG_AMBER 2nd = 083.00020.00AG


PQ4301 3rd = 83.P6SMB.EAG AC Present = White
PQ3803_C 1 2 2018.2.8 Changed Standby = White pulsing
5V_AUX_S5 PR4303 AMBER
Charging = Amber
84.2N702.J31 5V_AUX_S5 680R2J-3-GP PQ4305 *LED’s are off if no AC jack pluged
2N7002K-2-GP PIN7 PIN8
4 3 WHITE
in
G
DY
E

5 2
Note:ZZ.27002.F7C01

LMBT3906LT1G-1-GP 24 DC_BATFULL CHARGE_LED 24


1

D PQ4204_D 1 2 PQ4205_B B
PR4301 PQ4304 6 1
S 10KR2J-L-GP 84.T3906.E11 R4310
C

Do Not Stuff 2N7002KDW-1-GP


PQ4303 75.27002.F7C
2

PQ4205_C 1 2

PR4304
1K2R2J-1-GP CHG_WHITE

19V_AD_JK

19V_AD_JK 19V_AD+
PU4301
2

SM4378NSKPC-TRG-GP
PR4305 8 D S 1
200KR2F-L-3-GP 7 D S 2
6 D S 3
A 5 D A
1

G
AD_DETECT 24

4
1
PC4306
1

PC4304 SC2K2P50V2KX-L-GP 084.04378.0037


PR4306
2

UMA
SCD1U25V2KX-L-GP

34K8R2F-1-GP
2

20161006 SB:20180705
Modify by power Eva
Wistron Corporation
2

PWR_CHG_ACG_A
44 PWR_CHG_ACG_A 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
INT IO (ATX/ DC/ BATT Conn)
Size Document Number Rev
A2
FAROE 14" Pavilion SA
Date: Monday, August 06, 2018 Sheet 43 of 106
5 4 3 2 1
5 4 3 2 1

OFFPAGE
PG4408
SSID = Charger
Do Not Stuff 19V_AD+ AD+_TO_SYS 19V_DCBATOUT BT+_R
2 1 PWR_CHG_CLK PU4401 PR4404 PU4402
24,43 BAT_SMB_SCL
SM3317NSQAC-TRG-GP SM3317NSQAC-TRG-GP
PG4410 1 S D 8 1 2 8 D S 1
Do Not Stuff 2 S D 7 D01R3721F-GP-U 7 D S 2 2018.7.20 Change to dual N MOS
2 1 PWR_CHG_DATA 3 S D 6 6 D S 3
24,43 BAT_SMB_SDA D 5 5 D

1
G G

1
PR4418 SB:Change to 0.1uF(20180706) PC4407

4
Do Not Stuff SCD1U25V2KX-L-GP 084.03317.0A37 PG4401 PG4402 084.03317.0A37

2
D 1 2 PWR_CHG_IDCHG Do Not Stuff Do Not Stuff D
24 BT_IA

2
PWR_CHG_ACG 2 1 PWR_CHG_ACG_A PWR_CHG_BTG_A 1 2 PWR_CHG_BTG
DY
PR4409
PR4413 PR4421 Do Not Stuff PR4411
Do Not Stuff 4K02R2F-GP 1 2 4K02R2F-GP 19V_DCBATOUT
1 2 PWR_CHG_IADP
24 AD_IA
PC4403
SCD1U25V2KX-L-GP
PWR_CHG_ACG_A 1 2
43 PWR_CHG_ACG_A

PWR_CHG_ACP PWR_CHG_ACN

1
3D3V_AUX_S5 PC4405 PC4425

SC4D7U25V5KX-L2-GP

SC4D7U25V5KX-L2-GP
PR4444

1
Do Not Stuff PC4402 PC4404 PQ4403

G1

D1

D1

D1

D1

2
1
1 2 PWR_CHG_PROCHOT# SCD1U25V2KX-L-GP SCD1U25V2KX-L-GP AON7934-GP
22,24,44,46 PROCHOT#_CPU 3D3V_AUX_S5 PR4430 PWR_CHG_REGN

Q1
2

2
100KR2F-L3-GP
PQ4406

Q2
10 S1/D2
1
PR4445 PR4427

2
Do Not Stuff 100KR2F-L3-GP 4 3 PWR_AC_IN# 19V_AD_JK PR4415 CHG_AGND CHG_AGND

8 G2

7 S2

6 S2

5 S2
1 2 PROCHOT#_BAT RB520S30-GP 20R5J-GP

Q2
22,24,44,46 PROCHOT#_CPU AC_IN 5 2 PWR_CHG_ON# PD4404 A K PWR_CHG_VCC_R 2 1 PWR_CHG_VCC
PWR_CHG_BOOT_A

BT+_R
2

1
PWR_CHG_ILIM

Q1
6 1 83.R2003.A8M PC4401 PC4409
BT+ SC2D2U10V3KX-L-GP
2nd = 083.52030.008F SC1U25V3KX-1-GP

1
2

2
SSM6N7002KFU-GP PD4405 A K RB520S30-GP

1
075.67002.007C PR4414 PC4417
2ND = 075.27002.0E7C CHG_AGND 10R2F-L-GP SCD047U25V2KX-GP
3rd = 75.27002.F7C 83.R2003.A8M

28

2
2nd = 083.52030.008F PU4403

1
PR4408
Cyntec. 6.8mm x 7.3mm x 3.0mm

VCC
3D3V_AUX_KBC

Do Not Stuff
C C
19V_AD_JK PD4406 24 DCR: 28.0m~33.0mOhm BT+
RB520S30-GP PWR_CHG_ACN 1 REGN Idc : 5.5 A , Isat : 6.5A BT+_R
A K PWR_CHG_ACDET_A 19V_AD+ ACN PR4417
DY DY PL4401

2
3D3V_S5 18 PWR_CHG_BTG D01R3721F-GP-U
PR4434 PR4416 PWR_CHG_ACP 2 BATDRV
ACP
1

BT+_R
Do Not Stuff

Do Not Stuff

83.R2003.A8M PR4403 1 2 1 2
4K02R2F-GP 17 PWR_CHG_BATSRC COIL-4D7UH-33-GP
2nd = 083.52030.008F BATSRC

1
PR4406 1 2 PWR_CHG_CMSRC 3
316KR2F-GP CMSRC 68.4R71A.20H
2nd = 068.4R710.1301 DY
25 PWR_CHG_BOOT
2

BTST

1
PR4448 PD4407 PR4450 PWR_CHG_ACG 4 PC4423
PWR_CHG_DATA ACDRV

Do Not Stuff
Do Not Stuff RB520S30-GP 100KR2F-L3-GP PC4420 PC4421 PC4422

2
1 2 PWR_AC_IN# SC10U25V3MX-GP
SC10U25V3MX-GP
SC10U25V3MX-GP
24 AC_IN#

2
1

1
PWR_CHG_CLK A K PWR_CHG_ACDET_B 1 2 PWR_CHG_ACDET 6 26 PWR_CHG_HG
ACDET HIDRV PC4419 PG4403 PG4404

SCD1U25V2KX-L-GP
PR4449

Do Not Stuff

Do Not Stuff
1

1
Do Not Stuff 83.R2003.A8M PR4410 PC4410

2
PWR_CHG_ON# PWR_CHG_PH

SCD01U25V2KX-L1-GP
1 2 2nd = 083.52030.008F 52K3R2F-L-GP 27
24 CHG_ON# PWR_CHG_DATA PHASE
11

2
SDA
2018.7.25

2
PWR_CHG_CLK 12 23 PWR_CHG_LG Change to 0603
SCL LODRV CHG_AGND
PR4429 PWR_CHG_REGN PG4413
CHG_AGND 100KR2J-4-GP Do Not Stuff PWR_CHG_SRP_A
1 2 22 1 2
GND

1
PR4425 PC4416
PMON : Total system power PWR_CHG_ACOK 5 10R2F-L1-GP SCD1U25V2KX-L-GP
PG4412 PR4433 ACOK 20 PWR_CHG_SRP CHG_AGND 1 2

2
Do Not Stuff 120KR2J-L-GP SRP PR4424
2 1 PWR_CHG_PMON 1 2 PWR_CHG_IADP 7 10R2F-L1-GP
46 PWR_VCORE_PSYS IADP PWR_CHG_SRN PWR_CHG_SRN_A
19 1 2
SRN
B PWR_CHG_IDCHG 8 B
IDCHG 3D3V_AUX_S5

1
PR4405 PC4412
PWR_CHG_IADP PC4408 PWR_CHG_PMON 9 10KR2F-L1-GP SCD1U25V2KX-L-GP
PG4414 2018.7.23 PMON 16 PWR_CHG_BM# 2 1
DY

2
1

1
Do Not Stuff PC4411 PR4428 delet TB_STAT#
AC_IN PWR_CHG_ACOK

SC100P50V2JN-L-GP
1 2 SC100P50V2JN-L-GP Do Not Stuff

1
PWR_CHG_REGN PROCHOT#_BAT 10 15 PWR_CHG_BATPRES#
Total Power Setting
2
PROCHOT# BATPRES# CHG_AGND

1
2

2
PWR_CHG_CMPIN 13 PR4451
NC#13 10R2F-L1-GP
1

PR4431 CHG_AGND CHG_AGND PWR_CHG_CMPOUT 14

2
Do Not Stuff NC#14
PR4407 45W 73.2K ADT PROTECT 110%
DY 29
PR4407 45W 105K ADT PROTECT 130% IADP : AC adapter detect current : PWR_CHG_ILIM 21 THERMAL_PAD
PR4407 65W 150K ADT PROTECT 110% ILIM
IADP : 20 or 40 x ( Vacp - Vacn ) / 10mohm
2

PR4407 65W 196K ADT PROTECT 130%


PWR_CHG_CMPOUT
IDCHG : Dischange detect current : DY

1
PR4432 BQ24781RUYR-GP CHG_AGND
Do Not Stuff
= 8 or 16 x ( Vsrn - Vsrp ) 074.24781.0073
1

PR4402 SB:Change to BQ24781(20180621)


PWR_CHG_IADP Do Not Stuff

2
DY
1

PR4407
2

R1 Do Not Stuff
DY
PQ4408 上上 for BQ24780S
2

PWR_CHG_CMPIN
PQ4408 DY for BQ24781
1

PQ4408
A PWR_CHG_CMPOUT A
PR4401 G
R2 Do Not Stuff
PWR_CHG_PROCHOT# UMA
D
2

S DY
Wistron Corporation

1
PC4426
CHG_AGND Do Not Stuff Do Not Stuff 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Do Not Stuff Taipei Hsien 221, Taiwan, R.O.C.
PR4401 100K for BQ24780S

2
2ND = 084.27002.0N31
PR4401 0 ohm for BQ24781 3rd = 084.27002.0L31 Title

DY
044_Power (Charger_BQ24780S)
Size Document Number Rev
Custom
FAROE 14" Pavilion SB
Date: Monday, August 06, 2018 Sheet 44 of 106
5 4 3 2 1
5 4 3 2 1

OFFPAGE IDC : 6A PWR_3D3V 3D3V_DSW


PR4515 PG4519

24 S5_ENABLE
Do Not Stuff
1 2 PWR_3D3V_EN
19V_DCBATOUT PWR_DCBATOUT_3D3V
Vin Operating range : 4~23V
Vin_Max : 25V
PR4501 PC4506
Cyntec. 6.8 x7.3 x 3.0mm
DCR: 14~15mOhm
OCP : 8A 1
Do Not Stuff
2
PG4515 Do Not Stuff SCD1U25V2KX-L-GP
Do Not Stuff PWR_3D3V_BOOT 2 1 PWR_3D3V_BOOT_A 2 1 Idc : 9A , Isat : 18A 17.8.25 update
1 2 Ilimt : 8A 22uF PCS PG4520
Do Not Stuff
PL4501 PWR_3D3V
PWR_DCBATOUT_3D3V PU4501 Suggestion 4 1 2
PG4516
D Do Not Stuff 2 6 PWR_3D3V_PH 1 2 D
1 2 3 IN#2 LX#6 19 PG4521
4 IN#3 LX#19 20 Do Not Stuff
IN#4 LX#20 IND-1D5UH-23-GP-U DY

1
PC4501 5 DY PC4513 PC4509 PC4510 PC4511 PC4525 PC4512 1 2
IN#5

Do Not Stuff

Do Not Stuff

SC22U6D3V3MX-L1-GP

SC22U6D3V3MX-L1-GP

SC22U6D3V3MX-L1-GP

Do Not Stuff

SC22U6D3V3MX-L1-GP
PG4517 PC4502 PC4503 10 PWR_3D3V_5V_PG 68.1R510.10K
Do Not Stuff SC10U25V3MX-GP
SC10U25V3MX-GP PWR_3D3V_EN 12 NC#10 15

2
PR4551 1 2 PWR_3D3V_EN2 11 EN1 NC#15 16 PWR_3D3V_LDO PG4522
Do Not Stuff DY EN2 NC#16 Do Not Stuff

1
1 2 PWR_5V_EN PR4514 PWR_3D3V_BOOT 1 1 2
24 5V_S5_EN BS

1MR2J-1-GP
PG4518 PWR_3D3V_5V_PG 9 7
Do Not Stuff PWR_3D3V_FB 13 PG GND 8
1 2 14 FF GND 18 PG4523
17 OUT GND 21 Do Not Stuff

2
LDO GND 1 2
3D3V_AUX_S5
SY8288BRAC-GP
074.08288.0A43 PG4532 PG4524
Do Not Stuff Do Not Stuff
EN rating 25V PWR_3D3V_LDO_R 1 2 PWR_3D3V_LDO 1 2 1 2
EN Rising Threshold : 0.8V 2018.2.26

1
EN Falling Threshold : 0.4V 1K->499K R4503
PR4509 D5R2F-1-GP PC4507
499KR2F-1-GP SC4D7U6D3V3KX-L-GP PG4530

2
19V_DCBATOUT 1 2 Do Not Stuff
PWR_3D3V_VOUT 1 2
DY

2
2018.2.26 PC4508 PC4526 PR4506
Trace used 10 mil

Do Not Stuff
200K->499K SC1KP50V2KX-L-1-GP 1KR2F-3-GP
PR4508 1 2 PWR_3D3V_FB2 2 1

1
C 499KR2F-1-GP C
2018.3.1

2
->Stuff

DY PR4505
Do Not Stuff
3D3V_AUX_S5 1 2 R4501 1 2
PCH_DPWROK 20,24,89
Do Not Stuff

R4502 1 2
Do Not Stuff
2018.1.11 ->pad
19V_DCBATOUT PWR_DCBATOUT_5V
PG4552 PWR_5V 5V_S5
Do Not Stuff PG4551
1 2 Do Not Stuff
5V_AUX_S5 1 2
PG4553
Do Not Stuff
1 2
PWR_DCBATOUT_5V

2
PU4551
PG
9 PWR_5V_PG 1
PR4552
DY 2
Do Not Stuff
17.8.25 update IDC:8A PG4554
Do Not Stuff
IN#2 Cyntec. 6.86 x 6.47 x 3.0mm 22uF PCS
1 2
PG4555 3 1 PWR_5V_BOOT 1 2PWR_5V_BOOT_A 1 2 DCR: 9~10mOhm Suggestion 5
IN#3 BS
1

1
Do Not Stuff PC4552 PC4554 PC4555 PR4554 Idc : 11A , Isat : 22A PG4556
Do Not Stuff

1 2 4 Do Not Stuff PC4553 Do Not Stuff


IN#4 SCD1U25V2KX-L-GP 1 2
PL4502
2

2
PG4557 5 PWR_5V
Do Not Stuff IN#5 PG4558
1 2 6 PWR_5V_PH 1 2 Do Not Stuff
B
SC4D7U25V5KX-L2-GP LX#6 1 2 B
PG4559 SC4D7U25V5KX-L2-GP PWR_5V_PG 10 19
Do Not Stuff NC#10 LX#19 IND-1D5UH-23-GP-U PG4560

1
Do Not Stuff
1 2 20 68.1R510.10K PC4556 PC4557 PC4558 PC4559 PC4560 PC4561 Do Not Stuff
16 LX#20 1 2
DY NC#16 Trace used 10 mil DY
PG4561 PG4562

2
Do Not Stuff Do Not Stuff PG4563
1 2 14 PWR_5V_VOUT 1 2 Do Not Stuff
PWR_5V_VCC 17 OUT SC22U6D3V3MX-L1-GP 1 2
VCC SC22U6D3V3MX-L1-GP
1

PC4562 13 PWR_5V_FB 1 2PWR_5V_FB_A 2 1 SC22U6D3V3MX-L1-GP PG4564


SC2D2U10V3KX-L-GP FF PR4555 SC22U6D3V3MX-L1-GP Do Not Stuff
PWR_5V_EN 12 PC4563 1KR2F-3-GP 5V_AUX_S5 SC22U6D3V3MX-L1-GP 1 2
2

EN1 SC1KP50V2KX-L-1-GP
PWR_5V_EN2 11 15 PWR_5V_LDO 1 2 PG4566
EN2 LDO Do Not Stuff
1

1
PC4551 PG4565 1 2
PR4556 SC4D7U25V5KX-L2-GP Do Not Stuff

GND

GND

GND

GND
1MR2J-1-GP

2
2018.2.26
1K->499K 7 SY8288CRAC-GP

18

21
2

PR4557 074.08288.0B43
499KR2F-1-GP
19V_DCBATOUT 1 2
2

PR4560 PC4564
A 499KR2F-1-GP Do Not Stuff UMA A
1

2018.2.26
Added
DY
1

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
EN rating 25V
EN Rising Threshold : 0.8V Title
Power (SY8286B/SY8288C_3V/5V)
Ilimt : 8A Size Document Number Rev
Custom FAROE 14" Pavilion SA
Date: Monday, August 06, 2018 Sheet 45 of 106
5 4 3 2 1
5 4 3 2 1

Main Func = CPU_CORE


OFFPAGE
2018.1.17 updated
PR4602
Do Not Stuff
1 2 PWR_CPU_PROCHOT# PWR_VREF
22,24,44 PROCHOT#_CPU
PR4603
Do Not Stuff
1 2 PWR_VCORE_ALERT#
7 SVID_ALERT#_CPU 1V_S3
2018.4.17

1
21K->35.7K
PR4607
Do Not Stuff PR4604 PR4605 PR4606
1 2 VIDSCK_CPU_R 4K22R2F-GP 9K53R2F-GP 35K7R3F-GP
7 SVID_CLK_CPU

1
PR4609

PR4610

PR4611
D PC4602 D

2
SCD1U25V2KX-L-GP

PWR_VCORE_SET1_A

PWR_VCORE_SET2_A

PWR_VCORE_SET3_A
PR4608

2
Do Not Stuff

1
1 2 VIDSOUT_CPU_R
7 SVID_DATA_CPU
DY
PR4612

1
Do Not Stuff PR4614
PWR_IMVP_PWRGD

45D3R2F-L-GP

Do Not Stuff

100R2F-L3-GP

Do Not Stuff
1 2
26,40 VCORE_PWRGD
PR4613 PR4615
226R2F-GP 392R2F-GP
PR4616

2
Do Not Stuff
1 2 PWR_VR_EN VIDSOUT_CPU_R

PWR_VCORE_SET1

PWR_VCORE_SET2

PWR_VCORE_SET3
40 VCORE_EN PWR_VCORE_ALERT#
VIDSCK_CPU_R

PR4617 5V_S5
Do Not Stuff UMA
2 1 PWR_VCORE_RTN 1V_S3 PR4647 2 1
7 VSSCORE_SENSE

1
PR4618 71K5R2F-1-GP PU4601
DY

1
PR4627 PR4619 8D2R3F-GP PR4646 2 1 PWR_VCORE_PSYS 46
Do Not Stuff Do Not Stuff Do Not Stuff PSYS 36
DIS PWM_SA PWR_VCCSA_PWM 50

1
2 1 PWR_VCORE_VSEN 2018.4.17
7 VCCCORE_SENSE

2
PR4601 10.7K->18.2K PWR_VREF 19V_DCBATOUT
100R2F-L3-GP PR4620 PR4621 PR4622 PWR_VCORE_VCC 13

2
PWR_CPU_PROCHOT# 1 2 PWR_VCORE_VRHOT# 4K22R2F-GP 9K1R2F-1-GP 18K2R2F-L-GP VCC

1
2018.4.17 PR4628

1
PR4623 45.3K->41.2k PC4603 PWR_VCORE_SET1 2

PWR_CORE_SET1_B

PWR_VCORE_SET2_B

PWR_VCORE_SET3_B
SC4D7U6D3V3KX-L-GP PWR_VCORE_SET2 SET1 PWR_VCCSA_ISUMP PWR_VCCSA_ISUMP 50
PR4624 2D2R3F-L-GP 5 40 PC4601
1
Do Not Stuff
DY2 Do Not Stuff

2
1 2 PWR_VCCGT_VSEN 41K2R2F-GP PWR_VCORE_SET3 6 SET2 ISENP_SA
8 VCCGT_SENSE SET3 PWR_VCCSA_ISUMN
41
PWR_VCCSA_ISUMN 50

2
ISENN_SA

2
PR4625

2
Do Not Stuff

1
1 2 PWR_VCCGT_RTN PC4606 2018.06.01 PC4605
8 VSSGT_SENSE PWR_VCORE_VIN
C SCD22U25V3KX-GP 12 Change Size SCD1U25V2KX-L-GP C

1
VIN

1
PC4604 PR4632

2
PR4631 SCD47U25V3KX-1GP 3D9R2F-GP
Do Not Stuff PR4629 PR4630 PR4626 1 2 PWR_VREF_A 1 2 PWR_VREF 42
2 1 PWR_VCCSA_RTN 95D3R2F-GP 143R2F-1-GP 130R2F-1-GP PWR_VCCGT_IMON 30 VREF06/PSET 22
8 VSSSA_SENSE IMON_AUXI PWM_AUXI PWR_VCCGT_PWM 48
PC4608 2018.4.17

2
Do Not Stuff PWR_VREF 48.7K->49.9K
PWR_VCCGT_ISUMP 48

2
PR4634 PR4635 29 PWR_VCCGT_ISUMP PC4607
1
Do Not Stuff 49K9R2F-L-GP PWR_VCORE_IMON 1 ISENP_AUXI 28 PWR_VCCGT_ISUMN DY2 Do Not Stuff

2 1 PWR_VCCSA_FB2 DY 1 2 PWR_VCCSA_IMON 39 IMON_MAIN ISENN_AUXI PWR_VCCGT_ISUMN 48


8 VCCSA_SENSE

1
IMON_SA

2
3D3V_S0 2018.06.01

2
2018.1.25 Change Size PC4609
PWR_VCORE_PSYS PC4610 PR4636 1 2 10KR2F-L1-GP PWR_IMVP_PWRGD 38 udapete SCD1U25V2KX-L-GP
44 PWR_VCORE_PSYS

1
PWR_VREF 2018.1.17 2018.4.17 PWR_VCORE_VRHOT# 31 VR_READY 16
Do Not Stuff

1
2018.05.28 udapete 15K->13.7k VIDSCK_CPU_R PR4638 1 2 49D9R2F-L1-GP PWR_VCORE_SCLK 34 VR_HOT# PWM2_MAIN PWR_VCORE_PWMB 47
Delete PR4640 PR4641 DY VIDSOUT_CPU_R PR4639 1 2 10R2F-L1-GP PWR_VCORE_SDIO
PWR_VCORE_ALERT#
32 VCLK
VDIO
38K3R2F-GP 13K7R2F-GP 33
1 2 PWR_VCORE_IMON_A 1 2 ALERT# 10 PWR_VCORE_ISUMP_A DY
DY ISEN1P_MAIN PWR_VCORE_ISUMP_A 47

2
PWR_VR_EN 37 PR4683 PC4611
2018.1.17 PC4612 EN 1R2F-GP Do Not Stuff

2
PWR_VCCGT_VSEN PWR_VCORE_ISEN1N_B

Do Not Stuff
udapete 27 7 2 1
PWR_VCORE_ISUMN_A 47

2 1
PR4678 PR4642 VSEN_AUXI ISEN1N_MAIN
NTC-100K-12-GP-U 41K2R2F-GP

1
1 2 PWR_VCORE_IMON_B 1 2 2018.06.01 PC4613
PWR_VCCGT_COMP 26 Change Size SCD1U25V2KX-L-GP

1
COMP_AUXI
B = 4250 PWR_VCCGT_FB 24 2018.1.25
PWR_VCCGT_RTN 25 FB_AUXI udapete
5V_S5 RGND_AUXI 17
PWM1_MAIN PWR_VCORE_PWMA 47
2018.4.17 PR4645
19.6K->21.5k 1 2 PWR_VCORE_DRVEN_SET 18
PR4650 Do Not Stuff DRVEN_SET 9 PWR_VCORE_ISUMP_B
PR4648 PR4649 PR4651 ISEN2P_MAIN PWR_VCORE_ISUMP_B 47
21K5R2F
PWR_VCCGT_VSEN 1 2 PWR_VCCGT_COMP_B 1 2 1 2 PWR_VCCGT_COMP_A 1 2 8 PWR_VCORE_ISEN2N_B PR4684 2 1 1R2F-GP
PWR_VCORE_COMP ISEN2N_MAIN PWR_VCORE_ISUMN_B 47
10KR2F-L1-GP Do Not Stuff Do Not Stuff 4
COMP_MAIN 35
DRVEN PWR_VCORE_FCCM# 47,48,50

2
2018.4.17 PC4616 1 2 SC220P50V2KX-3GP PC4617 1 2 SC68P50V2JN-1GP PWR_VCORE_FB 3 PWR_VREF
B 150pF->220pF 2018.4.17 PWR_VCORE_RTN 48 FB_MAIN 2018.06.01 PC4615 B
PC4618 PR4653 82pF->68pF RGND_MAIN 23 PWR_VCCGT_TSEN Change Size SCD1U25V2KX-L-GP

1
Do Not Stuff Do Not Stuff TSEN_AUXI
1 2PWR_VCCGT_FB_A 1 2 PWR_VCORE_VSEN 47
DY VSEN_MAIN

1
DY 11 PWR_VCORE_TSEN PR4654 PR4655
PWR_VCCSA_COMP 43 TSEN_MAIN 12KR2F-L-GP 15K8R2F-GP
COMP_SA
2018.4.17 PWR_VCCSA_FB 45

2
46.4k->64.9k PWR_VCCSA_RTN 44 FB_SA
PR4659 RGND_SA PWR_VCCGT_TSEN_B PWR_VCORE_TSEN_B
PR4657 PR4658 PR4660
64K9R2F-1-GP PR4676
PWR_VCORE_VSEN 1 2PWR_VCORE_COMP_B 1 2 1 2 PWR_VCORE_COMP_A 1 2 14 NTC-100K-12-GP-U

1
10KR2F-L1-GP Do Not Stuff 15 NC#14 1 2
Do Not Stuff 19 NC#15 49 PR4661 PR4662
NC#19 GND 69.60011.221
PC4619 1 2 PC4620 1 2 SC68P50V2JN-1GP 20 845R2F-GP 174R2F-GP
PC4621
SC330P50V2KX-3GP 2018.4.17 21 NC#20 B = 4250
1 2 PWR_VCORE_FB_A 2018.4.17 PR4663 1 2 82pF->68pF NC#21
DY

2
150pF->330pF Do Not Stuff 2018.1.17
RT3602AJGQW-GP PR4664 1 2 110KR2F-L-GP PWR_VCCGT_TSEN_A udapete
Do Not Stuff DY 2018.1.17
074.03602.0A73
udapete PR4681
PR4668 2018.1.25 NTC-100K-12-GP-U
PR4666 PR4667 PR4669 PWR_VCORE_TSEN_A
57K6R2F-GP udapete 1 2
PWR_VCCSA_FB2 1 2 PWR_VCCSA_COMP_B 1 2 1 2 PWR_VCCSA_COMP_A
1 2 69.60011.221
2018.4.17
PC4623 B = 4250

1
10KR2F-L1-GP 330P->470P Do Not Stuff Do Not Stuff
PC4622 1 2 SC470P50V2KX-L-GP 1 2 PR4670 PR4671
PR4677 1 2 110KR2F-L-GP 22K6R2F-1-GP 16K9R2F-GP
SC68P50V2JN-1GP
PC4624

1 2

1 2
PR4673 PWR_VCCGT_TSEN_C PWR_VCORE_TSEN_C
1 2 PWR_VCCSA_FB_A 1 2
PR4674 PR4675
432R2F-GP 143R2F-1-GP
Do Not Stuff DY Do Not Stuff DY

2
A A

UMA

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Power (ISL95859_CPUCORE(1/3))
Size Document Number Rev
Custom
FAROE 14" Pavilion SA
Date: Monday, August 06, 2018 Sheet 46 of 106

5 4 3 2 1
5 4 3 2 1

Main Func = CPU_CORE 19V_DCBATOUT

1
2018.06.04 2018.4.17
PC4702, PC4704->DY PC4702 PC4703 PC4704 PC4705
Delete PG4701~PG4705 2018.06.04 SC10U25V3MX-GP
SC10U25V3MX-GP
SC10U25V3MX-GP
SC10U25V3MX-GP

2
PC4701, PC4710->stuff

D
5V_S5 19V_DCBATOUT SKL_U42 D

Icc(max)=64A
TDC=42A

Confirm with EE

1
PC4706 22uF/0805 total 32pcs
SC1U6D3V1MX-GP (78.22610.L2L)

2
PR4702 2018.7.26
1R2F-GP Change to 1R PWR_VCORE_BOOTA_RC
2 1 PWR_VCORE_VCCDA

1
2018.1.17

1
PC4709 PR4703 udapete

29

10
11

34
3

8
9
SC1U6D3V1MX-GP
PU4702 2D2R3-1-U-GP PC4707
Cyntec. 6.8mm x7.6mmx4.0mm
2

SCD22U25V3KX-GP 1V_CPU_CORE

VDRV
VCIN

VIN
VIN
VIN
VIN

VIN
DCR: 0.66m Ohm+/-7%

2
2
Idc : 36A , Isat : 45A
PR4704 31 5 PWR_VCORE_BOOTA
Do Not Stuff NC#31 BOOT 7 PWR_VCORE_BOOTA_R PL4702
2 1 PWR_VCORE_PWM_RA 1 PHASE
46 PWR_VCORE_PWMA PWM PWR_VCORE_SWA
16 1 2
2 1 PWR_VCORE_FCCM#A 2 VSWH#16 17 COIL-D15UH-2-GP
46,47,48,50 PWR_VCORE_FCCM# ZCD_EN# VSWH#17
PR4705 18 68.R1510.20A
Do Not Stuff 30 VSWH#18 19
NC#30 VSWH#19 20 2018.8.2
VSWH#20 21 Change to 470U PC4717

1
6 VSWH#21 22
NC#6 VSWH#22

Do Not Stuff
23 PT4702
VSWH#23 24 PG4706 PG4707 SE470UF2VDM-GP
DY

2
27 VSWH#24 25
GL#27 VSWH#25 26 Check Do Not Stuff Do Not Stuff

1
33 VSWH#26
CGND

GL#33
PGND
PGND
PGND
PGND
PGND

PGND
NC#4

PANASONIC
PWR_VCORE_ISEN1P_GA ESR: 9 mohm

1
C SIC634CD-T1-GE3-GP C
4
32

12
13
14
15
28

35

2018.06.02 PR4721
Change P/N 316R2F-1-GP
074.00634.0073

2
PWR_VCORE_ISEN1P_GB

1
PR4708
316R2F-1-GP
2018.1.17
udapete PC4708

2
SCD47U25V3KX-1GP
1 2
46 PWR_VCORE_ISUMP_A

PR4709
2K55R2F-GP
2018.06.04 19V_DCBATOUT 1 2

Delete PG4708~PG4712 2018.1.17


CLOSE to IC udapete
1

2018.4.17
PC4701, PC4710->DY PC4701 PC4710 PC4711 PC4712 46 PWR_VCORE_ISUMN_A
2018.06.04 SC10U25V3MX-GP
SC10U25V3MX-GP
SC10U25V3MX-GP
SC10U25V3MX-GP
2

PC4701, PC4710->stuff
Check

SKL_U42
5V_S5 Icc(max)=64A
19V_DCBATOUT TDC=42A

B
Confirm with EE B
22uF/0805 total 36pcs
1

PC4713
SC1U6D3V1MX-GP
(78.22610.L2L)
2

PR4710 2018.7.26
1R2F-GP Change to 1R
2 1 PWR_VCORE_VCCDB PWR_VCORE_BOOTB_RC
1

2018.1.17
1

PC4716 PR4711 udapete


10
11

34
29
3

8
9

SC1U6D3V1MX-GP
PU4701 PC4714
2D2R3-1-U-GP Cyntec. 6.8mm x7.6mmx4.0mm
2

SCD22U25V3KX-GP 1V_CPU_CORE
DCR: 0.66m Ohm+/-7%
VCIN

VDRV

VIN
VIN
VIN
VIN

VIN

Idc : 36A , Isat : 45A


2

PR4701 31 5 PWR_VCORE_BOOTB
NC#31 BOOT 7 PWR_VCORE_BOOTB_R PL4701
Do Not Stuff
2 1 PWR_VCORE_PWM_RB 1 PHASE
46 PWR_VCORE_PWMB PWM PWR_VCORE_SWB
16 1 2
2 1 PWR_VCORE_FCCM#B 2 VSWH#16 17 COIL-D15UH-2-GP
46,47,48,50 PWR_VCORE_FCCM# ZCD_EN# VSWH#17
PR4712 18
Do Not Stuff 30 VSWH#18 19
68.R1510.20A
NC#30 VSWH#19 20 2018.8.2
VSWH#20 21 Change to 470U PC4718
VSWH#21

1
6 22
NC#6 VSWH#22
2

Do Not Stuff
23 PT4701
VSWH#23 24 PG4713 PG4714 Do Not Stuff
DY
DY

2
27 VSWH#24 25
GL#27 VSWH#25 26 Check Do Not Stuff Do Not Stuff
1

1
33 VSWH#26
CGND

GL#33
PGND
PGND
PGND
PGND
PGND

PGND
NC#4

PANASONIC
PWR_VCORE_ISEN2P_GA ESR: 9 mohm
1

SIC634CD-T1-GE3-GP
4
32

12
13
14
15
28

35

074.00634.0073 2018.06.02 PR4722


Change P/N 316R2F-1-GP
2

PWR_VCORE_ISEN2P_GB
1

A PR4715 A
316R2F-1-GP
2018.1.17
udapete PC4715
2

SCD47U25V3KX-1GP
1 2
46 PWR_VCORE_ISUMP_B UMA

PR4716
2K55R2F-GP
1 2
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
2018.1.17
udapete Title
46 PWR_VCORE_ISUMN_B
CLOSE to IC Power (ISL95859_CPUCORE(2/3))
Check Size
A2
Document Number Rev

FAROE 14" Pavilion SA


Date: Monday, August 06, 2018 Sheet 47 of 106
5 4 3 2 1
5 4 3 2 1

Main Func = CPU_CORE


19V_DCBATOUT PW R_DCBATOUT_VCCGTA

PG4802 PW R_DCBATOUT_VCCGTA
1 2

Do Not Stuff
PG4803

1
D 1 2 D
PC4802 PC4803 PC4804 PC4801
Do Not Stuff SC10U25V3MX-GP
SC10U25V3MX-GP
SC10U25V3MX-GP
SC10U25V3MX-GP

2
PG4804
1 2

Do Not Stuff
PG4801
1 2

Do Not Stuff
PG4805
1 2

Do Not Stuff 5V_S5


PG4806
1 2

Do Not Stuff 1

PC4808
SC1U6D3V1MX-GP
2

PW R_DCBATOUT_VCCGTA SKL_U42
2018.7.26
PR4802 Change to 1R
Icc(max)=28A
1R2F-GP TDC=12A
C 2 1 PW R_VCCGT_VCC_R PW R_VCCGT_BOOT C

Confirm with EE
1

PC4805 22uF/0805 total 26pcs


SC1U6D3V1MX-GP 2018.1.17 (78.22610.L2L)
2

21 udapete

4
2

6
7
8

PU4801
Cyntec. 6.8mm x7.6mmx4.0mm
VCIN

VIN
VIN
VIN

BOOT
VDRV

PC4806 PR4803 DCR: 0.66m Ohm+/-7%


SCD22U25V3KX-GP 2D2R3F-L-GP Idc : 36A , Isat : 45A
PR4805
Do Not Stuff 5 PW R_VCCGT_PHASE 1 2 PW R_VCCGT_BOOT_RC 2 1
PHASE 1V_VCCGT
PW R_VCCGT_FCCM#_R PW R_VCCGT_SW PL4801
2 1 1 16
46,47,50 PW R_VCORE_FCCM# ZCD_EN# VSWH#16 15
VSWH#15 14 1 2
2 1 PW R_VCCGT_PW M_R 22 VSWH#14 13 COIL-D15UH-2-GP
46 PW R_VCCGT_PW M PWM VSWH#13 12
Do Not Stuff VSWH#12 68.R1510.20A
PR4804
24
3 GL#24 19 PC4811 PC4809 PC4810
NC#3 GL#19
CGND

1
PGND
PGND
PGND
PGND
PGND
PGND

PT4801

Do Not Stuff

Do Not Stuff

Do Not Stuff
PG4807 PG4808 SE330U2VDM-4-GPDY DY DY

Do Not Stuff
Do Not Stuff

2
SIC534CD-T1-GE3-GP 074.00534.0043
23
20
18
17
11
10
9

2
B
79.33719.20C B
PW R_VCCGT_ISEN

1
PR4807
536R2F-1-GP PC4807 PANASONIC
SCD47U25V3KX-1GP
ESR: 9 mohm

2
1 2

PR4809 PR4810
88D7R2F-1-GP 10KR2F-L1-GP
2018.1.17 1 2 1 2
46 PW R_VCCGT_ISUMP udapete

PW R_VCCGT_NTC

PR4801
1 2

NTC-10K-29-GP-U
B = 3370
46 PW R_VCCGT_ISUMN 69.60011.201
CLOSE to IC
Check
A UMA A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
Power (ISL95859_CPUCORE(3/3))
Size Document Number Rev
A3
FAROE 14" Pavilion SA
Date: Monday, August 06, 2018 Sheet 48 of 106
5 4 3 2 1
5 4 3 2 1

Main Func = CPU HDMI CPU1A 1 OF 20 eDP


AL5 AG4
57 HDMI_DDI_TX_CPU_N2 DDI1_TXN0 EDP_TXN0 eDP_TX_CPU_N0 55
AL6 AG3
57 HDMI_DDI_TX_CPU_P2 DDI1_TXP0 EDP_TXP0 eDP_TX_CPU_P0 55
AJ5 AG2
57 HDMI_DDI_TX_CPU_N1 DDI1_TXN1 EDP_TXN1 eDP_TX_CPU_N1 55
AJ6 AG1
57 HDMI_DDI_TX_CPU_P1 DDI1_TXP1 EDP_TXP1 eDP_TX_CPU_P1 55
AF6 AJ4
57 HDMI_DDI_TX_CPU_N0 DDI1_TXN2 EDP_TXN2
AF5 AJ3
57 HDMI_DDI_TX_CPU_P0 DDI1_TXP2 EDP_TXP2
AE5 AJ2
57 HDMI_DDI_TX_CPU_N3 DDI1_TXN3 EDP_TXN3
D AE6 AJ1 D
57 HDMI_DDI_TX_CPU_P3 DDI1_TXP3 EDP_TXP3
AC4
AC3 DDI2_TXN0 AH4
DDI2_TXP0 EDP_AUX_N eDP_AUX_CPU_N 55
AC1 AH3
DDI2_TXN1 EDP_AUX_P eDP_AUX_CPU_P 55
AC2
AE4 DDI2_TXP1 AM7
AE3 DDI2_TXN2 DISP_UTILS
AE1 DDI2_TXP2 AC7
AE2 DDI2_TXN3 DDI1_AUX_N AC6
DDI2_TXP3 DDI1_AUX_P AD4
DDI2_AUX_N AD3
DDI2_AUX_P AG7
DDI3_AUX_N AG6
RN302 DDI3_AUX_P
1 4 HDMI_SCL_CPU
2 3 HDMI_SDA_CPU CN6
3D3V_S0 GPP_E13/DDPB_HPD0/DISP_MISC0 HDMI_DET_CPU 57
CM6
2018.1.11 updated GPP_E14/DDPC_HPD1/DISP_MISC1 CP7
SRN2K2J-5-GP GPP_E15/DPPD_HPD2/DISP_MISC2 CP6 EC_SCI#
#575412 eDP_RCOMP Guideline GPP_E16/DPPE_HPD3/DISP_MISC3 EC_SCI# 24
C Signal Trace Width Isolation Spacing Resistor Value Max Length CM7 eDP_HPD_CPU 55 C
eDP_RCOMP 5 mils 25 mils 24.9 Ω ±1% 600 mils GPP_E17/EDP_HPD/DISP_MISC4
CK11 eDP_BLEN_CPU 55
2018.1.11 updated EDP_BKLTEN CG11
EDP_VDDEN eDP_VDDEN_CPU 55
CH11
PCH strap pin: EDP_BKLTCTL eDP_BLCTRL_CPU 55

Display Port B Detected 1V_VCCIO

R301 1 2 24D9R2F-L-GPEDP_COMP AM6 3D3V_S0


GPP_E19 / Low = Not detected (Default) DISP_RCOMP
DDPB_CTRLDATA / High= Detected * HDMI_SCL_CPU CC8 RN301
CNV_BT_IF_SELECT This signal has a weak internal PD 57 HDMI_SCL_CPU HDMI_SDA_CPU CC9 GPP_E18/DPPB_CTRLCLK/CNV_BT_HOST_WAKE# 2 3
57 HDMI_SDA_CPU GPP_E19/DPPB_CTRLDATA Strap 18,24 NMI_SMI_DBG# EC_SCI# 1 4
CH4
PCH strap pin: CH3 GPP_E20/DPPC_CTRLCLK SRN10KJ-L-GP
GPP_E21/DPPC_CTRLDATA Strap
Display Port C Detected
CP4
CN4 GPP_E22/DPPD_CTRLCLK
GPP_E21 / Low = Not detected (Default)* GPP_E23/DPPD_CTRLDATA Strap
B B
DDPC_CTRLDATA High= Detected CR26
This signal has a weak internal PD CP26 GPP_H16/DDPF_CTRLCLK
GPP_H17/DDPF_CTRLDATA Strap
WHISKEY-LAKE-GP
PCH strap pin: ZZ.00CPU.271
Display Port D Detected 2018.1.11 updated
#575412 DDI Disabling and Termination Guidelines
Port Strap Enable Port Disable Port
GPP_E23 / Low = Not detected (Default)* Port 1 DDPB_CTRLDATA Pull up to 3.3 V with 2.2-k ohm ±5% resistor NC
DDPD_CTRLDATA High= Detected Port 2 DDPC_CTRLDATA Pull up to 3.3 V with 2.2-k ohm ±5% resistor NC
This signal has a weak internal PD Port 3 DDPD_CTRLDATA Pull up to 3.3 V with 2.2-k ohm ±5% resistor NC
Port 4 DDPF_CTRLDATA Pull up to 3.3 V with 2.2-k ohm ±5% resistor NC
PCH strap pin:
UMA
(EDS Reserved)

A
GPP_H17 Low = TBD Wistron Corporation A
High= TBD 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
This signal has a weak internal PD* Taipei Hsien 221, Taiwan, R.O.C.

This strap should sample LOW. Title


CPU (DDI/EDP)
Size Document Number Rev
A4 FAROE 14" Pavilion SA
Date: Monday, August 06, 2018 Sheet 3 of 106
5 4 3 2 1
5 4 3 2 1

Main Func = CPU


DDR4 Channel A ball type:Non Interleaved Type
CPU1B 2 OF 20

12 M_A_DQ0 M_A_DQ0 A26 V32 M_A_CLK#0


D DDR0_DQ0/DDR0_DQ0 DDR0_CKN0/DDR0_CKN0 M_A_CLK#0 12 D
12 M_A_DQ1 M_A_DQ1 D26 V31 M_A_CLK0
DDR0_DQ1/DDR0_DQ1 DDR0_CKP0/DDR0_CKP0 M_A_CLK0 12
12 M_A_DQ2 M_A_DQ2 D28 T32 M_A_CLK#1 2017.12.28
DDR0_DQ2/DDR0_DQ2 DDR0_CKN1/DDR0_CKN1 M_A_CLK#1 12
12 M_A_DQ3 M_A_DQ3 C28 T31 M_A_CLK1 updated
DDR0_DQ3/DDR0_DQ3 DDR0_CKP1/DDR0_CKP1 M_A_CLK1 12
M_A_DQ[0:7] 12 M_A_DQ4 M_A_DQ4 B26
M_A_DQ5 C26 DDR0_DQ4/DDR0_DQ4 U36 M_A_CKE0
12 M_A_DQ5 DDR0_DQ5/DDR0_DQ5 DDR0_CKE0/DDR0_CKE0 M_A_CKE0 12
12 M_A_DQ6 M_A_DQ6 B28 U37 M_A_CKE1
DDR0_DQ6/DDR0_DQ6 DDR0_CKE1/DDR0_CKE1 M_A_CKE1 12
12 M_A_DQ7 M_A_DQ7 A28 U34
M_A_DQ8 B30 DDR0_DQ7/DDR0_DQ7 DDR0_CKE2/NC U35
12 M_A_DQ8 DDR0_DQ8/DDR0_DQ8 DDR0_CKE3/NC
12 M_A_DQ9 M_A_DQ9 D30
M_A_DQ10 B33 DDR0_DQ9/DDR0_DQ9 AE32 M_A_CS#0
12 M_A_DQ10 DDR0_DQ10/DDR0_DQ10 DDR0_CS#0/DDR0_CS#0 M_A_CS#0 12
12 M_A_DQ11 M_A_DQ11 D32 AF32 M_A_CS#1
DDR0_DQ11/DDR0_DQ11 DDR0_CS#1/DDR0_CS#1 M_A_CS#1 12
M_A_DQ[8:15] 12 M_A_DQ12 M_A_DQ12 A30 AE31 M_A_ODT0
DDR0_DQ12/DDR0_DQ12 DDR0_ODT0/DDR0_ODT0 M_A_ODT0 12
12 M_A_DQ13 M_A_DQ13 C30 AF31 M_A_ODT1
DDR0_DQ13/DDR0_DQ13 NC/DDR0_ODT1 M_A_ODT1 12
12 M_A_DQ14 M_A_DQ14 B32
M_A_DQ15 C32 DDR0_DQ14/DDR0_DQ14 AC37 M_A_A0
12 M_A_DQ15 DDR0_DQ15/DDR0_DQ15 DDR0_CAB9/DDR0_MA0 M_A_A0 12
12 M_A_DQ32 M_A_DQ32 H37 AC36 M_A_A1
DDR0_DQ16/DDR0_DQ32 DDR0_CAB8/DDR0_MA1 M_A_A1 12
12 M_A_DQ33 M_A_DQ33 H34 AC34 M_A_A2
DDR0_DQ17/DDR0_DQ33 DDR0_CAB5/DDR0_MA2 M_A_A2 12
12 M_A_DQ34 M_A_DQ34 K34 AC35 M_A_A3
DDR0_DQ18/DDR0_DQ34 NC/DDR0_MA3 M_A_A3 12
12 M_A_DQ35 M_A_DQ35 K35 AA35 M_A_A4
DDR0_DQ19/DDR0_DQ35 NC/DDR0_MA4 M_A_A4 12
M_A_DQ[32:39] 12 M_A_DQ36 M_A_DQ36 H36 AB35 M_A_A5
DDR0_DQ20/DDR0_DQ36 DDR0_CAA0/DDR0_MA5 M_A_A5 12
12 M_A_DQ37 M_A_DQ37 H35 AA37 M_A_A6
DDR0_DQ21/DDR0_DQ37 DDR0_CAA2/DDR0_MA6 M_A_A6 12
12 M_A_DQ38 M_A_DQ38 K36 AA36 M_A_A7
DDR0_DQ22/DDR0_DQ38 DDR0_CAA4/DDR0_MA7 M_A_A7 12
12 M_A_DQ39 M_A_DQ39 K37 AB34 M_A_A8
DDR0_DQ23/DDR0_DQ39 DDR0_CAA3/DDR0_MA8 M_A_A8 12
12 M_A_DQ40 M_A_DQ40 N36 W36 M_A_A9
C DDR0_DQ24/DDR0_DQ40 DDR0_CAA1/DDR0_MA9 M_A_A9 12 C
12 M_A_DQ41 M_A_DQ41 N34 Y31 M_A_A10
DDR0_DQ25/DDR0_DQ41 DDR0_CAB7/DDR0_MA10 M_A_A10 12
12 M_A_DQ42 M_A_DQ42 R37 W34 M_A_A11
DDR0_DQ26/DDR0_DQ42 DDR0_CAA7/DDR0_MA11 M_A_A11 12
12 M_A_DQ43 M_A_DQ43 R34 AA34 M_A_A12
DDR0_DQ27/DDR0_DQ43 DDR0_CAA6/DDR0_MA12 M_A_A12 12
M_A_DQ[40:47] 12 M_A_DQ44 M_A_DQ44 N37 AC32 M_A_A13
DDR0_DQ28/DDR0_DQ44 DDR0_CAB0/DDR0_MA13 M_A_A13 12
12 M_A_DQ45 M_A_DQ45 N35
M_A_DQ46 R36 DDR0_DQ29/DDR0_DQ45 AC31 M_A_A14
12 M_A_DQ46 DDR0_DQ30/DDR0_DQ46 DDR0_CAB2/DDR0_MA14 M_A_A14 12
12 M_A_DQ47 M_A_DQ47 R35 AB32 M_A_A15
DDR0_DQ31/DDR0_DQ47 DDR0_CAB1/DDR0_MA15 M_A_A15 12
13 M_B_DQ0 M_B_DQ0 AN35 Y32 M_A_A16
DDR0_DQ32/DDR1_DQ0 DDR0_CAB3/DDR0_MA16 M_A_A16 12
13 M_B_DQ1 M_B_DQ1 AN34
M_B_DQ2 AR35 DDR0_DQ33/DDR1_DQ1 W32 M_A_BA0
13 M_B_DQ2 DDR0_DQ34/DDR1_DQ2 DDR0_CAB4/DDR0_BA0 M_A_BA0 12
13 M_B_DQ3 M_B_DQ3 AR34 AB31 M_A_BA1
DDR0_DQ35/DDR1_DQ3 DDR0_CAB6/DDR0_BA1 M_A_BA1 12
M_B_DQ[0:7] 13 M_B_DQ4 M_B_DQ4 AN37 V34 M_A_BG0
DDR0_DQ36/DDR1_DQ4 DDR0_CAA5/DDR0_BG0 M_A_BG0 12
13 M_B_DQ5 M_B_DQ5 AN36
M_B_DQ6 AR36 DDR0_DQ37/DDR1_DQ5 V35 M_A_ACT_N
13 M_B_DQ6 DDR0_DQ38/DDR1_DQ6 DDR0_CAA8/DDR0_ACT# M_A_ACT_N 12
13 M_B_DQ7 M_B_DQ7 AR37 W35 M_A_BG1
DDR0_DQ39/DDR1_DQ7 DDR0_CAA9/DDR0_BG1 M_A_BG1 12
13 M_B_DQ8 M_B_DQ8 AU35
M_B_DQ9 AU34 DDR0_DQ40/DDR1_DQ8 C27 M_A_DQS_DN0
13 M_B_DQ9 DDR0_DQ41/DDR1_DQ9 DDR0_DQSN0/DDR0_DQSN0 M_A_DQS_DN0 12
13 M_B_DQ10 M_B_DQ10 AW35 D27 M_A_DQS_DP0 M_A_DQS_DP0 12
M_B_DQ11 AW34 DDR0_DQ42/DDR1_DQ10 DDR0_DQSP0/DDR0_DQSP0 D31 M_A_DQS_DN1 1D2V_S3 3D3V_S0
13 M_B_DQ11 DDR0_DQ43/DDR1_DQ11 DDR0_DQSN1/DDR0_DQSN1 M_A_DQS_DN1 12
M_B_DQ[8:15] 13 M_B_DQ12 M_B_DQ12 AU37 C31 M_A_DQS_DP1 M_A_DQS_DP1 12
M_B_DQ13 AU36 DDR0_DQ44/DDR1_DQ12 DDR0_DQSP1/DDR0_DQSP1 J35 M_A_DQS_DN4
13 M_B_DQ13 DDR0_DQ45/DDR1_DQ13 DDR0_DQSN2/DDR0_DQSN4 M_A_DQS_DN4 12

1
13 M_B_DQ14 M_B_DQ14 AW36 J34 M_A_DQS_DP4 M_A_DQS_DP4 12
M_B_DQ15 AW37 DDR0_DQ46/DDR1_DQ14 DDR0_DQSP2/DDR0_DQSP4 P34 M_A_DQS_DN5 R401
13 M_B_DQ15 DDR0_DQ47/DDR1_DQ15 DDR0_DQSN3/DDR0_DQSN5 M_A_DQS_DN5 12
B 13 M_B_DQ32 M_B_DQ32 BA35 P35 M_A_DQS_DP5 M_A_DQS_DP5 12 220KR2F-GP B
M_B_DQ33 BA34 DDR0_DQ48/DDR1_DQ32 DDR0_DQSP3/DDR0_DQSP5 AP35 M_B_DQS_DN0
13 M_B_DQ33 DDR0_DQ49/DDR1_DQ33 DDR0_DQSN4/DDR1_DQSN0 M_B_DQS_DN0 13
13 M_B_DQ34 M_B_DQ34 BC35 AP34 M_B_DQS_DP0 M_B_DQS_DP0 13 G

2
M_B_DQ35 BC34 DDR0_DQ50/DDR1_DQ34 DDR0_DQSP4/DDR1_DQSP0 AV34 M_B_DQS_DN1
13 M_B_DQ35 DDR0_DQ51/DDR1_DQ35 DDR0_DQSN5/DDR1_DQSN1 M_B_DQS_DN1 13
M_B_DQ[32:39] 13 M_B_DQ36 M_B_DQ36 BA37 AV35 M_B_DQS_DP1 M_B_DQS_DP1 13 D
M_B_DQ37 BA36 DDR0_DQ52/DDR1_DQ36 DDR0_DQSP5/DDR1_DQSP1 BB35 M_B_DQS_DN4 VTT_CNTL 51
13 M_B_DQ37 DDR0_DQ53/DDR1_DQ37 DDR0_DQSN6/DDR1_DQSN4 M_B_DQS_DN4 13
13 M_B_DQ38 M_B_DQ38 BC36 BB34 M_B_DQS_DP4 M_B_DQS_DP4 13 SM_PGCNTL S
M_B_DQ39 BC37 DDR0_DQ54/DDR1_DQ38 DDR0_DQSP6/DDR1_DQSP4 BF34 M_B_DQS_DN5 Q401
13 M_B_DQ39 DDR0_DQ55/DDR1_DQ39 DDR0_DQSN7/DDR1_DQSN5 M_B_DQS_DN5 13
13 M_B_DQ40 M_B_DQ40 BE35 BF35 M_B_DQS_DP5 M_B_DQS_DP5 13 PJA138KA-GP
M_B_DQ41 BE34 DDR0_DQ56/DDR1_DQ40 DDR0_DQSP7/DDR1_DQSP5 2018.1.29a
13 M_B_DQ41 DDR0_DQ57/DDR1_DQ41 084.00138.0A31
13 M_B_DQ42 M_B_DQ42 BG35 W37 M_A_ALERT_N 2nd = 084.01012.0031 Add 2nd
DDR0_DQ58/DDR1_DQ42 NC/DDR0_ALERT# M_A_ALERT_N 12
13 M_B_DQ43 M_B_DQ43 BG34 W31 M_A_PARITY
DDR0_DQ59/DDR1_DQ43 NC/DDR0_PAR M_A_PARITY 12
M_B_DQ[40:47] 13 M_B_DQ44 M_B_DQ44 BE37 F36 V_SM_VREF_CNTA
DDR0_DQ60/DDR1_DQ44 DDR_VREF_CA V_SM_VREF_CNTA 12
13 M_B_DQ45 M_B_DQ45 BE36 D35
M_B_DQ46 BG36 DDR0_DQ61/DDR1_DQ45 DDR0_VREF_DQ0 D37
13 M_B_DQ46 DDR0_DQ62/DDR1_DQ46 DDR0_VREF_DQ1
13 M_B_DQ47 M_B_DQ47 BG37 E36 V_SM_VREF_CNTB
DDR0_DQ63/DDR1_DQ47 DDR1_VREF_DQ V_SM_VREF_CNTB 13
C35 SM_PGCNTL
DDR_VTT_CTL

WHISKEY-LAKE-GP
ZZ.00CPU.271
UMA

A
Notes: A
1. DQ Bit Swapping is allowed within the same byte, and Byte Swapping is allowed within the same channel Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
2. Clock (CLK and CLK#) and Strobe (DQS and DQS#) differential signal swapping within a pair is not allowed. Taipei Hsien 221, Taiwan, R.O.C.
Also differential clock pair to clock pair swapping within a channel is not allowed.
Title
CPU (DDR_CHA)
Size Document Number Rev
B FAROE 14" Pavilion SA
Date: Monday, August 06, 2018 Sheet 4 of 106
5 4 3 2 1
5 4 3 2 1

Main Func = CPU


DDR4 Channel B ball type:Non Interleaved Type
CPU1C 3 OF 20
12 M_A_DQ16 M_A_DQ16 J22 AF28 M_B_CLK#0
DDR1_DQ0/DDR0_DQ16 DDR1_CKN0/DDR1_CKN0 M_B_CLK#0 13
12 M_A_DQ17 M_A_DQ17 H25 AF29 M_B_CLK0
D DDR1_DQ1/DDR0_DQ17 DDR1_CKP0/DDR1_CKP0 M_B_CLK0 13 D
12 M_A_DQ18 M_A_DQ18 G22 AE28 M_B_CLK#1
DDR1_DQ2/DDR0_DQ18 DDR1_CKN1/DDR1_CKN1 M_B_CLK#1 13
12 M_A_DQ19 M_A_DQ19 H22 AE29 M_B_CLK1
DDR1_DQ3/DDR0_DQ19 DDR1_CKP1/DDR1_CKP1 M_B_CLK1 13
M_A_DQ[16:23] 12 M_A_DQ20 M_A_DQ20 F25
M_A_DQ21 J25 DDR1_DQ4/DDR0_DQ20 T28 M_B_CKE0
12 M_A_DQ21 DDR1_DQ5/DDR0_DQ21 DDR1_CKE0/DDR1_CKE0 M_B_CKE0 13
12 M_A_DQ22 M_A_DQ22 G25 T29 M_B_CKE1
DDR1_DQ6/DDR0_DQ22 DDR1_CKE1/DDR1_CKE1 M_B_CKE1 13
12 M_A_DQ23 M_A_DQ23 F22 V28
M_A_DQ24 D22 DDR1_DQ7/DDR0_DQ23 DDR1_CKE2/NC V29
12 M_A_DQ24 DDR1_DQ8/DDR0_DQ24 DDR1_CKE3/NC
12 M_A_DQ25 M_A_DQ25 C22
M_A_DQ26 C24 DDR1_DQ9/DDR0_DQ25 AL37 M_B_CS#0
12 M_A_DQ26 DDR1_DQ10/DDR0_DQ26 DDR1_CS#0/DDR1_CS#0 M_B_CS#0 13
12 M_A_DQ27 M_A_DQ27 D24 AL35 M_B_CS#1
DDR1_DQ11/DDR0_DQ27 DDR1_CS#1/DDR1_CS#1 M_B_CS#1 13
M_A_DQ[24:31] 12 M_A_DQ28 M_A_DQ28 A22 AL36 M_B_ODT0
DDR1_DQ12/DDR0_DQ28 DDR1_ODT0/DDR1_ODT0 M_B_ODT0 13
12 M_A_DQ29 M_A_DQ29 B22 AL34 M_B_ODT1
DDR1_DQ13/DDR0_DQ29 NC/DDR1_ODT1 M_B_ODT1 13
12 M_A_DQ30 M_A_DQ30 A24 AG36 M_B_A0
DDR1_DQ14/DDR0_DQ30 DDR1_CAB9/DDR1_MA0 M_B_A0 13
12 M_A_DQ31 M_A_DQ31 B24 AG35 M_B_A1
DDR1_DQ15/DDR0_DQ31 DDR1_CAB8/DDR1_MA1 M_B_A1 13
12 M_A_DQ48 M_A_DQ48 G31 AF34 M_B_A2
DDR1_DQ16/DDR0_DQ48 DDR1_CAB5/DDR1_MA2 M_B_A2 13
12 M_A_DQ49 M_A_DQ49 G32 AG37 M_B_A3
DDR1_DQ17/DDR0_DQ49 NC/DDR1_MA3 M_B_A3 13
12 M_A_DQ50 M_A_DQ50 H29 AE35 M_B_A4
DDR1_DQ18/DDR0_DQ50 NC/DDR1_MA4 M_B_A4 13
12 M_A_DQ51 M_A_DQ51 H28 AF35 M_B_A5
DDR1_DQ19/DDR0_DQ51 DDR1_CAA0/DDR1_MA5 M_B_A5 13
M_A_DQ[48:55] 12 M_A_DQ52 M_A_DQ52 G28 AE37 M_B_A6
DDR1_DQ20/DDR0_DQ52 DDR1_CAA2/DDR1_MA6 M_B_A6 13
12 M_A_DQ53 M_A_DQ53 G29 AC29 M_B_A7
DDR1_DQ21/DDR0_DQ53 DDR1_CAA4/DDR1_MA7 M_B_A7 13
12 M_A_DQ54 M_A_DQ54 H31 AE36 M_B_A8
DDR1_DQ22/DDR0_DQ54 DDR1_CAA3/DDR1_MA8 M_B_A8 13
12 M_A_DQ55 M_A_DQ55 H32 AB29 M_B_A9
DDR1_DQ23/DDR0_DQ55 DDR1_CAA1/DDR1_MA9 M_B_A9 13
12 M_A_DQ56 M_A_DQ56 L31 AG34 M_B_A10
DDR1_DQ24/DDR0_DQ56 DDR1_CAB7/DDR1_MA10 M_B_A10 13
12 M_A_DQ57 M_A_DQ57 L32 AC28 M_B_A11
C DDR1_DQ25/DDR0_DQ57 DDR1_CAA7/DDR1_MA11 M_B_A11 13 C
12 M_A_DQ58 M_A_DQ58 N29 AB28 M_B_A12
DDR1_DQ26/DDR0_DQ58 DDR1_CAA6/DDR1_MA12 M_B_A12 13
12 M_A_DQ59 M_A_DQ59 N28 AK35 M_B_A13
DDR1_DQ27/DDR0_DQ59 DDR1_CAB0/DDR1_MA13 M_B_A13 13
M_A_DQ[56:63] 12 M_A_DQ60 M_A_DQ60 L28
M_A_DQ61 L29 DDR1_DQ28/DDR0_DQ60 AJ35 M_B_A14
12 M_A_DQ61 DDR1_DQ29/DDR0_DQ61 DDR1_CAB2/DDR1_MA14 M_B_A14 13
12 M_A_DQ62 M_A_DQ62 N31 AK34 M_B_A15
DDR1_DQ30/DDR0_DQ62 DDR1_CAB1/DDR1_MA15 M_B_A15 13
12 M_A_DQ63 M_A_DQ63 N32 AJ34 M_B_A16
DDR1_DQ31/DDR0_DQ63 DDR1_CAB3/DDR1_MA16 M_B_A16 13
13 M_B_DQ16 M_B_DQ16 AJ29
M_B_DQ17 AJ30 DDR1_DQ32/DDR1_DQ16 AJ37 M_B_BA0
13 M_B_DQ17 DDR1_DQ33/DDR1_DQ17 DDR1_CAB4/DDR1_BA0 M_B_BA0 13
13 M_B_DQ18 M_B_DQ18 AM32 AJ36 M_B_BA1
DDR1_DQ34/DDR1_DQ18 DDR1_CAB6/DDR1_BA1 M_B_BA1 13
13 M_B_DQ19 M_B_DQ19 AM31 W29 M_B_BG0
DDR1_DQ35/DDR1_DQ19 DDR1_CAA5/DDR1_BG0 M_B_BG0 13
M_B_DQ[16:23] 13 M_B_DQ20 M_B_DQ20 AM30
M_B_DQ21 AM29 DDR1_DQ36/DDR1_DQ20 Y28 M_B_BG1
13 M_B_DQ21 DDR1_DQ37/DDR1_DQ21 DDR1_CAA9/DDR1_BG1 M_B_BG1 13
13 M_B_DQ22 M_B_DQ22 AJ31 W28 M_B_ACT_N
DDR1_DQ38/DDR1_DQ22 DDR1_CAA8/DDR1_ACT# M_B_ACT_N 13
13 M_B_DQ23 M_B_DQ23 AJ32
M_B_DQ24 AR31 DDR1_DQ39/DDR1_DQ23 H24 M_A_DQS_DN2
13 M_B_DQ24 DDR1_DQ40/DDR1_DQ24 DDR1_DQSN0/DDR0_DQSN2 M_A_DQS_DN2 12
13 M_B_DQ25 M_B_DQ25 AR32 M_A_DQS_DP2 M_A_DQS_DP2 12
M_B_DQ26 AV30 DDR1_DQ41/DDR1_DQ25 DDR1_DQSP0/DDR0_DQSP2 C23 M_A_DQS_DN3 1D2V_S3
13 M_B_DQ26 DDR1_DQ42/DDR1_DQ26 DDR1_DQSN1/DDR0_DQSN3 M_A_DQS_DN3 12
13 M_B_DQ27 M_B_DQ27 AV29 D23 M_A_DQS_DP3 M_A_DQS_DP3 12
M_B_DQ28 AR30 DDR1_DQ43/DDR1_DQ27 DDR1_DQSP1/DDR0_DQSP3 G30 M_A_DQS_DN6
M_B_DQ[24:31] 13 M_B_DQ28 DDR1_DQ44/DDR1_DQ28 DDR1_DQSN2/DDR0_DQSN6 M_A_DQS_DN6 12

1
13 M_B_DQ29 M_B_DQ29 AR29 H30 M_A_DQS_DP6 M_A_DQS_DP6 12
M_B_DQ30 AV32 DDR1_DQ45/DDR1_DQ29 DDR1_DQSP2/DDR0_DQSP6 L30 M_A_DQS_DN7 R505
13 M_B_DQ30 DDR1_DQ46/DDR1_DQ30 DDR1_DQSN3/DDR0_DQSN7 M_A_DQS_DN7 12
13 M_B_DQ31 M_B_DQ31 AV31 N30 M_A_DQS_DP7 M_A_DQS_DP7 12 470R2F-GP
M_B_DQ48 BA32 DDR1_DQ47/DDR1_DQ31 DDR1_DQSP3/DDR0_DQSP7 AL31 M_B_DQS_DN2
13 M_B_DQ48 DDR1_DQ48/DDR1_DQ48 DDR1_DQSN4/DDR1_DQSN2 M_B_DQS_DN2 13
B 13 M_B_DQ49 M_B_DQ49 BA31 AL30 M_B_DQS_DP2 M_B_DQS_DP2 13 B

2
M_B_DQ50 BD31 DDR1_DQ49/DDR1_DQ49 DDR1_DQSP4/DDR1_DQSP2 AU31 M_B_DQS_DN3
13 M_B_DQ50 DDR1_DQ50/DDR1_DQ50 DDR1_DQSN5/DDR1_DQSN3 M_B_DQS_DN3 13
13 M_B_DQ51 M_B_DQ51 BD32 AU30 M_B_DQS_DP3 M_B_DQS_DP3 13
M_B_DQ52 BA30 DDR1_DQ51/DDR1_DQ51 DDR1_DQSP5/DDR1_DQSP3 BC31 M_B_DQS_DN6 SM_DRAMRST# 1 2
M_B_DQ[48:55] 13 M_B_DQ52
M_B_DQ53 DDR1_DQ52/DDR1_DQ52 DDR1_DQSN6/DDR1_DQSN6 M_B_DQS_DP6
M_B_DQS_DN6 13 DDR_DRAMRST# 12,13,89
13 M_B_DQ53 BA29 BC30 M_B_DQS_DP6 13 R504
M_B_DQ54 BD29 DDR1_DQ53/DDR1_DQ53 DDR1_DQSP6/DDR1_DQSP6 BH31 M_B_DQS_DN7 Do Not Stuff
13 M_B_DQ54 DDR1_DQ54/DDR1_DQ54 DDR1_DQSN7/DDR1_DQSN7 M_B_DQS_DN7 13
13 M_B_DQ55 M_B_DQ55 BD30 BH30 M_B_DQS_DP7 M_B_DQS_DP7 13
M_B_DQ56 BG31 DDR1_DQ55/DDR1_DQ55 DDR1_DQSP7/DDR1_DQSP7
13 M_B_DQ56 DDR1_DQ56/DDR1_DQ56
13 M_B_DQ57 M_B_DQ57 BG32 Y29 M_B_ALERT_N
DDR1_DQ57/DDR1_DQ57 NC/DDR1_ALERT# M_B_ALERT_N 13
13 M_B_DQ58 M_B_DQ58 BK32 AE34 M_B_PARITY
DDR1_DQ58/DDR1_DQ58 NC/DDR1_PAR M_B_PARITY 13
13 M_B_DQ59 M_B_DQ59 BK31 BU31 SM_DRAMRST#
M_B_DQ60 BG29 DDR1_DQ59/DDR1_DQ59 DRAM_RESET# 2018.1.12 updated
M_B_DQ[56:63] 13 M_B_DQ60
M_B_DQ61 DDR1_DQ60/DDR1_DQ60 SM_RCOMP_0 1
13 M_B_DQ61 BG30 BN28 2 #575412 DDR_COMP Guideline
M_B_DQ62 BK30 DDR1_DQ61/DDR1_DQ61 DDR_RCOMP0 BN27 SM_RCOMP_1 1 2 R501 121R2F-GP Signal Trace Width Trace Spacing Resistor Value(Ω ±1%) Max Length
13 M_B_DQ62 DDR1_DQ62/DDR1_DQ62 DDR_RCOMP1
13 M_B_DQ63 M_B_DQ63 BK29 BN29 SM_RCOMP_2 1 2 R502 80D6R2F-L-GP DDR_RCOMP[2:0] 15 mils 20-25 mils 121/80.6/100 500 mils
DDR1_DQ63/DDR1_DQ63 DDR_RCOMP2 R503 100R2F-L3-GP

WHISKEY-LAKE-GP
ZZ.00CPU.271
Notes:
UMA
1. DQ Bit Swapping is allowed within the same byte, and Byte Swapping is allowed within the same channel
A 2. Clock (CLK and CLK#) and Strobe (DQS and DQS#) differential signal swapping within a pair is not allowed. A
Also differential clock pair to clock pair swapping within a channel is not allowed. Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
CPU (DDR_CHB)
Size Document Number Rev
B FAROE 14" Pavilion SA
Date: Monday, August 06, 2018 Sheet 5 of 106
5 4 3 2 1
5 4 3 2 1

Main Func = PCH 2018.1.11 remove net "MIPI_ID" CC27


CPU1F
GPP_B15/GSPI0_CS0#
6 OF 20

15 PIRQA# PIRQA# CC32


CE28 GPP_A7/PIRQA#/GSPI0_CS1# CN22 2018.1.11 Delete net "SD_D3_WAKE"
CE27 GPP_B16/GSPI0_CLK GPP_D9/ISH_SPI_CS#/GSPI2_CS0# CR22
85 DGPU_PW R_EN# GPP_B17/GSPI0_MISO GPP_D10/ISH_SPI_CLK/GSPI2_CLK
Do Not Stuff TP601 1 PME# CE29 CM22 2018.3.1 Added
3D3V_S0 14 GSPI0_MOSI GPP_B18/GSPI0_MOSI Strap GPP_D11/ISH_SPI_MISO/GSPI2_MISO CP22
CA31 Strap GPP_D12/ISH_SPI_MOSI/GSPI2_MOSI GPP_D12 14
2018.1.11 ->0R PME# CA32 GPP_B19/GSPI1_CS0# CK22 ISH_I2C_SDA_CPUR603 2 1 Do Not Stuff
R609 2 1 1KR2J-L2-GP ISH_I2C_SDA_CPU CC29 GPP_A11/PME#/GSPI1_CS1#/SD_VDD2_PWR_EN# GPP_D5/ISH_I2C0_SDA CH20 ISH_I2C_SCL_CPUR604 2
DY 1 Do Not Stuff
SENSOR_I2C_SDA_Q 24,55,70
R610 2 1 1KR2J-L2-GP ISH_I2C_SCL_CPU CC30 GPP_B20/GSPI1_CLK GPP_D6/ISH_I2C0_SCL 2018.1.11 updated
DY SENSOR_I2C_SCL_Q 24,55,70
CA30 GPP_B21/GSPI1_MISO CH22
D RN603 GPP_B22/GSPI1_MOSI Strap GPP_D7/ISH_I2C1_SDA CJ22 PCH strap pin: D
1 4 TOUCH_I2C_SDA_CPU CNV_BRI_RSP CK20 GPP_D8/ISH_I2C1_SCL
61 CNV_BRI_RSP GPP_F5/CNV_BRI_RSP JTAG ODT DISABLE(EDS Reserved)
2 3 TOUCH_I2C_SCL_CPU R605 1 2 75R2F-2-GP CNV_RGI_DT_R CG19 CJ27
14,61 CNV_RGI_DT
R606 1 2 75R2F-2-GP CNV_BRI_DT_R CJ20 GPP_F6/CNV_RGI_DT Strap GPP_H10/I2C5_SDA/ISH_I2C2_SDA CJ29
61 CNV_BRI_DT GPP_F4/CNV_BRI_DT GPP_H11/I2C5_SCL/ISH_I2C2_SCL GPP_D12 / Low = JTAGE ODT DISABLED
SRN2K2J-5-GP 2018.1.17 ->75R CNV_RGI_RSP CH19
2018.4.12 ->22R GPP_F7/CNV_RGI_RSP CM24
ISH_SPI_MOSI / High= JTAG ODT ENABLED (Default) *
RN605
61 CNV_RGI_RSP 2018.7.23 ->75R GPP_D13/ISH_UART0_RXD CN23
GSPI2_MOSI WEAK INTERNAL PU
2 3 TP_I2C_SDA_CPU CR12 GPP_D14/ISH_UART0_TXD CM23
TP_I2C_SCL_CPU 68 LPSS_UART2_RXD GPP_C20/UART2_RXD GPP_D15/ISH_UART0_RTS#/GSPI2_CS1# This strap should sample HIGH.
1 TP_I2C 4 68 LPSS_UART2_TXD CP12 CR24
CN12 GPP_C21/UART2_TXD GPP_D16/ISH_UART0_CTS#/SML0BALERT# 2018.3.5 Changed
92 FPR_LOCK# GPP_C22/UART2_RTS#
SRN2K2J-5-GP CM12 CG12
GPP_C23/UART2_CTS# GPP_C12/UART1_RXD/ISH_UART1_RXD GPU_EVENT# 79
CH12 GC6_FB_EN_PCH 79,86
1
10KR2J-L-GP 2 R620 DGPU_PW R_EN# TP_I2C_SDA_CPU CM11 GPP_C13/UART1_TXD/ISH_UART1_TXD CF12
2018.3.5 Delete DGPU_VBIOS1(GPP_C22) TP_I2C_SCL_CPU CN11 GPP_C16/I2C0_SDA GPP_C14/UART1_RTS#/ISH_UART1_RTS# CG14
GPP_C17/I2C0_SCL GPP_C15/UART1_CTS#/ISH_UART1_CTS#
TOUCH_I2C_SDA_CPU CK12 BW35 ISH_GP0
55 TOUCH_I2C_SDA_CPU GPP_C18/I2C1_SDA GPP_A18/ISH_GP0
TOUCH_I2C_SCL_CPU CJ12 BW34 ISH_GP1
55 TOUCH_I2C_SCL_CPU GPP_C19/I2C1_SCL GPP_A19/ISH_GP1 CA37 ISH_GP2
CF27 GPP_A20/ISH_GP2 CA36 ISH_GP3 R607 2 1 Do Not Stuff
3D3V_S0 GPP_H4/I2C2_SDA GPP_A21/ISH_GP3 KEYBOARD_DISABLE 24
CF29 CA35
2018.1.11 updated GPP_H5/I2C2_SCL GPP_A22/ISH_GP4 CA34 ISH_GP5 R601 2 1 Do Not Stuff
GPP_A23/ISH_GP5 SEN_MODE_GPIO0 24
CH27 BW37 ISH_GP6 R608 2 1 Do Not Stuff
R614 1 2 10KR2J-L-GP ISH_GP1 PCH strap pin: CH28 GPP_H6/I2C3_SDA GPP_A12/ISH_GP6/BM_BUSY#/SX_EXIT_HOLDOFF# SEN_MODE_GPIO1 24
GPP_H7/I2C3_SCL
BOOT BIOS STRAP (BBS)
R616 1 2 10KR2J-L-GP ISH_GP2 LPC/SPI FOR SYSTEM FLASH CJ30
CJ31 GPP_H8/I2C4_SDA
2 3 ISH_GP0 GPP_H9/I2C4_SCL 2018.7.18 Removed after vendor check
1 4 ISH_GP3 GPP_B22/ Low = SPI (Default)*
GSPI1_MOSI High= LPC W HISKEY-LAKE-GP
C RN601 WEAK INTERNAL PD ZZ.00CPU.271 C
SRN10KJ-L-GP
3D3V_SENSORHUB 2018.1.17 corrected
PCH strap pin:
RN604
NO REBOOT
4 1 SENSOR_I2C_SCL_Q
3 2 SENSOR_I2C_SDA_Q ISH_GP0

GPP_B18/ Low = REBOOT (Default)* A K


SRN4K7J-8-GP High= NO REBOOT ACCEL_INT1 55
GSPI0_MOSI D603 RB551V30-GP
WEAK INTERNAL PD A K
ACCEL_INT3 70
2018.4.12 Added D604 RB551V30-GP
1D8V_S5 "No Reboot" mode (PCH will disable the TCO
Timer system reboot feature). This function is ISH_GP1 A K
CNV_BRI_RSP useful when running ITP/XDP. ACCEL_INT2 55
R602 1 DY 2 Do Not Stuff D605 RB551V30-GP
PCH strap pin:
M.2 CNVI MODES A K
2018.2.6 ACCEL_INT4 70
INTEGRATED CNVI ENABLE/DISABLE D607 RB551V30-GP
Delete R621, R622 2018.3.6
Delete net DGPU_VBIOS2 Delete R623, R624 ISH_GP2 A K
Low = ENABLE LID_CLOSE# 24,43
GPP_F6/ D608 RB551V30-GP
CNV_RGI_DT High= DISABLE(Default)*
WEAK INTERNAL PU

B B

3D3V_S0 3D3V_S0

Q603 Q602
TP_I2C_SDA_CPU 1 6 ISH_I2C_SCL_CPU 1 6 SENSOR_I2C_SCL_Q
Note:ZZ.27002.F7C01

Note:ZZ.27002.F7C01
TP_I2C_SDA_CN 65
2TP_I2C 5 2 5

3 4 3 4

75.27002.F7C 2N7002KDW -1-GP


TP_I2C_SCL_CPU ISH_I2C_SDA_CPU 75.27002.F7C
SENSOR_I2C_SDA_Q
TP_I2C_SCL_CN 65

A UMA A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
CPU (LPSS/ISH_I2C)
Size Document Number Rev
A3 FAROE 14" Pavilion SA
Date: Monday, August 06, 2018 Sheet 6 of 106
5 4 3 2 1
5 4 3 2 1
#575412 PDG rev.0.7 2018.1.15 updated
Main Func = CPU
1V_CPU_CORE 1V_CPU_CORE
CPU1L 12 OF 20
AN9 AW24 VCCORE(I Typ=42A;ICCMAX.=70A)
AN10 VCCCORE VCCCORE AW25
AN24 VCCCORE VCCCORE AW26
AN26 VCCCORE VCCCORE AW27
AN27 VCCCORE VCCCORE AY24
D AP2 VCCCORE VCCCORE AY26 D
AP9 VCCCORE VCCCORE BA5
AP24 VCCCORE VCCCORE BA7
AP26 VCCCORE VCCCORE BA8
AR5 VCCCORE VCCCORE BA25
AR6 VCCCORE VCCCORE BA27
AR7 VCCCORE VCCCORE BB2
AR8 VCCCORE VCCCORE BB26
AR10 VCCCORE VCCCORE BC5
AR25 VCCCORE VCCCORE BC6
AR27 VCCCORE VCCCORE BC7
AT9 VCCCORE VCCCORE BC9
AT24 VCCCORE VCCCORE BC10
AT26 VCCCORE VCCCORE BC26
AU5 VCCCORE VCCCORE BC27
AU6 VCCCORE VCCCORE BD5
AU7 VCCCORE VCCCORE BD8
AU8 VCCCORE VCCCORE BD10
AU9 VCCCORE VCCCORE BD25
AU24 VCCCORE VCCCORE BD27 2018.1.15 updated 1V_CPU_CORE
AU25 VCCCORE VCCCORE BE9
AU26 VCCCORE VCCCORE BE24 VCCCORE_SENSE 100R2F-L3-GP 1 2 R701
AU27 VCCCORE VCCCORE BE25 VSSCORE_SENSE 100R2F-L3-GP 1 2 R703
AV2 VCCCORE VCCCORE BE26
C VCCCORE VCCCORE C
AV5 BE27
AV7 VCCCORE VCCCORE BF2
AV10 VCCCORE
VCCCORE
VCCCORE
VCCCORE
BF9 Notes: 2018.1.12 updated
AV27 BF24 Signal Resistor Value Trace Impedance Trac Trace Length Match
AW5 VCCCORE VCCCORE BF26 Vcc/Vss_SENSE 100 Ω ±1% 50 Ω <25mils
AW6 VCCCORE VCCCORE BG27 Place close to CPU
AW7 VCCCORE VCCCORE
AW8 VCCCORE AN6 VCCCORE_SENSE
VCCCORE VCC_SENSE VCCCORE_SENSE 46
AW9 AN5 VSSCORE_SENSE
VCCCORE VSS_SENSE VSSCORE_SENSE 46
AW10
VCCCORE AA3 SVID_ALERT#_CPU_R 1 2
VIDALERT# SVID_ALERT#_CPU 46
BB9 R702 220R2J-L2-GP
BC24 RSVD#BB9 AA1
RSVD#BC24 VIDSCK SVID_CLK_CPU 46
AY9
BB24 RSVD#AY9 AA2 SVID_DATA_CPU
RSVD#BB24 VIDSOUT SVID_DATA_CPU 46
Y3
RSVD#Y3 2018.1.15 updated 1V_S3
BG3
VCCSTG 1V_VCCIO
SVID_ALERT#_CPU 56R2J-4-GP 2 1 R707
SVID_DATA_CPU 100R2F-L3-GP 2 1 R708
WHISKEY-LAKE-GP
ZZ.00CPU.271
B B
CPU1O 15 OF 20

K12 WHL QS/CFL U/WHL ES1_CNL U22 AA24


K14 RSVD#K12 RSVD#AA24 AA26
K15 RSVD#K14 RSVD#AA26 AB25
K17 RSVD#K15 RSVD#AB25 AC24
K18 RSVD#K17 RSVD#AC24 AC25
K20 RSVD#K18 RSVD#AC25 AC26
L25 RSVD#K20 RSVD#AC26 AD24
M24 RSVD#L25 RSVD#AD24 AD26
M26 RSVD#M24 RSVD#AD26 V25
P24 RSVD#M26 RSVD#V25 T25
P26 RSVD#P24 RSVD#T25 A35
R24 RSVD#P26 RSVD#A35 D34
R25 RSVD#R24 RSVD#D34 N5
R26 RSVD#R25 RSVD#N5
V24 RSVD#R26
W25 RSVD#V24
Y24 RSVD#W25
Y25 RSVD#Y24
G2 RSVD#Y25
G1 RSVD#G2
C34 RSVD#G1 UMA
A 2018.2.23 G3 RSVD#C34 A
->NC G4 RSVD#G3
RSVD#G4
Wistron Corporation
A34 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
B35 RSVD#A34 Taipei Hsien 221, Taiwan, R.O.C.
AJ27 RSVD#B35
AH26 RSVD#AJ27 Title
L5 RSVD#AH26
RSVD#L5 CPU (POWER1)
Size Document Number Rev
WHISKEY-LAKE-GP B FAROE 14" Pavilion SA
ZZ.00CPU.271 Date: Monday, August 06, 2018 Sheet 7 of 106
5 4 3 2 1
5 4 3 2 1

Main Func = CPU 1V_VCCGT CPU1M 13 OF 20


WHL QS/CFL/WHL_ES1_CNL U
1V_VCCGT 2018.1.12 updated
#575376
A5 H12 VCCGT(I Typ=18A;ICCMAX.=31A)
A6 VCCGT VCCGT H14
A8 VCCGT VCCGT H15
A11 VCCGT VCCGT H17
A12 VCCGT VCCGT H18
A14 VCCGT VCCGT H20
A15 VCCGT VCCGT J7
A17 VCCGT VCCGT J8
A18 VCCGT VCCGT J11
A20 VCCGT VCCGT J14 2018.6.13
B3 VCCGT VCCGT J17 Delet ES1 and ES2 colay circuit
B4 VCCGT VCCGT J20
D D
B6 VCCGT VCCGT K2
B8 VCCGT VCCGT K11
B11 VCCGT VCCGT L7
B14 VCCGT VCCGT L8
B17 VCCGT VCCGT L10
B20 VCCGT VCCGT M9
C2 VCCGT VCCGT N7
C3 VCCGT VCCGT N8
C6 VCCGT VCCGT N9
C7 VCCGT VCCGT N10
C8 VCCGT VCCGT P2
C11 VCCGT VCCGT P8
C12 VCCGT VCCGT R9
C14 VCCGT VCCGT T8
C15 VCCGT VCCGT T9
C17 VCCGT VCCGT T10
C18 VCCGT VCCGT U8
C20 VCCGT VCCGT U10
D4 VCCGT VCCGT V9 1V_CPU_CORE
D7 VCCGT VCCGT W8
D11 VCCGT VCCGT W9
D12 VCCGT VCCGT AA9
D14 VCCGT VCCCORE AB2
D15 VCCGT VCCCORE AB8
D17 VCCGT VCCCORE AB9
D18 VCCGT VCCCORE AB10
D20 VCCGT VCCCORE AC8
E4 VCCGT VCCCORE AD9
C F5 VCCGT VCCCORE AE8 C
F6 VCCGT VCCCORE AE9
F7 VCCGT VCCCORE AE10
F8 VCCGT VCCCORE AF2
F11 VCCGT VCCCORE AF8
F14 VCCGT VCCCORE AF10
F17 VCCGT VCCCORE AG8
F20 VCCGT VCCCORE AG9
G11 VCCGT VCCCORE AH9
G12 VCCGT VCCCORE AJ8
G14 VCCGT VCCCORE AJ10
G15 VCCGT VCCCORE AK2
G17 VCCGT VCCCORE AK9
G18 VCCGT VCCCORE AL8
G20 VCCGT VCCCORE AL9
H5 VCCGT VCCCORE AL10
H6 VCCGT VCCCORE AM8
H7 VCCGT VCCCORE V2
H8 VCCGT VCCCORE Y8
H11 VCCGT VCCCORE Y10
VCCGT VCCCORE E3 VCCGT_SENSE
VCCGT_SENSE D2 VSSGT_SENSE 1V_VCCGT
VSSGT_SENSE

W HISKEY-LAKE-GP 46 VCCGT_SENSE R801 1 2 100R2F-L3-GP


ZZ.00CPU.271 46 VSSGT_SENSE R802 1 2 100R2F-L3-GP
1V_VCCIO
1D2V_S3 CPU1N 14 OF 20
AK24 VCCIO(ICCMAX.=3.679A)
B VDDQ(ICCMAX.=3.3A) AD36 VCCIO_OUT AK26 B
AH32 VDDQ
VDDQ
VCCIO_OUT
VCCIO_OUT
AL24 Notes: 2018.1.12 updated
AH36 AL25 Signal Resistor Value Trace Impedance Trace Length Match
AM36 VDDQ VCCIO_OUT AL26 VccGT/ VssGT_SENSE 100 Ω ±1% 50 Ω <25mils
2018.1.12 update AN32 VDDQ VCCIO_OUT AL27
VDDQ VCCIO_OUT Place close to CPU
AW32 AM25
AY36 VDDQ VCCIO_OUT AM27
BE32 VDDQ VCCIO_OUT BH24
BH36 VDDQ VCCIO_OUT BH25
R32 VDDQ VCCIO_OUT BH26
Y36 VDDQ VCCIO_OUT BH27
VDDQ VCCIO_OUT BJ24
VCCIO_OUT BJ26
VCCIO_OUT BP16
1V_S3 BC28 VCCIO_OUT BP18 1V_VCCSA
RSVD#BC28 VCCIO_OUT
VccST(ICCMAX.=0.06A) BP11 BG8
BP2 VCCST VCCSA BG10
1V_VCCIO VCCST VCCSA BH9 VCCSA(I Typ=4A;ICCMAX.=6A)
VCCSA BJ8
VccSTG(ICCMAX.=0.02A) BG1 VCCSA BJ9
BG2 VCCSTG VCCSA BJ10
1D2V_S3 VCCSTG VCCSA BK8
BL27 VCCSA BK25
VccPLL_OC(ICCMAX.=0.12A) BM26 VCCPLL_OC VCCSA BK27
VCCPLL_OC VCCSA BL8
BR11 VCCSA BL9
1V_S3 VCCPLL VCCSA
VccPLL(ICCMAX.=0.13A) BT11 BL10
VCCPLL VCCSA BL24
A VCCSA 1V_VCCSA UMA A
BL26
VCCSA BM24
VCCSA BN25
VCCSA
46 VCCSA_SENSE R807 1 2 100R2F-L3-GP Wistron Corporation
BP28 R808 1 2 100R2F-L3-GP 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
VCCIO_SENSE 46 VSSSA_SENSE Taipei Hsien 221, Taiwan, R.O.C.
BP29
VSSIO_SENSE
BE7 VSSSA_SENSE Title
VSSSA_SENSE BG7 VCCSA_SENSE
VCCSA_SENSE Notes: 2018.1.12 updated CPU (POWER2)
W HISKEY-LAKE-GP Signal Resistor Value Trace Impedance Trace Length Match Size Document Number Rev
VccSA/ VssSA_SENSE 100 Ω ±1% 50 Ω <25mils A3
ZZ.00CPU.271
Place close to CPU FAROE 14" Pavilion SA
Date: Monday, August 06, 2018 Sheet 8 of 106
5 4 3 2 1
5 4 3 2 1

1D0V_S5

CPU1P 16 OF 20
BP20
BW16 VCCPRIM_1P05 CB16
VCCPRIM_1P05 VCCPRIM_3P3 3D3V_S5
BW18
BW19 VCCPRIM_1P05
BY16 VCCPRIM_1P05
CA14 VCCPRIM_1P05 BR23
VCCPRIM_1P05 VCCRTC 3D3V_RTC_AUX
D D

1D8V_S5 CC15 BY20 1D0V_S5


CD15 VCCPRIM_1P8 VCCPRIM_1P05 BP24
VCCPRIM_1P8 DCPRTC 3D3V_DCPRTC
CD16
CP17 VCCPRIM_1P8
VCCPRIM_1P8 BR20
VCCPRIM_1P05 1D0V_S5
3D3V_S5 CB22
CB23 VCCPRIM_3P3 BT12
VCCPRIM_3P3 VCCAPLL_1P05 1D0V_S5
CC22
CC23 VCCPRIM_3P3 BP14
VCCPRIM_3P3 VCCA_BCLK_1P05 1D0V_S5
CD22
CD23 VCCPRIM_3P3 BR14
VCCPRIM_3P3 VCCAPLL_1P05 1D0V_S5
CP29
VCCPRIM_3P3 BU12
VCCA_SRC_1P05 1D0V_S5
1D0V_S5 BU15
BU22 VCCPRIM_CORE CP5
VCCPRIM_CORE VCCA_XTAL_1P05 1D0V_S5
2018.1.15 updated BV15
BV16 VCCPRIM_CORE BY24
VCCPRIM_CORE VCCDPHY_1P24 1D24V_VCCLDOSRAM
BV18 CA24
BV19 VCCPRIM_CORE VCCDPHY_1P24
C BV20 VCCPRIM_CORE BY23 2018.2.23 ->Name C
BV22 VCCPRIM_CORE VCCDPHY_1P24 CA23
BW20 VCCPRIM_CORE VCCDPHY_1P24 CP25
VCCPRIM_CORE VCCDPHY_1P24 1D24V_VCCDPHY
BW22
CA12 VCCPRIM_CORE BT23
VCCPRIM_CORE VCCDSW_3P3 3D3V_DSW
CA16
CA18 VCCPRIM_CORE BR12
VCCPRIM_CORE VCCA_19P2_1P05 1D0V_S5
CA19
CA20 VCCPRIM_CORE
CB12 VCCPRIM_CORE
1D8V_S5
CB14 VCCPRIM_CORE
CB15 VCCPRIM_CORE CC18
BT24 VCCPRIM_CORE VCCPRIM_1P8 CC19
1V_DCPDSW VCCDSW_1P05 VCCPRIM_1P8 CD18
BU14 VCCPRIM_1P8 CD19
1D0V_S5 VCCAPLL_1P05 VCCPRIM_1P8 CP23
BV12 VCCPRIM_1P8
1D0V_S5 VCCPRIM_MPHY_1P05
BW12 BW23 3D3V_S5
BW14 VCCPRIM_MPHY_1P05 VCCPRIM_3P3
BY12 VCCPRIM_MPHY_1P05
BY14 VCCPRIM_MPHY_1P05
B B
VCCPRIM_MPHY_1P05

1D0V_S5 BV2 BP23


VCCAMPHYPLL_1P05 VCCPRIM_3P3

1D0V_S5 BR15 CB36 V0.85A_VID0 1 TP901 Do Not Stuff


VCCAPLL_1P05 GPP_B0/CORE_VID0 CB35 V0.85A_VID1 1 TP902 Do Not Stuff
CC12 GPP_B1/CORE_VID1
1D0V_S5 VCCDUSB_1P05

3D3V_DSW BR24
VCCDSW_3P3
3D3V_S5 BT20
VCCHDA

3D3V_DSW BV23
VCCSPI
2018.3.7 BT18
S5->DSW BT19 VCCPRIM_1P05
BU18 VCCPRIM_1P05
UMA
BU19 VCCPRIM_1P05
VCCPRIM_1P05

A 1D0V_S5
BT22
BP22 VCCPRIM_1P05 Wistron Corporation A
VCCPRIM_1P05 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
BV14 Taipei Hsien 221, Taiwan, R.O.C.
1D0V_S5 VCCPRIM_MPHY_1P05
WHISKEY-LAKE-GP Title

ZZ.00CPU.271 CPU (POWER3)


Size Document Number Rev
A4 FAROE 14" Pavilion SA
Date: Monday, August 06, 2018 Sheet 9 of 106
5 4 3 2 1
5 4 3 2 1

Main Func = DDR SODIMM


DDR4 Reverse Type
DM1D 4 OF 4
DM1A 1 OF 4 1D2V_S3 3D3V_S0
2018.1.10 updated 1 99
144 8 DM1C 3 OF 4 2 VSS VSS 102
4 M_A_A0 A0 DQ0 M_A_DQ28 5 VSS VSS
4 M_A_A1 133 7 M_A_DQ29 5 5 103
132 A1 DQ1 20 111 255 6 VSS VSS 106
4 M_A_A2 A2 DQ2 M_A_DQ27 5 VDD VDDSPD VSS VSS
4 M_A_A3 131 21 M_A_DQ26 5 112 9 107
128 A3 DQ3 4 117 VDD 2D5V_S3 10 VSS VSS 167
4 M_A_A4 A4 DQ4 M_A_DQ25 5 VDD VSS VSS
4 M_A_A5 126 3 M_A_DQ24 5 118 257 14 168
A5 DQ5 VDD VPP VSS VSS

1
4 M_A_A6 127 16 M_A_DQ31 5 123 259 15 171
D 122 A6 DQ6 17 124 VDD VPP 0D6V_VREF_S0 C1201 18 VSS VSS 172 D
4 M_A_A7 A7 DQ7 M_A_DQ30 5 VDD VSS VSS
125 28 129 258 Do Not Stuff 19 175
4 M_A_A8 M_A_DQ1 4

2
121 A8 DQ8 29 130 VDD VTT 22 VSS VSS 176
4 M_A_A9
146 A9 DQ9 41
M_A_DQ0 4
135 VDD DY 23 VSS VSS 180
4 M_A_A10 A10/AP DQ10 M_A_DQ7 4 VDD VSS VSS
4 M_A_A11 120 42 M_A_DQ3 4 136 26 181
119 A11 DQ11 24 141 VDD 27 VSS VSS 184
4 M_A_A12 A12 DQ12 M_A_DQ5 4 VDD VSS VSS
4 M_A_A13 158 25 M_A_DQ4 4 142 30 185
151 A13 DQ13 38 147 VDD 261 31 VSS VSS 188
4 M_A_A14 WE#/A14 DQ14 M_A_DQ2 4 VDD 261 VSS VSS
4 M_A_A15 156 37 M_A_DQ6 4 148 262 35 189
152 CAS#/A15 DQ15 50 153 VDD 262 36 VSS VSS 192
4 M_A_A16 RAS#/A16 DQ16 M_A_DQ9 4 VDD VSS VSS
49 M_A_DQ12 4 154 39 193
150 DQ17 62 159 VDD NP1 40 VSS VSS 196
4 M_A_BA0 BA0 DQ18 M_A_DQ11 4 VDD NP1 VSS VSS
145 63 M_A_DQ14 4 160 NP2 43 197
4 M_A_BA1 BA1 DQ19 VDD NP2 VSS VSS
115 46 M_A_DQ8 4 163 44 201
4 M_A_BG0 BG0 DQ20 VDD VSS VSS
113 45 M_A_DQ13 4 47 202
4 M_A_BG1 BG1 DQ21 VSS VSS
58 M_A_DQ10 4 48 205
92 DQ22 59 DDR4-260P-18-GP-U 51 VSS VSS 206
CB0/NC DQ23 M_A_DQ15 4 VSS VSS
91 70 M_A_DQ18 5 062.10011.00Q1 52 209
101 CB1/NC DQ24 71 56 VSS VSS 210
CB2/NC DQ25 M_A_DQ16 5 VSS VSS
105 83 M_A_DQ22 5 57 213
88 CB3/NC DQ26 84 60 VSS VSS 214
CB4/NC DQ27 M_A_DQ17 5 VSS VSS
87 66 M_A_DQ23 5 61 217
100 CB5/NC DQ28 67 DM1B 2 OF 4 64 VSS VSS 218
CB6/NC DQ29 M_A_DQ19 5 VSS VSS
104 79 M_A_DQ20 5
2018.1.10 updated 65 222
CB7/NC DQ30 80 11 68 VSS VSS 223
DQ31 M_A_DQ21 5 DQS0_C M_A_DQS_DN3 5 VSS VSS
137 174 M_A_DQ53 5 13 M_A_DQS_DP3 5 69 226
4 M_A_CLK0 CK0_T DQ32 DQS0_T VSS VSS
139 173 M_A_DQ52 5 32 M_A_DQS_DN0 4 72 227
4 M_A_CLK#0 CK0_C DQ33 DQS1_C VSS VSS
138 187 M_A_DQ54 5 34 M_A_DQS_DP0 4 73 230
4 M_A_CLK1 CK1_T/NF DQ34 DQS1_T VSS VSS
140 186 M_A_DQ55 5 53 M_A_DQS_DN1 4 77 231
4 M_A_CLK#1 CK1_C/NF DQ35 DQS2_C VSS VSS
170 M_A_DQ50 5 55 M_A_DQS_DP1 4 78 234
109 DQ36 169 DQS2_T 74 81 VSS VSS 235
4 M_A_CKE0 CKE0 DQ37 M_A_DQ51 5 DQS3_C M_A_DQS_DN2 5 VSS VSS
110 183 M_A_DQ48 5 76 M_A_DQS_DP2 5 82 238
4 M_A_CKE1 CKE1 DQ38 DQS3_T VSS VSS
182 M_A_DQ49 5 177 M_A_DQS_DN6 5 85 239
149 DQ39 195 DQS4_C 179 86 VSS VSS 243
C 4 M_A_CS#0 CS0# DQ40 M_A_DQ60 5 DQS4_T M_A_DQS_DP6 5 VSS VSS C
157 194 M_A_DQ56 5 198 M_A_DQS_DN7 5 89 244
4 M_A_CS#1 CS1# DQ41 DQS5_C VSS VSS
162 207 M_A_DQ58 5 200 M_A_DQS_DP7 5 90 247
165 C0/CS2#/NC DQ42 208 DQS5_T 219 93 VSS VSS 248
C1/CS3#/NC DQ43 M_A_DQ63 5 DQS6_C M_A_DQS_DN4 4 VSS VSS
191 M_A_DQ61 5 221 M_A_DQS_DP4 4 94 251
155 DQ44 190 DQS6_T 240 98 VSS VSS 252
4 M_A_ODT0 ODT0 DQ45 M_A_DQ57 5 DQS7_C M_A_DQS_DN5 4 VSS VSS
161 203 M_A_DQ59 5 242 M_A_DQS_DP5 4
4 M_A_ODT1 ODT1 DQ46 DQS7_T
204 M_A_DQ62 5 95
256 DQ47 216 DQS8_C 97 Applicable for ECC DDR4-260P-18-GP-U
SA0 DQ48 M_A_DQ33 4 DQS8_T 1D2V_S3
260 215 M_A_DQ32 4 062.10011.00Q1
166 SA1 DQ49 228 12
SA2 DQ50 M_A_DQ34 4 DM0#/DBI0#
229 M_A_DQ38 4 33
254 DQ51 211 DM1#/DBI# 54
13,18 DM_SMB_SDA_CN SDA DQ52 M_A_DQ36 4 DM2#/DBI2#
253 212 M_A_DQ37 4 75
13,18 DM_SMB_SCL_CN SCL DQ53 DM3#/DBI3#
224 M_A_DQ35 4 178
DQ54 225 DM4#/DBI4# 199
DQ55 M_A_DQ39 4 DM5#/DBI5#
108 237 M_A_DQ40 4 220
5,13,89 DDR_DRAMRST# RESET# DQ56 DM6#/DBI6#
114 236 M_A_DQ44 4 241
4 M_A_ACT_N ACT# DQ57 DM7#/DBI7#
4 M_A_ALERT_N 116 249 M_A_DQ42 4 96
C1229 134 ALERT# DQ58 250 DM8#/DBI#/NC
EVENT#/NF DQ59 M_A_DQ47 4
1

Do Not Stuff 232 M_A_DQ45 4


143 DQ60 233 DDR4-260P-18-GP-U
DY 4 M_A_PARITY PARITY DQ61 245
M_A_DQ41 4
M_A_DQ43 4 062.10011.00Q1
2

M_VREF_CA_DIMMA 164 DQ62 246


VREFCA DQ63 M_A_DQ46 4

DDR4-260P-18-GP-U
Layout Note :
1

C1230
062.10011.00Q1
VREFCA traces should DY Do Not Stuff
have width=20 mil;
2

2018.1.16
spacing=20 mil follow CRB

B B

Layout Note :
SPD Address of DIMMA SA_DIMM_VREFDQ Place these Caps near DIM1
1D2V_S3
VDDQ DECAPS VTT DECAPS VPP DECAPS
1D2V_S3 10uF x8 0D6V_VREF_S0 10uF x2 2D5V_S3 10uF x2
SPD SA2 0 1uF x8 1uF x4 1uF x2
RN1201 R1202
1 4 2R2F-GP
2 3 M_VREF_CA_DIMMA 1 2
SPD SA1 0 V_SM_VREF_CNTA 4
1

1
C1204 C1208 C1207 C1210 C1205 C1206 C1215 C1209 C1212 C1223 C1225 C1226 C1227 C1228 C1213 C1211 C1224 C1214
SRN1KJ-7-GP DY DY DY DY DY DY DY DY
1

SC1U6D3V1MX-GP

Do Not Stuff

Do Not Stuff

Do Not Stuff
SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

Do Not Stuff

Do Not Stuff

SC10U6D3V3MX-GP

Do Not Stuff

SC10U6D3V3MX-L-GP

Do Not Stuff

SC1U6D3V1MX-GP

Do Not Stuff
C1202
2

2
SCD022U16V2KX-3GP
SPD SA0 0
2

+V_VREF_PATH3
1

R1201
24D9R2F-L-GP
1

1
C1220 C1222 C1203 C1216 C1217 C1218 C1219 C1221
2

DY DY DY
SC1U6D3V1MX-GP

SC1U6D3V1MX-GP

SC1U6D3V1MX-GP

SC1U6D3V1MX-GP

SC1U6D3V1MX-GP

Do Not Stuff

Do Not Stuff

Do Not Stuff
2

2
A A

UMA

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
012_DDR (DDR4-CHA)
Size Document Number Rev
Custom FAROE 14" Pavilion SA
Date: Monday, August 06, 2018 Sheet 12 of 106
5 4 3 2 1
5 4 3 2 1

Main Func = DDR SODIMM


DDR4 Reverse Type
DM2A 1 OF 4
2018.1.10 updated
144 8 1D2V_S3 3D3V_S0 DM2D 4 OF 4
5 M_B_A0 A0 DQ0 M_B_DQ4 4
5 M_B_A1 133 7 M_B_DQ5 4
132 A1 DQ1 20 DM2C 3 OF 4 1 99
5 M_B_A2 A2 DQ2 M_B_DQ2 4 VSS VSS
5 M_B_A3 131 21 M_B_DQ6 4 2 102
128 A3 DQ3 4 111 255 5 VSS VSS 103
5 M_B_A4 A4 DQ4 M_B_DQ1 4 VDD VDDSPD VSS VSS
126 3 112 6 106
D 5 M_B_A5 A5 DQ5 M_B_DQ0 4 VDD 2D5V_S3 VSS VSS D
5 M_B_A6 127 16 M_B_DQ7 4 117 9 107
122 A6 DQ6 17 118 VDD 257 10 VSS VSS 167
5 M_B_A7 A7 DQ7 M_B_DQ3 4 VDD VPP VSS VSS

1
5 M_B_A8 125 28 M_B_DQ13 4 123 259 14 168
121 A8 DQ8 29 124 VDD VPP 0D6V_VREF_S0 C1301 15 VSS VSS 171
5 M_B_A9
146 A9 DQ9 41
M_B_DQ8 4
129 VDD 258
DY Do Not Stuff 18 VSS VSS 172
5 M_B_A10 M_B_DQ9 4

2
120 A10/AP DQ10 42 130 VDD VTT 19 VSS VSS 175
5 M_B_A11 A11 DQ11 M_B_DQ10 4 VDD VSS VSS
5 M_B_A12 119 24 M_B_DQ12 4 135 22 176
158 A12 DQ12 25 136 VDD 23 VSS VSS 180
5 M_B_A13 A13 DQ13 M_B_DQ11 4 VDD VSS VSS
5 M_B_A14 151 38 M_B_DQ15 4 141 26 181
156 WE#/A14 DQ14 37 142 VDD 27 VSS VSS 184
5 M_B_A15 CAS#/A15 DQ15 M_B_DQ14 4 VDD VSS VSS
5 M_B_A16 152 50 M_B_DQ36 4 147 261 30 185
RAS#/A16 DQ16 49 148 VDD 261 262 31 VSS VSS 188
DQ17 M_B_DQ33 4 VDD 262 VSS VSS
150 62 M_B_DQ32 4 153 35 189
5 M_B_BA0 BA0 DQ18 VDD VSS VSS
145 63 M_B_DQ39 4 154 36 192
5 M_B_BA1 BA1 DQ19 VDD VSS VSS
115 46 159 NP1 39 193
5 M_B_BG0 BG0 DQ20 M_B_DQ35 4 VDD NP1 VSS VSS
113 45 M_B_DQ37 4 160 NP2 40 196
5 M_B_BG1 BG1 DQ21 VDD NP2 VSS VSS
58 M_B_DQ34 4 163 43 197
92 DQ22 59 VDD 44 VSS VSS 201
CB0/NC DQ23 M_B_DQ38 4 VSS VSS
91 70 M_B_DQ40 4 47 202
101 CB1/NC DQ24 71 DDR4-260P-18-GP-U 48 VSS VSS 205
CB2/NC DQ25 M_B_DQ44 4 VSS VSS
105 83 M_B_DQ42 4 062.10011.00Q1 51 206
88 CB3/NC DQ26 84 52 VSS VSS 209
CB4/NC DQ27 M_B_DQ46 4 VSS VSS
87 66 M_B_DQ45 4 56 210
100 CB5/NC DQ28 67 57 VSS VSS 213
CB6/NC DQ29 M_B_DQ41 4 VSS VSS
104 79 60 214
CB7/NC DQ30 M_B_DQ43 4 VSS VSS
80 M_B_DQ47 4 DM2B 2 OF 4 61 217
137 DQ31 174 64 VSS VSS 218
5 M_B_CLK0 CK0_T DQ32 M_B_DQ16 5 VSS VSS
139 173 M_B_DQ22 5 11 M_B_DQS_DN0 4 65 222
5 M_B_CLK#0 CK0_C DQ33 DQS0_C VSS VSS
138 187 M_B_DQ20 5 13 M_B_DQS_DP0 4 68 223
5 M_B_CLK1 CK1_T/NF DQ34 DQS0_T VSS VSS
140 186 32 69 226
5 M_B_CLK#1 CK1_C/NF DQ35 M_B_DQ21 5 DQS1_C M_B_DQS_DN1 4 VSS VSS
170 M_B_DQ17 5 34 M_B_DQS_DP1 4 72 227
109 DQ36 169 DQS1_T 53 73 VSS VSS 230
5 M_B_CKE0 CKE0 DQ37 M_B_DQ23 5 DQS2_C M_B_DQS_DN4 4 VSS VSS
110 183 M_B_DQ19 5 55 M_B_DQS_DP4 4 77 231
5 M_B_CKE1 CKE1 DQ38 DQS2_T VSS VSS
182 M_B_DQ18 5 74 M_B_DQS_DN5 4 78 234
149 DQ39 195 DQS3_C 76 81 VSS VSS 235
C 5 M_B_CS#0 M_B_DQ24 5 M_B_DQS_DP5 4 C
157 CS0# DQ40 194 DQS3_T 177 82 VSS VSS 238
5 M_B_CS#1 CS1# DQ41 M_B_DQ25 5 DQS4_C M_B_DQS_DN2 5 VSS VSS
162 207 M_B_DQ26 5 179 M_B_DQS_DP2 5 85 239
165 C0/CS2#/NC DQ42 208 DQS4_T 198 86 VSS VSS 243
C1/CS3#/NC DQ43 M_B_DQ30 5 DQS5_C M_B_DQS_DN3 5 VSS VSS
191 M_B_DQ28 5 200 M_B_DQS_DP3 5 89 244
155 DQ44 190 DQS5_T 219 90 VSS VSS 247
5 M_B_ODT0 ODT0 DQ45 M_B_DQ29 5 DQS6_C M_B_DQS_DN6 5 VSS VSS
161 203 M_B_DQ27 5 221 M_B_DQS_DP6 5 93 248
3D3V_S0 5 M_B_ODT1 ODT1 DQ46 204 DQS6_T 240 94 VSS VSS 251
DQ47 M_B_DQ31 5 DQS7_C M_B_DQS_DN7 5 VSS VSS
256 216 M_B_DQ48 5 242 M_B_DQS_DP7 5 98 252
R1301 1 2 M_B_SA1 260 SA0 DQ48 215 DQS7_T 95 VSS VSS
SA1 DQ49 M_B_DQ53 5 DQS8_C
10KR2F-L1-GP 166 228 97 Applicable for ECC
SA2 DQ50 M_B_DQ51 5 DQS8_T 1D2V_S3 DDR4-260P-18-GP-U
229 M_B_DQ54 5
254 DQ51 211 12
12,18 DM_SMB_SDA_CN
253 SDA DQ52 212
M_B_DQ52 5 DM0#/DBI0# 33
062.10011.00Q1
12,18 DM_SMB_SCL_CN SCL DQ53 M_B_DQ49 5 DM1#/DBI#
224 M_B_DQ50 5 54
DQ54 225 DM2#/DBI2# 75
DQ55 M_B_DQ55 5 DM3#/DBI3#
108 237 M_B_DQ58 5 178
5,12,89 DDR_DRAMRST# RESET# DQ56 DM4#/DBI4#
114 236 M_B_DQ56 5 199
5 M_B_ACT_N ACT# DQ57 DM5#/DBI5#
5 M_B_ALERT_N 116 249 M_B_DQ63 5 220
C1329 134 ALERT# DQ58 250 DM6#/DBI6# 241
EVENT#/NF DQ59 M_B_DQ62 5 DM7#/DBI7#
1

Do Not Stuff 232 96


DQ60 M_B_DQ57 5 DM8#/DBI#/NC
2018.1.16
DY 143 233 M_B_DQ61 5
5 M_B_PARITY PARITY DQ61
follow CRB 245 M_B_DQ60 5
2

M_VREF_CA_DIMMB 164 DQ62 246 DDR4-260P-18-GP-U


VREFCA DQ63 M_B_DQ59 5
062.10011.00Q1
DDR4-260P-18-GP-U
Layout Note :
1

C1330
062.10011.00Q1
VREFCA traces should DY Do Not Stuff
have width=20 mil;
2

2018.1.16
spacing=20 mil follow CRB

B B

Layout Note :
SPD Address of DIMMB SA_DIMM_VREFDQ Place these Caps near DIM1
1D2V_S3 VDDQ DECAPS VTT DECAPS VPP DECAPS
SPD SA2 0 10uF x8 10uF x2 10uF x2
RN1301 R1302 1D2V_S3 1uF x8 0D6V_VREF_S0 1uF x4 2D5V_S3 1uF x2
1 4 2R2F-GP
2 3 M_VREF_CA_DIMMB 1 2
SPD SA1 1 V_SM_VREF_CNTB 4
SRN1KJ-7-GP
1

1
C1302 C1304 C1308 C1307 C1310 C1305 C1306 C1315 C1309 C1312 C1323 C1325 C1326 C1327 C1328 C1313 C1311 C1324 C1314

SC1U6D3V1MX-GP

Do Not Stuff

Do Not Stuff

Do Not Stuff
SCD022U16V2KX-3GP DY DY DY DY DY DY DY DY
SPD SA0 0
SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

Do Not Stuff

SC2D2U10V3KX-1GP

Do Not Stuff

SC10U6D3V3MX-GP

Do Not Stuff

SC10U6D3V3MX-L-GP

Do Not Stuff

SC1U6D3V1MX-GP

Do Not Stuff
2

2
+V_VREF_PATH2
1

R1303
24D9R2F-L-GP
2

1
C1320 C1322 C1303 C1316 C1317 C1318 C1319 C1321
DY DY DY
SC1U6D3V1MX-GP

SC1U6D3V1MX-GP

SC1U6D3V1MX-GP

SC1U6D3V1MX-GP

SC1U6D3V1MX-GP

Do Not Stuff

Do Not Stuff

Do Not Stuff
2

2
A A

UMA

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
013_DDR (DDR4-CHB)
Size Document Number Rev
Custom FAROE 14" Pavilion SA
Date: Monday, August 06, 2018 Sheet 13 of 106
5 4 3 2 1
5 4 3 2 1

Main Func = PCH


2018.1.10 updated
CPU1H 8 OF 20
76 GFX_PCIE_RX_N0
BW9 CB5 PCH strap pin:
BW8 PCIE5_RXN/USB31_5_RXN PCIE1_RXN/USB31_1_RXN CB6 USB1_USB30_RX_N 35
76 GFX_PCIE_RX_P0 RING OSCILLATOR BYPASS
76 GFX_PCIE_TX_N0 C1503 1DIS 2 Do Not Stuff GFX_PCIE_TX_N0_C BW4 PCIE5_RXP/USB31_5_RXP
PCIE5_TXN/USB31_5_TXN
PCIE1_RXP/USB31_1_RXP
PCIE1_TXN/USB31_1_TXN
CA4 USB1_USB30_RX_P
USB1_USB30_TX_N
35
35
USB3.0 port1 (QUALIFIED BY DFXTESTMODE)
C1504 1DIS 2 Do Not Stuff GFX_PCIE_TX_P0_C BW3 CA3
76 GFX_PCIE_TX_P0 PCIE5_TXP/USB31_5_TXP PCIE1_TXP/USB31_1_TXP USB1_USB30_TX_P 35
GPP_E9/ Low = RING OSCILLATOR
BU6 BY8
76 GFX_PCIE_RX_N1 USB2_OC0#/ High= BYPASS MODE ENABLED
76 GFX_PCIE_RX_P1
BU5 PCIE6_RXN/USB31_6_RXN PCIE2_RXN/USB31_2_RXN/SSIC_1_RXN BY9 USB2_USB30_RX_N 66
GP_BSSB_CLK
*
76 GFX_PCIE_TX_N1 C1505 1DIS 2 Do Not Stuff GFX_PCIE_TX_N1_C BU4 PCIE6_RXP/USB31_6_RXP
PCIE6_TXN/USB31_6_TXN
PCIE2_RXP/USB31_2_RXP/SSIC_1_RXP
PCIE2_TXN/USB31_2_TXN/SSIC_1_TXN
CA2 USB2_USB30_RX_P
USB2_USB30_TX_N
66
66
USB3.0 Port2 (IO) NO INTERNAL PU/PD
C1502 1DIS 2 Do Not Stuff GFX_PCIE_TX_P1_C BU3 CA1
76 GFX_PCIE_TX_P1 PCIE6_TXP/USB31_6_TXP PCIE2_TXP/USB31_2_TXP/SSIC_1_TXP USB2_USB30_TX_P 66
GPU (PCIE) 76 GFX_PCIE_RX_N2
BT7
PCIE7_RXN PCIE3_RXN/USB31_3_RXN
BY7
USB3_USB30_RX_N 73 PCH strap pin:
BT6 BY6
76 GFX_PCIE_RX_P2 GFX_PCIE_TX_N2_C PCIE7_RXP PCIE3_RXP/USB31_3_RXP USB3_USB30_RX_P 73
C1506 1DIS 2 Do Not Stuff BU2 BY4 XTAL INPUT FREQUENCY [1:0]
76 GFX_PCIE_TX_N2
76 GFX_PCIE_TX_P2 C1507 1DIS 2 Do Not Stuff GFX_PCIE_TX_P2_C BU1 PCIE7_TXN
PCIE7_TXP
PCIE3_TXN/USB31_3_TXN
PCIE3_TXP/USB31_3_TXP
BY3 USB3_USB30_TX_N
USB3_USB30_TX_P
73
73
USB3.0 port3 (Type-C) (QUALIFIED BY DFXTESTMODE)
BU9 BW6 2018.8.1
D 76 GFX_PCIE_RX_N3 PCIE8_RXN PCIE4_RXN/USB31_4_RXN USB4_USB30_RX_N 73 GPP_E10/ 00-24MHZ D
BU8 BW5 Add for 25810
76 GFX_PCIE_RX_P3
1DIS 2 Do Not Stuff GFX_PCIE_TX_N3_C BT4 PCIE8_RXP PCIE4_RXP/USB31_4_RXP BW2 USB4_USB30_RX_P 73 USB2_OC1# 01-25MHZ
76 GFX_PCIE_TX_N3 C1508 HVM ONLY
76 GFX_PCIE_TX_P3 C1509 1DIS 2 Do Not Stuff GFX_PCIE_TX_P3_C BT3 PCIE8_TXN
PCIE8_TXP
PCIE4_TXN/USB31_4_TXN
PCIE4_TXP/USB31_4_TXP
BW1 USB4_USB30_TX_N
USB4_USB30_TX_P
73
73
USB3.0 port4 (Type-C) GPP_E11/
10-250MHZ
11-100MHZ *
BP5 CE3 USB2_OC2#
PCIE9_RXN USB2N_1 USB1_USB20_N 35
BP6
BR2 PCIE9_RXP USB2P_1
CE4
USB1_USB20_P 35 USB2.0 Port1
BR1 PCIE9_TXN CE1
PCIE9_TXP USB2N_2 CE2
USB2_USB20_N
USB2_USB20_P
66
66 USB2.0 Port2 (IO) PCH strap pin:
BN6 USB2P_2
61 WLAN_PCIE_RX_N PCIE10_RXN XTAL INPUT MODE
BN5 CG3 (QUALIFIED BY DFXTESTMODE) HVM ONLY
61 WLAN_PCIE_RX_P USB3_USB20_N 73
WLAN 61 WLAN_PCIE_TX_N
BR4 PCIE10_RXP
PCIE10_TXN
USB2N_3
USB2P_3
CG4
USB3_USB20_P 73 USB2.0 Port3 (Type-C)
BR3 GPP_E12/
61 WLAN_PCIE_TX_P PCIE10_TXP CD3 Low = XTAL INPUT IS SINGLE ENDED
USB2N_4 CCD_USB20_N 55 USB2_OC3# High= XTAL INPUT IS DIFFERENTIAL *
60 HDD_SATA_RX_N
BN10
BN8 PCIE11_RXN/SATA0_RXN USB2P_4
CD4
CCD_USB20_P 55 USB2.0 Port4 (HD Camera) NO INTERNAL PU/PD
HDD 60
60
HDD_SATA_RX_P
HDD_SATA_TX_N
BN4 PCIE11_RXP/SATA0_RXP
PCIE11_TXN/SATA0_TXN USB2N_5
CG5
FP_USB20_N 92 THIS IS NOT APPLICABLE FOR CNL
BN3 CG6
60 HDD_SATA_TX_P PCIE11_TXP/SATA0_TXP USB2P_5 FP_USB20_P 92
USB2.0 Port5 (Finger Printer)
BL6 CC1
63 P_MSATA_SATA_RX_N PCIE12_RXN/SATA1A_RXN USB2N_6
BL5 CC2
63 P_MSATA_SATA_RX_P PCIE12_RXP/SATA1A_RXP USB2P_6
BN2
Base U SSD 63
63
P_MSATA_SATA_TX_N
P_MSATA_SATA_TX_P
BN1 PCIE12_TXN/SATA1A_TXN
PCIE12_TXP/SATA1A_TXP USB2N_7
CG8
CG9
BK6 USB2P_7
63 MSATA_PCIE_RX_N1 PCIE13_RXN
BK5 CB8
63 MSATA_PCIE_RX_P1 PCIE13_RXP USB2N_8
BM4 CB9
63 MSATA_PCIE_TX_N1 PCIE13_TXN USB2P_8
BM3
63 MSATA_PCIE_TX_P1 PCIE13_TXP CH5
BJ6 USB2N_9 CH6
63 MSATA_PCIE_RX_N2 PCIE14_RXN USB2P_9 3D3V_S0
BJ5
63 MSATA_PCIE_RX_P2 PCIE14_RXP
BL2 CC3
SSD (PCIE) 63
63
MSATA_PCIE_TX_N2
MSATA_PCIE_TX_P2
BL1 PCIE14_TXN
PCIE14_TXP
USB2N_10
USB2P_10
CC4
BT_USB20_N
BT_USB20_P
61
61 USB2.0 Port5 (BT) SSD_DEVSLP2 RN1501 3D3V_S5
1 8
BG5 CC5 USBCOMP R1502 1 2 113R2F-GP PIRQA# 2 7
63 MSATA_PCIE_RX_N3 PCIE15_RXN/SATA1B_RXN USB2_COMP USB2_ID 6 PIRQA# SATA_LED#
BG6 CE8 1 4 3 6
63 MSATA_PCIE_RX_P3 PCIE15_RXP/SATA1B_RXP USB_ID USB2_VBUSSENSE USB_OC0#
BL4 CC6 2 3 4 5
63 MSATA_PCIE_TX_N3 PCIE15_TXN/SATA1B_TXN USB_VBUSSENSE
BL3
63 MSATA_PCIE_TX_P3 PCIE15_TXP/SATA1B_TXP CK6 RN1502 SRN10KJ-12-GP
BE5 GPP_E9/USB2_OC0#/GP_BSSB_CLK CK5 SRN10KJ-L-GP 2018.1.12 updated
63 MSATA_SATA_RX_N PCIE16_RXN/SATA2_RXN
C BE6 Strap GPP_E10/USB2_OC1#/GP_BSSB_DI CK8 2018.6.25 Signal Resistor Value Max Length C
SSD (SATA) 63
63
MSATA_SATA_RX_P
MSATA_SATA_TX_N
BJ4 PCIE16_RXP/SATA2_RXP
PCIE16_TXN/SATA2_TXN
GPP_E11/USB2_OC2#
GPP_E12/USB2_OC3#
CK9 USB_OC0# Change to 10K, follow TDK USB2_COMP 113 Ω ±1% <1000 mils
BJ3
63 MSATA_SATA_TX_P PCIE16_TXP/SATA2_TXP CP8 2018.1.10 updated
GPP_E4/DEVSLP0 CR8
PCIE_RCOMPN CE6 GPP_E5/DEVSLP1 CM8 SSD_DEVSLP2
1 2 PCIE_RCOMPP CE5 PCIE_RCOMP_N GPP_E6/DEVSLP2 SSD_DEVSLP2 63
R1501 100R2F-L3-GP PCIE_RCOMP_P CN8
CR28 GPP_E0/SATAXPCIE0/SATAGP0 CM10
CP28 GPP_H12/M2_SKT2_CFG0 GPP_E1/SATAXPCIE1/SATAGP1 CP10 SSD_DET#
2018.1.11 updated CN28 GPP_H13/M2_SKT2_CFG1 GPP_E2/SATAXPCIE2/SATAGP2 SSD_DET# 63
Signal Length Matching CM28 GPP_H14/M2_SKT2_CFG2 CN7 SATA_LED#
GPP_H15/M2_SKT2_CFG3 GPP_E8/SATALED#/SPI1_CS1# SATA_LED# 63,64
PCIE_RCOMP ± 5mils
AR3
WHISKEY-LAKE-GP RSVD#AR3

ZZ.00CPU.271

2018.1.10 updated

B B

A A

UMA

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
PCH (PCIE,SATA,USB3,USB2)
Size Document Number Rev
A2 FAROE 14" Pavilion SA
Date: Monday, August 06, 2018 Sheet 15 of 106
5 4 3 2 1
5 4 3 2 1

Main Func = PCH


XTL_24M_X1_CPU_U22 1 2 XTL_24M_X1_CPU_U22_R 1 2
CPU1J 10 OF 20 ER1601 C1601
76 PEG_CLK_CPU_N0 AW2 AU1 33R2J-L1-GP SC15P50V2JN-L-GP
AY3 CLKOUT_PCIE_N0 CLKOUT_ITPXDP_N AU2 2018.4.9
GPU PEG BUS 76 PEG_CLK_CPU_P0 CLKOUT_PCIE_P0 CLKOUT_ITPXDP_P

1
CF32 0R->33R
18,76 PEG_CLKREQ_CPU# GPP_B5/SRCCLKREQ0# BT32 SUS_CLK_PCH R1602 2 1 R1603 X1601
GPD8/SUSCLK SUS_CLK_CPU 24,61
63 MSATA_CLK_CPU_N1 BC1 Do Not Stuff 200KR2F-L-GP XTAL-24MHZ-182-GP
BC2 CLKOUT_PCIE_N1 CK3 XTL_24M_X1_CPU_U22 2018.2.8
SSD 63 MSATA_CLK_CPU_P1
MSATA_CLKREQ_CPU# CE32 CLKOUT_PCIE_P1 XTAL_IN CK2 XTL_24M_X2_CPU_U22 1M->200k (PDG)
082.30006.0531
18,63 MSATA_CLKREQ_CPU# 2nd = 082.30006.0561

2
GPP_B6/SRCCLKREQ1# XTAL_OUT
D 3rd = 082.30006.0571 D

4
BD3 CJ1 XCLK_BIASREF R1601 1 2 2018.2.21 Swap M & S
BC3 CLKOUT_PCIE_N2 XCLK_BIASREF CM3 CLKIN_XTAL_CPU 60D4R2F-GP
CF30 CLKOUT_PCIE_P2 CLKIN_XTAL XTL_24M_X2_CPU_U22 1 2 XTL_24M_X2_CPU_U22_R 1 2
18,61 W LAN_RST# GPP_B7/SRCCLKREQ2# BN31 XTL_32K_X1_CPU 2018.1.11 updated ER1602 C1602
BH3 RTCX1 BN32 XTL_32K_X2_CPU Signal Max Length Max Via Count 33R2J-L1-GP SC15P50V2JN-L-GP
WLAN 61
61
W LAN_CLK_CPU_N3
W LAN_CLK_CPU_P3 BH4 CLKOUT_PCIE_N3
CLKOUT_PCIE_P3
RTCX2 CLK_BIASREF <1000 mils 2 2018.4.9
W LAN_CLKREQ_CPU# CE31 BR37 SRTC_RST# 0R->33R
18,61 W LAN_CLKREQ_CPU# GPP_B8/SRCCLKREQ3# SRTCRST# BR34 RTC_RST# XTL_32K_X2_CPU 1 2
BA1 RTCRST# C1603
BA2 CLKOUT_PCIE_N4 SC15P50V2JN-L-GP
CARD CE30 CLKOUT_PCIE_P4
GPP_B9/SRCCLKREQ4# EL1603 1 2 CLKIN_XTAL 61

2
BE1 BLM15AG121SN-1GP
BE2 CLKOUT_PCIE_N5 R1604 X1602
CF31 CLKOUT_PCIE_P5 Signal Max Length Max Via Count 10MR2J-L-GP
18,29 SPK_ID1 GPP_B10/SRCCLKREQ5# XTAL-32D768KHZ-88-GP
CLKIN_XTAL <10000 mils 2
082.30003.0191

1
2nd = 082.30003.0301

1
W HISKEY-LAKE-GP 2018.2.21 Swap M & S
ZZ.00CPU.271 R1606 1 2
10KR2J-L-GP XTL_32K_X1_CPU 1 2
EC1601 1 2 2018.2.6 Add R1606 C1604
SC47P50V2JN-3GP 2018.4.3 Add ER1603, EC1601 SC15P50V2JN-L-GP
2018.4.12 Stuff EC1601
ER1603->EL1603

2018.1.10 updated

C RTC reset 3D3V_RTC_AUX C

1
2
RN1601
SRN20KJ-1-GP

4
3
Q1601
SRTC_RST# 6 1

Note:ZZ.27002.F7C01
5 2 RTCRST_ON
24 RTCRST_ON
4 3 RTC_RST#

1
2N7002KDW -1-GP

2
R1605 75.27002.F7C

1
10KR2J-L-GP
G1601
C1605 C1606

Do Not Stuff
SC1U6D3V1MX-GP SC1U6D3V1MX-GP

2
1
B B

A UMA A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

PCH (CLK/RTC)
Size Document Number Rev
A3 FAROE 14" Pavilion SA
Date: Monday, August 06, 2018 Sheet 16 of 106
5 4 3 2 1
5 4 3 2 1

Main Func = PCH


CPU1G 7 OF 20
HDA_SYNC_CPU BN34 CH36
HDA_SYNC/I2S0_SFRM GPP_G0/SD_CMD SD_CMD 33
HDA_BITCLK_CPU BN37 CL35
HDA_SDOUT_CPU BN36 HDA_BCLK/I2S0_SCLK GPP_G1/SD_DATA0 SD_DATA0 33
CL36
BN35 HDA_SDO/I2S0_TXD Strap GPP_G2/SD_DATA1 CM35
SD_DATA1 33
27 HDA_SDIN0_CPU HDA_SDI0/I2S0_RXD GPP_G3/SD_DATA2 SD_DATA2 33
D BL36 CN35 D
HDA_SDI1/I2S1_RXD/SNDW1_DATA GPP_G4/SD_DATA3 SD_DATA3 33
BL35 CH35
HDA_RST#/I2S1_SCLK/SNDW1_CLK GPP_G5/SD_CD# SD_CD# 33
2018.6.6a Added CK23 CK36 SD_CLK 33
R1710 1 DY 2 Do Not Stuff GPP_D23/I2S_MCLK GPP_G6/SD_CLK CK34
GPP_G7/SD_WP SD_WP 33
R1711 1 DY 2 Do Not Stuff BL37
BL34 I2S1_SFRM/SNDW2_CLK 1D8V_S5
I2S1_TXD/SNDW2_DATA 2018.3.6 updated
R1703 2 1 75KR2F-GP R1707 1 DY 2 Do Not Stuff
CJ32 R1708 1 2 100KR2J-4-GP SD card power enable for 3.3V
61 CNV_RF_RST# 2018.2.27 remove BT_PCMCLK GPP_H1/I2S2_SFRM/CNV_BT_I2S_BCLK/CNV_RF_RESET# Note: Signal assertion logic can be changed by BIOS.
CH32
CH29 GPP_H0/I2S2_SCLK/CNV_BT_I2S_SCLK (Active High is default assertion logic)
61 CNV_PCMOUT_CLKREQ GPP_H2/I2S2_TXD/CNV_BT_I2S_SDI/MODEM_CLKREQ
CH30
2018.2.27 remove BT_PCMIN GPP_H3/I2S2_RXD/CNV_BT_I2S_SDO BW36 SD_PWR_EN#
GPP_A17/SD_VDD1_PWR_EN#/ISH_GP7 SD_PWR_EN# 33
CP24 BY31 SD_1P8_SEL 1 2
CN24 GPP_D19/DMIC_CLK0/SNDW4_CLK GPP_A16/SD_1P8_SEL R1706 49K9R2F-L-GP
GPP_D20/DMIC_DATA0/SNDW4_DATA CK33 SD_RCOMP 1 2
CK25 SD_1P8_RCOMP CM34 R1701 200R2F-L-GP
CJ25 GPP_D17/DMIC_CLK1/SNDW3_CLK SD_3P3_RCOMP
GPP_D18/DMIC_DATA1/SNDW3_DATA

27 HDA_SPKR CF35
C
GPP_B14/SPKR Strap C
WHISKEY-LAKE-GP
ZZ.00CPU.271
2018.1.11 updated
PCH strap pin:
Flash Descriptor Security Overide/
Intel ME Debug Mode
HDA_SDO/ Low = Security measures not override(Default)*
I2S0_TXD High= Overriden
WEAK INTERNAL PD
The internal pull-down is disabled after
PLTRST# deasserts
PCH strap pin:
Top Swap Override
B B
GPP_F[0:23] 1.8V Only
GPP_B14 / Low = Disable “Top Swap” mode.(Default)*
High= Enable “Top Swap” mode. 1 2
SPKR R1702 1KR2J-L2-GP
ME_UNLOCK 24
WEAK INTERNAL PD

R1704 1 2 33R2J-2-GP HDA_SDOUT_CPU


27,89 HDA_SDOUT_CODEC HDA_SDOUT_CPU 14
RN1701 1 4 SRN33J-5-GP-U HDA_BITCLK_CPU
27,89 HDA_BITCLK_CODEC
2 3 HDA_SYNC_CPU
27 HDA_SYNC_CODEC

UMA

A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
PCH (AUDIO/SDIO/SDXC)
Size Document Number Rev
A4 FAROE 14" Pavilion SA
Date: Monday, August 06, 2018 Sheet 17 of 106
5 4 3 2 1
5 4 3 2 1
2018.3.5 Added
91 SPI_CLK_ROM_R
91 SPI_SO_ROM_R

14,91 SPI_SI_ROM_R
14 SPI_W P_ROM_R 3D3V_S5
3D3V_S0 2018.1.17 udapete CPU1E 5 OF 20 RN1803
R1801 1 2 49D9R2F-L1-GP SPI_CLK_ROM_R CH37 CK14 DM_SMB_SCL_CPU EC_SMB_SDA_CPU 1 4
24,25 SPI_CLK_ROM SPI0_CLK GPP_C0/SMBCLK DM_SMB_SCL_CPU 65
R1809 1 2 HDD_HALTLED R1802 1 2 49D9R2F-L1-GP SPI_SO_ROM_R CF37 CH15 DM_SMB_SDA_CPU EC_SMB_SCL_CPU 2 3
DY Do Not Stuff
24,25 SPI_SO_ROM
R1803 1 2 49D9R2F-L1-GP SPI_SI_ROM_R CF36 SPI0_MISO GPP_C1/SMBDATA CJ15
DM_SMB_SDA_CPU 65
24,25 SPI_SI_ROM SPI0_MOSI Strap GPP_C2/SMBALERT#
R1804 1 2 49D9R2F-L1-GP SPI_W P_ROM_R CF34 Strap SRN2K2J-5-GP
25 SPI_W P_ROM SPI_HOLD_ROM_R SPI0_IO2 W IFI_RF_EN 14,61 3D3V_S5
R1810 1 2100KR2J-1-GP R1805 1 2 49D9R2F-L1-GP CG34 CH14
14,25 SPI_HOLD_ROM SPI0_IO3 GPP_C3/SML0CLK 2018.2.6GPP_C2->WIFI_RF_EN
24,25 SPI_CS_CPU_N0 CG36 CF15
2017.12.28 Added CG35 SPI0_CS0# GPP_C4/SML0DATA CG15 PM_SUS_STAT# 1 2
D D
CH34 SPI0_CS1# Strap GPP_C5/SML0ALERT# GPP_C5 14 R1806 10KR2J-L-GP
91 SPI_CS_CPU_N2 SPI0_CS2# CN15 EC_SMB_SCL_CPU
GPP_C6/SML1CLK EC_SMB_SCL_CPU 24,70,79 3D3V_S0
CM15 EC_SMB_SDA_CPU
3D3V_S0 GPP_C7/SML1DATA EC_SMB_SDA_CPU 24,70,79
CC34 GPP_B23 14
RN1801 CF20 Strap GPP_B23/SML1ALERT#/PCHHOT# PM_CLKRUN#_EC 1 2
64 HDD_HALTLED GPP_D1/SPI1_CLK/BK1/SBK1
1 4 PEG_CLKREQ_CPU# CG22 R1807 8K2R2F-1-GP
PEG_CLKREQ_CPU# 16,76 91 TPM_PIRQ# GPP_D2/SPI1_MISO_IO1/BK2/SBK2
2 3 SPK_ID1 CF22
SPK_ID1 16,29 GPP_D3/SPI1_MOSI_IO0/BK3/SBK3
CG23 CA29 LPC_AD_CPU_P0 24,68
SRN10KJ-L-GP CH23 GPP_D21/SPI1_IO2 GPP_A1/LAD0/ESPI_IO0 BY29
GPP_D22/SPI1_IO3 GPP_A2/LAD1/ESPI_IO1 LPC_AD_CPU_P1 24,68
3,24 NMI_SMI_DBG# CG20 BY27 LPC_AD_CPU_P2 24,68
RN1802 GPP_D0/SPI1_CS0#/BK0/SBK0 GPP_A3/LAD2/ESPI_IO2 BV27
GPP_A4/LAD3/ESPI_IO3 LPC_AD_CPU_P3 24,68
1 8 H_RCIN# CA28
GPP_A5/LFRAME#/ESPI_CS# LPC_FRAME#_CPU 24,68
2 7 MSATA_CLKREQ_CPU# CA27 PM_SUS_STAT#
MSATA_CLKREQ_CPU# 16,63 GPP_A14/SUS_STAT#/ESPI_RESET#
3 6 INT_SERIRQ CH7 RN1804
4 5 W LAN_CLKREQ_CPU# CH8 CL_CLK BV32 CLK_PCI_LPC_R 1 4
W LAN_CLKREQ_CPU# 16,61 2018.2.27 remove C-Link CL_DATA GPP_A9/CLKOUT_LPC0/ESPI_CLK LPC_CLK_KBC 24,89
CH9 BV30 PM_CLK_PCI_TPM 2 3
CL_RST# GPP_A10/CLKOUT_LPC1 LPC_CLK_DBG 68,89
SRN10KJ-6-GP BY30
GPP_A8/CLKRUN#
SRN0J-6-GP
1 2 H_RCIN# BV29 PM_CLKRUN#_EC
R1808
DY Do Not Stuff
W LAN_RST# 16,61 24 H_RCIN#
INT_SERIRQ BV28 GPP_A0/RCIN#/TIME_SYNC1 PM_CLKRUN#_EC 24
24,68,91 INT_SERIRQ GPP_A6/SERIRQ
updated 2018.1.11 2018.1.10 updated
W HISKEY-LAKE-GP
PCH strap pin: ZZ.00CPU.271
PCH strap pin:
BOOT HALT(EDS Reserved) TLS CONFIDENTIALITY
Intel ME Crypto Transport Layer Security
3D3V_S5 3D3V_S0

Low = Enable Low = Disable(Default) *


SPI0_MOSI High= Disable(Default) * GPP_C2 / High= Enable
C C
WEAK INTERNAL PU 2018.8.2
SMBALERT# WEAK INTERNAL PD

5
6
7
8
PIN SWAP
This strap should sample HIGH.
RN1805 PCH strap pin:
PCH strap pin: SRN2K2J-4-GP eSPI or LPC is selected for EC
CONSENT STRAP(EDS Reserved)

4
3
2
1
GPP_C5 / Low = LPC(Default) *
Low = Enable High= eSPI
SPI0_IO2 High= Disable(Default) * SML0ALERT#
WEAK INTERNAL PD
WEAK INTERNAL PU
Q1801
This strap should sample HIGH. DM_SMB_SDA_CPU 6 1 PCH strap pin:

Note:ZZ.27002.F7C01
DM_SMB_SDA_CN 12,13
PCH strap pin: EXI BOOT STALL BYPASS
5 2
A0 PERSONALITY STRAP(EDS Reserved)
4 3 GPP_B23 / Low = DIABLED (BSSB 4 WIRE)(Default) *
2N7002KDW -1-GP
SML1ALERT# / High= ENABLED (BSSB 2+2)
Low = Enable PCHHOT# WEAK INTERNAL PD
SPI0_IO3 High= Disable(Default)* 75.27002.F7C DM_SMB_SCL_CN 12,13
WEAK INTERNAL PU DM_SMB_SCL_CPU
This strap should sample HIGH.

B B

UMA
A A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
PCH (LPC/SPI/SMBUS/CLINK)
Size Document Number Rev
A3 FAROE 14" Pavilion SA
Date: Monday, August 06, 2018 Sheet 18 of 106

5 4 3 2 1
5 4 3 2 1
2018.1.12 updated
Main Func = PCH CPU_C10_GATE# is a new signal from the Whiskey Lake
SoC that can be used for gating off VccSTG, VccPLL_OC
and VccIO (WHL-U) in the S0/C10 system state in order
CPU1I 9 OF 20
to save power.
61 CNV_WR_DN0 CR30
CP30 CNV_WR_D0N CN27 2018.1.25
61 CNV_WR_DP0 CNV_WR_D0P GPP_H18/CPU_C10_GATE# CPU_C10_GATE# 40 Added
D D
CM30 CM27
61 CNV_WR_DN1 CNV_WR_D1N GPP_H19/TIMESYNC0
CN30 2018.2.27 remove BT_WAKE#
61 CNV_WR_DP1 CNV_WR_D1P CF25
CN32
Strap GPP_H21 CN26
GPP_H21 14
61 CNV_WT_DN0 CM32 CNV_WT_D0N GPP_H22 CM26
61 CNV_WT_DP0 CNV_WT_D0P Strap GPP_H23 CK17
CP33 GPP_F10
61 CNV_WT_DN1 CN33 CNV_WT_D1N
61 CNV_WT_DP1 CNV_WT_D1P BV35 2018.1.10
CN31 Strap GPD7 CN20
GPD7 14 Added
61 CNV_WR_CLKN CNV_WR_CLKN GPP_F3
CP31
61 CNV_WR_CLKP CNV_WR_CLKP CG25
CP34 GPP_D4/IMGCLKOUT0/BK4/SBK4 CH25
61 CNV_WT_CLKN CN34 CNV_WT_CLKN GPP_H20/IMGCLKOUT1
61 CNV_WT_CLKP CNV_WT_CLKP CR20
2 1 CNV_WT_RCOMP CP32 GPP_F12/EMMC_DATA0 CM20
R1901 150R2F-1-GP CR32 CNV_WT_RCOMP#CP32 GPP_F13/EMMC_DATA1 CN19
CP20 CNV_WT_RCOMP#CR32 GPP_F14/EMMC_DATA2 CM19
C C
CK19 GPP_F0/CNV_PA_BLANKING GPP_F15/EMMC_DATA3 CN18
CG17 GPP_F1 GPP_F16/EMMC_DATA4 CR18
GPP_F2 GPP_F17/EMMC_DATA5 CP18
CR14 GPP_F18/EMMC_DATA6 CM18
ACCEL_INT CP14 GPP_C8/UART0_RXD GPP_F19/EMMC_DATA7
70 ACCEL_INT GPP_C9/UART0_TXD
CN14 CM16
CM14 GPP_C10/UART0_RTS# GPP_F20/EMMC_RCLK CP16
GPP_C11/UART0_CTS# GPP_F21/EMMC_CLK CR16
3D3V_S0 CJ17 GPP_F11/EMMC_CMD CN16
CH17 GPP_F8/CNV_MFUART2_RXD GPP_F22/EMMC_RESET#
R1903 1 2 10KR2J-L-GP ACCEL_INT GPP_F9/CNV_MFUART2_TXD CK15 EMMC_RCOMP 1 2
CF17 EMMC_RCOMP R1902
GPP_F23/A4WP_PRESENT 200R2F-L-GP

WHISKEY-LAKE-GP
ZZ.00CPU.271
B 2018.1.10 updated 2018.1.10 updated 2018.1.11 updated B

PCH strap pin: PCH strap pin: PCH strap pin:


XTAL INPUT MODE HVM ONLY MAF/SAF STRAP XTAL INPUT MODE(EDS Reserved) HVM ONLY

Low = 38.4/19.2MHZ (DEFAULT) Low = MAF ENABLE(Default) * Low = XTAL INPUT IS SINGLE ENDED *
GPP_H21 High= 24MHZ GPP_H23 High= SAF ENABLE GPD7 High= XTAL IS ATTACHED
* WEAK INTERNAL PD WEAK INTERNAL PD?

UMA

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
A Taipei Hsien 221, Taiwan, R.O.C. A

Title
PCH (CSI2/EMMC)
Size Document Number Rev
A FAROE 14" Pavilion SA
Date: Monday, August 06, 2018 Sheet 19 of 106
5 4 3 2 1
5 4 3 2 1

Main Func = PCH


CPU1K 11 OF 20

24,40,61,63,68,76,89,91 PLT_RST# BJ35 BJ37


3D3V_DSW XDP_DBRESET# CN10 GPP_B13/PLTRST# GPP_B12/SLP_S0# BU36
89 XDP_DBRESET# SYS_RESET# GPD4/SLP_S3# PM_SLP_S3# 24,40,51,61
RN2001 RSMRST#_KBC BR36 BU27
24,89 RSMRST#_KBC RSMRST# GPD5/SLP_S4# PM_SLP_S4# 24,40,51
1 4 BATLOW# BT29
D 2 3 AC_PRESENT H_CPUPWRGD AR2 GPD10/SLP_S5# D
89 H_CPUPWRGD PROCPWRGD
H_VCCST_PWRGD BJ2 BU29
89 H_VCCST_PWRGD VCCST_PWRGOOD SLP_SUS# PM_SLP_SUS# 24,40
SRN10KJ-L-GP BT31
SYS_PWROK CR10 SLP_LAN# BT30
3D3V_RTC_AUX 24,89 SYS_PWROK SYS_PWROK GPD9/SPL_WLAN#
PCH_PWROK BP31 BU37
40,89 PCH_PWROK PCH_PWROK GPD6/SLP_A#
PCH_DPWROK BP30
SM_INTRUDER# 24,45,89 PCH_DPWROK DSW_PWROK
1 2 BU28 PM_PWRBTN# 24
R2002 1MR2J-L3-GP BV34 GPD3/PWRBTN# BU35
24 PM_SUSWARN# GPP_A13/SUSWARN#/SUSPWRDACK GPD1/ACPRESENT AC_PRESENT 24
24 PM_SUSACK# BY32 BV36 BATLOW#
GPP_A15/SUSACK# GPD0/BATLOW#
2 1 PCH_DPWROK PCIE_WAKE# BU30
R2009 100KR2J-4-GP BU32 WAKE# BR35 SM_INTRUDER#
BU34 GPD2/LAN_WAKE# INTRUDER#
CRB:1M 92 FPR_OFF GPD11/LANPHYPC CC37 EXT_PWR_GATE#
Check list:100K GPP_B11/EXT_PWR_GATE# CC36
GPP_B2/VRALERT# DGPU_PWRGD 85
3D3V_S5 BT27 INPUT3VSEL 2018.1.11
INPUT3VSEL updated

1
1 2 EXT_PWR_GATE# R2012
C R2004 10KR2J-L-GP WHISKEY-LAKE-GP 4K7R2J-L-GP C

3D3V_S0 ZZ.00CPU.271

2
1 2 FPR_OFF
R2011 1 2 10KR2J-L-GP XDP_DBRESET# 3D3V_S5 2018.1.10 updated
R2007 10KR2J-L-GP
PCH strap pin:
C2001

1
2018.3.5 Added SCD1U16V2KX-L-GP 3V SELECT STRAP
U2001 1V_S3
1 DY 2 SYS_PWROK INPUT3VSEL Low = 3.3V +/-5% *

2
R2005 Do Not Stuff 1 5 2 1
1 2 PCH_PWROK NC#1 VCC R2003 1KR2J-L2-GP High= 3.0V +/-5%
R2006
DY Do Not Stuff 2 This signal has a weak internal TBD
24,40 ALL_SYS_PWRGD A
VCCST_GD_R H_VCCST_PWRGD
This strap should only be used for specific targeted 1S
3 4 1 2
GND Y R2001 60D4R2F-GP
battery systems.

74LVC1G07GW-GP
B 73.01G07.0HG B

3D3V_DSW

1 2 RSMRST#_KBC 1 2 PCIE_WAKE#
R2010 10KR2J-L-GP R2008 10KR2J-L-GP

20160810 20160818 UMA


EE Danne Modify EE Danne Modify
Follow KBL check list Vendor suggestion
A Change R2010 to 10K Change R2008 to 10K Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
PCH (SYS POWER MANAGEMENT)
Size Document Number Rev
A4 FAROE 14" Pavilion SA
Date: Monday, August 06, 2018 Sheet 20 of 106
5 4 3 2 1
5 4 3 2 1

Main Func = PCH

D CPU1R 18 OF 20 CPU1S 19 OF 20 CPU1T 20 OF 20 D


BT35 BY25
CR34 BL7 D6 VSS VSS J18 N6 CF23
BT5 VSS VSS AE25 AL32 VSS VSS AU32 B37 VSS VSS V4
BY5 VSS VSS BM33 BT36 VSS VSS BY28 CB3 VSS VSS BE30
CP35 VSS VSS CM5 D8 VSS VSS J21 P10 VSS VSS CF28
CM37 VSS VSS AE27 AL7 VSS VSS AV25 B5 VSS VSS W10
CK37 VSS VSS BM35 D9 VSS VSS BY33 CB33 VSS VSS BE31
AW1 VSS VSS CM9 AM10 VSS VSS J24 P3 VSS VSS CF3
CM1 VSS VSS AE30 BU11 VSS VSS AV28 B7 VSS VSS W27
BD6 VSS VSS BM36 E23 VSS VSS BY35 CB4 VSS VSS CF4
AY4 VSS VSS CN13 AM28 VSS VSS J33 P33 VSS VSS W30
B34 VSS VSS AE7 E27 VSS VSS AV3 B9 VSS VSS BF3
E35 VSS VSS BM9 AM33 VSS VSS BY36 CB7 VSS VSS CG33
A4 VSS VSS CN17 BU23 VSS VSS J36 P36 VSS VSS W7
AE24 VSS VSS AF27 E29 VSS VSS AV33 BA10 VSS VSS BF33
AE26 VSS VSS BN30 AM35 VSS VSS J6 CC11 VSS VSS CG7
AF25 VSS VSS CN21 BU24 VSS VSS AV36 P4 VSS VSS BF36
AG24 VSS VSS AF3 E31 VSS VSS C1 BA28 VSS VSS Y26
AG26 VSS VSS BN7 BU25 VSS VSS K21 P7 VSS VSS BF4
AH24 VSS VSS CN25 E33 VSS VSS AV4 BA3 VSS VSS CH31
AH25 VSS VSS AF30 AN25 VSS VSS C21 CC20 VSS VSS Y27
B2 VSS VSS CN29 BU7 VSS VSS K22 R27 VSS VSS BG25
B36 VSS VSS AF33 E9 VSS VSS AV6 BB3 VSS VSS Y30
C36 VSS VSS BP15 AN28 VSS VSS C25 CC25 VSS VSS BG28
C37 VSS VSS AF36 BV11 VSS VSS K24 R28 VSS VSS CJ11
CN1 VSS VSS AF4 F12 VSS VSS AV8 BB33 VSS VSS Y33
CN2 VSS VSS CN5 AN29 VSS VSS C29 CC28 VSS VSS CJ14
CN37 VSS VSS AF7 F15 VSS VSS K25 R29 VSS VSS Y35
C CP2 VSS VSS BP25 AN30 VSS VSS AW28 BB36 VSS VSS BH28 C
D1 VSS VSS CN9 F18 VSS VSS C33 CC31 VSS VSS CJ19
A32 VSS VSS AG10 AN31 VSS VSS K27 R30 VSS VSS Y7
F33 VSS VSS BP3 BV3 VSS VSS AW29 BB4 VSS VSS BH29
A3 VSS VSS CP1 F2 VSS VSS C4 CC7 VSS VSS CJ23
BJ7 VSS VSS BP32 AN7 VSS VSS K28 R31 VSS VSS BH32
CJ36 VSS VSS CP11 BV31 VSS VSS AW3 BC25 VSS VSS CJ28
A36 VSS VSS AH27 F21 VSS VSS C9 CD11 VSS VSS BH33
BK10 VSS VSS BP33 AN8 VSS VSS K29 T27 VSS VSS CJ33
CJ4 VSS VSS CP13 BV33 VSS VSS AW30 CD12 VSS VSS BH35
AB27 VSS VSS AH28 F24 VSS VSS CA11 T30 VSS VSS CJ35
BK2 VSS VSS BP4 BV4 VSS VSS K3 BC29 VSS VSS BP19
CK1 VSS VSS CP15 F3 VSS VSS AW31 CD14 VSS VSS BR16
AB3 VSS VSS AH29 AP3 VSS VSS CA15 T33 VSS VSS BY18
BK28 VSS VSS BP7 BW11 VSS VSS K30 T35 VSS VSS BY19
AB30 VSS VSS CP19 F4 VSS VSS AY33 BC32 VSS VSS CC16
BK3 VSS VSS AH30 AP33 VSS VSS CA22 CD24 VSS VSS BU16
CK4 VSS VSS CP21 BW15 VSS VSS K31 T36 VSS VSS CC14
AB33 VSS VSS AH31 G21 VSS VSS AY35 CD25 VSS VSS BR22
BK33 VSS VSS BR19 AP36 VSS VSS K32 T7 VSS VSS BU20
CK7 VSS VSS CP27 G27 VSS VSS B12 BC8 VSS VSS CD20
AB36 VSS VSS AH33 AP4 VSS VSS K4 CE33 VSS VSS BT14
BK4 VSS VSS BR25 G33 VSS VSS B15 U26 VSS VSS BP12
CL2 VSS VSS AH35 AR28 VSS VSS CA25 BD28 VSS VSS CB24
AB4 VSS VSS CP37 G35 VSS VSS K9 CE35 VSS VSS CC24
BK7 VSS VSS AJ25 G36 VSS VSS B18 U7 VSS VSS J5
CM13 VSS VSS BT15 AT33 VSS VSS CB11 BD33 VSS VSS U24
AB7 VSS VSS AJ28 BW24 VSS VSS L27 CE36 VSS VSS BD7
BL25 VSS VSS BT16 G9 VSS VSS B21 V26 VSS VSS AR4
B CM17 VSS VSS CP9 AT35 VSS VSS L33 BD35 VSS VSS AU4 B
AC10 VSS VSS AJ7 H21 VSS VSS B23 CE7 VSS VSS AW4
BL28 VSS VSS CR2 AT36 VSS VSS L35 V27 VSS VSS BA6
CM21 VSS VSS AK3 BW7 VSS VSS B25 BD36 VSS VSS BC4
AC27 VSS VSS CR36 H27 VSS VSS CB18 CF11 VSS VSS BE4
BL29 VSS VSS AK33 AT4 VSS VSS L36 V3 VSS VSS BE8
CM25 VSS VSS D21 BY11 VSS VSS B27 BE10 VSS VSS BA4
AC30 VSS VSS AK36 AU10 VSS VSS CB19 CF14 VSS VSS BD4
BL30 VSS VSS BT25 BY15 VSS VSS L6 V30 VSS VSS BG4
CM29 VSS VSS D25 H9 VSS VSS B29 BE28 VSS VSS CJ2
BL31 VSS VSS AK4 AU28 VSS VSS CB2 CF19 VSS VSS CJ3
CM31 VSS VSS BT28 BY22 VSS VSS N25 V33 VSS VSS AM5
AD33 VSS VSS AL28 J12 VSS VSS B31 BE29 VSS VSS CM4
BL32 VSS VSS BT33 AU29 VSS VSS CB20 CF2 VSS VSS AC5
CM33 VSS VSS D5 J15 VSS VSS N27 V36 VSS VSS AG5
AD35 VSS VSS AL29 VSS VSS CB25 BE3 VSS VSS CR6
VSS VSS VSS VSS VSS

W HISKEY-LAKE-GP W HISKEY-LAKE-GP W HISKEY-LAKE-GP


ZZ.00CPU.271 ZZ.00CPU.271 ZZ.00CPU.271

A UMA A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
PCH (VSS)
Size Document Number Rev
A3 FAROE 14" Pavilion SA
Date: Monday, August 06, 2018 Sheet 21 of 106
5 4 3 2 1
5 4 3 2 1

Main Func = CPU CPU1D 4 OF 20

1V_VCCIO 1 H_CATERR# AA4 T6 PROC_TCK


TP2201 CATERR# PROC_TCK PROC_TCK 99
AR1 U6 PROC_TDI
24 H_PECI PECI PROC_TDI PROC_TDI 99
R2203 1 2 1KR2J-L2-GP PROCHOT#_CPU R2204 1 2 499R2F-2-GP PROCHOT#_CPU_R Y4 Y5
24,44,46 PROCHOT#_CPU PCH_THERMTRIP PROCHOT# PROC_TDO PROC_TMS
40 H_THERMTRIP# R2201 2 1 Do Not Stuff BJ1 T5 PROC_TMS 99
1V_S3 THRMTRIP# PROC_TMS AB6 PROC_TRST# 2018.1.17
PROC_TRST# PROC_TRST# 99
U1 remove R2210-R2212,R2218
R2202 1 2 1KR2J-L2-GP PCH_THERMTRIP 2018.1.15 updated(#575412) U2 BPM#0 W6 PCH_JTAG_TCK
BPM#1 PCH_TCK PCH_JTAG_TCK 99
65 TP_INT# Notes: U3 U5
Processor BPM#[3:0] nets can be left floated U4 BPM#2 PCH_TDI W5 PCH_JTAG_TDO
55 TOUCH_INT# when not use for debug. BPM#3 PCH_TDO PCH_JTAG_TDO 99
P5
PCH_TMS Y6
D D
2018.2.6 PCH_TRST# P6
Delete "DGPU_VBIOS2" PCH_JTAGX
3D3V_S5 Change "DGPU_HOLD_RST#" from CC35 to CB34 CE9 W2
GPP_E3/CPU_GP0 PROC_PREQ# XDP_PREQ# 99
Connect "BLUETOOTH_EN" to CC35 TOUCH_INT# CN3 W1
GPP_E7/CPU_GP1 PROC_PRDY# XDP_PRDY# 99
R2207 1 2 10KR2J-L-GP TP_INT# 76 DGPU_HOLD_RST# CB34
R2210 1 2 Do Not Stuff BLUETOOTH_EN_PCH CC35 GPP_B3/CPU_GP2
3D3V_S0
24,61 BLUETOOTH_EN DY GPP_B4/CPU_GP3
2018.7.24 R2208 1 2 49D9R2F-L1-GP CPU_POPIRCOMP BP27
R2205 1 2 10KR2J-L-GP TOUCH_INT# Add R2210 for Chewbacca issue R2209 1 2 49D9R2F-L1-GP PCH_POPIRCOMP BW25 PROC_POPIRCOMP
PCH_OPIRCOMP
2018.1.15 updated(#575412)
R2206 1 2 10KR2J-L-GP DGPU_HOLD_RST# Notes:
These OPC_RCOMP and OPCE_RCOMP
resistors are required for CFL U43e only. W HISKEY-LAKE-GP
These pins are RSVD for WHL U42 and can
be left unconnected. ZZ.00CPU.271

2018.1.15 updated 2018.1.15 updated


#575412 PDG rev.0.7 #575412 PDG rev.0.7

C C

B B

UMA
A A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
CPU (JTAG/CPU SIDE BAND)
Size Document Number Rev
A3
FAROE 14" Pavilion SA
Date: Monday, August 06, 2018 Sheet 22 of 106

5 4 3 2 1
5 4 3 2 1

Main Func = CPU


2018.1.12 updated 2018.1.15 updated
CPU1Q 17 OF 20
CPU strap pin: #575962 RVP Rev0.5 P.32~33
WHL QS/CFL/WHL_ES1_CNL U
T4 F37
PHYSICAL_DEBUG_ENABLED (DFX PRIVACY) CFG0 RSVD_TP#F37 F34 CFG[0]:EAR-STALL/NOT STALL RESET SEQUENCE AFTER PCU PLL IS LOCKED
R4 RSVD_TP#F34 CP36 IST_TRIG 1
Low = ENABLED CFG1 IST_TRIG 1 : (DEFAULT) NORMAL OPERATION; NO STALL
SET DFX ENABLED BIT IN DEBUG INTERFACE MSR T3 CN36 TP2301 Do Not Stuff
R3 CFG2 RSVD_TP#CN36 0 : STALL
CFG3 High= DISABLED* 14,99 CFG3
J4 CFG3
14 CFG4 CFG4
D M4 BJ36 CFG[1]:PCH/ PCH LESS MODE SELECTION D
J3 CFG5 RSVD_TP#BJ36 BJ34
M3 CFG6 RSVD_TP#BJ34 1 : (DEFAULT) NORMAL OPERATION
DISPLAY PORT PRESENCE STRAP R2 CFG7 BK34 0 : PCH-LESS MODE
N2 CFG8 TP#BK34 BR18
Low = ENABLED* CFG9 TP#BR18
AN EXTERNAL DISPLAY PORT DEVICE IS CONNECTED TO THE R1
EMBEDDED DISPLAY PORT N1 CFG10 CFG[2]:PCI EXPRESS STATIC LANE REVERSAL FOR ALL PEG PORTS
CFG4 CFG11
J2 1 : (DEFAULT)NORMAL OPERATION;
High= DISABLED L2 CFG12 BT9 0 : LANE REVERSAL
NO PHYSICAL DISPLAY PORT ATTACHED TO EMBEDDED
J1 CFG13 RSVD_TP#BT9 BT8
DISPLAY PORT CFG14 RSVD_TP#BT8
L1
CFG15 BP8 CFG[3]:PHYSICAL_DEBUG_ENABLED (DFX PRIVACY)
L3 RSVD_TP#BP8 BP9 0 : ENABLED
N3 CFG16 RSVD_TP#BP9
CFG18 SET DFX ENABLED BIT IN DEBUG INTERFACE MSR
L4 CR4
N4 CFG17 RSVD#CR4 1 : DISABLED
CFG19 CP3
RSVD#CP3
RSVD#CR3
CR3 CFG[4]:DISPLAY PORT PRESENCE STRAP
2 1 CFG_RCOMP AB5
R2301 49D9R2F-L1-GP CFG_RCOMP 0 : ENABLED
W4 AN EXTERNAL DISPLAY PORT DEVICE IS CONNECTED TO THE EMBEDDED
99 ITP_PMODE ITP_PMODE DISPLAY PORT
CG2 1 : DISABLED
CG1 RSVD#CG2
RSVD#CG1 NO PHYSICAL DISPLAY PORT ATTACHED TO EMBEDDED DISPLAY PORT
AT3
RSVD_TP#AT3
RSVD_TP#AU3
AU3 CFG[6:5]:PCIE PORT BIFURCATION STRAPS
Description 11 : DEVICE1 FUNTION 1, DEVICE 1 FUNCTION2 DISABLED
H4
C H3 RSVD#H4 10 : DEVICE1 FUNCTION1 ENABLED DEVICE1 FUNCTION 2 DISABLED C
RSVD#H3 AN1 01 : DEVICE 1 FUNCTION 1 DISABLED, DEVICE 1 FUNCTION 2 ENABLED
BV24 RSVD#AN1 AN2
RSVD#BV24 RSVD#AN2 00 : DEVICE 1 FUNCTION 1 ENABLED, DEVICE 1 FUNCTION 2 ENABLED
BV25
RSVD#BV25 AN4
RSVD#AN4 AN3 CFG[7]:PEG DEFER TRAINING
RSVD#AN3
1 : (DEFAULT) PEG TRAIN IMMEDIATELY
AL2 FOLLOWING XXRESETB DE ASSERTION
IST_TP0 AL1
IST_TP1 0 : PEG WAIT FOR BIOS FOR TRAINING
AL4 CFG[8]:ALLOW THE USE OF NOA ON LOCKED UNITS
IST_TRIG0 AL3
IST_TRIG1 1 : DISABLED(DEFAULT); IN THIS CASE, NOA WILL BE DISABLED IN
BK36 BP34 2018.2.23 LOCKED UNITS AND ENABLED IN UN-LOCKED UNITS
RSVD#BK36 TP#BP34
BK35
RSVD#BK35 VSS
BP36 ->GND 0 : ENABLED; NOA WILL BE AVAILABLE REGARDLESS
BP35 OF THE LOCKING OF THE UNIT
W3 TP#BP35
AM4 RSVD#W3
RSVD#AM4 CFG[9]:NO SVID PROTOCOL CAPABLE VR CONNECTED
AM3 1 : VRS SUPPORTING SVID PROTOCOL ARE PRESENT
RSVD_TP#AM3
0 : NO VR SUPPORTING SVID IS PRESENT. THE CHIP WILL NOT GENERATE
CR35 CNVLDO_MON 1 (OR RESPOND TO) SVID ACTIVITY
RSVD_TP#CR35 2018.2.6 TP2303 Do Not Stuff
Add test point
(#575179) CFG[10]:SAFE MODE BOOT
1 : POWER FEATURES ACTIVATED DURING RESET
0 : POWER FEATURES (ESPECIALLY CLOCK GATINE ARE NOT ACTIVATED
B E1 SKTOCC# 1 B
SKTOCC# TP2302 Do Not Stuff
CFG[11]:DMI AC COUPLING - JUST A PLACE HOLDER. NOT APPLICABLE FOR
W HISKEY-LAKE-GP ULX-ULT
ZZ.00CPU.271 1 : (DEFULT)DMI WILL BE CONFIGURED AS HALF SWING DC COUPLED
0 : DMI WILL BE CONFIGURED AS FULL SWING AC COUPLED
CFG[12]:PM SYNC LEGACY
THIS STRAP IS NEW IN SKL. IT TELL THE CPU THAT IT IS CONNECTED TO
PCH SUPPORTING OLDER VERSION OF PMSYNC PROTOCOL IN LEGACY MORE CPU
DOESN'T WAIT FOR EPOC MESSAGE FROM THE PCH
1 : (DEFAULT) PMSYNC 2.0
0 : LEGACY
CFG[13]:PMSYNC AYNC MODE- PM SYNC
1 : (DEFAULT)SYNCHCRONOUS (1 24 MHZ CYCLE PER BIT)
0 : ASYNC - 4-24MHZ CYCLES PER BIT

A UMA A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
CPU (RESERVED,CFG)
Size Document Number Rev
A3 FAROE 14" Pavilion SA
Date: Monday, August 06, 2018 Sheet 23 of 106
5 4 3 2 1
5 4 3 3D3V_AUX_KBC 2 1
SSID = KBC U2402
3D3V_AUX_KBC_VCC0 3D3V_AUX_KBC

ER2401 20160816
22R2F-1-GP 1 2 CLK_PCI_KBC_R 12 125 Modify by EE Danne
18,89 LPC_CLK_KBC PCICLK VCC Remove R2404
4 22
18,68 LPC_FRAME#_CPU LFRAME# VCC

1
3D3V_AUX_S5 3D3V_AUX_KBC 10 33
18,68 LPC_AD_CPU_P0 8 LAD0 VCC 111 1 2
3D3V_RTC_AUX C2401 C2402 C2403 C2404 C2405 C2406
1 2 18,68 LPC_AD_CPU_P1 7 LAD1 VCC0 96 SC1U6D3V1MX-GP
SC1U6D3V1MX-GP
SC1U6D3V1MX-GP
SC1U6D3V1MX-GP
SC1U6D3V1MX-GP
SC1U6D3V1MX-GP
R2405 Do Not Stuff
18,68 LPC_AD_CPU_P2

2
R2402 Do Not Stuff 5 LAD2 VCC 9
18,68 LPC_AD_CPU_P3 3 LAD3 VCC_LPC
18,68,91 INT_SERIRQ SERIRQ
1 67
3D3V_AUX_KBC 3,18 NMI_SMI_DBG# GA20 AVCC 3D3V_AUX_KBC_AVCC
2
18 H_RCIN# PLT_RST#_EC KBRST#
20,40,61,63,68,76,89,91 PLT_RST# R2407 1 2 13 11
RN2405 Do Not Stuff 20 PCIRST# GND 24
1 4 BAT_SMB_SCL 3 EC_SCI# 38 SCI# GND 35 3D3V_AUX_KBC
2 3 BAT_SMB_SDA 18 PM_CLKRUN#_EC 37 CLKRUN# GND 94
ECRST#
ECRST# GND 113
SRN2K2J-5-GP GND

1
D 65 KB_BL_ON
65 TP_EN
21
23
25
PWM0
PWM1
AGND
69

124
EC_AGND
C2407
SC1U6D3V1MX-GP
3D3V_AUX_KBC 3D3V_AUX_KBC_AVCC D
43 DC_BATFULL

2
2018.5.11 PWM2 VCC_IO2 L2402
1 2 ECRST# Swap w/ EC_CAP_LED 26 BLM15AG121SN-1GP
26 FAN1_PWM 27 FANPWM0 68 2 1
C2412 SCD1U16V2KX-L-GP AMP_MUTE# 27
28 FANPWM1 DA0 70
26 FAN_TACH1 29 FANFB0 DA1 71 LID_EC_CTRL# 55
57 HDMI_DET_EC FANFB1 DA2 PM_SLP_S4# 20,40,51 2018.6.1
72
79 GPU_PROTECT#

1
DA3
2018.6.6 39 C2408 C2409
3D3V_DSW pin103->pin27 65,89 KCOL0 40 KSO0 63 SC1U6D3V1MX-GP
SC1U6D3V1MX-GP
65,89 KCOL1 AD_IA 44

2
41 KSO1 AD0 64 PCB_VER_AD
65,89 KCOL2 42 KSO2 AD1 65 ADT_TYPE
RN2402
1 4 CPU_I2C_SCL_TP 65,89 KCOL3 43 KSO3 AD2 66 MODEL_ID_AD
2 3 CPU_I2C_SDA_TP 65,89 KCOL4 44 KSO4 AD3 75
65,89 KCOL5 45 KSO5 AD4 76 SUS_CLK_CPU BT_IA 44
65,89 KCOL6 46 KSO6 AD5 73 SUS_CLK_CPU 16,61
SRN2K2J-5-GP EC_AGND
65,89
65,89
65,89
65,89
KCOL7
KCOL8
KCOL9
KCOL10
47
48
49
50
KSO7
KSO8
KSO9
KSO10
KBC9028Q AD6
AD7
74

97
SEN_MODE_GPIO0
SEN_MODE_GPIO1
6
6
2018.8.1
Add for 25810
65,89 KCOL11 KSO11 GPXIOA00 USB_CC_CHG_HI 72
51 98
65,89 KCOL12 KSO12 GPXIOA01 5V_TOUCH_EN 55
52 99
65,89 KCOL13 53 KSO13 GPXIOA02 100
65,89 KCOL14 54 KSO14 GPXIOA03 101
2018.4.12 65,89 KCOL15 81 KSO15 GPXIOA04 102 S5_ENABLE 45
65,89 KCOL16 KSO16 ADGPXIOA05 VD_IN2 26,66 CONFIRM EC THIS PIN PM_PWRBTN# PIN HI OUPUT 3D3V_S0
47k->100k 82 103
R2425 1 2100KR2J-1-GP PLT_RST# 65,89 KCOL17 55 KSO17 GPXIOA06 104 VD_OUT2 262018.6.6 Added
65,89 KROW0 56 KSI0 ADGPXIOA07 105 VD_OUT1 26
65,89 KROW1 KSI1 GPXIOA08 USB_PWR_EN 35 GPIO8_OVERT#_EC
57 106 S0_PWR_GOOD ==DELAY 99ms 1 2
65,89 KROW2 KSI2 GPXIOA09 SYS_PWROK 20,89
58 107 10KR2F-L1-GP R2412
65,89 KROW3 KSI3 GPXIOA10 BLUETOOTH_EN_EC RTCRST_ON 16
59 108 R2440 1 2 Do Not Stuff 2018.7.24
65,89 KROW4 60 KSI4 GPXIOA11 DY BLUETOOTH_EN 22,61 Add R2440 for Chewbacca issue
65,89 KROW5 61 KSI5 109 SUS_CLK_CPU 2 1
65,89 KROW6 62 KSI6 AD GPXIOD00 110 VD_IN1 26 Do Not Stuff
DY R2423
65,89 KROW7 KSI7 GPXIOD01 AC_IN# 112 AC_IN# 44
GPXIOD02 EC_EN# KBC_PWRBTN#
114
2018.1.25 78 GPXIOD03 PWRBTN# 115
Changed 18,70,79 EC_SMB_SDA_CPU 77 SDA0 GPXIOD04 116 ALL_SYS_PWRGD 20,40
18,70,79 EC_SMB_SCL_CPU SCL0 GPXIOD05 PCH_DPWROK_R R2401 1 5V_S5_EN 45
2018.3.5 80 117 2 1KR2J-L2-GP
43,44 BAT_SMB_SDA 79 SDA1 GPIOD06 118 PECI_EC PCH_DPWROK 20,45,89
->DY R2408 1 2 43R2J-GP
C 2018.4.17
Delete R2424, R2409
43,44 BAT_SMB_SCL SCL1 GPIO7F PECI H_PECI 22
2018.5.11
Swap w/ KB_BL_ON
C
R2403 1 2 Do Not Stuff SENSOR_I2C_SCL_R 83 36
6,55,70 SENSOR_I2C_SCL_Q SENSOR_I2C_SDA_R PSCLK1 GPIO1A EC_CAP_LED 65
R2411 1 2 Do Not Stuff 84 91 ECRST#
6,55,70 SENSOR_I2C_SDA_Q PSDAT1 GPIO53 GPIO8_OVERT#_EC 79
85 93
6 KEYBOARD_DISABLE PSCLK2 GPIO55 PWR_LED 66
86

E
Q2401 CPU_I2C_SCL_TP 87 PSDAT2 RN2406
PROCHOT_EC 65 CPU_I2C_SCL_TP CPU_I2C_SDA_TP PSCLK3 ECRST#_Q LMBT3906LT1G-1-GP
G 88 1 4 B
65 CPU_I2C_SDA_TP PSDAT3 Q2402
2 3
26,40 PURE_HW_SHUTDOWN#_R 3D3V_AUX_S5
D 122 84.T3906.E11
22,44,46 PROCHOT#_CPU PM_SUSACK# 20

C
17 GPIO5D SRN10KJ-L-GP
43 AD_DETECT GPIO0B
1

S R2422 18 123
20,40 PM_SLP_SUS# GPIO0C GPIO5E PM_PWRBTN# 20
100KR2J-4-GP
84.2N702.J31 2018.7.24 ADD
2N7002K-2-GP 127 3D3V_S0
GPIO59 CHG_ON# 44
16 121
6,43 LID_CLOSE#
2

19 GPIO0A GPIO57 89 AC_PRESENT 20


GPIO0D GPIO50 TOUCH_nRST# 55 TOUCH_nRST#
32 1 2
GPIO18 15 PROCHOT_EC Touch_Report_SW# 55 10KR2F-L1-GP R2438
34 GPIO08 14 2018.8.1 5V_TOUCH_EN 1 2
3D3V_AUX_KBC GPIO19 GPIO07 6 USB_LOGIC_EN 72 Add for 25810 10KR2F-L1-GP R2439
30 GPIO04 PM_SLP_S3# 20,40,51,61
61,68 E51_TXD GPIO16
2

31
20 PM_SUSWARN# 90 GPIO17 128
R2429 17 ME_UNLOCK GPIO5A SPI_CS_CPU_N0 18,25
10KR2J-L-GP 92 GPIO52 SPICS# 120
43 CHARGE_LED GPIO54 GPIO5C MOSI SPI_SI_ROM 18,25
95 GPIO5B 119
20,89 RSMRST#_KBC GPIO56 MISO SPI_SO_ROM 18,25
R2431 126
GPIO58 SPI_CLK_ROM 18,25
1

470R2J-2-GP SPICLK
1 2 KBC_PWRBTN#
66 KBC_PWRBTN#_R
KB9028Q-C-GP
2

TP2403 Do Not Stuff 1 071.09028.000G


DY
1

C2411 G2401 L2401


Do Not Stuff Do Not Stuff BLM15AG121SN-1GP
2

2 1
1

68.00084.921
EC_AGND
PCB VERSION : SA
3D3V_AUX_KBC

B B

1
HP Limit Signal Detect R2437
10KR2F-L1-GP
3D3V_AUX_KBC

2
PCB_VER_AD

1
R2406
100KR2F-L3-GP
2

D2402
LBAV99LT1G-1-GP

2
75.00099.O7D
EC_AGND
3

1 2 ADT_TYPE
LIMIT_SIGNAL
R2430 680R2F-GP MODEL ID 2018.5.28
updated
1

R2432 3D3V_AUX_KBC
K

8K2R2F-1-GP
D2403
LM3Z3V0T1G-GP R2410

1
083.03301.003F 10.0K --> 64.10025.L0L (UMA U42)
2

2nd = 083.3Z3V3.003F 20.0K --> 64.20025.L0L (4G U42) R2410


A

33.0K --> 64.33025.6DL (2G U42) 33KR2F-GP


47.0K --> 64.47025.6DL (UMA U22)
EC_AGND 64.9K --> 64.64925.6DL (4G U22)

2
76.8K --> 64.76825.6DL (2G U22)
MODEL_ID_AD

1
R2414
100KR2F-L3-GP

2
A EC_AGND A
UMA

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
ECIO(ENE KB9028)
Size Document Number Rev
A2
FAROE 14" Pavilion SA
Date: Monday, August 06, 2018 Sheet 24 of 106

5 4 3 2 1
5 4 3 2 1

SSID = Flash.ROM
3D3V_DSW

2018.1.15 8MB->16MB

1
(follow Rumble)

1
2018.3.23 Stuff R2501
BIOS1 C2505 10KR2J-L-GP
SC1U6D3V1MX-GP

2
D 9 D

2
3D3V_DSW SPI_CS_CPU_N0 1 GND 8
18,24 SPI_CS_CPU_N0 SPI_SO_ROM CS# VCC
2 7
18,24 SPI_SO_ROM SPI_W P_ROM SO/SIO1 SIO3 SPI_CLK_CPU_CN SPI_HOLD_ROM 14,18
RN2501 3 6 ER2501 1 2 0R2J-2-GP
SPI_CS_CPU_N0 18 SPI_W P_ROM SIO2 SCLK SPI_SI_CPU_CN SPI_CLK_ROM 18,24
1 4 4 5 ER2502 1 2 0R2J-2-GP
SPI_W P_ROM GND SI/SIO0 SPI_SI_ROM 18,24
2 3

SRN10KJ-L-GP
MX25L12873FZNI-10G-GP 2018.3.5 Added
72.12873.003 BIOS1(16MB,DIP)
072.25128.0B51
2nd = 072.25128.0C71 2nd = 72.12873.001
3rd = 072.25127.0001
3rd = 072.25127.0A01
3D3V_DSW

DY
SPI FLASH ROM 16M byte 2018.2.22
8MB->16MB
1

C2501 2018.3.5 Stuff


Do Not Stuff C2502 2018.3.23 DY 3D3V_DSW
SC1U6D3V1MX-GP SSKT1
2

SPI_CS_CPU_N0 1 8
SPI_SO_ROM 2 7 SPI_HOLD_ROM
SPI_W P_ROM 3 SPI_CLK_CPU_CN
4
DY 65 SPI_SI_CPU_CN

Do Not Stuff
C C
Do Not Stuff

62.10089.011 062.10029.0001

Co-lay with BIOS1 V


SSID = RBAT

2018.2.23 ->name

3D3V_RTC_PW R 3D3V_BATT_RTC

Width=20mils
R2517 1 2
Do Not Stuff

Voltage = 3.19V
1

B 3D3V_RTC_AUX R2509 B
1K6R2F-GP
2

K A 3D3V_RTC_AUX_D

Q2502
1

RB551V30-GP
C2506
83.R5003.H8H R2510
Do Not Stuff 47KR2F-GP
2

DY
2

3D3V_AUX_S5
1

R2505
1K6R2F-GP
2

K A 3D3V_AUX_S5_D
1

Q2505
RB551V30-GP R2506
83.R5003.H8H 47KR2F-GP
UMA
A A
2

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Flash/RTC
Size Document Number Rev
A3
FAROE 14" Pavilion SA
Date: Monday, August 06, 2018 Sheet 25 of 106

5 4 3 2 1
5 4 3 2 1

SSID = Thermal
Thermal sensor NCT 7718W
3D3V_AUX_S5
D 3D3V_S0 D

1
1

R2602
R2606 2KR2F-L1-GP
16KR2F-GP
84.2N702.J31

2
2018.6.6 2N7002K-2-GP
2

VD_IN1->VD_IN2
S THERM_SYS_SHDN#_R 1 R2605 2
VD_IN2 24,66 VD_OUT1 24
D Do Not Stuff
24,40 PURE_HW _SHUTDOW N#_R
G IMVP_PW RGD_G

1
2018.6.6 2018.3.28
DY
R2603 Q2601 R2608
-> remote Move RT2601,C2602,C2603,R2606(T8 sensor) to IO BD Do Not Stuff 1 2 VD_OUT2 24
2018.4.9
Add R2606 back 0R2J-2-GP 2018.6.6 Added

2
2 R2604 1 VCORE_PW RGD 40,46
3D3V_AUX_S5
Do Not Stuff
C C
1

R2607
16KR2F-GP

2018.6.6
2

VD_IN2->VD_IN1
VD_IN1 24
1

2018.6.6 RT2602 C2605 C2604


-> T8 NTC-100K-11-GP-U SCD1U16V2KX-L-GP SC100P50V2JN-L-GP
69.60013.201
2

2
2

B B
20160822
Modify by EE cloud
Change pull up to 3D3V_S0
3D3V_S0

Fan Conn
1

R2601
10KR2J-L-GP

5V_S0
2

FAN1
*Layout* 15 mil 1
5

5V_S0 FAN_TACH1 2
24 FAN_TACH1
3
FAN1_PW M 4
24 FAN1_PW M
6
K

C2606
1

D2601 ACES-CON4-29-GP
SC4D7U6D3V3KX-L-GP

RB551V30-GP C2607
20.F1639.004
2

SC1U6D3V1MX-GP
83.R5003.H8H
2
A

A UMA A

1 AFTP2601 Do Not Stuff


Wistron Corporation
5V_S0 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
FAN_TACH1 1 AFTP2602 Do Not Stuff
Title
FAN1_PW M 1 AFTP2603 Do Not Stuff INT IO (Thermal/Fan)
1 AFTP2604 Do Not Stuff Size Document Number Rev
A3
FAROE 14" Pavilion SA
Date: Monday, August 06, 2018 Sheet 26 of 106
5 4 3 2 1
5 4 3 2 1

1A
5V_S0 5V_AVDD_CODEC
L2701
1 2

HCB1005KF-600T25-GP

1
068.00005.0051

1
5V_AVDD_CODEC D2701 C2734

SC2D2U10V3KX-L-GP
AZ5125-02S-R7G-GP

2
20160819
Trace width for SPK-L+/SPK-L-/SPK-R+/SPK-R- Modify by EE Cloud

1
C2703 C2704
Remove LDO

SC10U6D3V3MX-L-GP

SCD1U16V2KX-L-GP
1D8V_S0 Speaker 4 ohm : 40mil

3
D D

2
C2743
Speaker 8 ohm : 20mil

1
SCD1U16V2KX-L-GP
C2710

SC10U6D3V3MX-L-GP
2

2
AUD_AGND

U2701
AUD_AGND
40 42
AVDD1 SPK-OUT-L+ 43 SPKR_L+ 29
20 SPK-OUT-L- 45 SPKR_L- 29 3D3V_S0
CPVDD/AVDD2 SPK-OUT-R+ SPKR_R+ 29
AUD_AGND 44 SPKR_R- 29
3 SPK-OUT-R-
3D3V_S0 DVDD

1
C2735 23 CBN 1 2 C2719 SC2D2U10V3KX-L-GP
CBP

SC10U6D3V3MX-L-GP
18 24 CBP R2705
1

1
C2744 C2706 C2745 DVDD-IO CBN C2733 SC2D2U10V3KX-L-GP 100KR2J-4-GP
SCD1U16V2KX-L-GP

SC10U6D3V3MX-L-GP

SCD1U16V2KX-L-GP
5V_PVDD 41 25 CPVEE_C 1 2
PVDD1 CPVEE AUD_AGND
2

2
46 28 MIC_VREFO R2756 1 2 2K2R2J-L1-GP
PVDD2 MIC2-VREFO-L 29 MUTE_LED_CTRL AMP_MUTE#
33 MIC2-VREFO-R 30 MUTE_LED_CTRL 65 24 AMP_MUTE#
5V_S5 5VSTB/AUX_MODE MIC2-L/PORT-F-L/RING2
MIC2-R/PORT-F-R/SLEEVE
31 MIC_L AUD_AGND
MIC_L 66
A_SD#_R

1
32 MIC_CAP 1 2 C2732
MIC2-CAP AUD_AGND
SC10U6D3V3MX-L-GP 1 2 C2716 LDO1_C 39 SC10U6D3V3MX-L-GP C2720
SC10U6D3V3MX-L-GP 1 2 C2717 LDO2_C 21 LDO1-CAP 27
AUD_AGND SC1U10V2KX-L1-GP

2
SC10U6D3V3MX-L-GP 1 2 C2718 LDO3_C 19 LDO2-CAP HPOUT-L/PORT-I-L 26 HPA_OUT_L1 66
LDO3-CAP HPOUT-R/PORT-I-R HPA_OUT_R1 66

2
8 36
R2701 9 I2S-IN LINE1-L/PORT-C-L 35
I2S-OUT LINE1-R/PORT-C-R

100KR2F-L3-GP
10
11 I2S-BCLK 48 JACK_DET_C 2 1
12 I2S-MCLK HP/LINE1-JD/JD1 47 R2702 Do Not Stuff JACK_DET# 66 3D3V_S0

1
I2S-LRCK I2S-IN/I2S-OUT-JD/JD2
6 34 AUO_BEEP
7 I2C-DATA PCBEEP 38 VREF_C 2 1 C2721
AUD_AGND I2C-CLK VREF
PDB
2 SC2D2U10V3KX-L-GP
AUD_AGND AMP_MUTE# JACK_DET_C 1 DY 2
C 14 13 R2767 Do Not Stuff C
17,89 HDA_BITCLK_CODEC 15 AUDIOLINK_BCLK DC-DET/EAPD
HDA_SYNC_CODEC 17 1 2HDA_SDIN0_CODEC 16 AUDIOLINK_SYNC
17 HDA_SDIN0_CPU R2703 33R2J-L1-GP 17 AUDIOLINK_SDATA-IN 37
17,89 HDA_SDOUT_CODEC AUDIOLINK_SDATA-OUT AVSS1 22
2018.2.23 STD naming AVSS2
1 2 DMIC_SDA_CODEC_R 4 49
55,89 DMIC_SDA_CODEC EL2702 DMIC_SCL_CODEC_R 5 GPIO0/DMIC-DATA12 GND
BLM15AG121SN-1GP 1 GPIO1/DMIC-CLK
2018.2.23 STD naming DMIC-CLK-IN/I2S-EN/SPDIF-OUT/GPIO2/DMIC-DATA34

1 2 ALC3258-CG-GP AUD_AGND
55,89 DMIC_SCL_CODEC EL2701
BLM15AG121SN-1GP 071.03258.0003
2018.4.12
ER2701->EL2701
ER2702->EL2702

L2702
1 2 5V_PVDD
5V_S0
HCB1608KF121T30-GP C2708 C2741 C2705 C2740
68.00230.041
1

1
SC10U6D3V3MX-L-GP

SCD1U16V2KX-L-GP

SC10U6D3V3MX-L-GP

SCD1U16V2KX-L-GP
1

C2742 C2709
2

2
SCD1U16V2KX-L-GP

SC10U6D3V3MX-L-GP
2

B B
Place close to Pin46 Place close to Pin41

AMP. for Headphone


Digital GND & AUD_AGND PC BEEP
Tie Analog GND and Digital GND
under codec by a single point C2722
R2718 1 2 MONO_L_1 2 1 AUO_BEEP
17 HDA_SPKR 220KR2F-GP SCD1U16V2KX-3GP

G2701 DY

2
1 2

1
R2721 C2724
Do Not Stuff 10KR2J-3-GP Do Not Stuff

2
G2702

1
1 2

Do Not Stuff
20160824
Modify by EE
A G2703 Vendor suggestion A
1 2 Change AGND to DGND

Do Not Stuff
UMA
AUD_AGND

audio ground must be connect to Wistron Corporation


digital ground with an 80 mil copper 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
bridge located directly under codec
Title
to prevent ESD latch up. Audio (Codec ALC3258)
Size Document Number Rev
C
FAROE 14" Pavilion SA
Date: Monday, August 06, 2018 Sheet 27 of 106
5 4 3 2 1
5 4 3 2 1

Audio_Speaker
SPK1
8
Speaker vendor
FG Sable 6
D 5 SPK_ID1 SPKR_L+_R 1 AFTP2901 Do Not Stuff D
4 SPKR_L+_R ER2901 1 2 0R3J-L1-GP SPK_ID1 16,18 SPKR_L-_R 1 AFTP2902 Do Not Stuff
SPK_ID 3 SPKR_L-_R ER2902 1 2 0R3J-L1-GP
SPKR_L+ 27
SPKR_R+_R 1 AFTP2903 Do Not Stuff
(0 or 1) 1 0 2 SPKR_R+_R ER2903 1 2 0R3J-L1-GP
SPKR_L- 27
SPKR_R-_R 1 AFTP2904 Do Not Stuff
SPKR_R+ 27
SPK_ID1 1 AFTP2905 Do Not Stuff
1 SPKR_R-_R ER2904 1 2 0R3J-L1-GP SPKR_R- 27
7 AFTP PLACE CLOSE TO SPK1
ACES-CON6-20-GP-U

2
20.F1639.006 EC2904 EC2903 EC2902 EC2901

SC1KP50V2KX-1GP

SC1KP50V2KX-1GP

SC1KP50V2KX-1GP

SC1KP50V2KX-1GP
Close to SPK Conn

1
ED2901 ED2902

SPKR_L+_R 1 SPKR_R+_R 1

3 3

SPKR_L-_R 2 SPKR_R-_R 2

AZ5125-02S-R7G-GP AZ5125-02S-R7G-GP

C
75.05125.07D 75.05125.07D C
Close to SPK1 Conn

Audio_Jack Combo-Jack (Headphone & MIC)

B B

A UMA A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Audio (HP/SPK/MIC Jack)


Size Document Number Rev
A3
FAROE 14" Pavilion SA
Date: Monday, August 06, 2018 Sheet 29 of 106
5 4 3 2 1
5 4 3 2 1

Cardreader IC & Cardreader Connector


SSID = CardReader
3D3V_CARD
6V / 1.1A 3D3V_CARD_C
F3301
1 2
2018.1.29 renaming
3D3V_CARD_C POLYSW -1D1A6V-9-GP-U 2018.1.29
Added for BSMI
D 69.48001.081 CARD1
D

6 4 SD_CD#_CN 2018.1.29 renaming


VDD CD 11 SD_W P_CN 1 AFTP3301 Do Not Stuff
W/P 3D3V_CARD_C
SD_CLK_CN 7 1 AFTP3302 Do Not Stuff
CLK
1

C3301 C3302 SD_CMD_CN 3 5


CMD VSS1 8 SD_DATA0_CN 1 AFTP3303 Do Not Stuff
VSS2
SC10U6D3V3MX-L-GP
SCD1U16V2KX-L-GP

SD_DATA1_CN 1 AFTP3304 Do Not Stuff


2

SD_DATA0_CN 9 12 SD_DATA2_CN 1 AFTP3305 Do Not Stuff


SD_DATA1_CN 10 DAT0 GND 13 SD_DATA3_CN 1 AFTP3306 Do Not Stuff
SD_DATA2_CN 1 DAT1 GND 14 SD_CMD_CN 1 AFTP3307 Do Not Stuff
SD_DATA3_CN 2 DAT2 GND 15 SD_CD#_CN 1 AFTP3308 Do Not Stuff
DAT3 GND SD_CLK_CN 1 AFTP3309 Do Not Stuff
SD_W P_CN 1 AFTP3310 Do Not Stuff
SDCARD-11P-28-GP
022.10023.0041 AFTP PLACE CLOSE TO SD1
3D3V_S0

3D3V_S0 2018.1.11 updated

1
SD_CD# ER3301 1 2 0R2J-2-GP SD_CD#_CN R3309
17 SD_CD# DY
Do Not Stuff
Do Not Stuff 2 1 R3301 SD_DATA0 SD_DATA1 ER3302 1 2 22R2J-2-GP SD_DATA1_CN 2018.3.6 ->DY
Do Not Stuff 2
DY 1 R3302 SD_DATA1 17 SD_DATA1
DY

2
Do Not Stuff 2 1 R3303 SD_DATA2 SD_DATA0 ER3303 1 2 22R2J-2-GP SD_DATA0_CN
Do Not Stuff 2
DY 1 R3304 SD_DATA3 17 SD_DATA0
C Do Not Stuff 2
DY 1 R3305 SD_CMD SD_CMD ER3304 1 2 22R2J-2-GP SD_CMD_CN SD_PW R_EN 33,40 C
DY 17 SD_CMD
SD_DATA3 ER3305 1 2 22R2J-2-GP SD_DATA3_CN

D
17 SD_DATA3
Do Not Stuff 2 1 R3306 SD_CLK SD_CLK EL33011 2 SD_CLK_CN Q3301
DY 17 SD_CLK
BLM15BA220SN1D-GP Do Not Stuff
DY Do Not Stuff
2018.1.11 updated
3D3V_S5

S
Do Not Stuff 2 1 R3308 SD_CD#_CN SD_DATA2 ER3307 1 2 22R2J-2-GP SD_DATA2_CN
Do Not Stuff 2
DY 1 R3310 SD_W P_CN 17 SD_DATA2
DY SD_W P ER3308 1 2 0R2J-2-GP SD_W P_CN
17,33 SD_PW R_EN#
17 SD_W P

2018.3.6 Added

17,33 SD_PW R_EN# R3307 1 2


SD_PW R_EN 33,40
0R2J-2-GP

B B

A UMA A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

CARDREADER (SDIO/SD Conn)


Size Document Number Rev
A3
FAROE 14" Pavilion SA
Date: Monday, August 06, 2018 Sheet 33 of 106
5 4 3 2 1
5 4 3 2 1

USB Type A Connector ED3501


5V_USB30

2018.5.29 8 USB1
OUTPUT=2A FL3501~FL3502->P/N
ER3501~ER3504->remove USB1_USB30_TX_CON_P
3
1 10 USB1_USB30_TX_CON_P 1 5 USB1_USB30_RX_CON_N
VBUS STDA_SSRX-

6
FL3501 6 USB1_USB30_RX_CON_P
USB1_USB30_TX_CON_N 2 9 USB1_USB30_TX_CON_N STDA_SSRX+

GND
USB1_USB20_CON_N 2 8 USB1_USB30_TX_CON_N
3 4 USB1_USB30_RX_CON_N USB1_USB30_RX_CON_P 4 7 USB1_USB30_RX_CON_P USB1_USB20_CON_P 3 D- STDA_SSTX- 9 USB1_USB30_TX_CON_P
15 USB1_USB30_RX_N SIG_OUT- SIG_IN- D+ STDA_SSTX+
2 1 USB1_USB30_RX_CON_P USB1_USB30_RX_CON_N 5 6 USB1_USB30_RX_CON_N 10 7
15 USB1_USB30_RX_P SIG_OUT+ SIG_IN+ CHASSIS#10 GND-DRAIN
11

GND
D D
12 CHASSIS#11
13 CHASSIS#12 4
Do Not Stuff AZ1043-04F-R7G-GP CHASSIS#13 GND

5
Do Not Stuff 075.01043.0073 SKT-USB13-281-GP
2nd = 075.08809.0073 022.10005.03H1

ED3502

USB1_USB20_CON_N 1 6 USB1_USB20_CON_P
I/O1 I/O4

5
FL3502 2 5 5V_USB30
GND VDD

GND
3 4 5V_USB30 1 AFTP3501 Do Not Stuff
C3501 1 2 USB1_USB30_TX_N_C 1 2 USB1_USB30_TX_CON_N I/O2 I/O3
15 USB1_USB30_TX_N SIG_IN+ SIG_OUT+
SCD1U16V2KX-L-GP 1 AFTP3502 Do Not Stuff
C3502 1 2 USB1_USB30_TX_P_C 4 3 USB1_USB30_TX_CON_P AZC099-04S-2-GP
15 USB1_USB30_TX_P SIG_IN- SIG_OUT-
SCD1U16V2KX-L-GP 075.09904.0A7C

GND
2nd = 75.00199.07C AFTP PLACE CLOSE TO USB1
Do Not Stuff

6
Do Not Stuff

C C
ER3505 1 2 Do Not Stuff
DY
EL3501
FILTER-4P-156-GP-U
3 2 USB1_USB20_CON_N
15 USB1_USB20_N 2018.2.21
4 1 ->P/N USB1_USB20_CON_P
15 USB1_USB20_P
068.24900.2001
ER3506 1 2 Do Not Stuff
DY

USB3 Power U3501 place close to USB1


Switch 5V_S5 2.0A 5V_USB30

U3501 C3511 place near by U3501


5 1
VIN VOUT 2
4 GND 3
24,35 USB_PW R_EN EN/EN# FLG#
1

1
C3511

C3512

SC22U6D3V3MX-L1-GP
C3513

SC22U6D3V3MX-L1-GP
C3514

SC22U6D3V3MX-L1-GP
C3515

SC22U6D3V3MX-L1-GP
C3516
B B
SCD1U16V2KX-L-GP

SC10U6D3V3MX-L-GP

RT9742CGJ5-GP
2

2
1

C3507 C3508 074.09742.0A9F


R3510 2nd = 074.03553.007F
100KR2J-4-GP
2

Active H
SC10U6D3V3MX-L-GP

SC10U6D3V3MX-L-GP

20160906
Modify by EE Danne
Add 0.1uF

U3502 place close to IO1


5V_S5 2.0A 5V_USB30_IO

U3502 C3517 place near by U3501


5 1
VIN VOUT 2
4 GND 3
24,35 USB_PW R_EN EN/EN# FLG#
1

1
C3517

C3518

UMA
SCD1U16V2KX-L-GP

SC10U6D3V3MX-L-GP

A RT9742CGJ5-GP A
2

2
1

C3509 C3510 074.09742.0A9F


R3511 2nd = 074.03553.007F Wistron Corporation
100KR2J-4-GP
2

Active H 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,


SC10U6D3V3MX-L-GP

SC10U6D3V3MX-L-GP

Taipei Hsien 221, Taiwan, R.O.C.


1

Title

USB (USB3.0 Conn)


Size Document Number Rev
A3
FAROE 14" Pavilion SA
Date: Monday, August 06, 2018 Sheet 35 of 106

5 4 3 2 1
5 4 3 2 1

ALLSYSPWRGO/ VCORE ENABLE 3D3V_S0/ 5V_S0 5V_AUX_S5 U4001 2018.1.25


1D8V_S0
100pF->1000pF & stuff
4 12 CT_3D3VC C4009 1 2 SC1KP50V2KX-1GP
3D3V_DSW VBIAS CT1 10 CT_5VC C4008 1 2 SC1KP50V2KX-1GP
R4001 1 2 1KR2J-L2-GP CT2
20,24,40,51,61 PM_SLP_S3# ALL_SYS_PWRGD 20,24 1 13
IN1#1 OUT1#13 3D3V_S0
500mA 1.8V OutPUT 1D8V_S0
R4011 2 14
3D3V_S0 3D3V_DSW Do Not Stuff 5V_S5 6 IN1#2 OUT1#14 8 5V_S0 3D3V_S0 U4002
2 1 7 IN2#6 OUT2#8 9
VCORE_EN 46 IN2#7 OUT2#9 1 5
Q4001
VIN VOUT

1
R4002 2N7002KDW-1-GP C4006 2

1
3V_5V_S0_EN GND

Do Not Stuff
20KR2F-L3-GP C4004 3 11 3 4
EN1 GND 20,24,40,51,61 PM_SLP_S3# EN NC#4

1
Do Not Stuff
R4003 5
3 4 100KR2F-L3-GP C4005 C4003 EN2 15 C4007 C4002 C4012
DY DY

1
SC1U6D3V1MX-GP SC1U6D3V1MX-GP THERMAL_PAD SC1U6D3V1MX-GP SC1U6D3V1MX-GP RT9013-18GB-GP SC1U6D3V1MX-GP
D D

2
Q4002_2 2 5 C4010 C4011 74.09013.M7F

Note:ZZ.27002.F7C01

2
C4001 R4004 SCD1U16V2KX-L-GP G2898KD1U-GP Do Not Stuff

2
1
Q4002_6

SCD1U16V2KX-L-GP

100KR2F-L3-GP
1 6
074.02898.0093 DY

1
2nd = 074.22976.0091 AUD_AGND
3rd = 074.08910.0093
75.27002.F7C 2018.2.21 ->P/N

2
330KR2F-L-GP

6A
2
R4005
1 2 3V_5V_S0_EN
20,24,40,51,61 PM_SLP_S3#
K A
D4002
RB520S30-GP
83.R2003.A8M

Power Sequence 3D3V_S5/ 3D3V_CARD


5V_S5 U4003 2018.1.25
100pF->1000pF & stuff
2018.1.17 4 12 CT_3D3V_S5 C4025 1 2 SC1KP50V2KX-1GP
remove net "2D5V_S3_EN" 3D3V_DSW VBIAS CT1 10 CT_3D3V_CARD C4015 1 2 SC1KP50V2KX-1GP
CT2
R4013 1 13
Do Not Stuff 2 IN1#1 OUT1#13 14
2 1 3D3V_S0 6 IN1#2 OUT1#14 8 3D3V_CARD 3D3V_S5
20,24,40 PM_SLP_SUS# 1D8V_S5_EN 53 IN2#6 OUT2#8
7 9
IN2#7 OUT2#9
C4031
PM_SLP_SUS#

Do Not Stuff
R4014 C4029 3 11

1
SD_PWR_EN EN1 GND

Do Not Stuff
Do Not Stuff 5
2 1 C4017 C4030 EN2 15 C4027 C4014
26,46 VCORE_PWRGD PCH_PWROK 20,89 DY DY

1
SC1U6D3V1MX-GP SC1U6D3V1MX-GP THERMAL_PAD SC1U6D3V1MX-GP SC1U6D3V1MX-GP

2
Replace "delay circuit" w/ short pad by Power confirmed C4026
SCD1U16V2KX-L-GP G2898KD1U-GP

2
074.02898.0093
C 2nd = 074.22976.0091 C
3rd = 074.08910.0093
2018.2.21 ->P/N

20,24,40

33
PM_SLP_SUS#

SD_PWR_EN
PM_SLP_SUS#

SD_PWR_EN
6A

HW_SHUTDOWN 1V_S3/1V_VCCIO (S3 Enable ) 1V_VCCIO (G10_GATE ENABLE) U4005 1V_VCCIO 4.066A(CPU)
2.1A (GPU)
2018.4.25 1 8
2018.7.26 1D0V_S5 Solution Updated 2 VIN VOUT#8 7
add 1V_VCCIO S3 enable 3 VIN VOUT#7 6
5V_S5 VBIAS VOUT#6

1
4 5
EN GND C4019 C4020
DY DY

Do Not Stuff
2018.1.26 9

Do Not Stuff
DY 1D0V_S5

2
Solution changed 5V_S5 U4004 VIN

H_THERMTRIP# 22

1
4 12 CT_1V_S3 C4037 1 2 SC470P50V2KX-L-GP 1V_VCCIO_EN Do Not Stuff
R4008 1D0V_S5 VBIAS CT1 10 CT_1V_S3 C4032 1 2 SC470P50V2KX-L-GP C4022 C4023
CT2 DY DY Do Not Stuff

Do Not Stuff

Do Not Stuff
4K7R2J-L-GP
E

2
Q4002 1 13 1V_VCCIO
1 2 H_PWRGD_R B MMBT3904-9-GP 2 IN1#1 OUT1#13 14
20,24,61,63,68,76,89,91 PLT_RST# 6 IN1#2 OUT1#14 8 1V_S3 2018.5.21
084.03904.0B11 7 IN2#6 OUT2#8 9 Add R4012
2nd = 84.T3904.H11 0.19A
C

2018.2.21 Swap M & S IN2#7 OUT2#9 R4012 1 2


DY
2

1
Do Not Stuff
C4034
C4018 C4035 1V_VCCIO_EN 3 11 C4036
EN1 GND

1
SC22U6D3V3MX-L1-GP

SC22U6D3V3MX-L1-GP
SC1U6D3V1MX-GP 5 K A

SC22U6D3V3MX-L1-GP
R4009 20,24,51 PM_SLP_S4# DY
2

2
2K2R2J-L1-GP EN2 15 C4016
THERMAL_PAD SC1U6D3V1MX-GP 2018.5.21 D4001
1

2
1
Added Do Not Stuff 3D3V_S5
C4033 DY G2898KD1U-GP 51 PWR_VDDQ_PG Do Not Stuff
Do Not Stuff 074.02898.0093 U4009

2
2nd = 074.22976.0091 R4010 1 DY 2 1V_VCCIO_EN_R 1 5
20,24,40,51,61 PM_SLP_S3# A VCC
3rd = 074.08910.0093 Do Not Stuff
B
PLACE CLOSE TO PCH1 2018.2.21 ->P/N 2 B
PURE_HW_SHUTDOWN#_R 24,26 B
C4024 1DY 2
DY
Do Not Stuff 3 4 1V_VCCIO_EN
C4018 close to pin7 2018.5.21 GND Y
->DY
19 CPU_C10_GATE# Do Not Stuff
Do Not Stuff

R4006 1 2
0R2J-2-GP

A A

UMA

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
Sequence (Power Plane Enable)
Size Document Number Rev
A2
FAROE 14" Pavilion SA
Date: Monday, August 06, 2018 Sheet 40 of 106

5 4 3 2 1
5 4 3 2 1

Main Func = CPU_CORE


19V_DCBATOUT PW R_DCBATOUT_VCCSA
PG5002
Do Not Stuff
D 2 1 D

PG5003
Do Not Stuff
2 1

PW R_DCBATOUT_VCCSA
SKL_U42/U22/U23e
Icc(max)=5.1A
TDC=5A
PR5001
2D2R3F-L-GP
PW R_VCCSA_BST1 2 PW R_VCCSA_BST_RC DY Confirm with EE

1
PC5004
22uF/0805 total 5pcs

5
6
7
8

Do Not Stuff
PU5001 PC5002 PC5003

D
D
D
D
5V_S5 SM3319NAQAC-TRG-GP SC10U25V3MX-GP
SC10U25V3MX-GP (78.22610.L2L)

2
084.03319.0033
1

1
PC5001 PC5005
SC2D2U10V3KX-L-GP 4 2018.1.17

G
SCD22U25V3KX-GP

S
S
S
C udapete C
2

2
Cyntec. 6.6mmx7.3mm x3.0mm

3
2
1
PU5004
8 4 DCR: 4~4.2 mohm
PR5011 VCC BOOT Idc : 17.5A , Isat : 26A 1V_VCCSA
Check Do Not Stuff
1 2 PW R_VCCSA_FCCM# 1 3 PW R_VCCSA_DRVH
46,47,48 PW R_VCORE_FCCM# EN UGATE PL5001
PR5012
1 2 PW R_VCCSA_PW M_A 5 2 PW R_VCCSA_SW 1 2
46 PW R_VCCSA_PW M PWM PHASE
Do Not Stuff IND-D47UH-22-GP-U
1

PR5008 6 7 PW R_VCCSA_DRVL
GND LGATE 68.R4710.10M
100KR2F-L3-GP PC5009

1
9
GND

Do Not Stuff
PG5011 PG5001 DY
2

Do Not Stuff
Do Not Stuff

2
5
6
7
8
RT9610BZQW -GP PU5003

D
D
D
D
74.09610.0E3 SM3319NAQAC-TRG-GP

1
084.03319.0033
PW R_VCCSA_ISEN1P_GA
4

1
S
S
S
PR5005

3
2
1
374R2F-1-GP
2018.1.17
udapete PC5006

2
B B
SCD47U25V3KX-1GP
1 2

1V_VCCSA PR5007 PR5006


2018.1.17 10R2F-L-GP 1KR2F-3-GP
udapete 1 2 1 2

PW R_VCCSA_ISEN1P_GB
2018.4.17
46 PW R_VCCSA_ISUMP CLOSE to IC
1

1
DY PC5007 DY PC5008 PR5004
Do Not Stuff

Do Not Stuff
PC5007,PC5008->DY NTC-10K-29-GP-U
1 2
2

B = 3370
46 PW R_VCCSA_ISUMN

Check

A UMA A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
Power (ISL95808_CPU_VCCSA)
Size Document Number Rev
A3
FAROE 14" Pavilion SA
Date: Monday, August 06, 2018 Sheet 50 of 106
5 4 3 2 1
OFFPAGE 5 4 3 2 1
OFFPAGE_GAP

R5102 1 2 PWR_VDDQ_EN
20,24,40 PM_SLP_S4#
0R2J-L-GP DY

1
19V_DCBATOUT PWR_DCBATOUT_VDDQ
C5116 PG5101
S5 Do Not Stuff Do Not Stuff

2
1 2

PG5102
Do Not Stuff
1 2

D R5103 1 2 PWR_VTT_EN PG5103


D
4 VTT_CNTL 0R2J-L-GP Do Not Stuff
S3 1 2
SB 20151020 EE
R5101 1 2 Do Not Stuff
20,24,40,61 PM_SLP_S3#
DY

1D2V_S3 PWR_VDDQ
PG5105
Do Not Stuff
2 1
PH on EE Side
PG5106
Do Not Stuff
PWR_VDDQ_PG 2 1
40 PWR_VDDQ_PG

PG5107
Do Not Stuff
2 1

PG5108
Do Not Stuff PC5104因因layout關關關關關關獨PGND即即
2 1
獨獨獨獨獨獨獨NOISE
PG5109
Do Not Stuff
2 1

PR5108 PWR_DCBATOUT_VDDQ
PG5110 5V_S5 620KR2F-GP PU5101
C Do Not Stuff
2 1
PR5101
10R2J-L-GP PWR_VDDQ_PH 1 2 PWR_VDDQ_TON 8
TON V+
22 PWR_DCBATOUT_VDDQ 2018.7.25
C
1 2 PWR_VDDQ_VCC 7 21 Change to 0603
VCC V+ 20

1
PG5112 PWR_VDDQ_V3V 28 V+ 19 PC5108
DY DDR_AGND GND V+

1
Do Not Stuff PC5104 31 PC5101 PC5105
2 1 3 V+ DY SC10U25V3MX-GP
SC10U25V3MX-GP
PC5102 SC10U6D3V3MX-L-GP PR5111 PC5110

2
Do Not Stuff V3V Do Not Stuff SCD1U25V2KX-L-GP

TDC : 8A

1
3D3V_S5 PC5117 23 PWR_VDDQ_BOOT
1 2PWR_VDDQ_BOOTA2 1
BST
PG5114 If 5V has droop SC10U6D3V3MX-L-GP Do Not Stuff
Do Not Stuff Please mount it 12

2
LX#12

1
2 1 11
PR5104 PWR_VTT_EN 4 LX#11 10 Cyntec. 7 x 7 x 3.0 mm PWR_VDDQ
Do Not Stuff
DY PWR_VDDQ_EN 5 S3 LX#10 9 PL5101 DCR: 9m~10mOhm
S5 LX#9 32 PWR_VDDQ_PH 1 2 Idc : 11 A , Isat : 22A
LX#32

2
1D2V_S3 PWR_VDDQ_VLDOIN 2 PWR_VDDQ_V2P5 COIL-1UH-34-GP-U1
V2P5 PWR_VDDQ_V2P5

1
PWR_VDDQ_PG 6
PGOOD

1
PG5115 18 PR5110 PC5106 PC5107 PC5109 PC5113

1
Do Not Stuff PGND 17 Do Not Stuff
1 2 PWR_VDDQ_VLDOIN 24 PGND 16 PC5116
PWR_VDDQ_VLDOIN DY

2
VLODIN PGND 15 SC22U6D3V3MX-L1-GP

2
PWR_VDDQ_VTT 25 PGND 14
VTT PGND

1
PC5118 13
PGND

2
SC10U6D3V3MX-L-GP 26 PC5115 PWR_VDDQ_SNB
0D6V_VREF_S0 PWR_VDDQ_VTT VTTGND Do Not Stuff PR5113 PG5104 SC22U6D3V3MX-L1-GP
DY Do Not Stuff

1
PWR_VDDQ_VTTSNS 27 30 Do Not Stuff SC22U6D3V3MX-L1-GP
PWR_VDDQ_VTT VTTSNS VDDQSNS SC22U6D3V3MX-L1-GP

1
1 2 SC22U6D3V3MX-L1-GP

2
PWR_VDDQ_VTTREF 29 1
VTTREF VDDQSET Close to PC5113
PG5111
Do Not Stuff PWR_VDDQ_VDDQSET_A
DY

1
G5416QS1U-GP

1
3D3V_S5 PWR_VDDQ_V3V PC5111 PC5112 PC5114

1
PG5119 SCD1U16V2KX-L-GP PR5105 PC5124
R1

2
Do Not Stuff PG5120 PWR_VDDQ_VDDQSNS 6K2R2F-GP Do Not Stuff

2
1 2
DY

2
Do Not Stuff 2 1

2
PWR_VDDQ_VTT SC10U6D3V3MX-L-GP
DDR_AGND Do Not Stuff PWR_VDDQ_VDDQSET
2D5V_S3 PWR_VDDQ_V2P5 PR5112
B 1 2
B

1
PG5118 Do Not Stuff DDR_AGND
2 1
Vout= 0.75*(1+R1/R2) = 1.2 R2 PR5106
10K2R2F-GP
Do Not Stuff

2
DDR_AGND

A A

UMA

Title
<Title>

Size Document Number Rev


A2 FAROE 14" Pavilion <RevCode>

Date: Monday, August 06, 2018 Sheet 51 of 106

5 4 3 2 1
5 4 3 2 1

AOZ2262(10A) AOZ2261(8A) AOZ2260(6A)


IC 074.02262.0043 074.02261.0A73 074.02260.0043
OFFPAGE COM
68.1R01A.20B 68.1R01A.20B 68.1R01A.20B
Chock IDC : 10A IDC : 10A IDC : 10A

22uF/6.3V * 5pcs 22uF/6.3V * 4pcs 22uF/6.3V * 4pcs


D SSID = PWR.Plane.Regulator_1p0v Output CAP DY*1 DY*1 DY*1 D

PR5207
Do Not Stuff
1 2 PWR_1D0V_EN
53 1D0V_S5_EN

3D3V_S5

G5335F for 1D05V

1
19V_DCBATOUT PWR_DCBATOUT_1D0V PR5208
PG5201 Do Not Stuff
Do Not Stuff DY
1 2 5V_S5 Cyntec. 6.8mm x 7.3mm x 3.0mm
DCR:10mOhm
TDC : 7.8A

2
PG5202 Idc : 12 A , Isat : 22A
Do Not Stuff PWR_1D0V_PG
1 2

1
PC5202 PU5201 PWR_1D0V
PL5201
PG5203 SC4D7U25V5KX-L2-GP 24
Do Not Stuff 21 LX#24 18 PWR_1D0V_PH 1 2

2
1 2 VCC LX#18 17
LX#17

1
PWR_DCBATOUT_1D0V 16
23 LX#16 11 PC5204 IND-1UH-187-GP DY
V+ LX#11

1
SCD1U25V2KX-L-GP
C 7 10 68.1R01E.10C PC5201 PC5203 PC5205 PC5207 PC5206 C

2
V+ LX#10

2
8
V+

1
9 20 PWR_1D0V_BT 2018.1.2 PG5210

2
PC5208DY PC5209 PC5210 V+ BST 7x7->5x5 Do Not Stuff
Do Not Stuff SC10U25V3MX-GP
SC10U25V3MX-GP 5 PWR_1D0V_VFB 2018.05.28

1
PR5201 1 2 PWR_1D0V_TON 6 FB Change P/N
82KR2F-1-GP TON
PWR_1D0V_PG 1 4 SC22U6D3V3MX-L1-GP
PGOOD AGND PWR_1D0V_VFB_A SC22U6D3V3MX-L1-GP
PWR_1D0V_EN 2 19 SC22U6D3V3MX-L1-GP
EN PGND 14 SC22U6D3V3MX-L1-GP
PWR_1D0V_PFM 3 PGND 13 Do Not Stuff
2018.7.25 PFM# PGND 12
PGND DY

1
PWR_1D0V 1D0V_S5 Change to 0603 PWR_1D0V_SS 22 15
SS PGND PR5202 PC5212
R1

Do Not Stuff
3K16R2F-GP

2
1
PG5204 PC5214 PR5203 G5335FQZ1U-GP 2018.1.17

1
100KR2F-L3-GP
Do Not Stuff SC1KP50V2KX-L-1-GP udapete
074.05335.0B43

2
1 2 PC5213

SCD01U25V2KX-L1-GP
2nd = 074.08712.0033

2
PG5205
Do Not Stuff 2018.05.29
1 2 Change P/N

1
PG5206 PR5204
Do Not Stuff 10KR2F-L1-GP R2 Vo=0.8x(1+R1/R2)
1 2
=0.8x(1+3.16/10)

2
PG5207 =1.0528
B 2018.1.17 B
Do Not Stuff
1 2 udapete

PG5208
Do Not Stuff
1 2

PG5209
Do Not Stuff
1 2

PG5211
Do Not Stuff
1 2

PG5212
Do Not Stuff
1 2

PG5213
Do Not Stuff
1 2

PG5214
Do Not Stuff
1 2

A UMA A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
Power (AOZ2262QI_1D0V)
Size Document Number Rev
Custom
FAROE 14" Pavilion SA
Date: Monday, August 06, 2018 Sheet 52 of 106
5 4 3 2 1
5 4 3 2 1

TDC : 0.35A
3D3V_DSW
PG5301
1D8V_S5 PD = (Vin Vout ) x Iout
= ( 3.3 - 1.8 ) x 0.3A = 0.45W
PD de-rating(%) = 0.45W/1.33W = 33.8%
PWR_1D8V
PG5303
1D8V_S5

Do Not Stuff Do Not Stuff


1D8V_S5 POWER GOOD 1 2 1125 Simon
Vendor suggest to replace 74.09025.A3D by 74.09025.D3D
1 2

PG5302 PG5304
52,53 1D0V_S5_EN Do Not Stuff PU5301 Do Not Stuff

1
D 1 2 PC5303 1 2 D
PWR_1D8V_S5_PVDD

SC10U6D3V3MX-L-GP
9 1 DY

1
PWR_1D8V_S5_EN 8 VIN#9 GND 2 PWR_1D8V_S5_FB PC5306 PC5301

2
PWR_1D8V_S5_PWRGD 7 EN FB 3
POK VOUT#3

Do Not Stuff

SC10U6D3V3MX-L-GP
5V_S5 6 4

2
VCNTL VOUT#4 5 PWR_1D8V_S5_PVDD
VIN#5
PC5305

Do Not Stuff
APL5934KAI-TRG-GP-U

1
PR5303
DY
Part Number = 074.05934.003D 12K7R2F-GP
1D8V_S5 ENABLE R1

2
2nd = 074.94611.003D

2
1
PC5302
SC1U6D3V1MX-GP PWR_1D8V_S5_FB
40,53 1D8V_S5_EN

1
R2 PR5304
2018.07.09 10KR2F-L1-GP

2
2018.2.21 ->P/N

1 PR5301 2 PWR_1D8V_S5_EN Vout Setting


40,53 1D8V_S5_EN Vout = 0.8 * ( 1 + R1/R2 )
Do Not Stuff = 0.8 * ( 1 + 12K7 / 10K)
= 1.816V
1

DY

PC5307
2

Do Not Stuff

C C

3D3V_S5
1

PR5305
10KR2F-L1-GP
2

PWR_1D8V_S5_PWRGD 1 2
PR5312 1D0V_S5_EN 52,53
Do Not Stuff

B B

A A

UMA

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
Power (RT9025_1D8V)
Size Document Number Rev
A2
FAROE 14" Pavilion SA
Date: Monday, August 06, 2018 Sheet 53 of 106
5 4 3 2 1
2018.7.19 Removed IR
3D3V_S0 3D3V_CAMERA_S0
eDP + G-sensor + Touch Connector 500mA LID_EC_CTRL#
LID_EC_CTRL# 24
1 2
LCD1 F5510

2
41 POLYSW -1D1A6V-9-GP-U
69.48001.081 C5502 ED5506
1 SC1U6D3V1MX-GP 2 1
19V_DCBATOUT_LCD DY

2
eDP_BLEN_CPU 3

Do Not Stuff
Do Not Stuff

1
2 R5501
3 FC5501 1 DY2 Do Not Stuff 2KR2J-1-GP R5504

1
4 5V_S0 5V_TOUCH 3D3V_SENSORHUB 3D3V_SENSORHUB_S5 100KR2J-4-GP
5 Close LCD1,RF add 0902
6 1 2 1 2

2
7 3D3V_LCDVDD F5513
8 F5512 POLYSW -1D1A6V-9-GP-U
9 POLYSW -1D1A6V-9-GP-U 69.48001.081
10 eDP_BLCTRL_CPU_R R5516 1 2 1KR2J-L2-GP 69.48001.081
eDP_BLCTRL_CPU 3
11 LID_EC_CTRL#
12 eDP_HPD_CPU 1 AFTP5502 Do Not Stuff ED5505
eDP_HPD_CPU 3 3D3V_LCDVDD
13 19V_DCBATOUT_LCD 1 AFTP5522 Do Not Stuff 8
14 eDP_AUX_CN_N_C C5526 1 2 SCD1U16V2KX-L-GP 3
eDP_AUX_CPU_N 3

1
15 eDP_AUX_CN_P_C C5525 1 2 SCD1U16V2KX-L-GP eDP_HPD_CPU 1 AFTP5516 Do Not Stuff TOUCH_I2C_SDA_CN 1 10 TOUCH_I2C_SDA_CN
16 eDP_AUX_CPU_P 3 R5515 LID_EC_CTRL# 1 AFTP5517 Do Not Stuff
17 eDP_TX_CN_P0 C5523 1 2 SCD1U16V2KX-L-GP 100KR2J-4-GP eDP_BLCTRL_CPU_R 1 AFTP5518 Do Not Stuff TOUCH_I2C_SCL_CN 2 9 TOUCH_I2C_SCL_CN
eDP_TX_CN_N0 eDP_TX_CPU_P0 3
18 C5524 1 2 SCD1U16V2KX-L-GP
eDP_TX_CPU_N0 3 TOUCH_INT# TOUCH_INT#
19 5V_TOUCH 1 AFTP5520 Do Not Stuff 4 7

2
20 eDP_TX_CN_P1 C5521 1 2 SCD1U16V2KX-L-GP 1 AFTP5523 Do Not Stuff
eDP_TX_CPU_P1 3 3D3V_SENSORHUB_S5
21 eDP_TX_CN_N1 C5522 1 2 SCD1U16V2KX-L-GP 1 AFTP5524 Do Not Stuff PLT_RST#_CN 5 6 PLT_RST#_CN
eDP_TX_CPU_N1 3 TOUCH_INT#
22 1 AFTP5525 Do Not Stuff
23 5V_TOUCH Touch_Report_SW # 1 AFTP5526 Do Not Stuff
5V_TOUCH_EN 24
24 TOUCH_nRST# 24
25 TOUCH_nRST# 1 AFTP5532 Do Not Stuff AZ1043-04F-R7G-GP
26 TOUCH_I2C_SDA_CN 1 AFTP5521 Do Not Stuff 075.01043.0073
27 TOUCH_I2C_SDA_CN ER5503 1 2 0R2J-2-GP TOUCH_I2C_SCL_CN 1 AFTP5537 Do Not Stuff
TOUCH_I2C_SDA_CPU 6

1
28 TOUCH_I2C_SCL_CN ER5504 1 2 0R2J-2-GP C5504 SENSOR_I2C_SCL_Q 1 AFTP5533 Do Not Stuff ED5504
TOUCH_I2C_SCL_CPU 6
29 SC4D7U6D3V3KX-L-GP SENSOR_I2C_SDA_Q 1 AFTP5534 Do Not Stuff
30 ACCEL_INT2 1 AFTP5536 Do Not Stuff SENSOR_I2C_SCL_Q 1
TOUCH_INT# 22

2
31 PLT_RST#_CN R5509 1 2 Do Not Stuff CAP PLACE CLOSE TO LCD1 ACCEL_INT1 1 AFTP5535 Do Not Stuff
32 Touch_Report_SW # 24 3
33 2018.7.18 Removed after vendor check AFTP PLACE CLOSE TO LCD1
34 SENSOR_I2C_SDA_Q 2
35
36 SENSOR_I2C_SCL_Q
SENSOR_I2C_SDA_Q SENSOR_I2C_SCL_Q 6,24,70
37 AZ5125-02S-R7G-GP
ACCEL_INT2 SENSOR_I2C_SDA_Q 6,24,70
38 ACCEL_INT2 6 75.05125.07D
39 ACCEL_INT1
ACCEL_INT1 6
40 3D3V_SENSORHUB_S5
42

STAR-CON40-6-GP
TOUCH_INT# EC5505 1 2 SCD1U16V2KX-L-GP Form PCH
Touch_Report_SW # EC5506 1 2 SCD1U16V2KX-L-GP
LCD POWER CIRCUIT 3D3V_S0

19V_DCBATOUT_LCD 19V_DCBATOUT 3D3V_LCDVDD U5501


Layout 40 mil 1 5
2 OUT IN
F5501
1 2 3 GND 4
OC# EN eDP_VDDEN_CPU 3

SCD1U16V2KX-L-GP
FUSE-1D1A24V-1-GP

1
069.41101.0001 C5515 C5516 SY6288C20AAC-GP C5514 C5501 FC5504 FC5505

SC10U6D3V3MX-L-GP

SC10U6D3V3MX-L-GP

Do Not Stuff

Do Not Stuff

SCD1U25V2KX-L-GP
C5512 074.06288.007B R5508 DY DY

SC1KP50V2KX-L-1-GP
2018.7.20 Delet TOUCH POWER C5513 100KR2J-4-GP
2nd = 074.22811.009F

2
2 SCD1U50V3KX-L-GP

2
Close U5501,RF add 0902
LED BACKLIGHT CONVERTER POWER

CCD 3D3V_CAMERA_S0 1 AFTP5501 Do Not Stuff ER5505 1 DY 2 Do Not Stuff


2018.7.20 Change to 8pin connector
CAM1 EL5503
10 1 AFTP5503 Do Not Stuff CCD_USB20_CON_N 1 4 CCD_USB20_N 15
CCD_USB20_CON_N 1 AFTP5504 Do Not Stuff 2018.2.21
1 CCD_USB20_CON_P 1 AFTP5505 Do Not Stuff CCD_USB20_CON_P 2 3 ->P/N CCD_USB20_P 15
2 CCD_USB20_CON_N 068.24900.2001
3 CCD_USB20_CON_P FILTER-4P-156-GP-U
4 1 DY 2 Do Not Stuff
5 AFTP PLACE CLOSE TO CCD1 ER5506
6 DMIC_SDA_CODEC 27,89
7 DMIC_SCL_CODEC 27,89
DMIC_SDA_CODEC UMA
8 3D3V_CAMERA_S0 1 AFTP5507 Do Not Stuff ED5503
DMIC_SCL_CODEC 1 AFTP5508 Do Not Stuff
9 CCD_USB20_CON_P 1 6 CCD_USB20_CON_N
I/O1 I/O4 Wistron Corporation
ACES-CON8-88-GP 2 5 3D3V_CAMERA_S0 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
2018.7.19 Removed IR GND VDD Taipei Hsien 221, Taiwan, R.O.C.
3 4
I/O2 I/O3 Title

AZC099-04S-2-GP Display (LCD/Inverter)


075.09904.0A7C Size Document Number Rev
A3
2nd = 75.00199.07C FAROE 14" Pavilion SA
Date: Monday, August 06, 2018 Sheet 55 of 106
5 4 3 2 1

RN5703
D5701 5V_HDMI

HDMI PORT 2018.4.12


->5V_S5
5V_S5 5V_HDMI
HDMI_SCL_CON
HDMI_SDA_CON
4
3

SRN2K2J-5-GP
1
2
HDMI_SCL_CON_HI 2

1
HDMI_SDA_CON_HI 1
C5711 1 2 SCD1U16V2KX-L-GP HDMI_DDI_TX_CON_P0 F5701 C5702
3 HDMI_DDI_TX_CPU_P0 C5712 1 2 SCD1U16V2KX-L-GP HDMI_DDI_TX_CON_N0 1 2 BAW 56-9-GP-U Do Not Stuff

2
3 HDMI_DDI_TX_CPU_N0
C5713 1 2 SCD1U16V2KX-L-GP HDMI_DDI_TX_CON_P1 POLYSW -1D1A6V-9-GP-U 5V_HDMI 75.00056.07D DY
3 HDMI_DDI_TX_CPU_P1

1
C5714 1 2 SCD1U16V2KX-L-GP HDMI_DDI_TX_CON_N1 HDMI1 2018.2.21 ->P/N
3 HDMI_DDI_TX_CPU_N1 69.48001.081 C5719
C5715 1 2 SCD1U16V2KX-L-GP HDMI_DDI_TX_CON_P2 6V / 1.1A SC1U6D3V1MX-GP 18 15 HDMI_SCL_CON

2
3 HDMI_DDI_TX_CPU_P2 C5716 1 2 SCD1U16V2KX-L-GP HDMI_DDI_TX_CON_N2 +5V_POWER SCL 16 HDMI_SDA_CON
D D
3 HDMI_DDI_TX_CPU_N2 SDA
C5717 1 2 SCD1U16V2KX-L-GP HDMI_DDI_TX_CON_P3 HDMI_DDI_TX_CON_P0 7
3 HDMI_DDI_TX_CPU_P3 C5718 1 2 SCD1U16V2KX-L-GP HDMI_DDI_TX_CON_N3 HDMI_DDI_TX_CON_N0 9 TMDS_DATA0+ 13
3 HDMI_DDI_TX_CPU_N3 HDMI_DDI_TX_CON_P1 4 TMDS_DATA0- CEC 17
HDMI_DDI_TX_CON_N1 6 TMDS_DATA1+ DDC/CEC_GROUNG 19 HDMI_DET_CON
HDMI_DDI_TX_CON_P2 1 TMDS_DATA1- HOT_PLUG_DETECT
HDMI_DDI_TX_CON_N2 HDMI_DDI_TX_CON_N2 3 TMDS_DATA2+ 14
HDMI_DDI_TX_CON_P2 TMDS_DATA2- RESERVED#14
8
HDMI_DDI_TX_CON_N0 5 TMDS_DATA0_SHIELD
HDMI_DDI_TX_CON_P0 2 TMDS_DATA1_SHIELD
HDMI_DDI_TX_CON_N3 TMDS_DATA2_SHIELD 20
HDMI_DDI_TX_CON_P3 11 GND 21
HDMI_DDI_TX_CON_N1 HDMI_DDI_TX_CON_P3 10 TMDS_CLOCK_SHIELD GND 22
HDMI_DDI_TX_CON_P1 HDMI_DDI_TX_CON_N3 12 TMDS_CLOCK+ HDMI GND 23
TMDS_CLOCK- (A_Type) GND

SKT-HDMI23-167-GP-U

2018.1.16 updated
#575412 PDG rev.0.7
2

2
R5711 R5712 R5713 R5714 R5707 R5708 R5709 R5710
470R2J-2-GP

470R2J-2-GP

470R2J-2-GP

470R2J-2-GP

470R2J-2-GP

470R2J-2-GP

470R2J-2-GP

470R2J-2-GP
2018.1.16 470->732 Ω
2018.3.5 732->470 Ω

3D3V_S0 84.2N702.J31
1

1
2N7002K-2-GP
C G C

D HDMI_CRLS_PD

Q5706

3D3V_S0

84.2N702.J31
2N7002K-2-GP 1
2018.4.12 R5702
HDMI_DDI_TX_CON_N3 Connection G 1MR2F-GP
changed
1

HDMI_DET_CON D
2

ER5701
150R2F-4-L-GP S HDMI_DET_CPU 3
2

Q5707
2

HDMI_DDI_TX_CON_P3 R5701
B R5706 1 2 B
20KR2J-L3-GP HDMI_DET_EC 24
HDMI_DDI_TX_CON_P0 0R2J-2-GP
1
1

2018.3.9 ->stuff
ER5702
150R2F-4-L-GP

3D3V_S0
2

HDMI_DDI_TX_CON_N0

HDMI_DDI_TX_CON_P1
1

ER5703
150R2F-4-L-GP Q5704
HDMI_SDA_CON 6 1
Note:ZZ.27002.F7C01

HDMI_SDA_CPU 3
2

HDMI_DDI_TX_CON_N1 5 2

HDMI_DDI_TX_CON_P2 4 3 PULL-HIGH in P14


1

2N7002KDW -1-GP
ER5704
HDMI_SCL_CPU 3
150R2F-4-L-GP 75.27002.F7C
HDMI_SCL_CON
2

HDMI_DDI_TX_CON_N2
UMA
A A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Display (HDMI Level Shifter/Conn)


Size Document Number Rev
A3
FAROE 14" Pavilion SA
Date: Monday, August 06, 2018 Sheet 57 of 106

5 4 3 2 1
SSID = SATA

SATA HDD Connector HDD_SATA_TX_P_CN


ER6001 1

2
EL6001
2 0R2J-2-GP

3 HDD_SATA_TX_P_C2 1
HDD_SATA_TX_P 15
C6001 SCD01U50V2KX-L-GP
HDD_SATA_TX_N_CN 1 DY 4 HDD_SATA_TX_N_C 2 1
HDD_SATA_TX_N 15
C6002 SCD01U50V2KX-L-GP
Do Not Stuff
Do Not Stuff
ER6002 1 2 0R2J-2-GP

HDD1
14 ER6003 1 2 0R2J-2-GP
12
11 HDD_SATA_TX_P_CN EL6002
10 HDD_SATA_TX_N_CN HDD_SATA_RX_N_CN 2 3 HDD_SATA_RX_N_C2 1
HDD_SATA_RX_N 15
9 C6003 SCD01U50V2KX-L-GP
8 HDD_SATA_RX_N_CN HDD_SATA_RX_P_CN 1 DY 4 HDD_SATA_RX_P_C2 1
HDD_SATA_RX_P 15
7 HDD_SATA_RX_P_CN C6004 SCD01U50V2KX-L-GP
6 Do Not Stuff
5 Do Not Stuff
4 5V_S0 ER6004 1 2 0R2J-2-GP
3
100 mil
2

SC10U6D3V3MX-L-GP

C6005
SCD1U16V2KX-L-GP

C6006
1
13 1

1
2018.7.19 Removed
STAR-CON12-2-GP
020.K0158.0012
2

2
SSU 1 2
R6001
Do Not Stuff

need checkTX/RX mapping


5V_S0 1 AFTP6001 Do Not Stuff

1 AFTP6004 Do Not Stuff


1 AFTP6005 Do Not Stuff

AFTP PLACE CLOSE TO HDD1

UMA

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

INT IO (HDD/ODD)
Size Document Number Rev
A4
FAROE 14" Pavilion SA
Date: Monday, August 06, 2018 Sheet 60 of 106
5 4 3 2 1

SSID = Wireless Mini Card Connector(802.11a/b/g/n) 2018.6.1 Added 3D3V_W LAN

R6105 1 DY 2
Do Not Stuff
3D3V_W LAN 3D3V_IOAC 2018.3.6
Renaming
3D3V_S5
FR6101 1 2 0R5J-L1-GP 3D3V_S5 3D3V_W LAN
U6101

1
1

1
FC6101 FC6102 C6103 C6102 C6101 C6107 C6108 C6104 R6121 5 1
IN OUT
Do Not Stuff

Do Not Stuff
DY DY 20KR2J-L3-GP 2
GND

1
SC10U6D3V3MX-L-GP

SC10U6D3V3MX-L-GP
SCD1U16V2KX-L-GP

SCD01U50V2KX-L-GP

SCD1U16V2KX-L-GP

SCD01U50V2KX-L-GP
D 2018.3.6 Added 4 3 D
2

2
R6120 EN OC#

2
Q6101 100KR2J-4-GP
PCIe_CNVi G SY6288C20AAC-GP
074.06288.007B

2
D CNV_EN#_Q
2nd = 074.22811.009F
S
20,24,40,51 PM_SLP_S3#
2N7002K-2-GP
84.2N702.J31
3D3V_IOAC
Placement close to WLAN1 Pin2 and 4 Placement close to WLAN1 Pin70 and 72

Layout sequence is 10uF => 0.1uF => 0.01uF


2 3 W IFI_RF_EN
1 4 BLUETOOTH_EN

RN6101
SRN10KJ-L-GP

2018.2.27 remove BT_WAKE#, R6110


3D3V_IOAC

R6106 1 2 E51_TXD_R BLUETOOTH_EN(Pin 54)


Do Not Stuff
DY "BT_KILL input. Optional to
C C6109 connect to a Bluetooth KILL C
signal from the SoC or from the
1

Do Not Stuff platform "


DY
WIFI_RF_EN(Pin 56)
2

"WLAN_KILL input. Optional to


2018.4.12 Added connect to a Wi-Fi* KILL signal
1D8V_S5 from the SoC or from the
3D3V_IOAC platform "
W LAN1
R6103 1 DY 2 Do Not Stuff CNV_BRI_DT
R6104 1 DY 2 Do Not Stuff CNV_RGI_RSP_R 76 77
74 76 77 75
72 3_3VAUX GND 73
70 3_3VAUX RESERVED#73 71 CNV_W T_CLKP 19
68 RESERVED#70 RESERVED#71 69 CNV_W T_CLKN 19
66 RESERVED#68 GND 67
ER6104 1 2 0R2J-2-GP CLKIN_XTAL_R 64 RESERVED#66 RESERVED#67/2ND_LANE_PERN1 65 CNV_W T_DP0 19
2018.2.6 Added16 CLKIN_XTAL
ER6103 1 2 Do Not Stuff 62 GPIO0_NFC_RESET#/MGPIO7 RESERVED#65/2ND_LANE_PERP1 63 CNV_W T_DN0 19
EC6101 1
DY2 Do Not Stuff 60 NFC_I2C_IRQ/MGPIO5 GND 61
DY 58 NFC_I2C_SM_CLK RESERVED#61/2ND_LANE_PETN1 59 CNV_W T_DP1 19
2018.4.3 Add ER6103, EC6101 W IFI_RF_EN 56 NFC_I2C_SM_DATA RESERVED#59/2ND_LANE_PETP1 57 CNV_W T_DN1 19
14,18 W IFI_RF_EN BLUETOOTH_EN W_DISABLE#1 GND
54 55
22,24 BLUETOOTH_EN PLT_RST# RESERVED#54/W_DISABLE#2 PEWAKE0#
52 53
20,24,40,63,68,76,89,91 PLT_RST# PERST0# CLKREQ0# W LAN_CLKREQ_CPU# 16,18
R6107 1 2 33R2J-L1-GP SUS_CLK_CPU1_R 50 51
16,24 SUS_CLK_CPU R6101 1 2 Do Not Stuff 48 SUSCLK_32KHZ GND 49
16,18 W LAN_RST# DY 46 COEX1 REFCLKN0 47
W LAN_CLK_CPU_N3 16
R6102 1 COEX2 REFCLKP0 W LAN_CLK_CPU_P3 16
2 Do Not Stuff E51_TXD_R 44 45
24,68 E51_TXD DY 42 COEX3 GND 43
CLINK_CLK PERN0 W LAN_PCIE_RX_N 15
40 41
2018.2.27 remove C-Link CLINK_DATA PERP0 W LAN_PCIE_RX_P 15
38 39
B 36 CLINK_RESET GND 37 W LAN_PCIE_TX_N_C C6105 1 2 SCD1U16V2KX-L-GP B
6 CNV_BRI_DT CNV_RGI_RSP_R UART_CTS PETN0 W LAN_PCIE_TX_P_C W LAN_PCIE_TX_N 15
R6116 1 2 22R2J-2-GP 34 35 C6106 1 2 SCD1U16V2KX-L-GP
6 CNV_RGI_RSP UART_RTS PETP0 W LAN_PCIE_TX_P 15
32 33
6,14 CNV_RGI_DT UART_TX GND

R6118 1 2 22R2J-2-GP22 CNV_BRI_RSP_R 23


6 CNV_BRI_RSP UART_RX SDIO_RESET CNV_W R_CLKP 19
20 21
2018.2.27 remove BT_WAKE# 18 UART_WAKE SDIO_WAKE 19 CNV_W R_CLKN 19
16 GND SDIO_DAT3 17
R6111 1 2 33R2J-L1-GP CNV_PCMOUT_CLKREQ_R 14 LED#2 SDIO_DAT2 15 CNV_W R_DP0 19
17 CNV_PCMOUT_CLKREQ 2018.2.27 remove BT_PCMIN_R, BT_PCMIN, R6112 PCM_OUT SDIO_DAT1 PCIe_CNVi CNV_W R_DN0 19
12 13 ER6101 1 2 0R2J-2-GP
R6113 1 2 33R2J-L1-GP CNV_RF_RST#_R 10 PCM_IN SDIO_DAT0 11
17 CNV_RF_RST# 2018.2.27 remove BT_PCMCLK_R, BT_PCMCLK, R6114 PCM_SYNC SDIO_CMD CNV_W R_DP1 19
8 9
6 PCM_CLK SDIO_CLK 7 CNV_W R_DN1 19 EL6101 2018.2.21
4 LED#1 GND 5 W LAN_USB20_N6 2 3 ->P/N
3D3V_IOAC 3_3VAUX USB_D- BT_USB20_N 15
2 3 W LAN_USB20_P6
3_3VAUX NGFF_KEY_E_75P USB_D+ DY
1

1 1 4 BT_USB20_P 15
R6130 GND
71K5R2F-1-GP NP2 NP1 Do Not Stuff
2018.2.6 NP2 NP1 Do Not Stuff
Added ER6102 1 2 0R2J-2-GP
2

SKT-MINI75P-6-GP
062.10007.0051
ED6101

W IFI_RF_EN 1

A DY 3 UMA A
PLT_RST# 1 AFTP6101 Do Not Stuff
W LAN_RST# 2

Wistron Corporation
Do Not Stuff 21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Do Not Stuff
Title

INT IO (WLAN M.2)


Size Document Number Rev
A3
FAROE 14" Pavilion SA
Date: Monday, August 06, 2018 Sheet 61 of 106
5 4 3 2 1
5 4 3 2 1

NGFF Connector
3D3V_S0 3D3V_MSATA
MSATA_SATA_RX_P_R C6313 2 1 Do Not Stuff P_MSATA_SATA_RX_P 15
FR6301 1 2 MSATA_SATA_RX_N_R C6314 2 1 Do Not Stuff P_MSATA_SATA_RX_N 15
0R5J-L1-GP MSATA_SATA_TX_N_C C6315 2 1 Do Not Stuff P_MSATA_SATA_TX_N 15
MSATA_SATA_TX_P_C C6316 2 1 Do Not Stuff P_MSATA_SATA_TX_P 15
1

1
FC6301 FC6302 SSD_Base
DY Do Not Stuff DY Do Not Stuff SSD_Base
SSD_Base
SSD slot C key M 2280-S3
2

2
2018.3.7 Added
SSD_Base
D D

R6302DY
3D3V_MSATA 2018.3.7 MSATA1 SSD1_1 1 2
Renaming
100 mils trace width
Do Not Stuff C move to this page
NGFF_KEY_M 75P
1
2 GND 3
4 3_3VAUX GND 5
3_3VAUX PETP3 MSATA_PCIE_RX_N1 15
C6301 C6302 C6303 C6304 6 7 MSATA_PCIE_RX_P1 15
8 NC#6 PETN3 9
NC#8 GND
1

1
SC22U6D3V3MX-L1-GP

SC22U6D3V3MX-L1-GP

SCD1U16V2KX-L-GP

SCD1U16V2KX-L-GP
10 11 MSATA_PCIE_TX_N1_C C6305 1 2 SCD22U10V2KX-L1-GP
12 DAS/DSS# PERN3 13 MSATA_PCIE_TX_P1_C C6306
SSD_IX
1 2 SCD22U10V2KX-L1-GP
MSATA_PCIE_TX_N1 15
14 3_3VAUX PERP3 15
SSD_IX MSATA_PCIE_TX_P1 15
2

2
16 3_3VAUX GND 17
3_3VAUX PETP2 MSATA_PCIE_RX_N2 15
18 19 MSATA_PCIE_RX_P2 15
20 3_3VAUX PETN2 21
22 NC#20 GND 23 MSATA_PCIE_TX_N2_C C6308 1 2 SCD22U10V2KX-L1-GP
24 NC#22 PERN2 25 MSATA_PCIE_TX_P2_C C6307
SSD_IX
1 2 SCD22U10V2KX-L1-GP
MSATA_PCIE_TX_N2 15
26 NC#24 PERP2 27
SSD_IX MSATA_PCIE_TX_P2 15
28 NC#26 GND 29
NC#28 PETN1 MSATA_PCIE_RX_N3 15
30 31 MSATA_PCIE_RX_P3 15
32 NC#30 PETP1 33
SATA_LED#_R 2018.1.25 34 NC#32 GND 35 MSATA_PCIE_TX_N3_C C6310 1 2 SCD22U10V2KX-L1-GP
Added 36 NC#34 PERN1 37 MSATA_PCIE_TX_P3_C C6309
SSD_IX
1 2 SCD22U10V2KX-L1-GP
MSATA_PCIE_TX_N3 15
38 NC#36 PERP1 39
SSD_IX MSATA_PCIE_TX_P3 15
15 SSD_DEVSLP2 DEVSLP GND
40 41 MSATA_SATA_RX_P_R R6307 2SSD_IX 1 0R2J-L-GP
NC#40 PETN0/SATA_B+ MSATA_SATA_RX_P 15
42 43 MSATA_SATA_RX_N_R R6308 2SSD_IX 1 0R2J-L-GP
NC#42 PETP0/SATA_B- MSATA_SATA_RX_N 15
44 45
C 46 NC#44 GND 47 MSATA_SATA_TX_N_C C6311 1 2 SCD22U10V2KX-L1-GP C
48 NC#46 PERN0/SATA_A- 49 MSATA_SATA_TX_P_C C6312
SSD_IX
1 2 SCD22U10V2KX-L1-GP
MSATA_SATA_TX_N 15
PLT_RST# 50 NC#48 PERP0/SATA_A+ 51
SSD_IX MSATA_SATA_TX_P 15
20,24,40,61,68,76,89,91 PLT_RST# PERST#/NC#50 GND
16,18 MSATA_CLKREQ_CPU# 52 53 MSATA_CLK_CPU_N1 16
54 CLKREQ#/NC#52 REFCLKN 55
PEWAKE#/NC#54 REFCLKP MSATA_CLK_CPU_P1 16
56 57
58 NC#56 GND 67
68 NC#58 NC#67 69 mSATA_DET#_R
70 SUSCLK_32KHZ PEDET(OC_PCIE/GND_SATA) 71
72 3_3VAUX GND 73 R6304
74 3_3VAUX GND 75 SSD1_75 1 2
76 3_3VAUX GND 77
DY
NP2 76 77 NP1 Do Not Stuff
NP2 NP1

SKT-NGFF75P-87-GP 2018.7.19 Removed


062.10003.0591

3D3V_MSATA 2018.3.7
Renaming

1
100KR2J-1-GP
B R6301 B

R6305 2
15 SSD_DET# 1 DY 2

Do Not Stuff

SSD_DET#
D

Q6301
2N7002K-2-GP
84.2N702.J31
1 SATA mSATA_DET#_R
S

0 PCIe
Q6302
G

20150713 Add Truth Table and modify direction 15,64 SATA_LED# D

S SATA_LED#_R place close to MSATA1


UMA
A A
2N7002K-2-GP 2018.1.24
84.2N702.J31 Added
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
R6306 Taipei Hsien 221, Taiwan, R.O.C.
1 2 2018.1.25
DY Added Title
Do Not Stuff
INT IO (SSD M.2/ eMMC)
Size Document Number Rev
PLT_RST# 1 AFTP6301 Do Not Stuff A3
FAROE 14" Pavilion SA
Date: Monday, August 06, 2018 Sheet 63 of 106

5 4 3 2 1
5 4 3 2 1

HDD LED
3D3V_S0 HDD_HALTLED 18
3D3V_S0
D D
Q6401
LED1 1 6 HDD_HALTLED# 1 2

Note:ZZ.27002.F7C01
R6403
2 HALE_LED1 1 2 HDD_HALTLED# 2 5 10KR2J-L-GP
R6401 1KR2J-1-GP
1 SATA_LED_L 1 2 SATA_LED1# 3 4
R6402 1KR2J-1-GP SATA_LED# 15,63
3 2N7002KDW-1-GP
75.27002.F7C
LED-OW-3-GP

C C

Vol Up,Down BTN

B B

UMA

A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
LED / Button / Power Button
Size Document Number Rev
A4
FAROE 14" Pavilion SA
Date: Monday, August 06, 2018 Sheet 64 of 106
5 4 3 2 1
5 4 3 2 1

SSID = Key Board CN & TP CN


5V_S0 1 AFTP6525 Do Not Stuff

Key Board conn. KROW 1 1


1 AFTP6534

AFTP6501
Do Not Stuff

Do Not Stuff
Keyboard backlight conn.
KB1 KROW 7 1 AFTP6502 Do Not Stuff
34 KROW 6 1 AFTP6503 Do Not Stuff
32 KROW 1 KCOL9 1 AFTP6504 Do Not Stuff 5V_S0
KROW 1 24,89
31 KROW 7 KROW 4 1 AFTP6506 Do Not Stuff KBBL1
KROW 7 24,89
D 30 KROW 6 KROW 5 1 AFTP6507 Do Not Stuff 5 D
KROW 6 24,89 KB_LED_PW M_D
29 KCOL9 KCOL0 1 AFTP6505 Do Not Stuff 1
KCOL9 24,89
28 KROW 4 KROW 2 1 AFTP6508 Do Not Stuff
KROW 4 24,89
27 KROW 5 KROW 3 1 AFTP6509 Do Not Stuff 2
KROW 5 24,89
26 KCOL0 KCOL5 1 AFTP6510 Do Not Stuff 3
KCOL0 24,89
25 KROW 2 KCOL1 1 AFTP6511 Do Not Stuff 4

D
KROW 2 24,89
24 KROW 3 KROW 0 1 AFTP6512 Do Not Stuff 6
KROW 3 24,89
23 KCOL5 KCOL2 1 AFTP6513 Do Not Stuff Q6504
KCOL5 24,89
22 KCOL1 KCOL4 1 AFTP6514 Do Not Stuff 2N7002K-2-GP ACES-CON4-83-GP
KCOL1 24,89
21 KROW 0 KCOL7 1 AFTP6515 Do Not Stuff Q6505
20 KCOL2
KROW 0
KCOL2
24,89
24,89
KCOL8 1 AFTP6516 Do Not Stuff 84.2N702.J31
2N7002K-2-GP 020.K0206.0004
19 KCOL4 KCOL6 1 AFTP6517 Do Not Stuff
18 KCOL7
KCOL4 24,89
KCOL3 1 AFTP6518 Do Not Stuff 84.2N702.J31
KCOL7 24,89
17 KCOL8 KCOL12 1 AFTP6519 Do Not Stuff
KCOL8 24,89

G
S

S
16 KCOL6 KCOL13 1 AFTP6520 Do Not Stuff
KCOL6 24,89
15 KCOL3 KCOL14 1 AFTP6521 Do Not Stuff
KCOL3 24,89
14 KCOL12 KCOL11 1 AFTP6522 Do Not Stuff 24 KB_BL_ON
KCOL12 24,89
13 KCOL13 KCOL10 1 AFTP6523 Do Not Stuff
KCOL13 24,89
12 KCOL14 KCOL15 1 AFTP6524 Do Not Stuff
KCOL14 24,89

1
11 KCOL11 KCOL16 1 AFTP6538 Do Not Stuff
KCOL11 24,89 C6503
10 KCOL10 KCOL17 1 AFTP6539 Do Not Stuff
KCOL10 24,89 CAP_LED#_R SCD1U16V2KX-L-GP
9 KCOL15 1 AFTP6526 Do Not Stuff 5V_S0 1 AFTP6535 Do Not Stuff
KCOL15 24,89

2
8 KCOL16 MUTE_LED#_R 1 AFTP6527 Do Not Stuff
KCOL16 24,89
7 KCOL17 1 AFTP6536 Do Not Stuff
KCOL17 24,89 KB_LED_PW M_D
6 5V_S0 AFTP PLACE CLOSE TO KB1 1 AFTP6541 Do Not Stuff
5 CAP_LED#_R 1 2 CAP_LED#
4 MUTE_LED#_R R6501 1 2 1KR2J-L2-GP MUTE_LED#
3 R6502 1KR2J-L2-GP
2 AFTP PLACE CLOSE TO KBL1
C C
1 5V_S0
33 Q6501
Caps LED 1 6 CAP_LED#

Note:ZZ.27002.F7C01
STAR-CON32-GP
2 5
020.K0137.0032 24 EC_CAP_LED
MUTE_LED# 3 4

2N7002KDW -1-GP
75.27002.F7C
MUTE LED
R6504 1 2 Do Not Stuff MUTE_LED_R
27 MUTE_LED_CTRL
R6503 1 2 10KR2F-2-GP

B Touch Pad conn. B

3D3V_DSW
RN6501
4 1
3 TP_I2C 2

SRN2K2J-5-GP
020.K0151.0008
ACES-CON8-66-GP R6507 2TP_I2C 1 0R2J-2-GP
TP_I2C_SCL_CN 6
9 R6508 2TP_I2C 1 0R2J-2-GP
TP_I2C_SDA_CN 6
1 TP_EN 24
2 3D3V_DSW 1 AFTP6528 Do Not Stuff
TP_SMB_SDA_CN R6505 2 TP_INT# 22
3 TP_SM1 Do Not Stuff
TP_SMB_SCL_CN R6506 2 DM_SMB_SDA_CPU 18
4 TP_SM1 Do Not Stuff 1 AFTP6533 Do Not Stuff
DM_SMB_SCL_CPU 18
5
6 CPU_I2C_SCL_TP 1 AFTP6529 Do Not Stuff
CPU_I2C_SCL_TP 24
7 CPU_I2C_SDA_TP 1 AFTP6530 Do Not Stuff
CPU_I2C_SDA_TP 24 TP_SMB_SDA_CN
8 3D3V_DSW 1 AFTP6531 Do Not Stuff
10 TP_SMB_SCL_CN 1 AFTP6532 Do Not Stuff
TP_EN 1 AFTP6537 Do Not Stuff
TPAD1 TP_INT# 1 AFTP6540 Do Not Stuff

Wistron Confidential document, Anyone can not


Duplicate, Modify, Forward or any other purpose
application without get Wistron permission
AFTP PLACE CLOSE TO TPAD1
A UMA A

ED6501 ED6502 ED6503

TP_INT# 1 TP_SMB_SCL_CN 1 CPU_I2C_SDA_TP 1 Wistron Corporation


21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
3 3 3 Taipei Hsien 221, Taiwan, R.O.C.

TP_EN 2 TP_SMB_SDA_CN 2 CPU_I2C_SCL_TP 2 Title

INT IO (KB/TP)
Size Document Number Rev
AZ5125-02S-R7G-GP AZ5125-02S-R7G-GP AZ5125-02S-R7G-GP A3
FAROE 14" Pavilion SA
Date: Monday, August 06, 2018 Sheet 65 of 106
5 4 3 2 1
5 4 3 2 1

PWBD Conn.
KBC_PWRBTN#_R 24
PWR1 KBC_PWRBTN#_R 1 AFTP6601 Do Not Stuff
5 PWR_LED_CN 1 AFTP6602 Do Not Stuff
1 Q6601 5V_S5 1 AFTP6603 Do Not Stuff
D Notice:ZZ.2N702.J3101
S 1 AFTP6604 Do Not Stuff D
2 KBC_PWRBTN#_R
3 PWR_LED_CN D
4 5V_S5 AFTP PLACE CLOSE TO PWR1
6 G
PWR_LED 24
ACES-CON4-93-GP 2N7002K-2-GP
84.2N702.J31
020.K0328.0004
ED6601

3
DY
KBC_PWRBTN#_R 1

C Do Not Stuff C
Do Not Stuff

IO Board Conn.
020.K0225.0026
29
27
1 VD_IN2 24,26
2 JACK_DET# 27
3
4 MIC_L 27
5 HPA_OUT_L1 1 AFTP6605 Do Not Stuff
6 HPA_OUT_R1 1 AFTP6606 Do Not Stuff
7 HPA_OUT_R1 27 MIC_L 1 AFTP6607 Do Not Stuff
B B
8 HPA_OUT_L1 27 JACK_DET# 1 AFTP6608 Do Not Stuff
9 AUD_AGND 1 AFTP6609 Do Not Stuff
10 1 AFTP6610 Do Not Stuff
USB2_USB30_RX_N 15
11
USB2_USB30_RX_P 15
12
13
14 USB2_USB30_TX_N 15 1 AFTP6611 Do Not Stuff
USB2_USB30_TX_P 15 5V_USB30_IO
15 3D3V_S5 1 AFTP6612 Do Not Stuff
16 USB2_USB20_N 1 AFTP6613 Do Not Stuff
USB2_USB20_P 15 USB2_USB20_P
17 1 AFTP6614 Do Not Stuff
USB2_USB20_N 15
18
19
LID_SHIP# 43
20 3D3V_LID
21 3D3V_S5 3D3V_LID 1 AFTP6615 Do Not Stuff
22 LID_SHIP# 1 AFTP6616 Do Not Stuff
5V_USB30_IO
23 VD_IN2 1 AFTP9207 Do Not Stuff
UMA
24
25

A
26
28
AFTP PLACE CLOSE TO IO1 Wistron Corporation A
30 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
PSC-CON26-GP
CN6601 Title
IO Board Conn (USB/AUDIO/CR..etc)
2018.8.2
->pin SWAP AUD_AGND Size Document Number Rev
A4
FAROE 14" Pavilion SA
Date: Monday, August 06, 2018 Sheet 66 of 106
5 4 3 2 1
5 4 3 2 1

3D3V_S0

R6802 1 2 49K9R2F-L-GP LPSS_UART2_RXD


R6803 1 2 49K9R2F-L-GP LPSS_UART2_TXD 2018.3.5 Changed
D D

2018.3.30 DBG1 & R6801-> DY DBG1


DY 15
INT_SERIRQ 1 2INT_SERIRQ_R 1
18,24,91 INT_SERIRQ
R6801 Do Not Stuff
C 2 C
18,89 LPC_CLK_DBG
3
4 PLT_RST# 1 AFTP6801 Do Not Stuff
20,24,40,61,63,76,89,91 PLT_RST#

ZZ.F0765.01401
5
18,24 LPC_FRAME#_CPU
6
18,24 LPC_AD_CPU_P3
7
18,24 LPC_AD_CPU_P2
8
18,24 LPC_AD_CPU_P1
9
18,24 LPC_AD_CPU_P0
3D3V_S0 10
11
24,61 E51_TXD
12
LPSS_UART2_TXD 13
6 LPSS_UART2_TXD LPSS_UART2_RXD
6 LPSS_UART2_RXD 14
16
2018.3.5 Changed
ACES-CON14-5-GP

B
20.F0765.014 B

DB,SI,PV: 20.F0765.014
MV: ZZ.F0765.01401

UMA

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
A Taipei Hsien 221, Taiwan, R.O.C. A

Title

Debug (LPC debug)


Size Document Number Rev
A
FAROE 14" Pavilion SA
Date: Monday, August 06, 2018 Sheet 68 of 106
5 4 3 2 1
5 4 3 2 1

G-SENSOR

To KBC
for HDD Protect 3D3V_S0
D D

C7001 C7002 3D3V_S0

1
SCD1U16V2KX-L-GP

SC10U6D3V3MX-L-GP
2

1
R7001
10KR2J-L-GP

U7001

2
9 3 G_SDO 3D3V_S0
VDD SDO/SA0 4 EC_SMB_SDA_Q
10 SDA/SDI/SDO 1 EC_SMB_SCL_Q
VDD_IO SCL/SPC
5
2 RES
3D3V_S0 CS

1
2
6
12 GND 7 RN7001
19 ACCEL_INT INT1 GND
11 8 SRN2K2J-5-GP
INT2 GND

HP2DCTR-GP

4
3
074.HP2DC.00BZ Q7001
EC_SMB_SCL_Q 1 6

Note:ZZ.27002.F7C01
EC_SMB_SCL_CPU 18,24,79
C C
Must be placed in the 2 5
center of the system
3 4

2N7002KDW -1-GP
EC_SMB_SDA_Q 75.27002.F7C
EC_SMB_SDA_CPU 18,24,79

To Sensor HUB
for LCD angle
3D3V_SENSORHUB 3D3V_DSW

B R7002 B
2 1
Do Not Stuff
C7003 C7004
1

1
SCD1U16V2KX-L-GP

SC10U6D3V3MX-L-GP
2

U7003

9 3
VDD SDO/SA0 4
SDA/SDI/SDO SENSOR_I2C_SDA_Q 6,24,55
10 1
VDD_IO SCL/SPC SENSOR_I2C_SCL_Q 6,24,55
5
2 RES
3D3V_SENSORHUB CS 6
ACCEL_INT3 12 GND 7
6 ACCEL_INT3 ACCEL_INT4 INT1 GND
11 8
6 ACCEL_INT4 INT2 GND

HP2DCTR-GP
074.HP2DC.00BZ

A UMA A
Must be placed in the
center of the system
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

Sensor (G-sensor)
Size Document Number Rev
A3
FAROE 14" Pavilion SA
Date: Monday, August 06, 2018 Sheet 70 of 106
5 4 3 2 1
5 4 3 2 1

USB 3.0 TYPE C Controller


2018.8.1
OUTPUT=3A
RT5447--> 25810

5V_S5 5V_S5 5V_USB30_C

U7201

1
C7201 2 14
IN1#2 OUT#14

1
D SC10U6D3V3MX-L-GP 3 15 D
IN1#3 OUT#15

SC10U6D3V3MX-L-GP
C7202
2
2
4 18 TPS25810_UFP

2
R7201 IN2 POL# 19 TPS25810_POL
5 UFP#
10KR2J-L-GP AUX
6 1 TPS25810_FAULT
24 USB_LOGIC_EN EN FAULT# TPS25810_LD_DET
20

1
TPS25810_CHG 7 LD_DET#
8 CHG 11 CC1
24 USB_CC_CHG_HI CHG_HI CC1 13 CC2
TPS25810_REF 10 CC2
REF 9
TPS25810_DEBUG 16 REF_RTN
DEBUG#

1
TPS25810_AUDIO 17 12
R7202 AUDIO# GND 21
100KR2F-L3-GP GND

TPS25810RVCR-1-GP

2
2018.1.25 TPS25810_REF_RTN 074.25810.0A73
Update connection as the latest SPEC required
2018.1.25
update P/N

These nets are just for debug use

C TPS25810_FAULT 1 TP7201 C
TPS25810_LD_DET Do Not Stuff
1 TP7202
TPS25810_UFP Do Not Stuff
1 TP7203
TPS25810_POL Do Not Stuff
1 TP7204
TPS25810_AUDIO Do Not Stuff
1 TP7205
TPS25810_DEBUG Do Not Stuff
1 TP7206
Do Not Stuff

USB 3.0 TYPE C Port Protector


3D3V_DSW

U7202 1
B B
1 2 C7215 U7202_VBIAS 3 CC_Protector 7 R7215
Do Not Stuff VBIAS RPD_G1 6 Do Not Stuff
10 RPD_G2
C7216 1 CC_Protector
2 Do Not Stuff VPWR CC_Protector
2

9 U7202_FLT#
CC_Protector 15 FLT#
14 SBU1 20
SBU2 D1 USB3_USB20_CON_N 73
19 USB3_USB20_CON_P 73
CC1 12 D2 17
CC2 11 CC1 NC#17 16
Non-CC_Protector CC2 NC#16
CC1 R7216 1 2 0R2J-2-GP 4
CC2 R7217 1 2 0R2J-2-GP 5 C_CC1 8
C_CC2 GND 13
Non-CC_Protector 1 GND 18
2 C_SBU1 GND 21
73 CC1_CN C_SBU2 GND
73 CC2_CN
Do Not Stuff
Do Not Stuff

A UMA A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

EXT IO (Type C CC Logic)


Size Document Number Rev
A3
FAROE 14" Pavilion SA
Date: Monday, August 06, 2018 Sheet 72 of 106
5 4 3 2 1
5 4 3 2 1

USB Type C Connector 5V_USB30_C_CON


2018.8.1
Change net name
USB4_USB30_TX_CON_P1
B1
B2
USB3
GND GND
A1
A2
5V_USB30_C_CON

USB3_USB30_TX_CON_P1
PV:66.R0036.B4L USB4_USB30_TX_CON_N1 B3 SSTXP2 SSTXP1 A3 USB3_USB30_TX_CON_N1
OUTPUT=3A 2018.5.29
FL7301~FL7304->P/N CC2_CN
B4
B5
SSTXN2
VBUS#B4
SSTXN1
VBUS#A4
A4
A5 CC1_CN

K
ER7301~ER7308->remove USB3_USB20_CON_P B6 CC2 CC1 A6 USB3_USB20_CON_P
DP2 DP1

1
D7304 USB3_USB20_CON_N B7 A7 USB3_USB20_CON_N
DN2 DN1

SC22U6D3V3MX-L1-GP
C7301

SC22U6D3V3MX-L1-GP
C7302

SC22U6D3V3MX-L1-GP
C7303

SC22U6D3V3MX-L1-GP
C7304
2018.6.4 PTVS20VS1UR-115-GP B8 A8 2018.8.1
RFU2 RFU1

5
Swap FL7301 B9 A9 Change net name
083.20VS1.00AH

2
USB3_USB30_RX_CON_N1 B10 VBUS#B9 VBUS#A9 A10 USB4_USB30_RX_CON_N1

GND

A
vendor suggest USB3_USB30_RX_CON_P1 B11 SSRXN1 SSRXN2 A11 USB4_USB30_RX_CON_P1
2 1 USB3_USB30_RX_CON_N1 B12 SSRXP1 SSRXP2 A12
D 15 USB3_USB30_RX_N D
SIG_OUT+ SIG_IN+ 2018.5.23 GND GND
3 4 USB3_USB30_RX_CON_P1 ED7304->D7304
15 USB3_USB30_RX_P SIG_OUT- SIG_IN-

GND
13
Do Not Stuff 14 CHASSIS#13

6
15 CHASSIS#14
Do Not Stuff CHASSIS#15
16
17 CHASSIS#16
2018.6.4 ED7301 18 CHASSIS#17
CHASSIS#18

5
Swap FL7302 8 19
3 20 CHASSIS#19 NP1

GND
USB3_USB30_RX_CON_N1 1 10 USB3_USB30_RX_CON_N1 21 CHASSIS#20 NP1 NP2
C7305 1 2 SCD1U16V2KX-L-GP USB3_USB30_TX_N1_C 1 2 USB3_USB30_TX_CON_N1 22 CHASSIS#21 NP2
15 USB3_USB30_TX_N SIG_IN+ SIG_OUT+ USB3_USB30_RX_CON_P1 2 9 USB3_USB30_RX_CON_P1 CHASSIS#22
C7306 1 2 SCD1U16V2KX-L-GP USB3_USB30_TX_P1_C 4 3 USB3_USB30_TX_CON_P1
15 USB3_USB30_TX_P SIG_IN- SIG_OUT- USB3_USB30_TX_CON_P1 USB3_USB30_TX_CON_P1
4 7 SKT-USB36-25-GP

GND
USB3_USB30_TX_CON_N1 5 6 USB3_USB30_TX_CON_N1
062.10009.0E81
2nd = 062.10009.M021
Do Not Stuff

6
Do Not Stuff
AZ1043-04F-R7G-GP
2018.6.4 075.01043.0073

5
2018.8.1 Swap FL7303
Change net name

GND
2 1 USB4_USB30_RX_CON_N1
C
15 USB4_USB30_RX_N SIG_OUT+ SIG_IN+ C
3 4 USB4_USB30_RX_CON_P1
15 USB4_USB30_RX_P SIG_OUT- SIG_IN- ED7302

GND
8
3
Do Not Stuff USB4_USB30_RX_CON_P1 1 10 USB4_USB30_RX_CON_P1

6
Do Not Stuff
USB4_USB30_RX_CON_N1 2 9 USB4_USB30_RX_CON_N1

USB4_USB30_TX_CON_P1 4 7 USB4_USB30_TX_CON_P1

6
2018.6.4 FL7304
Swap USB4_USB30_TX_CON_N1 5 6 USB4_USB30_TX_CON_N1

GND
C7307 1 2 SCD1U16V2KX-L-GP USB4_USB30_TX_N1_C 4 3 USB4_USB30_TX_CON_N1
15 USB4_USB30_TX_N SIG_IN- SIG_OUT-
C7308 1 2 SCD1U16V2KX-L-GP USB4_USB30_TX_P1_C 1 2 USB4_USB30_TX_CON_P1 AZ1043-04F-R7G-GP
15 USB4_USB30_TX_P SIG_IN+ SIG_OUT+
075.01043.0073

Do Not Stuff GND


5

Do Not Stuff
ED7303
ER7309 1
DY 2 Do Not Stuff
72 CC1_CN
CC1_CN 1 6 CC2_CN
CC2_CN 72
EL7301 I/O1 I/O4
3 2 USB3_USB20_CON_N 2 5 ED7303_VDD 1 TP7301 Do Not Stuff
15 USB3_USB20_N GND VDD
2018.2.21
4 1 ->P/N USB3_USB20_CON_P USB3_USB20_CON_P 3 4 USB3_USB20_CON_N
B 15 USB3_USB20_P 72 USB3_USB20_CON_P I/O2 I/O3 USB3_USB20_CON_N 72 B
FILTER-4P-156-GP-U
068.24900.2001 AZC099-04S-2-GP
1 2 075.09904.0A7C
ER7310 DY Do Not Stuff

5V_USB30_C
2

high=rising time 100us


5V_USB30_C R7301 (fast turn on)
low =rising time 1ms
4K7R2J-L-GP (slow rate control)
internal 1M PD
U7301
R7303
1

20KR2F-L3-GP Current limit setting(Y):


A1 B4 U7301_ON 1 2 X = RILIM(kohm)
5V_USB30_C_CON VIN#A1 EN 5V_USB30_C Y = 49750*x^(-0.976)(mA)
A2
VIN#A2
2

A4 U7301_OC# 17.4kohm => 3.062A


FLT# C7309 Wistron Confidential document, Anyone can not
C2 A3 U7301_ISET SCD22U10V2KX-L1-GP Duplicate, Modify, Forward or any other purpose
1

D1 VBUS#C2 ILIM C4 U7301_FO 1 TP7302 application without get Wistron permission


K

D2 VBUS#D1 FO D4 U7301_CAP Do Not Stuff


A VBUS#D2 CAP UMA A
D7301
1

C7310 high=rising time 100us


Do Not Stuff DY Do Not Stuff
1

B1 B3 R7302 (fast turn on)


VCP#B1 GND low =rising time 1ms Wistron Corporation
SC1KP50V2KX-L-1-GP

B2 C3 16K9R2F-GP
A

U7301_VCP C1 VCP#B2 GND D3 (slow rate control)


21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
internal 1M PD
2

VCP#C1 GND Taipei Hsien 221, Taiwan, R.O.C.


2

Current limit setting(Y):


NX5P3290UK-GP X = RILIM(kohm) Title
074.53290.007Z
Y = 49750*x^(-0.976)(mA)
17.4kohm => 3.062A
EXT IO (Type C Conn)
Size Document Number Rev
Custom
FAROE 14" Pavilion SA
Date: Monday, August 06, 2018 Sheet 73 of 106
5 4 3 2 1
5 4 3 2 1

Main Func = dGPU

3D3V_1D8V_AON_S0
PDP-06877-006

1
R7614 From GPIO21 1.05V +/- 30mV
dGPU Reset Do Not Stuff
DIS_N16S D7601
1
3.3A
R7615 GPU_PEX_RST_HOLD 79
D
20161215 N17 D

2
U7601 3D3V_1D8V_AON_S0 GPU_PEX_RST# 1 2 GPU_PEX_RST_D# 3 1D0V_VGA_S0
1 20161214 N17
22 DGPU_HOLD_RST# B 5 2 SYS_PEX_RST_MON#
2 VCC Do Not Stuff
20,24,40,61,63,68,89,91 PLT_RST# A
SYS_PEX_RST_MON#DIS_N16S
4
3
DIS Y 79 Do Not Stuff
GND DIS_N16S DIS_N17S DIS DIS_N17S DIS DIS_N17S DIS DY
Do Not Stuff To GPIO8

1
Do Not Stuff C7603 C7604 C7605 C7606 C7619 C7607 C7608

Do Not Stuff

Do Not Stuff

Do Not Stuff

Do Not Stuff

Do Not Stuff

Do Not Stuff

Do Not Stuff
73.7SZ08.DAH C7602
73.01G08.DHG R7604 SC1U6D3V1MX-GP

2
1
R7603 DY 2 Do Not Stuff DIS Do Not Stuff

2
3D3V_1D8V_VGA_S0
Under GPU Near GPU Between GPU and PS
3D3V_1D8V_AON_S0 GPU1A 1 OF 14
1/14 PCI_EXPRESS

2
2nd = 084.00138.0C31 79 GPU_PEX_RST#
R7601 AB6
Do Not Stuff G
DIS Do Not Stuff R7613 PEX_WAKE#
DIS_N17S AA22
16,18 PEG_CLKREQ_CPU#
D DIS SYS_PEX_RST_MON# 1 2 GPU_PEX_RST# AC7 PEX_IOVDD_1 AB23

1
Do Not Stuff PEX_RST# PEX_IOVDD_2 AC24
S GPU_CLKREQ# AC6 PEX_IOVDD_3 AD25
Do Not Stuff PEX_CLKREQ# PEX_IOVDD_4 AE26 20161215 N17
Q7601 AE8 PEX_IOVDD_5 AE27
16 PEG_CLK_CPU_P0 PEX_REFCLK PEX_IOVDD_6
AD8 待待待
16 PEG_CLK_CPU_N0 PEX_REFCLK# 1V_1D8V_VGA_S0
DISC7601 1 2 Do Not Stuff GFX_PCIE_RX_C_P0 AC9
15 GFX_PCIE_RX_P0 DIS 1 2 Do Not Stuff GFX_PCIE_RX_C_N0 AB9 PEX_TX0 20161214 N17
15 GFX_PCIE_RX_N0 C7609
PEX_TX0#
1 2 AG6
DY 15 GFX_PCIE_TX_P0
AG7 PEX_RX0 AA10
15 GFX_PCIE_TX_N0 PEX_RX0# PEX_IOVDDQ_1
R7618 AA12
C
Do Not Stuff
DISC7610 1 2 Do Not Stuff GFX_PCIE_RX_C_P1 AB10 PEX_IOVDDQ_2 AA13
C
15 GFX_PCIE_RX_P1 DISC7611 1 2 Do Not Stuff GFX_PCIE_RX_C_N1 AC10 PEX_TX1 PEX_IOVDDQ_3 AA16
15 GFX_PCIE_RX_N1 PEX_TX1# PEX_IOVDDQ_4 AA18
DIS_N17S
DIS_N17S DIS_N17S
DIS_N17S
DIS_N17S

1
AF7 PEX_IOVDDQ_5 AA19 C7615 C7621 C7622 C7623 C7616D
15 GFX_PCIE_TX_P1 PEX_RX1 PEX_IOVDDQ_6

Do Not Stuff

Do Not Stuff

Do Not Stuff

Do Not Stuff
AE7 AA20 C7612 C7613 C7620 C7614 N16S:PEX_VDD
15 GFX_PCIE_TX_N1

o Not Stuff
PEX_RX1# PEX_IOVDDQ_7 AA21 SC1U6D3V1MX-GP
SC1U6D3V1MX-GP
SC1U6D3V1MX-GP
SC1U6D3V1MX-GP N17S:VDD_MAIN
DIS

2
1 2 Do Not Stuff GFX_PCIE_RX_C_P2 AD11 PEX_IOVDDQ_8 AB22
15 GFX_PCIE_RX_P2 DISC7617 1 2 Do Not Stuff GFX_PCIE_RX_C_N2 AC11 PEX_TX2 PEX_IOVDDQ_9 AC23
15 GFX_PCIE_RX_N2 C7618
PEX_TX2# PEX_IOVDDQ_10 AD24
AE9 PEX_IOVDDQ_11 AE25
15 GFX_PCIE_TX_P2 PEX_RX2 PEX_IOVDDQ_12
AF9 AF26
15 GFX_PCIE_TX_N2 PEX_RX2# PEX_IOVDDQ_13
DIS AF27
1 2 Do Not Stuff GFX_PCIE_RX_C_P3 AC12 PEX_IOVDDQ_14
15 GFX_PCIE_RX_P3 DISC7624
C7625 1 2 Do Not Stuff GFX_PCIE_RX_C_N3 AB12 PEX_TX3
15 GFX_PCIE_RX_N3 PEX_TX3# Under GPU
AG9 Near GPU
15 GFX_PCIE_TX_P3
AG10 PEX_RX3 Between GPU and PS
15 GFX_PCIE_TX_N3 PEX_RX3#
AB13
AC13 PEX_TX4
PEX_TX4#
AF10
AE10 PEX_RX4 20161228 N17
PEX_RX4# 3.3V +/- 5%
NC FOR GF119 3V3_AON_1D8V_VGA_S0
AD14
AC14 PEX_TX5 AA8
210mA
PEX_TX5# PEX_PLL_HVDD_1 AA9
AE12 PEX_PLL_HVDD_2
AF12 PEX_RX5 DIS_N16S N16S-->3.3V_AON
PEX_RX5# AB8 PEX_SVDD 1 R7616 2 N17S-->1.8V_MAIN
PEX_SVDD_3V3

NC FOR GM108
AC15
AB15 PEX_TX6 Do Not Stuff
PEX_TX6#

1
C7627 C7628

Do Not Stuff

Do Not Stuff
AG12 C7626
AG13 PEX_RX6 Do Not Stuff

2
PEX_RX6#
AB16
DIS
AC16 PEX_TX7 DIS_N16S DIS_N16S 05/04 SC
PEX_TX7#
AF13
B AE13 PEX_RX7 B
PEX_RX7#
AD17
Near GPU
AC17 PEX_TX8
PEX_TX8#
AE15
AF15 PEX_RX8
PEX_RX8#
AC18 F2
PEX_TX9 VDD_SENSE VGACORE_VDD_SENSE_1 85
AB18
PEX_TX9# POWER IC
AG15 F1
PEX_RX9 GND_SENSE VGACORE_GND_SENSE_1 85
AG16
PEX_RX9#
AB19
AC19 PEX_TX10
PEX_TX10#
AF16
AE16 PEX_RX10
PEX_RX10#
AD20
AC20 PEX_TX11
PEX_TX11#
AE18
AF18 PEX_RX11
PEX_RX11#
AC21
NC FOR GF117/GK208/GM108

AB21 PEX_TX12
PEX_TX12# 20161215 N17 R7607
AG18 AF22 PEX_TSTCLK_OUT 1 DY 2
AG19 PEX_RX12 PEX_TSTCLK_OUT AE22 PEX_TSTCLK_OUT# 05/04 SC for common part
PEX_RX12# PEX_TSTCLK_OUT#
AD23 Do Not Stuff
AE23 PEX_TX13
PEX_TX13# Under GPU Near GPU L7602
AF19 AA14 PEX_PLLVDD 1 2 N16S-->1V
PEX_RX13 PEX_PLLVDD_1 1D0V_VGA_S0
AE19 AA15
PEX_RX13# PEX_PLLVDD_2 N17S-->NC
Do Not Stuff
AF24
PEX_TX14 Do Not Stuff

1
AE24 C7631 C7629
PEX_TX14# DIS_N16S 2nd = 068.00100.0021

Do Not Stuff

Do Not Stuff
C7630
A AE21 SC1U6D3V1MX-GP A
R7606 DIS_N16S 3rd = 68.00143.221

2
AF21 PEX_RX14
PEX_RX14# AD9 TESTMODE 1 2 DIS_N16S
AG24 TESTMODE DIS
Do Not Stuff
AG25 PEX_TX15
PEX_TX15#
AG21 UMA
AG22 PEX_RX15
PEX_RX15#

AF25 PEX_TERMP 1
R7605
2
Wistron Corporation
PEX_TERMP DIS
Do Not Stuff
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

N16S-GM-S-A2-GP Title
<DUMMY> GPU_PEG (1/5)
Size Document Number Rev
A2
FAROE 14" Pavilion SA
Date: Monday, August 06, 2018 Sheet 76 of 106
5 4 3 2 1
5 4 3 2 1

Main Func = dGPU

D D
GPU1H 5 OF 14
5/14 IFPC
GPU1G 4 OF 14 IFPC
4/14 IFPAB
T6 GF119/GK208 GPU1J 7 OF 14
IFPC_RSET
AC4 7/14 IFPEF
DVI/HDMI DP
IFPA_TXC# AC3 GF119/GK208
IFPA_TXC M7 N5
IFPC_PLLVDD_1 I2CW_SDA IFPC_AUX_I2CW_SDA# DVI-DL DVI-SL/HDMI DP
AA6 N7 I2CW_SCL N4
IFPAB_RSET Y3 IFPC_PLLVDD_2 IFPC_AUX_I2CW_SCL J3
IFPA_TXD0# I2CY_SDA I2CY_SDA IFPE_AUX_I2CY_SDA#
Y4 I2CY_SCL I2CY_SCL J2
IFPA_TXD0 N3 J7 IFPE_AUX_I2CY_SCL
TXC IFPC_L3# IFPEF_PLLVDD_1
V7 N2
IFPAB_PLLVDD_1 TXC IFPC_L3
AA2 J1
IFPA_TXD1# TXC TXC IFPE_L3#
W7 AA3 R3 K1
IFPAB_PLLVDD_2 IFPA_TXD1 TXD0 IFPC_L2# TXC TXC IFPE_L3
R2 K7
TXD0 IFPC_L2 IFPEF_PLLVDD_2 K3
AA1 R1 TXD0 TXD0 IFPE_L2# K2
IFPA_TXD2# TXD1 IFPC_L1# TXD0 TXD0 IFPE_L2
AB1 TXD1
T1
IFPA_TXD2 IFPC_L1 K6 M3
IFPEF_RSET TXD1 TXD1 IFPE_L1#

NC FOR GF117/GM108
T3 M2
TXD2 IFPC_L0# TXD1 TXD1 IFPE_L1
AA5 T2
IFPA_TXD3# TXD2 IFPC_L0
AA4 M1
NC FOR GF117/GM108

NC FOR GF117/GM108
IFPA_TXD3 TXD2 TXD2 IFPE_L0# N1
GF117 TXD2 TXD2 IFPE_L0
AB4 P6 C3
IFPB_TXC# AB5 IFPC_IOVDD NC GPIO15 IFPE NC FOR GK208

NC FOR GF117/GM108
IFPB_TXC

NC FOR GF117/GM108
N16S-GM-S-A2-GP
W6 AB2 HPD_E
C2
IFPA_IOVDD IFPB_TXD4# HPD_E GPIO18
AB3
Y6 IFPB_TXD4
IFPB_IOVDD NC FOR GF117
AD2
IFPB_TXD5# AD3 H6
IFPB_TXD5 GPU1I 6 OF 14 IFPE_IOVDD
GF119/GK208
6/14 IFPD J6
AD1 IFPF_IOVDD DVI-DL DVI-SL/HDMI DP
IFPB_TXD6#

NC FOR GF117/GK208/GM108
AE1 H4
IFPB_TXD6 GF119/GK208 I2CZ_SDA IFPF_AUX_I2CZ_SDA#
C U6 I2CZ_SCL H3 C
IFPD_RSET IFPF_AUX_I2CZ_SCL
AD5 DVI/HDMI DP
IFPB_TXD7# AD4 J5
IFPB_TXD7 TXC IFPF_L3#
T7 I2CX_SDA IFPD_AUX_I2CX_SDA#
P4 TXC J4
IFPD_PLLVDD_2 P3 IFPF_L3
I2CX_SCL IFPD_AUX_I2CX_SCL
R7 K5
IFPD_PLLVDD_1 TXD3 TXD0 IFPF_L2#
TXD3
K4
GF117 TXD0 IFPF_L2
R5
TXC IFPD_L3#
B3 R4 TXD4 TXD1 L4
NC GPIO14 TXC IFPD_L3 IFPF_L1#
IFPAB IFPF TXD4 TXD1
IFPF_L1
L3
T5
TXD0 IFPD_L2#

NC FOR GF117/GM108
N16S-GM-S-A2-GP T4 TXD5 TXD2
M5
TXD0 IFPD_L2 IFPF_L0# M4

NC FOR GF117/GM108
TXD5 TXD2 IFPF_L0
TXD1 U4
IFPD_L1#
IFPD U3

NC FOR GF117/GM108
TXD1 IFPD_L1 NC FOR GK208
V4
TXD2 IFPD_L0#
TXD2
V3 HPD_F
F7
SC 0416 IFPD_L0 GPIO19
GPU1K 3 OF 14
3/14 DACA DIS_N16S GF117 NC FOR GF117

Do Not Stuff R6 D4
GF117/GM108 GF117 GM108/GK208 IFPD_IOVDD NC GPIO17
W5 B7 GPU_I2CA_SCL 1 4 N16S-GM-S-A2-GP
DACA_VDD NC NC I2CA_SCL A7 GPU_I2CA_SDA 2 3
NC I2CA_SDA
AE2
DACA_VREF TSEN_VREF
RN7701
AF2 NC NC
AE3
DACA_RSET DACA_HSYNC AE4 N16S-GM-S-A2-GP
NC DACA_VSYNC

AG3
NC DACA_RED
AF4
NC DACA_GREEN
AF3
NC DACA_BLUE
GM108
GK208
GF117

B N16S-GM-S-A2-GP B

A A

UMA

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

GPU_DIGITALOUT (2/5)
Size Document Number Rev
A2
FAROE 14" Pavilion SA
Date: Monday, August 06, 2018 Sheet 77 of 106
5 4 3 2 1
5 4 3 2 1

Main Func = dGPU

D D

GPU1B 2 OF 14
81 FBA_D[31:0]
2/14 FBA
FBA_D0 E18 F3 FB_CLAM 1 2
FBA_D1 F18 FBA_D0 NC FB_CLAMP DIS_N16S
FBA_D2 E16 FBA_D1 R7807
FBA_D3 FBA_D2 GF119
F17 Do Not Stuff
FBA_D4 D20 FBA_D3
FBA_D5 D21 FBA_D4
FBA_D6 F20 FBA_D5
FBA_D7 E21 FBA_D6
FBA_D8 E15 FBA_D7
FBA_D9 D15 FBA_D8
FBA_D10 F15 FBA_D9
FBA_D11 F13 FBA_D10
FBA_D12 C13 FBA_D11
FBA_D13 B13 FBA_D12
FBA_D14 E13 FBA_D13
FBA_D15 D13 FBA_D14
FBA_D16 B15 FBA_D15
FBA_D17 C16 FBA_D16
FBA_D18 A13 FBA_D17
FBA_D19 A15 FBA_D18
FBA_D20 B18 FBA_D19
FBA_D21 A18 FBA_D20
FBA_D22 A19 FBA_D21
FBA_D23 C19 FBA_D22
FBA_D24 B24 FBA_D23
FBA_D25 C23 FBA_D24
FBA_D26 A25 FBA_D25
FBA_D27 A24 FBA_D26
FBA_D28 A21 FBA_D27
FBA_D29 B21 FBA_D28
FBA_D30 C20 FBA_D29
FBA_D31 C21 FBA_D30
81 FBA_D[63:32] FBA_D32 FBA_D31
R22
FBA_D33 R24 FBA_D32 C27 FBA_CMD0
FBA_D34 FBA_D33 FBA_CMD0 FBA_CMD1 FBA_CMD0 81
T22 C26 FBA_CMD1 81
FBA_D35 R23 FBA_D34 FBA_CMD1 E24 FBA_CMD2
FBA_D36 FBA_D35 FBA_CMD2 FBA_CMD3 FBA_CMD2 81
N25 F24 FBA_CMD3 81
FBA_D37 N26 FBA_D36 FBA_CMD3 D27 FBA_CMD4
FBA_D38 FBA_D37 FBA_CMD4 FBA_CMD5 FBA_CMD4 81
N23 D26 FBA_CMD5 81
FBA_D39 N24 FBA_D38 FBA_CMD5 F25 FBA_CMD6
FBA_D40 FBA_D39 FBA_CMD6 FBA_CMD7 FBA_CMD6 81
V23 F26 FBA_CMD7 81
FBA_D41 V22 FBA_D40 FBA_CMD7 F23 FBA_CMD8
C FBA_D42 FBA_D41 FBA_CMD8 FBA_CMD9 FBA_CMD8 81 C
T23 G22 FBA_CMD9 81
FBA_D43 U22 FBA_D42 FBA_CMD9 G23 FBA_CMD10
FBA_D44 FBA_D43 FBA_CMD10 FBA_CMD11 FBA_CMD10 81
Y24 G24 FBA_CMD11 81
FBA_D45 AA24 FBA_D44 FBA_CMD11 F27 FBA_CMD12
FBA_D46 FBA_D45 FBA_CMD12 FBA_CMD13 FBA_CMD12 81
Y22 G25 FBA_CMD13 81
FBA_D47 AA23 FBA_D46 FBA_CMD13 G27 FBA_CMD14
FBA_D48 FBA_D47 FBA_CMD14 FBA_CMD15 FBA_CMD14 81
AD27 G26 FBA_CMD15 81
FBA_D49 AB25 FBA_D48 FBA_CMD15 M24 FBA_CMD16
FBA_D50 FBA_D49 FBA_CMD16 FBA_CMD17 FBA_CMD16 81
AD26 M23 FBA_CMD17 81
FBA_D51 AC25 FBA_D50 FBA_CMD17 K24 FBA_CMD18
FBA_D52 FBA_D51 FBA_CMD18 FBA_CMD19 FBA_CMD18 81
AA27 K23 FBA_CMD19 81
FBA_D53 AA26 FBA_D52 FBA_CMD19 M27 FBA_CMD20
FBA_D54 FBA_D53 FBA_CMD20 FBA_CMD21 FBA_CMD20 81
W26 M26 FBA_CMD21 81
FBA_D55 Y25 FBA_D54 FBA_CMD21 M25 FBA_CMD22
FBA_D56 FBA_D55 FBA_CMD22 FBA_CMD23 FBA_CMD22 81
R26 K26 FBA_CMD23 81
FBA_D57 T25 FBA_D56 FBA_CMD23 K22 FBA_CMD24
FBA_D58 FBA_D57 FBA_CMD24 FBA_CMD25 FBA_CMD24 81
N27 J23 FBA_CMD25 81
FBA_D59 R27 FBA_D58 FBA_CMD25 J25 FBA_CMD26
FBA_D60 FBA_D59 FBA_CMD26 FBA_CMD27 FBA_CMD26 81
V26 J24 FBA_CMD27 81
FBA_D61 V27 FBA_D60 FBA_CMD27 K27 FBA_CMD28
FBA_D62 FBA_D61 FBA_CMD28 FBA_CMD29 FBA_CMD28 81
W27 K25 FBA_CMD29 81
FBA_D63 W25 FBA_D62 FBA_CMD29 J27 FBA_CMD30
FBA_D63 FBA_CMD30 FBA_CMD31 FBA_CMD30 81
J26 FBA_CMD31 81
FBA_CMD31
FBA_DQM0 D19
81 FBA_DQM0 FBA_DQM1 D14 FBA_DQM0
81 FBA_DQM1 FBA_DQM2 C17 FBA_DQM1 1D35V_VGA_S0
81 FBA_DQM2 FBA_DQM3 FBA_DQM2 GF117/GF119
C22
81 FBA_DQM3 FBA_DQM4 FBA_DQM3 GK208
P24
81 FBA_DQM4 FBA_DQM5 W24 FBA_DQM4 B19
81 FBA_DQM5 FBA_DQM6 FBA_DQM5 NC NC#B19
AA25
81 FBA_DQM6 FBA_DQM7 U25 FBA_DQM6 F22 FBA_DEBUG0 R7801 1 2 Do Not Stuff
81 FBA_DQM7 FBA_DQM7 FBA_DEBUG0 FBA_DEBUG0 J22 FBA_DEBUG1 R7806 1
DY 2 Do Not Stuff
FBA_DEBUG1 FBA_DEBUG1 DY
FBA_EDC0 E19
81 FBA_EDC0 FBA_EDC1 C15 FBA_DQS_WP0
81 FBA_EDC1 FBA_EDC2 B16 FBA_DQS_WP1 D24 FBA_CLK0P
81 FBA_EDC2 FBA_EDC3 FBA_DQS_WP2 FBA_CLK0 FBA_CLK0N FBA_CLK0P 81
B22 D25 FBA_CLK0N 81
81 FBA_EDC3 FBA_EDC4 R25 FBA_DQS_WP3 FBA_CLK0# N22 FBA_CLK1P
81 FBA_EDC4 FBA_EDC5 FBA_DQS_WP4 FBA_CLK1 FBA_CLK1N FBA_CLK1P 81
W23 M22 FBA_CLK1N 81
81 FBA_EDC5 FBA_EDC6 AB26 FBA_DQS_WP5 FBA_CLK1#
81 FBA_EDC6 FBA_EDC7 T26 FBA_DQS_WP6
81 FBA_EDC7 FBA_DQS_WP7

F19 D18 FBA_WCK01


FBA_DQS_RN0 FBA_WCK01 FBA_WCK01# FBA_WCK01 81
C14 C18 FBA_WCK01# 81
A16 FBA_DQS_RN1 FBA_WCK01# D17 FBA_WCK23
A22 FBA_DQS_RN2 FBA_WCK23 D16 FBA_WCK23# FBA_WCK23 81 Modify by change to GDDR5
FBA_DQS_RN3 FBA_WCK23# FBA_WCK23# 81
P25
FBA_DQS_RN4 FBA_WCK45
T24 FBA_WCK45
FBA_WCK45# FBA_WCK45 81 Stanley Lioa 2015-09-01
W22 U24 FBA_WCK45# 81
AB27 FBA_DQS_RN5 FBA_WCK45# V24 FBA_WCK67
FBA_DQS_RN6 FBA_WCK67 FBA_WCK67# FBA_WCK67 81
T27 V25 FBA_WCK67# 81
FBA_DQS_RN7 FBA_WCK67#
Under GPU Near GPU
GF119 1V_1D8V_VGA_S0
Modify by change to GDDR5 F16 62mA 0.1uF(X7R) 22uF(X5R)
FB_PLLAVDD_1 K0402 ×3 K0603 ×1
NC
P22 N16S-->1V
B FB_PLLAVDD_2 L7801 N17S-->1.8V B

FB_PLLAVDD
H22 35mA FBA_PLL_AVDD 1 DIS 2
FB_DLLAVDD
GF117 Do Not Stuff
C7801 C7802 C7803 C7804 C7805 Do Not Stuff
1

DIS DIS DIS DIS DIS 2nd = 68.00335.051


Do Not Stuff
Do Not Stuff

Do Not Stuff

Do Not Stuff

Do Not Stuff
2

TP7801 1 FB_VREF D23


30ohm@100MHZ(ESR=0.01ohm)
FB_VREF_PROBE
Sourcer suggest to change to
N16S-GM-S-A2-GP 68.00335.051 from 68.00084.H41.

1D35V_VGA_S0 Note:
Reference NV-DDR5 CRB and DOH70 by GDDR5
2

R7802 R7803
Do Not Stuff

Do Not Stuff

DIS DIS
1

FBA_CMD14
FBA_CMD30

FBA_CMD29
FBA_CMD13
2

R7804 R7805
Do Not Stuff

Do Not Stuff

DIS DIS
1

A A

UMA

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

GPU_VRAM I/F (3/5)


Size Document Number Rev
A1
FAROE 14" Pavilion SA
Date: Monday, August 06, 2018 Sheet 78 of 106
5 4 3 2 1
5 4 3 2 1

Main Func = dGPU 3D3V_1D8V_AON_S0 05/04 SC for common part


L7901
1D8V_VGA_PLL Near GPU Under GPU
1V_1D8V_VGA_S0 1 DIS 2

1
3D3V_1D8V_AON_S0
Do Not Stuff DIS_N16S DIS
R7981
Do Not Stuff

1
DIS Do Not Stuff C7901D C7902D
待待待 choke L7902 2nd = 068.00100.0021

o Not Stuff

o Not Stuff
Do Not Stuff 3rd = 68.00143.221

2
Do Not Stuff 1 2
GPIO5_GC6_PWR_EN GPIO8_OVERT 1V_1D8V_VGA_S0
2 3 DIS
3V3_MAIN_EN is an open-drain GPIO. GPIO9_ALERT 1 DIS 4 Do Not Stuff DIS_N17S DIS DIS DIS
R7958

1
RN7902
GPIO1_GC6_FB_EN_GPU DIS_N17S Do Not Stuff C7904 C7905 C7908D C7910D

Do Not Stuff

Do Not Stuff
1 2 30ohm@100MHZ

o Not Stuff

o Not Stuff
(ESR=0.01ohm) GPU1M 9 OF 14

2
R7959 9/14 XTAL_PLL 3D3V_1D8V_AON_S0
DIS_N16S Do Not Stuff
1 2 GC6_FB_EN_GPU L6
R7960 M6 CORE_PLLVDD
SP_PLLVDD

1
GPIO0_CORE_VID DIS_N17S Do Not Stuff 1 2 VID_PLLVDD_L 1
R7954
2VID_PLLVDD N6
R7902
Do Not Stuff
VGA_CORE_VID 85 VID_PLLVDD NC
R7961 DY
Do Not Stuff Do Not Stuff
DIS_N16S
GPIO11_LCD_VDD 1 2 VGA_CORE_VID GF119/GK208 GF117/GM108
DIS_N17S

2
3D3V_1D8V_AON_S0 R7962 VIDEO_CLK_XTAL_SS A10 C10 N12P_XTAL_OUTBUFF
GPIO4_GC6_PWR_EN_GPU DIS_N17S
1 2 XTAL_SSIN XTAL_OUTBUFF
D GPIO5_GC6_PWR_EN 85,87 D
Do Not Stuff PDP-06877-006
SC 0416 R7963 C11 B10

2
GPU1N 8 OF 14 Do Not Stuff XTAL_IN XTAL_OUT
DIS_N16S

1
8/14 MISC1 R7978 GPIO5_FRAME_LOCK# 1 2 N16S-GM-S-A2-GP R7905

1
D9 SMBC_THERM_NV 20PF 5% 50V +/-0.25PF 0402 Do Not Stuff
Do Not Stuff
I2CS_SCL D8 SMBD_THERM_NV
I2CS_SDA RN7901 DIS_N17S R7964 R7904 R7903
DIS
DIS_N17S DIS

1
A9 I2CC_SCL 4 1 Do Not Stuff Do Not Stuff Do Not Stuff
DIS

2
I2CC_SCL B9 I2CC_SDA 3 2 GPIO2_EVEN_GPU# 1 2 GPU_EVENT_GPU# 27MHZ_IN 1 2 27MHZ_OUT
DY

2
I2CC_SDA

GPU_I2C
X7901
Do Not Stuff R7965

2
1 P2800_VGA_DXN E12 GF117 Do Not Stuff SB 0404
THERMDN C9 I2CB_SCL 3 2
DIS_N16S 1 2 1 4
TP7903 DIS
P2800_VGA_DXP NC I2CB_SCL I2CB_SDA
1 F12 C8 4 1 R7966 R7907 Do Not Stuff
TP7904 THERMDP NC I2CB_SDA DIS Do Not Stuff
DIS_N17S

2
RN7903 GPIO6_VGA_CORE_PSI 1 2 VGA_CORE_PSI 85

1
TP7906 1 N12P_JTAG_TCK AE5 Do Not Stuff R7977 2 3 27MHZ_OUT_R
1 N12P_JTAG_TMS AD6 JTAG_TCK
TP7902 1 N12P_JTAG_TDI AE6 JTAG_TMS
Do Not Stuff
R7967
DIS
JTAG_TDI DIS_N16S

2
TP7905 1 N12P_JTAG_TDO AF6 Do Not Stuff
DIS_N16S

1
TP7901 N12P_JTAG_TRST AG4 JTAG_TDO C6 GPIO0_CORE_VID GPIO13_LCD_BLEN 1 2 C7906 Do Not Stuff C7907
JTAG_TRST# GPIO0 B2 GPIO1_GC6_FB_EN_GPU Do Not Stuff Do Not Stuff
Do Not Stuff

1
GPIO1 D6 GPIO2_EVEN_GPU#
GPIO2 C7
DIS 2ND = 082.30008.0441 DIS
1

GPIO3 F9 GPIO4_GC6_PWR_EN_GPU
R7975 GPIO4 A3 GPIO5_FRAME_LOCK#
Do Not Stuff GPIO5 A4 GPIO6_VGA_CORE_PSI
DIS GK208 GPIO6 B6
GM108 GPIO7 GPIO8_OVERT
A6 05/02 SC for common part
2

OVERT GPIO8 GPIO9_ALERT


F8 R7979
GPIO9 C5 1 2
GPIO10 GPIO11_LCD_VDD GPIO10_FBVREF 81 3D3V_1D8V_AON_S0 D7902
E7
GPIO11 D7 GPIO12_PWR_LEVEL Do Not Stuff A K
GPIO12 GPIO13_LCD_BLEN GPU_PROTECT# 24
B4 DIS
GPIO13
DIS Do Not Stuff
R7931 Do Not Stuff
GM108 GK208 GF117 GF119 1 2
Do Not Stuff
3D3V_1D8V_AON_S0 2nd = 83.00355.D1F
D5 DIS_N16S
GPIO16 GPIO16 NC GPIO16 E6 DIS_N16S
GPIO20 GPIO20 NC GPIO20 GPU_PEX_RST_HOLD_GPU#
C4 1 2 R7973
GPIO21 GPIO8 NC GPIO21 GPU_PEX_RST_HOLD 76
Do Not Stuff
DIS_N16S
E9 SYS_PEX_RST_MON_GPU# 1 2
GPIO8 NC NC CEC SYS_PEX_RST_MON# 76
R7974 Do Not Stuff

N16S-GM-S-A2-GP

3D3V_1D8V_AON_S0
3D3V_1D8V_AON_S0
GPIO10_FBVREF
3D3V_1D8V_VGA_S0 3D3V_S0

2
3
4

1
1 R7909 2 Q7601_G R7910 R7943
Do Not Stuff Do Not Stuff R7980
Do Not Stuff RN7905
DIS DY Do Not Stuff
Do Not Stuff
06/21 SD 2nd = 075.063D8.0A7C Do Not Stuff Q7904
DIS DY

1
C C
Do Not Stuff BOM OPTION G

2
N16S:875.27002.F7C SYS_PEX_RST_MON# 76 GPU_PEX_RST#
2
1

N17S:075.00138.0A7C D GPIO8_OVERT#_EC
3 4 SMBD_THERM_NV DY GPIO8_OVERT#_EC 24
18,24,70 EC_SMB_SDA_CPU D2 S2
GPIO8_OVERT S
2 5 Do Not Stuff SA 1024 Do Not Stuff
G1
DIS G2
Do Not Stuff D7901 Do Not Stuff
1 6 83.R2003.0EF

1
2nd = 084.00138.0C31
S1 D1
C7909 K DY A
PWR_VGA_CORE_EN 85

Do Not Stuff
Q7903 DY

2
SMBC_THERM_NV

18,24,70 EC_SMB_SCL_CPU

DIS_N17S
1 R7982 2 GPU_ROM 1 R7937 2 GPU_ROM_N16S
3D3V_1D8V_AON_S0 3D3V_1D8V_VGA_S0
3D3V_1D8V_AON_S0 Do Not Stuff Do Not Stuff
DIS_N16S

H DY GPU1L 10 OF 14
R7911
M/DIS_N16S R7915 R7916 R7917 R7918 R7919 -> 4.99k & stuff
10/14 MISC2
1

1
Do Not Stuff

Do Not Stuff

Do Not Stuff

Do Not Stuff

Do Not Stuff

Do Not Stuff
R7912 R7913 R7914 (for MX130)

1
Do Not Stuff

Do Not Stuff

Do Not Stuff

DY DY DY DIS_N17S DIS_N17S DIS_N17S R7986 R7984 R7983


E10 Do Not Stuff Do Not Stuff Do Not Stuff
F10 VMON_IN0 D12 M_N16S DIS_N16S DY
2

2
VMON_IN1 ROM_CS#

2
B12 GPU_ROM_SI GPU_ROM_SI
ROM_SI A12 GPU_ROM_SO GPU_ROM_SO
STRAP0 D1 ROM_SO C12 GPU_ROM_SCLK GPU_ROM_SCLK
STRAP1 D2 STRAP0 ROM_SCLK
STRAP2 E4 STRAP1
NC FOR
STRAP2

1
STRAP3 E3 GM108 ->DY
STRAP4 D3 STRAP3 R7987 R7985 R7940
STRAP4 R7920 R7921 R7922 Do Not Stuff Do Not Stuff Do Not Stuff
1

1
Do Not Stuff

Do Not Stuff

Do Not Stuff
S_N16S DY DIS_N16S
S/H S/M S/M/H

2
STRAP5 C1 DY DIS_N17S DY
R7923 R7927 R7928 STRAP5 D11
BUFRST#
1

1
Do Not Stuff

Do Not Stuff

Do Not Stuff

R7924 R7925 R7926


2

1 2STRAP_REF0_GND_N9
F6 NC
D10
MULTI_STRAP_REF0_GND PGOOD GPU_ROM_N16S
Do Not Stuff

Do Not Stuff

Do Not Stuff

R7929
DIS_N17S DIS_N17S
DIS_N17S GF117

1
Do Not Stuff GK208 GF117 GF119 R7988
GM108 GK208 Do Not Stuff
GPU_N16S
2

F4 GM108 H_N16S
MULTI_STRAP_REF1_GND NC
B B
F5
NC

2
MULTI_STRAP_REF2_GND GPU_ROM_SI

N15V-GS supports Binary Mode.


N16V-GM supports Multi-Level Strap. N16S-GM-S-A2-GP

3D3V_1D8V_AON_S0 3D3V_S0
3D3V_AUX_S5
2

3D3V_1D8V_AON_S0
2

R7948
2nd = 084.00138.0C31Do Not Stuff
2

R7949
R7933 Do Not Stuff G Do Not Stuff
Do Not Stuff DIS
Q7902 DIS DIS D
1
1

GPU_EVENT# 6
DIS_N17S
1

1 6 GC6_FB_EN_GPU_L GPU_EVENT_GPU# S
S1 D1
Do Not Stuff
GC6_FB_EN_GPU 2 Q7906
G1 G2 5
DIS_N17S
3 D2 S2 4
1

R7934 3D3V_S0 R7935 1 2


1

Do Not Stuff Do Not Stuff


R7936 Do Not Stuff
DIS DIS_N17S
Do Not Stuff 2nd = 075.063D8.0A7C
2

DIS_N16S Do Not Stuff R7944


2

2 DY 1

6,86 GC6_FB_EN_PCH Do Not Stuff

A A

UMA

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
GPU_GPIO/STRAP (4/5)
Size Document Number Rev
Custom
FAROE 14" Pavilion SA
Date: Monday, August 06, 2018 Sheet 79 of 106
5 4 3 2 1
5 4 3 2 1

Main Func = dGPU


GPU1F 13 OF 14
13/14 GND
1V_VGA_CORE
A2 M13
AB17 GND_001 GND_071 M15
AB20 GND_005 GND_072 M17
AB24 GND_006 GND_073 N10
GPU1E 11 OF 14 AC2 GND_007 GND_074 N12
Under GPU AC22 GND_008 GND_075 N14
11/14 NVVDD
K10 AC26 GND_009 GND_076 N16
K12 VDD_001 AC5 GND_010 GND_077 N18
K14 VDD_002 AC8 GND_011 GND_078 P11
K16 VDD_003 AD12 GND_012 GND_079 P13
C8001 C8002 C8005 C8003 C8004 K18 VDD_004 AD13 GND_013 GND_080 P15
VDD_005 GND_014 GND_081
1

1
L11 A26 P17
L13 VDD_006 AD15 GND_002 GND_082 P2
DIS DIS DIS DIS DIS VDD_007 GND_015 GND_083
Do Not Stuff

Do Not Stuff

Do Not Stuff

Do Not Stuff

Do Not Stuff
L15 AD16 P23
2

2
L17 VDD_008 AD18 GND_016 GND_084 P26
M10 VDD_009 AD19 GND_017 GND_085 P5 3D3V_1D8V_VGA_S0
M12 VDD_010 AD21 GND_018 GND_086 R10
M14 VDD_011 AD22 GND_019 GND_087 R12
M16 VDD_012 AE11 GND_020 GND_088 R14
Under
Under GPU
GPU Near
Near GPU
GPU
D D
M18 VDD_013 AE14 GND_021 GND_089 R16
N11 VDD_014 AE17 GND_022 GND_090 R18
N13 VDD_015 AE20 GND_023 GND_091 T11 3.3V +/- 5%
VDD_016 GND_024 GND_092
N15
N17 VDD_017
AB11
AF1 GND_003 GND_093
T13
T15 GPU1C 14 OF 14 C8006 C8007 C8009
85mA
VDD_018 GND_025 GND_094

1
P10 AF11 T17 是是是BEAD
P12 VDD_019 AF14 GND_026 GND_095 U10
14/14 XVDD/VDD33 DIS DIS DIS
C8008
VDD_020 GND_027 GND_096

Do Not Stuff

Do Not Stuff

Do Not Stuff
C8010 C8011 C8012 C8013 C8014 P14 AF17 U12 AD10 G8 SC1U6D3V1MX-GP

2
VDD_021 GND_028 GND_097 NC#AD10 VDD33_1
1

1
P16 AF20 U14 1D8V_VGA_PLL AD7 G9
P18 VDD_022 AF23 GND_029 GND_098 U16 NC#AD7 GM108 VDD33_2 G10
DIS DIS DIS DIS DIS VDD_023 GND_030 GND_099 3V3_AON VDD33_3
Do Not Stuff

Do Not Stuff

Do Not Stuff

Do Not Stuff

Do Not Stuff
R11 AF5 U18 DIS_N17S G12
L8001 3V3_AON
2

2
R13 VDD_024 AF8 GND_031 GND_100 U2 VDD33_4
R15 VDD_025 AG2 GND_032 GND_101 U23 1 2 GPCPLL_AVDD F11
R17 VDD_026 AG26 GND_033 GND_102 U26 3V3AUX
T10 VDD_027 AB14 GND_034 GND_103 U5 Do Not Stuff V5
T12 VDD_028 B1 GND_004 GND_104 V11 V6 NC#V5
T14 VDD_029 B11 GND_035 GND_105 V13
Do Not Stuff NC#V6
2nd = 68.00334.051 C8022
T16 VDD_030 B14 GND_036 GND_106 V15
VDD_031 GND_037 GND_107

1
T18 B17 V17 DIS
U11 VDD_032 B20 GND_038 GND_108 Y2 3D3V_1D8V_AON_S0
VDD_033 GND_039 GND_109

Do Not Stuff
U13 B23 Y23 CONFIGURABLE

2
U15 VDD_034 B27 GND_040 GND_110 Y26
U17 VDD_035 B5 GND_041 GND_111 Y5
POWER CHANNELS Under GPUNear GPU
* nc on substrate
C8016 C8017 C8015 C8018 C8019 C8020 C8021 V10 VDD_036 B8 GND_042 GND_112
VDD_037 GND_043
1

V12 E11 G1
V14 VDD_038 E14 GND_044 G2 NC#G1
DIS_N17S

DIS_N17S

DIS_N17S

DIS DIS DIS DIS VDD_039 GND_045 NC#G2


Do Not Stuff

Do Not Stuff

Do Not Stuff

Do Not Stuff

Do Not Stuff

Do Not Stuff

Do Not Stuff

V16 E17 G3
VDD_040 GND_046 NC#G3
2

V18 E2 G4 C8042 C8023 C8025


VDD_041 GND_047 NC#G4

1
E20 G5 DIS DIS_N17S DIS
E22 GND_048 G6 NC#G5 C8024
GND_049 NC#G6

Do Not Stuff

Do Not Stuff

Do Not Stuff
N16S-GM-S-A2-GP E25 G7 SC1U6D3V1MX-GP

2
E5 GND_050 NC#G7
E8 GND_051
H2 GND_052 V1
H23 GND_053 V2 NC#V1
H25 GND_054 NC#V2
H5 GND_055
K11 GND_056 0816_SA
Near GPU K13 GND_057 DB_170811
K15 GND_058 W1 Follow vendor's commedn to add C8042
K17 GND_059 W2 NC#W1
L10 GND_060 W3 NC#W2
L12 GND_061 W4 NC#W3
L14 GND_062 NC#W4
C8027 C8028 C8029 C8030 C8026 C8060 C8031 C8032 C8033 C8034 C8035 C8036 C8037 C8038 C8039 C8040 C8041 C8065 C8066 L16 GND_063
GND_064
1

1
DIS DIS L18 N16S-GM-S-A2-GP
L2 GND_065
GND_066
Do Not Stuff

Do Not Stuff

Do Not Stuff

Do Not Stuff

Do Not Stuff

Do Not Stuff

Do Not Stuff

Do Not Stuff

Do Not Stuff

Do Not Stuff

Do Not Stuff

Do Not Stuff

Do Not Stuff

Do Not Stuff

Do Not Stuff

Do Not Stuff

Do Not Stuff

Do Not Stuff

Do Not Stuff
L23
2

DIS_N17S2

DIS_N17S2

DIS_N17S2

DIS_N17S2

DIS_N17S2

2
GND_067
DIS_N17S

DIS_N17S

DIS_N17S

DIS_N17S

DIS_N17S

DIS_N17S

DIS_N17S

DIS_N17S

DIS_N17S

DIS_N17S

DIS_N17S
C L25 C
DIS_N17S

L5 GND_068 AA7
M11 GND_069 GND_F AB7
GND_070 GND_H

N16S-GM-S-A2-GP

0316_SA Stuff by vendor review


0321_SA Change to common P/N

1.35V +/- 3%
12 OF 14 GPU1D 1D35V_VGA_S0 4.88A
12/14 FBVDDQ Under GPU Under GPU Near GPU Near GPU
B26
FBVDDQ_01 C25
FBVDDQ_02 E23
FBVDDQ_03 E26
FBVDDQ_04 F14 C8061 C8062 C8063 C8064 C8044 C8045 C8049 C8050 C8048 C8051 C8052 C8053
FBVDDQ_05

1
F21 DIS DIS DIS DIS
FBVDDQ_06

Do Not Stuff

Do Not Stuff

Do Not Stuff

Do Not Stuff

Do Not Stuff

Do Not Stuff

Do Not Stuff
G13
FBVDDQ_07

Do Not Stuff

Do Not Stuff

Do Not Stuff

Do Not Stuff

Do Not Stuff
G14
FBVDDQ_08

2
G15
FBVDDQ_09 G16

DIS_N16S

DIS_N16S

DIS_N16S

DIS_N16S

DIS_N17S

DIS_N17S

DIS_N17S

DIS_N17S
FBVDDQ_10 G18
FBVDDQ_11 G19
FBVDDQ_12 G20
FBVDDQ_13 G21
FBVDDQ_14 L22
FBVDDQ_19 L24 Follow vendor's commedn to Delete 2x 0.1uF, 2x 4.7uF
FBVDDQ_20 L26
FBVDDQ_21 M21 0816_SA
FBVDDQ_22 N21
FBVDDQ_23 R21
FBVDDQ_24 T21
FBVDDQ_25 V21
B FBVDDQ_26 W21 C8054 C8055 C8056 C8057 C8058 C8059 B
FBVDDQ_27

1
Do Not Stuff

Do Not Stuff

Do Not Stuff

Do Not Stuff

Do Not Stuff

Do Not Stuff
DIS_N17S

DIS_N17S

DIS_N17S

DIS_N17S

DIS_N17S

DIS_N17S
GF117

2
GF119
GK208
H24
FBVDDQ FBVDDQ_15 H26
FBVDDQ FBVDDQ_16
FBVDDQ
J21
FBVDDQ_17 K21
FBVDDQ FBVDDQ_18

1D35V_VGA_S0

Under GPU
R8001
2 1 FB_CAL_PD_VDDQ D22
FB_CAL_PD_VDDQ
DIS
Do Not Stuff
FB_CAL_PU_GND C24
FB_CAL_PU_GND

FB_CAL_TERM_GND B25
FB_CAL_TERM_GND

N16S-GM-S-A2-GP
1

R8002 R8003
GDDR5:60.4R
DIS Do Not Stuff
Do Not Stuff DIS
GDDR3:51.1R
2

A A

UMA

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
GPU_POWER/GND (5/5)
Size Document Number Rev
Custom
FAROE 14" Pavilion SA
Date: Monday, August 06, 2018 Sheet 80 of 106
5 4 3 2 1
5 4 3 2 1

DECOUPLING FOR VRAM1 DEVICE


Place close VDD ball
1D35V_VGA_S0 2017.8.28
Frame Buffer Patition VRAM1->VRAM4 for sharing ME drawing w/ x16 1D35V_VGA_S0
VRAM4A 1 OF 2
1D35V_VGA_S0 VRAM1A 1 OF 2
1D35V_VGA_S0 C5 B5
C5 B5 C10 VDD DIS VSS B10 C8107 C8108 C8109 C8110 C8111 C8112 C8113 C8114 C8120 C8121
VDD DIS VSS VDD VSS

1
SCD1U25V2KX-GP

SCD1U25V2KX-GP

SCD1U25V2KX-GP

SCD1U25V2KX-GP

SCD1U25V2KX-GP

SCD1U25V2KX-GP

SCD1U25V2KX-GP

SCD1U25V2KX-GP

SCD1U25V2KX-GP

SCD1U25V2KX-GP
C10 B10 D11 D10
D11 VDD VSS D10 G1 VDD VSS G5
VDD VSS VDD VSS DIS DIS DIS DIS DIS DIS DIS DIS DIS DIS

1
G1 G5 G4 G10

2
G4 VDD VSS G10 R8101 G11 VDD VSS H1
G11 VDD VSS H1 549R2F-GP G14 VDD VSS H14
D D
G14 VDD VSS H14 L1 VDD VSS K1
L1 VDD VSS K1 DIS L4 VDD VSS K14

2
L4 VDD VSS K14 FBA_VREFC0 L11 VDD VSS L5
L11 VDD VSS L5 L14 VDD VSS L10

1
VDD VSS VDD VSS

SC820P50V2KX-1GP
C8135

SC820P50V2KX-1GP
C8101

1K33R2F-GP
R8102

931R2F-1-GP
R8103
L14 L10 P11 P10
VDD VSS VDD VSS

1
P11 P10 R5 T5 1D35V_VGA_S0 1D35V_VGA_S0
R5 VDD VSS T5 1D35V_VGA_S0 R10 VDD VSS T10
1D35V_VGA_S0 R10 VDD VSS T10 DIS DIS DIS DIS VDD VSS

2
VDD VSS B1 A1

2
B1 A1 B3 VDDQ VSSQ A3 C8103 C8104 C8105 C8106 C8102 C8125
VDDQ VSSQ VDDQ VSSQ

1
SC1U10V2KX-L1-GP

SC1U10V2KX-L1-GP

SC1U10V2KX-L1-GP

SC1U10V2KX-L1-GP

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP
B3 A3 B12 A12 DIS DIS DIS DIS DIS DIS
B12 VDDQ VSSQ A12 B14 VDDQ VSSQ A14
B14 VDDQ VSSQ A14 FBA_VREF_FET_L D1 VDDQ VSSQ C1

2
D1 VDDQ VSSQ C1 D3 VDDQ VSSQ C3
VDDQ VSSQ placed near each VRAM VDDQ VSSQ
D3 C3 D12 C4
D12 VDDQ VSSQ C4 D14 VDDQ VSSQ C11

D
D14 VDDQ VSSQ C11 E5 VDDQ VSSQ C12
E5 VDDQ VSSQ C12 Q8101 E10 VDDQ VSSQ C14
E10 VDDQ VSSQ C14 F1 VDDQ VSSQ E1
VDDQ VSSQ 2N7002K-2-GP VDDQ VSSQ
F1 E1 F3 E3
F3 VDDQ VSSQ E3 84.2N702.J31 F12 VDDQ VSSQ E12
F12 VDDQ VSSQ E12 DIS 2ND = 84.2N702.031 F14 VDDQ VSSQ E14
F14 VDDQ VSSQ E14 G2 VDDQ VSSQ F5
G2 VDDQ VSSQ F5 3rd = 84.2N702.W31 G13 VDDQ VSSQ F10
DECOUPLING FOR VRAM2 DEVICE

S
G
G13 VDDQ VSSQ F10 H3 VDDQ VSSQ H2
H3 VDDQ VSSQ H2 H12 VDDQ VSSQ H13
H12 VDDQ VSSQ H13
79 GPIO10_FBVREF
K3 VDDQ VSSQ K2 Place close VDD ball
K3 VDDQ VSSQ K2 K12 VDDQ VSSQ K13
K12 VDDQ VSSQ K13 L2 VDDQ VSSQ M5 1D35V_VGA_S0
L2 VDDQ VSSQ M5 L13 VDDQ VSSQ M10
L13 VDDQ VSSQ M10 M1 VDDQ VSSQ N1
M1 VDDQ VSSQ N1 M3 VDDQ VSSQ N3
M3 VDDQ VSSQ N3 M12 VDDQ VSSQ N12 C8129 C8127 C8132 C8133 C8119 C8128 C8130 C8126 C8122 C8123
FBVREF Termination

1
VDDQ VSSQ VDDQ VSSQ

SCD1U25V2KX-GP

SCD1U25V2KX-GP

SCD1U25V2KX-GP

SCD1U25V2KX-GP

SCD1U25V2KX-GP

SCD1U25V2KX-GP

SCD1U25V2KX-GP

SCD1U25V2KX-GP

SCD1U25V2KX-GP

SCD1U25V2KX-GP
M12 N12 M14 N14
M14 VDDQ VSSQ N14 N5 VDDQ VSSQ R1
N5 VDDQ VSSQ R1 N10 VDDQ VSSQ R3
DIS DIS DIS DIS DIS DIS DIS DIS DIS DIS
Type FBVREF% Voltage GPU_GPIO10

2
N10 VDDQ VSSQ R3 P1 VDDQ VSSQ R4
P1 VDDQ VSSQ R4 P3 VDDQ VSSQ R11
P3 VDDQ VSSQ R11 P12 VDDQ VSSQ R12
VDDQ VSSQ Un-termination 50% 0.749V High VDDQ VSSQ
P12 R12 P14 R14
P14 VDDQ VSSQ R14 T1 VDDQ VSSQ U1
C C
T1 VDDQ VSSQ U1 T3 VDDQ VSSQ U3
VDDQ VSSQ Termination 70% 1.0617V Low VDDQ VSSQ
T3 U3 T12 U12
T12 VDDQ VSSQ U12 T14 VDDQ VSSQ U14 1D35V_VGA_S0 1D35V_VGA_S0
T14 VDDQ VSSQ U14 VDDQ VSSQ
VDDQ VSSQ FBA_VREFC0 J14 A5
FBA_VREFC0 J14 A5 VREFC VPP/NC#A5 U5
VREFC VPP/NC#A5 U5 2017.8.28 A10 VPP/NC#U5 C8116 C8117 C8118 C8115 C8131 C8134
VPP/NC#U5 VREFD

1
SC1U10V2KX-L1-GP

SC1U10V2KX-L1-GP

SC1U10V2KX-L1-GP

SC1U10V2KX-L1-GP

SC10U6D3V3MX-GP

SC10U6D3V3MX-GP
2017.8.28 A10 ->NC by NV reviewed U10 2017.8.28
->NC by NV reviewed U10 VREFD 2017.8.28 VREFD ->NC by NV reviewed
DIS DIS DIS DIS DIS DIS
VREFD ->NC by NV reviewed

2
H5GQ2H24AFR-T2C-GP
H5GQ2H24AFR-T2C-GP

Frame Buffer Patition 32..63


Frame Buffer Patition 0..31
Mirrored(MF=1)
Normal(MF=0) 2017.8.28
VRAM1->VRAM4 for sharing ME drawing w/ x16
VRAM4B 2 OF 2
2 OF 2 FBA_D[0..63] 78,81
VRAM1B
FBA_D[0..63] 78,81 FBA_CMD26 K4 A4 FBA_D56
78 FBA_CMD6 FBA_CMD6 K4 A4 FBA_D0
78
78
FBA_CMD26
FBA_CMD23 FBA_CMD23 H5 A8/A7 DIS DQ0 A2 FBA_D57
78 FBA_CMD11
FBA_CMD11 H5 A8/A7 DIS DQ0 A2 FBA_D1
78 FBA_CMD22
FBA_CMD22 H4 A9/A1 DQ1 B4 FBA_D58
FBA_CMD10 H4 A9/A1 DQ1 B4 FBA_D2 FBA_CMD27 K5 A10/A0 DQ2 B2 FBA_D59
78 FBA_CMD10 A10/A0 DQ2 78 FBA_CMD27 A11/A6 DQ3
B FBA_CMD7 K5 B2 FBA_D3 FBA_CMD25 J5 E4 FBA_D60 B
78 FBA_CMD7 A11/A6 DQ3 78 FBA_CMD25 A12/RFU#J5/NC#J5 DQ4
78 FBA_CMD9 FBA_CMD9 J5 E4 FBA_D4 E2 FBA_D61
A12/RFU#J5/NC#J5 DQ4 E2 FBA_D5 FBA_CMD19 H11 DQ5 F4 FBA_D62
DQ5 78 FBA_CMD19 BA0/A2 DQ6
78 FBA_CMD2 FBA_CMD2 H11 F4 FBA_D6 78 FBA_CMD17 FBA_CMD17 K10 F2 FBA_D63
FBA_CMD4 K10 BA0/A2 DQ6 F2 FBA_D7 FBA_CMD18 K11 BA1/A5 DQ7 A11 FBA_D48
78 FBA_CMD4 BA1/A5 DQ7 78 FBA_CMD18 BA2/A4 DQ8
78 FBA_CMD3 FBA_CMD3 K11 A11 FBA_D8 78 FBA_CMD20 FBA_CMD20 H10 A13 FBA_D49
FBA_CMD1 H10 BA2/A4 DQ8 A13 FBA_D9 BA3/A3 DQ9 B11 FBA_D50
78 FBA_CMD1 BA3/A3 DQ9 DQ10
B11 FBA_D10 78 FBA_CMD24 FBA_CMD24 J4 B13 FBA_D51
FBA_CMD8 J4 DQ10 B13 FBA_D11 FBA_CMD31 G3 ABI# DQ11 E11 FBA_D52
78 FBA_CMD8 ABI# DQ11 78 FBA_CMD31 RAS# DQ12
78 FBA_CMD12 FBA_CMD12 G3 E11 FBA_D12 78 FBA_CMD21 FBA_CMD21 G12 E13 FBA_D53
FBA_CMD0 G12 RAS# DQ12 E13 FBA_D13 FBA_CMD28 L3 CS# DQ13 F11 FBA_D54
78 FBA_CMD0 CS# DQ13 78 FBA_CMD28 CAS# DQ14
78 FBA_CMD15 FBA_CMD15 L3 F11 FBA_D14 78 FBA_CMD16 FBA_CMD16 L12 F13 FBA_D55
FBA_CMD5 L12 CAS# DQ14 F13 FBA_D15 WE# DQ15 U11 FBA_D40
78 FBA_CMD5 WE# DQ15 DQ16
U11 FBA_D16 78 FBA_CLK1P FBA_CLK1P J12 U13 FBA_D41
FBA_CLK0P J12 DQ16 U13 FBA_D17 FBA_CLK1N J11 CK DQ17 T11 FBA_D42
78 FBA_CLK0P CK DQ17 78 FBA_CLK1N CK# DQ18
FBA_CLK0N J11 T11 FBA_D18 FBA_CMD30 J3 T13 FBA_D43
78 FBA_CLK0N CK# DQ18 78 FBA_CMD30 CKE# DQ19
1

1
FBA_CMD14 J3 T13 FBA_D19 N11 FBA_D44
78 FBA_CMD14 CKE# DQ19 DIS DIS DQ20
1

N11 FBA_D20 R8104 R8105 FBA_DQM7 D2 N13 FBA_D45


DIS DISR8111
R8112 FBA_DQM0 D2 DQ20 N13 FBA_D21 40D2R2F-GP 40D2R2F-GP
78 FBA_DQM7 FBA_DQM6 D13 DBI0# DQ21 M11 FBA_D46
78 FBA_DQM0 FBA_DQM1 DBI0# DQ21 FBA_D22 78 FBA_DQM6 FBA_DQM5 DBI1# DQ22 FBA_D47
40D2R2F-GP 40D2R2F-GP D13 M11 P13 M13
78 FBA_DQM1 FBA_DQM2 DBI1# DQ22 FBA_D23 78 FBA_DQM5 FBA_DQM4 DBI2# DQ23 FBA_D32
P13 M13 P2 U4
78 FBA_DQM2 78 FBA_DQM4
2

FBA_DQM3 P2 DBI2# DQ23 U4 FBA_D24 FBA_CLK1_MIDPT DBI3# DQ24 U2 FBA_D33


78 FBA_DQM3
2

FBA_CLK0_MIDPT DBI3# DQ24 U2 FBA_D25 FBA_CMD29 J2 DQ25 T4 FBA_D34


DQ25 78 FBA_CMD29 RESET# DQ26
2

FBA_CMD13 J2 T4 FBA_D26 T2 FBA_D35


78 FBA_CMD13 RESET# DQ26 DIS DQ27
2

T2 FBA_D27 C8124 2017.8.28 FBA_SEN0->FBA_SEN2 FBA_SEN2 J10 N4 FBA_D36


DIS FBA_SEN0 J10 DQ27 N4 FBA_D28 FBA_ZQ1 J13 SEN DQ28 N2 FBA_D37
C8136 SCD01U50V2KX-1GP
1

FBA_ZQ0 J13 SEN DQ28 N2 FBA_D29 2 FBA_MF2 ZQ DQ29 FBA_D38


SCD01U50V2KX-1GP 1D35V_VGA_S0 DIS 11KR2J-1-GP J1 M4
1

FBA_MF1 J1 ZQ DQ29 M4 FBA_D30 R8106 MF DQ30 M2 FBA_D39


MF DQ30 DQ31
2

M2 FBA_D31 1 FBA_WCK67 D4
DQ31 WCK01
2

R8107 R8108 FBA_WCK01 D4 R8109 DIS FBA_WCK67# D5 C2 FBA_EDC7


FBA_WCK01# D5 WCK01 C2 FBA_EDC0 DIS WCK01# EDC0 C13 FBA_EDC6 FBA_EDC7 78
R8113 121R2F-GP 1KR2J-1-GP 1KR2F-L1-GP R8110
1KR2F-L1-GP WCK01# EDC0 C13 FBA_EDC1 FBA_EDC0 78 121R2F-GP FBA_WCK45 P4 EDC1 R13 FBA_EDC5 FBA_EDC6 78
DIS DIS DIS FBA_WCK23 EDC1 FBA_EDC2 FBA_EDC1 78 FBA_WCK45# WCK23 EDC2 FBA_EDC4 FBA_EDC5 78
P4 R13 P5 R2
WCK23 EDC2 FBA_EDC2 78 WCK23# EDC3 FBA_EDC4 78
1

2017.8.28 FBA_WCK23# P5 R2 FBA_EDC3


1

Add 1K by NV reviewed WCK23# EDC3 FBA_EDC3 78


78 FBA_WCK67 H5GQ2H24AFR-T2C-GP
78 FBA_WCK01 H5GQ2H24AFR-T2C-GP 78 FBA_WCK67#
78 FBA_WCK01# 78 FBA_WCK45
78 FBA_WCK23 78 FBA_WCK45#
78 FBA_WCK23#
A A

UMA

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

081_GPU (VRAM1,2 1/4)


Size Document Number Rev
A2
FAROE 14" Pavilion SA
Date: Monday, August 06, 2018 Sheet 81 of 106
5 4 3 2 1
5 4 3 2 1

Main Func = dGFX_CORE

85,87 PWR_VGA_NVVDD_PG 19V_DCBATOUT

79 PWR_VGA_CORE_EN

N17S-G1

1
PR8502
Do Not Stuff
PC8502 PC8503
SC10U25V3MX-GP
SC10U25V3MX-GP EDP-Continuous : 30 A
EDP-Peak : 60.1 A

2
1 2 PWR_VGA_CORE_VID 5V_S5
79 VGA_CORE_VID ID:31/54A ,
2018.07.05 PWR Rdson: 6.8~8.6/2.8~3.5m (Q1/Q2)
PR8507 PU8502 PU8503

1
1 2 PWR_VGA_NVVDD_VSEN_P 3D3V_1D8V_AON_S0 PR8504 2 2 1V_VGA_CORE
76 VGACORE_VDD_SENSE_1 Do Not Stuff Do Not Stuff 3 3
PWR_VGA_NVVDD_HG1 1 4 PWR_VGA_NVVDD_HG1 1 4
D 10 10 D

1
PC8504 PR8519 PC8505 9 PWR_VGA_NVVDD_PHASE1 9

2
PR8506 Do Not Stuff Do Not Stuff Do Not Stuff 7 7
PR8505 Do Not Stuff 1 2 PWR_VGA_NVVDD_TON_1 PWR_VGA_NVVDD_PVCC PWR_VGA_NVVDD_BOOT1 1 2 PWR_VGA_NVVDD_BOOT1_A 1 2 8 6 PWR_VGA_NVVDD_LGATE1 8 6 PT8501 PT8502 PT8503

1
PWR_VGA_NVVDD_VSEN_N

Do Not Stuff

Do Not Stuff

Do Not Stuff
1 2 DIS DIS DIS 5 5

1
76 VGACORE_GND_SENSE_1 Do Not Stuff PWR_VGA_NVVDD_PHASE1
DIS DIS DIS

2
PC8506

2
0613_-1 Change ShortPAD PR8509 SC1U6D3V1MX-GP PWR_VGA_NVVDD_LGATE1 Do Not Stuff Do Not Stuff
DIS

2
PWR_VGA_CORE_PSI 19V_DCBATOUT Do Not Stuff
PR8503
DIS PR8508 DIS 1st = 075.00630.0073
1 2 PWR_VGA_CORE_PSI 1DIS 2 1 2 2nd = 075.07322.0073
79 VGA_CORE_PSI
Do Not Stuff Do Not Stuff 1st = 075.00630.0073 1V_VGA_CORE
2nd = 075.07322.0073 Do Not Stuff Do Not Stuff
Cyntec. 6.86 x 6.47 x 4.0mm DIS

1
PC8501 PU8501 Do Not Stuff 2nd = 077.53371.0081 2nd = 077.53371.0081
Do Not Stuff PR8510 3D3V_S0 18 1 DCR: 1.4 +- 7% mOhm 2nd = 077.53371.0081
DY Do Not Stuff PVCC BOOT1 Idc : 24A , Isat : 24A
DIS

2
DIS

1
PR8511 2 PL8501 1 2
Place Near GPU (NVVDDS)

2
PWR_VGA_NVVDD_TON 9 UGATE1 Do Not Stuff
Do Not Stuff TON 20 PC8507 1X330uF (Poscap) - PT8511 (Page85)
DIS PHASE1 Do Not Stuff

1
DIS

Do Not Stuff
19 0818_SA
DIS PC8508
need EE Check

2
PWR_VGA_NVVDD_PG 13 LGATE1 Do Not Stuff

2
PGOOD 12 PWR_VGA_NVVDD_OCSET 19V_DCBATOUT
PC8509 PWR_VGA_CORE_PSI 4 OCSET/SS 0818_SA
PSI

1
Do Not Stuff DIS

1
1 2 PWR_VGA_CORE_VID 5 PR8512 PC8510
DIS
PC8511
DY PWR_VGA_CORE_EN 3
VID
15 PWR_VGA_NVVDD_BOOT2
Do Not Stuff Do Not Stuff
DIS

2
Do Not Stuff EN BOOT2
DY

2
1 2 PWR_VGA_NVVDD_VREF 8 14 PWR_VGA_NVVDD_HG2
VREF UGATE2

1
DIS

1
16 PWR_VGA_NVVDD_PHASE2 PC8512 PC8513
PR8513 PHASE2 OCP setting SS setting SC10U25V3MX-GP
SC10U25V3MX-GP
85,86,87 1V_VGA_S0_PG

2
17 PWR_VGA_NVVDD_LGATE2
DISDo Not Stuff PWR_VGA_NVVDD_REFADJ 6 LGATE2 ID:31/54A ,
PR8514 REFADJ 60.4K -> OCP = 90A Rdson: 6.8~8.6/2.8~3.5m (Q1/Q2)

2
Do Not Stuff 10 PWR_VGA_NVVDD_VSEN_N
PWR_VGA_NVVDD_REFADJ_R 1 2 RGND PU8504 PU8505
87 1V_VGA_EN_R DIS PWR_VGA_NVVDD_REFIN 7 11 PWR_VGA_NVVDD_VSEN_P 2 2
REFIN VSNS

2
GND 3 3
PR8515 Do Not Stuff 21 1 4 PWR_VGA_NVVDD_HG2 1 4 0303_SA Change Common P/N
DIS 10 10 0309_SA Change 0603 size
87 DGPU_PWR_EN_Q
Do Not Stuff Do Not Stuff PR8516 PC8514 9 PWR_VGA_NVVDD_PHASE2 9
Do Not Stuff Do Not Stuff 7 7

1
PWR_VGA_NVVDD_REFIN 1 2 PWR_VGA_NVVDD_BOOT2_A 1 2 8 6 PWR_VGA_NVVDD_LGATE2 8 6
DIS 5 5
DIS

2
PR8517 Do Not Stuff Do Not Stuff
DIS Do Not Stuff
DIS 1st = 075.00630.0073
2nd = 075.07322.0073
1st = 075.00630.0073

1
1V_VGA_CORE

1
PC8515 2nd = 075.07322.0073
DIS

1
PC8516 PWR_VGA_NVVDD_REFIN_R
Do Not Stuff
DISDo Not Stuff
DY

2
2
C C
DIS

2
PL8502 1 2
PR8518 Do Not Stuff
DIS PC8518
Do Not Stuff Do Not Stuff

Do Not Stuff
85,87 PWR_VGA_NVVDD_PG PC8517 DIS

Do Not Stuff
RN8501
Cyntec. 6.86 x 6.47 x 4.0mm

2
Do Not Stuff
DCR: 1.4 +- 7% mOhm

1
PWR_VGA_NVVDD_VSEN_N PC8520

1
PC8519 Do Not Stuff 3 2 Idc : 24A , Isat : 24A DIS
Do Not Stuff 4 R2
1
DY

2
R1
DIS
dGPU Power Discharge Circuit

2
79,87 GPIO5_GC6_PWR_EN
3D3V_AUX_S5 DY 1V_VGA_CORE
1D0V_VGA_S0

1
87 1D8V_VGA_EN_OR# PC8521
DIS Do Not Stuff
1 2 PWR_VGA_NVVDD_PG#

2
PR8520
Do Not Stuff
D G S DY
6

R8501
DGPU_PWROK_L 1 2 1D0V_VGA_S0
S2

Do Not Stuff PQ8502


D1

G2

PWR_VGA_NVVDD_PG 1 2
DY 07/02 SD
R8502
DY Do Not Stuff
Do Not Stuff
3D3V_S0
Do Not Stuff DIS 5/28 SC
2nd = 075.063D8.0A7C
D2

R8503
S1

G1

U8501
1 2 1 5 1
85,86,87 1V_VGA_S0_PG
1

Do Not Stuff A VCC PR8531


1 2 1D35V_PGOOD_L
2 DIS Do Not Stuff
86,87 1D35V_PGOOD B
R8504 Do Not Stuff S G D
3 4 DGPU_PWRGD 20
2

GND Y
DIS
1

Do Not Stuff
R8505 1V_VGA_EN_R 1V_VGA_S0_DISCHG
Do Not Stuff
2nd = 73.01G08.L04 DY Do Not Stuff
2

1V_VGA_CORE 1V_VGA_CORE

Need to fine tune.


1

PR8525
Do Not Stuff For tuning VGA_CORE sequence. 3D3V_S0
DIS
PQ8503
1D35V_VGA_S0
2

3D3V_AUX_S5
PWR_VGA_NVVDD_OR# G

1
PR8522
D VGA_CORE_DISCHG 2 1 1D35V_VGA_EN# PR8532
DIS DIS 1D35V_VGA_S0 DIS Do Not Stuff PR8521
B S 2 1V_VGA_S0_PG B
Do Not Stuff
Need to fine tune. DY 1

2
PQ8501 Do Not Stuff

4
Do Not Stuff

1
PWR_VGA_NVVDD_OR#
Do Not Stuff

S2
PQ8504 6 1

D1

G2
D1 S1
2nd = 84.2N702.031 Do Not Stuff PR8526 PR8523 PR8524
GPIO5_GC6_PWR_EN 2 1 GPIO5_GC6_NVVDD_OR 5 2 1V_VGA_EN_OR 2 1 1V_VGA_EN_R
Do Not Stuff DIS Do Not Stuff G2 G1
DIS
2nd = 075.063D8.0A7C DIS DIS 4
DIS 3 PWR_VGA_NVVDD_OR# Do Not Stuff

D2
S1

G1
D2
1D8V_AON_S0 S2

2
3D3V_AUX_S5 1 Do Not Stuff

3
2 1 DGPU_PWR_EN#_R 3D3V_1D8V_AON_S0 Do Not Stuff 3D3V_1D8V_VGA_S0
DIS 1D35V_VGA_S0_DISCHG
PR8528
Do Not Stuff
Need to fine tune. 2nd = 075.063D8.0A7C
Do Not Stuff
6

1D35V_VGA_EN
Note:ZZ.27002.F7C01 86 PWR_1D35V_EN
Q8507 PR8530

2
Do Not Stuff DIS Do Not Stuff
R8507
Do Not Stuff DIS Discharge schematic change (solution different) DIS Do Not Stuff
1

2nd = 075.27002.0E7C 2010915 Alden chiang modify PQ8505

1
PWR_VGA_NVVDD_OR# G
1D8V_AON_S0_DISCHG PR8527
D PWR_VGA_NVVDD_OR 1 2 PWR_VGA_CORE_EN
SB 0404
DGPU_PWR_EN_Q
DIS Do Not Stuff
S
DIS

2
Do Not Stuff
PC8522
PQ8508 Do Not Stuff DY
1D8V_VGA_S0

1
6,85 DGPU_PWR_EN#
G Do Not Stuff
3D3V_1D8V_VGA_S0 D PWR_VGA_CORE_EN 2nd = 84.2N702.031
Need to fine tune.
S
DIS
1

PR8529 Do Not Stuff

PQ8506 Do Not Stuff Do Not Stuff


1D8V_VGA_EN_OR# G DIS 0504_SB For power down sequence
2

D 1D8V_VGA_S0_DISCHG
DIS 3D3V_S0
S

Do Not Stuff
DIS

1
Do Not Stuff
R8506
2nd = 84.2N702.031 Q8501
Do Not Stuff
1 PR8501 2 DGPU_PWR_EN_G G
6,85 DGPU_PWR_EN# Do Not Stuff

2
D DGPU_PWR_EN
DGPU_PWR_EN 87

1
S
C8501

1
SC1U6D3V1MX-GP

2
A Do Not Stuff C8502 A
Do Not Stuff DY Do Not Stuff

2
DIS

UMA

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
SB 0404
Title

GPU_VGA_CORE_RT8812A
Size Document Number Rev
A1 SA
FAROE 14" Pavilion
Date: Monday, August 06, 2018 Sheet 85 of 106
5 4 3 2 1
5 4 3 2 1

SSID = PWR.Plane.Regulator_1p35v
PW R_1D35V 1D35V_VGA_S0
PG8602
Do Not Stuff
19V_DCBATOUT PW R_DCBATOUT_1D35V 1 2
PG8601
Do Not Stuff IC PG8603
1 2 AOZ2262(10A) AOZ2261(8A) AOZ2260(6A) Do Not Stuff
D
COM 1 2 D
PG8604 68.1R01A.20B 68.1R01A.20B 68.1R01A.20B
Do Not Stuff PG8605
1 2 Chock IDC : 10A IDC : 10A IDC : 10A Do Not Stuff
1 2
PG8606 22uF/6.3V * 5pcs 22uF/6.3V * 4pcs 22uF/6.3V * 4pcs
Do Not Stuff PG8608
1 2 Output CAP DY*1 DY*1 DY*1 Do Not Stuff
1 2

PG8609
3D3V_S5 Do Not Stuff

AOZ2260 for 1D35V 1 2


1

PG8610
PR8621
Do Not Stuff
DIS 0322a_SA Change 5V_S5
Cyntec. 6.5mm x 6.9mm x 3.0mm
TDC : 5.6A Do Not Stuff
1 2

ICCMAX=6.9A
5V_S5
DCR: 9m~10mOhm
2

Idc : 11 A , Isat : 22A


PW R_1D35V_PG Confirm with power team
0417_SB Stuff
20170822
1

PC8603 PU8601 PW R_1D35V


Do Not Stuff DIS 24 DIS PL8601
21 LX#24 18 PW R_1D35V_PH 1 2
2

VCC LX#18 17 Do Not Stuff


LX#17

1
PW R_DCBATOUT_1D35V 16 PC8602
LX#16 Do Not Stuff

Do Not Stuff
23 11 DIS
V+ LX#11

1
C 7 10 DY EC8601 PC8616 PC8605 PC8606 PC8607 PC8610 C

2
V+ LX#10

Do Not Stuff

Do Not Stuff

Do Not Stuff

Do Not Stuff

Do Not Stuff

Do Not Stuff
8 0316_SA Change P/N by Eva
V+ DIS DIS DIS DIS DY
1

PC8601 PC8611 PC8612 9 20 PW R_1D35V_BOOT PG8607

2
V+ BST
Do Not Stuff

Do Not Stuff

Do Not Stuff

DIS DY DIS PR8619 Do Not Stuff


Do Not Stuff 5 PW R_1D35V_FB
2

1
1 2 PW R_1D35V_TON 6 FB
DIS TON DIS
SA_20180731 PW R_1D35V_PG 1 4
Change by power PGOOD AGND PW R_1D35V_FB_A
PW R_1D35V_EN 2 19
EN PGND 14
PW R_1D35V_PFM 3 PGND 13 0417_SB change to 0603 size
PFM# PGND 12
PGND DY

1
PW R_1D35V_SS 22 15
SS PGND PC8613
1

Do Not Stuff
PR8603 DISR1

2
1

PC8614 PR8620 Do Not Stuff Do Not Stuff


1
Do Not Stuff

Do Not Stuff PC8615


DIS DIS Do Not Stuff

2
DISDo Not Stuff
2

SA_20180731
Change by power

1
PR8608 DISR2
Do Not Stuff
Vo=0.8x(1+R1/R2)
=0.8x(1+6.98/10)

2
=1.35
B B

OFFPAGE
PR8605
Do Not Stuff
1 2 PW R_1D35V_PG
85,87 1D35V_PGOOD

D8601

6,79 GC6_FB_EN_PCH 1 PR8606


Do Not Stuff
3 D8601_3 1 2 PW R_1D35V_EN
DIS PW R_1D35V_EN 85

85,87 1V_VGA_S0_PG 2

Do Not Stuff
0309_SA Venodr check
0317_SA change 1V_VGA_S0_PG Do Not Stuff
2nd = 75.00054.A7D
A UMA A

Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

GPU_VGA POWER_AOZ2260
Size Document Number Rev
A3 SA
FAROE 14" Pavilion
Date: Monday, August 06, 2018 Sheet 86 of 106
5 4 3 2 1
5 4 3 2 1

Main Func = dGPU


G5516 for 1.8V_AON_S0

79,85 GPIO5_GC6_PWR_EN [DG-07158-001 Rev03]Power up sequence:


1 PR8703 2 3.3V ==> NVVDD (VGA_CORE) ==> PEX_VDD (1.05V) ==> FBVDD/Q (1.35V)
3D3V_S0
Do Not Stuff

85 PWR_VGA_NVVDD_PG DIS_N16S 3D3V_S0 to 3V3_AON_S0 and 3D3V_VGA_S0 3D3V_VGA_S0: 3A @ 3.3V


1 PR8702 2
1D8V_S0
Do Not Stuff 3D3V_1D8V_S0 U8703 DIS 3D3V_VGA_S0 預預預預預預
DIS_N17S R8702

1
4 12 VGA_CT_1 C8708 1 2 3D3V_S5
GC6 2.0 only
C8701
5V_S0 VBIAS CT1 10 AON_CT_2 1 2 1
DIS 2
D SC1U6D3V1MX-GP CT2 D
DIS C8705Do Not Stuff Do Not Stuff

1
1 13 3D3V_1D8V_VGA_S0 Do Not Stuff
R8701 2 IN1#1 OUT1#13 14 R8703
1D8V_VGA_EN 1 2 1D8V_VGA_EN_R 6 IN1#2 OUT1#14 8 Q8701
85 DGPU_PWR_EN Do Not Stuff
7 IN2#6 OUT2#8 9 DGPU_PWR_EN G
Do Not Stuff IN2#7 OUT2#9 3D3V_1D8V_AON_S0 DY
DIS

2
D DGPU_PWR_EN_Q
DIS
3V3_AON_S0 DY

1
3 11
C8702 5 EN1 GND S
SC1U6D3V1MX-GP EN2 15
85 1V_VGA_EN_R

2
THERMAL_PAD

1
C8704 Do Not Stuff
SC1U6D3V1MX-GP Do Not Stuff Do Not Stuff

2
Do Not Stuff 2nd = 084.27002.0N31
85,86 1V_VGA_S0_PG
SB 0404 3D3V_1D8V_VGA_S0 3D3V_1D8V_AON_S0
R8708
2nd = 074.22976.0091
DGPU_PWR_EN_Q 1 2 DGPU_PWR_EN_R 3rd = 074.08910.0093

1
85 1D8V_VGA_EN_OR# C8706 C8707
Do Not Stuff

Do Not Stuff

Do Not Stuff
1
DIS DIS DIS

2
C8703
SC1U6D3V1MX-GP

2
85 DGPU_PWR_EN_Q
05/02 SC for common part

3D3V_S0
3D3V_S0

1D8V_AON_S0 to 1D8V_VGA_S0
1

PR8721 1
PR8718
Do Not Stuff
DIS DIS Do Not Stuff
1V_1D8V_VGA_S0
PR8701
2

1D0V_VGA_S0
1D8V_VGA_EN_OR# 6 D1 S1 1
PWR_1D35V_PGOOD R8711
1 2 R8704 DIS_N16S
85,86 1D35V_PGOOD GPIO5_GC6_PWR_EN 5 2 PWR_VGA_NVVDD_PG_OR 1 2 PWR_VGA_NVVDD_PG 1 2
PR8709 G2 G1 DIS
Do Not Stuff
4
DIS D2 3 1D8V_VGA_EN_OR# 3D3V_1D8V_VGA_S0 Do Not Stuff
S2
Do Not Stuff

1
2018.07.05 PWR C8709
1
R8705 DIS_N17S
2
Do Not Stuff
DYDo Not Stuff

2
Do Not Stuff
Do Not Stuff
2nd = 075.063D8.0A7C 3D3V_1D8V_AON_S0
3V3_AON_1D8V_VGA_S0

1
R8710
C Do Not Stuff 3D3V_1D8V_AON_S0 C
PQ8703 DIS 1
R8706 DIS_N16S
2
1D8V_VGA_EN_OR# G

2
R8709 Do Not Stuff
D 1D8V_VGA_EN_OR 1 2 1D8V_VGA_EN 3D3V_1D8V_VGA_S0
DIS DIS 1
R8707
2
DIS_N17S
S
Do Not Stuff Do Not Stuff

Do Not Stuff
Do Not Stuff
2nd = 84.2N702.031

PWR_1V_PVDD 3D3V_S0
PG8706
2 1
RT5797 for 1V_VGA_S0

1
PC8702 PC8701 Do Not Stuff
DY

Do Not Stuff

Do Not Stuff
DIS PC8703 PG8708
SC1U6D3V1MX-GP
2 1

2
Do Not Stuff
3D3V_S0
For tuning VGA_CORE sequence.

SB 0404
PR8722
3D3V_S0 1D0V_VGA_S0
2

DGPU_PWR_EN_Q 1 2 U8701 PU8702


PR8720
DIS DGPU_PWR_1V 1 PWR_1V 1D0V_VGA_S0
Do Not Stuff B PWR_1V_FB
PQ8701 DIS Do Not Stuff 5 1 8
GPIO5_GC6_PWR_EN GC6_PWR_EN VCC PWR_VGA_S0_PG FB SGND 1V_VGA_EN_R PL8702
S Do Not Stuff 2 2 7 PG8707
A
DIS 4 GPIO5_GC6_PWR_1V 3 PG EN 6 PWR_1V_PHASE 1 DIS 2 1 2 Imax=200mA
1

D GPIO5_GC6_PWR_B 1 2 3 Y 4 VIN LX 5
DIS GND 3D3V_S0 PGND NC#5 Do Not Stuff Do Not Stuff
DIS

1
G PR8712 Do Not Stuff DIS 9 PG8709
3D3V_1D8V_AON_S0 PGND R1

1
Do Not Stuff Do Not Stuff R8712 U8702 PR8708 1 2
Do Not Stuff 1 2 GPIO5_GC6_PWR_1V_A 1 Do Not Stuff
DIS PC8712
2nd = 084.00138.0C31 DIS B Vo=0.6x(1+R1/R2)

Do Not Stuff
73.01G08.DHG 5 Do Not Stuff DIS Do Not Stuff
Do Not Stuff =0.6x(1+34.8/51)

2
2 VCC PR8715
73.7SZ08.DAH Do Not Stuff =1.009

2
A 4 1V_VGA_EN_Y
1 2 1V_VGA_EN_R
3
DIS Y DIS
GND

1
3D3V_S0 PWR_1V_FB PC8713 PC8711
PWR_VGA_NVVDD_PG 1 2 1V_VGA_EN_B Do Not Stuff
Do Not Stuff Close Pin1
DIS DIS DIS

Do Not Stuff

Do Not Stuff
1
Do Not Stuff
R2

2
1
PR8714 73.7SZ08.DAH PC8715 PR8716
DIS

1
Do Not Stuff 73.01G08.DHG DY Do Not Stuff Do Not Stuff
PR8710 DIS

2
Do Not Stuff

2
PWR_VGA_S0_PG 1 2 1V_VGA_S0_PG

2
PR8717
Do Not Stuff
B 2018.07.05 PWR 05/02 SC B

A A

UMA

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

GPU_DISCRETE VGA POWER


Size Document Number Rev
A1 SA
FAROE 14" Pavilion
Date: Monday, August 06, 2018 Sheet 87 of 106
5 4 3 2 1
5 4 3 2 1

EMI RF
C8924 1 2 SC470P50V2KX-L-GP ED8901 Close to PU4406 Close to MSATA1
24,65 KROW1
C8925 1 2 SC470P50V2KX-L-GP 3D3V_MSATA
1 2
24,65 KROW7 FC8969 1 2 Do Not Stuff
C8926 1 2 SC470P50V2KX-L-GP 1
19V_AD_JK FC8901 1 DY2 Do Not Stuff 2018.3.8
24,65 KROW6 5,12,13 DDR_DRAMRST# FC8968 Do Not Stuff
C8927 1 2 SC470P50V2KX-L-GP Renaming
24,65 KCOL9
C8928 1 2 SC470P50V2KX-L-GP 3
DY
24,65 KROW4
C8929 1 2 SC470P50V2KX-L-GP place distribute on the power plane Close to U4001 DY
24,65 KROW5
C8930 1 2 SC470P50V2KX-L-GP 2
24,65 KCOL0
C8931 1 2 SC470P50V2KX-L-GP 19V_DCBATOUT FC8902 1
DY22 Do Not Stuff 3D3V_DSW FC8970 1 DY22 Do Not Stuff
24,65 KROW2
C8932 1 2 SC470P50V2KX-L-GP FC8903 1
DY2 Do Not Stuff 5V_S5 FC8971 1 DY2 Do Not Stuff
24,65 KROW3
C8933 1 2 SC470P50V2KX-L-GP AZ5125-02S-R7G-GP FC8904 1
DY2 Do Not Stuff 3D3V_S0 FC8972 1 DY2 Do Not Stuff
24,65 KCOL5
C8934 1 2 SC470P50V2KX-L-GP 75.05125.07D FC8905 1
DY2 Do Not Stuff 5V_S0 FC8973 1 DY Do Not Stuff
24,65 KCOL1
C8935 1 2 SC470P50V2KX-L-GP FC8906 1
DY Do Not Stuff
24,65 KROW0
C8936 1 2 SC470P50V2KX-L-GP ED8902 FC8907 1
DY22 Do Not Stuff
24,65 KCOL2
C8937 1 2 SC470P50V2KX-L-GP EC8920 1
DY2 Do Not Stuff Close to U4003
24,65 KCOL4
C8938 1 2 SC470P50V2KX-L-GP 1 EC8921 1
DY Do Not Stuff
24,65 KCOL7 20,24 SYS_PWROK
D C8939 1 2 SC470P50V2KX-L-GP 3D3V_DSW FC8974 1 DY22 Do Not Stuff D
24,65 KCOL8
C8940 1 2 SC470P50V2KX-L-GP DY 3
3D3V_S5 FC8975 1 DY Do Not Stuff
24,65 KCOL6
C8941 1 2 SC470P50V2KX-L-GP Close to PR4417
24,65 KCOL3
C8942 1 2 SC470P50V2KX-L-GP 2
24,65 KCOL12 20,24,40,61,63,68,76,91 PLT_RST#
C8943 1 2 SC470P50V2KX-L-GP BT+ FC8910 1 DY2 Do Not Stuff Close to U4004
24,65 KCOL13
C8944 1 2 SC470P50V2KX-L-GP
24,65 KCOL14
C8945 1 2 SC470P50V2KX-L-GP Do Not Stuff 1D0V_S5 FC8976 1 DY22 Do Not Stuff
24,65 KCOL11
C8946 1 2 SC470P50V2KX-L-GP Do Not Stuff Close to PU4501 1V_S3 FC8977 1 DY Do Not Stuff
24,65 KCOL10
C8947 1 2 SC470P50V2KX-L-GP
24,65 KCOL15
C8948 1 2 SC470P50V2KX-L-GP ED8903
24,65 KCOL16
C8949 1 2 SC470P50V2KX-L-GP 19V_DCBATOUT FC8911 1 DY22 Do Not Stuff Close to U4005
24,65 KCOL17 1
PWR_3D3V FC8912 1 DY2 Do Not Stuff
20 XDP_DBRESET#
3D3V_AUX_S5 FC8913 1 DY Do Not Stuff 1V_VCCIO FC8978 1 DY2 Do Not Stuff
3
DY
Close to U2402 2 Close to PU4502
20,24 RSMRST#_KBC
EC8901 1 DY2 Do Not Stuff
18,24,89 LPC_CLK_KBC
19V_DCBATOUT FC8914 1 DY22 Do Not Stuff
Do Not Stuff PWR_5V FC8915 1 DY2 Do Not Stuff Close to RN1704
Do Not Stuff 5V_AUX_S5 FC8916 1 DY Do Not Stuff FC8979 1 DY2 Do Not Stuff
17,27 HDA_SDOUT_CODEC
Close to DBG1
EC8902 1 DY2 Do Not Stuff ED8904
18,68,89 LPC_CLK_DBG
Close to CPU1
1 Close to RN1705
20 H_CPUPWRGD 1 2 Do Not Stuff
1V_CPU_CORE FC8917 FC8980 1 DY2 Do Not Stuff
3 1 2 Do Not Stuff 17,27 HDA_BITCLK_CODEC
DY FC8918
1
2
FC8919
FC8920 1
DY22 Do Not Stuff
Do Not Stuff
20 H_VCCST_PWRGD
FC8921 1
DY2 Do Not Stuff Close to RN1804
1 DY2 FC8981 1
Do Not Stuff
FC8922
FC8923 1 DY2 Do Not Stuff
Do Not Stuff
18,24,89 LPC_CLK_KBC
FC8982 1
DY22 Do Not Stuff
Do Not Stuff
FC8924 1 DY2 Do Not Stuff
18,68,89 LPC_CLK_DBG DY
Do Not Stuff DY
ED8905
DY
Close to CPU1
DY Close to DM1
1
20,40 PCH_PWROK
1V_VCCGT FC8925 1 2 Do Not Stuff
1D2V_S3 FC8983 1 DY22 Do Not Stuff
Close to CCD1 3 FC8926 1 2 Do Not Stuff FC8984 1 Do Not Stuff
EC8911 1 2 SC22P50V2JN-L-GP
DY 2018.3.2 FC8985 1
DY2 Do Not Stuff
27,55 DMIC_SDA_CODEC DY DY2
EC8912 1 2 SC22P50V2JN-L-GP 2 Added FC8986 1
DY Do Not Stuff
27,55 DMIC_SCL_CODEC 20,24,45 PCH_DPWROK DY 1
2018.2.23 STD naming
Close to CPU1 FC8987
FC8988 1
DY22 Do Not Stuff
Do Not Stuff
C
Do Not Stuff FC8927 1 2 Do Not Stuff FC8989 1
DY2 Do Not Stuff
C
1V_VCCSA
FC8928 1 2 Do Not Stuff FC8990 1
DY2 Do Not Stuff
Do Not Stuff DY
DY
Close to PU4801 Close to PU5201 DY Close to DM2
PWR_DCBATOUT_VCCGTA EC8913 1 DY2 Do Not Stuff
EC8914 1 DY2 Do Not Stuff PWR_1D0V FC8929 1 DY22 Do Not Stuff 3D3V_S0 FC8991 1
DY22 Do Not Stuff
FC8930 1 DY Do Not Stuff FC8992 1
DY2 Do Not Stuff
2018.3.2 FC8993 1 Do Not Stuff
Added FC8994 1
DY2 Do Not Stuff
1
DY2
Close to PU5301 FC8995 DY2 Do Not Stuff
FC8996 1 DY2 Do Not Stuff
1D8V_S5 FC8931 1 DY22 Do Not Stuff FC8997 1
DY2 Do Not Stuff
FC8932 1 DY Do Not Stuff FC8998 1
DY Do Not Stuff

Close to PU5101

PWR_VDDQ FC8933 1 DY22 Do Not Stuff


PWR_DCBATOUT_VDDQ FC8934 1 DY2 Do Not Stuff
0D6V_VREF_S0 FC8935 1 DY2 Do Not Stuff
FC8936 1 DY Do Not Stuff

Close to GPU1
Close to TC4401
19V_DCBATOUT EC8917 1 2 SCD1U25V2KX-L-GP
1V_VGA_CORE FC8937 1 2 Do Not Stuff
2018.4.9 FC8938 1 2 Do Not Stuff
Added
DY
Close to LCD1
DY
1
Close to PR4402
EC8918 1
19V_DCBATOUT_LCD FC8939 DY22 Do Not Stuff

2018.4.13
19V_DCBATOUT DY2 Do Not Stuff 3D3V_LCDVDD FC8940
FC8941
1
1
DY2 Do Not Stuff
Do Not Stuff
Added
5V_TOUCH
1
DY2
3D3V_SENSORHUB_S5 FC8942 DY Do Not Stuff

Close to CAM1
Close to PU4408 0.1uF->6pF & stuff
B
AD+_TO_SYS EC8919 1 DY2 Do Not Stuff 3D3V_CAMERA_S0 FC8943 1 2 Do Not Stuff B
2018.4.13
Added
DY
Close to WLAN1
0.1uF->6pF & stuff
3D3V_IOAC FC8945 1 2 Do Not Stuff

Close to HDMI1
DY

5V_HDMI FC8946 1 DY2 Do Not Stuff

Close to U3501

5V_S5 FC8947 1 DY2 Do Not Stuff

Close to USB2

5V_S5 FC8948 1 DY2 Do Not Stuff

Close to USB3

5V_USB30_C_CON FC8949 1 DY2 Do Not Stuff

Close to DM1
1 2
1D2V_S3 FC8957 1 2 Do Not Stuff
FC8956 1 Do Not Stuff
FC8955 1
DY22 Do Not Stuff
FC8954 1
DY2 Do Not Stuff
FC8953 1
DY2 Do Not Stuff
FC8952 1
DY2 Do Not Stuff
FC8951 1 DY2 Do Not Stuff
FC8950 DY Do Not Stuff
DY
A
Close to DM2 DY A

1 2
3D3V_S0 FC8965 Do Not Stuff
1 2
FC8964 1 Do Not Stuff
FC8963 1
DY22 Do Not Stuff
FC8962 1 DY2 Do Not Stuff UMA
FC8961 1 DY2 Do Not Stuff
FC8960 1 DY2 Do Not Stuff
DY2
FC8959
FC8958
1
DY
Do Not Stuff
Do Not Stuff
Wistron Corporation
DY 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Close to HDD1
DY Taipei Hsien 221, Taiwan, R.O.C.

Title
1 2
5V_S0 FC8966 1
FC8967
2 Do Not Stuff
Do Not Stuff
UNUSED PARTS (RF/EMI Cap)
DY Size Document Number Rev
DY A2
SA
FAROE 14" Pavilion
Monday, August 06, 2018
Date: Sheet 89 of 106
5 4 3 2 1
5 4 3 2 1

3D3V_DSW

TPM TPM TPM


2

2
D D
C9101 C9102 C9103
Do Not Stuff

Do Not Stuff

Do Not Stuff
1

1
place close to
pin 8 & 22

3D3V_DSW

R9106 1 2 Do Not Stuff TPM_GPIO


TPM 3D3V_DSW U9101

R9107 1 2 Do Not Stuff SPI_CS_CPU_N2 8 3


TPM 22 VDD NCI#3 4
C
VDD TPM NCI#4 5
C

R9110 1 2 Do Not Stuff TPM_PIRQ# 1 NCI#5 10


TPM 14 NCI#1/VDD NCI#10 11
NCI#14/VDD NCI#11 12
3D3V_DSW 2018.3.5 corrected RN9101 NCI#12 13
3 2 SPI_SI_TPM 21 NCI#13 15
14,18 SPI_SI_ROM_R TPM MOSI NCI#15
4 1 SPI_SO_TPM 24 25
18 SPI_SO_ROM_R MISO NCI#25
1

26
R9108 Do Not Stuff NCI#26 27
DY TPM_GPIO 6 NCI#27 28
Do Not Stuff GPIO NCI#28
TPM_PP 7 31
R9111 1 2 Do Not Stuff TPM_RST# 17 PP NCI#31
20,24,40,61,63,68,76,89 PLT_RST# TPM
2

R9115 1 2 Do Not Stuff TPM_PIRQ#_R 18 RST#


TPM_PP
18 TPM_PIRQ#
R9104 1
DY 2 Do Not Stuff SPI_CLK_TPM 19 PIRQ# 16
2018.3.5 corrected
TPM SPI_CS_CPU_N2_R 20 SCLK NCI#16/GND
CS#
1

18 SPI_CLK_ROM_R 2
R9109 GND 9
R9105 1 TPM 2 29 GND 23
TPM Do Not Stuff 18 SPI_CS_CPU_N2
Do Not Stuff 30 NC#29 GND 32
NC#30 GND 33
B B
2

GND

Do Not Stuff
18,24,68 INT_SERIRQ R9116 1 TPM 2 Do Not Stuff Do Not Stuff
3D3V_DSW
2

R9113
DY Do Not Stuff
Wistron Confidential document, Anyone can not
1

C9104 Duplicate, Modify, Forward or any other purpose


Q9101 Do Not Stuff UMA application without get Wistron permission
TPM_RST# 3 4
DY
1
Note:ZZ.27002.F7C01

A
PLT_RST# 2 DY 5 Q9101_5 1
R9112
DY 2 Wistron Corporation A
1 6 Q9101_6 Do Not Stuff 1 21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
R9114
DY 2 3D3V_S0 Taipei Hsien 221, Taiwan, R.O.C.
Do Not Stuff Do Not Stuff
Title
Do Not Stuff
INT IO (TPM)
Size Document Number Rev
A4
FAROE 14" Pavilion SA
Date: Monday, August 06, 2018 Sheet 91 of 106
5 4 3 2 1
5 4 3 2 1

3D3V_S0 3D3V_FPR

1 2
F9201 69.48001.081 POLYSW-1D1A6V-9-GP-U
D 2nd = 69.50011.081 D
3rd = 069.50007.0001
1109_Allen Add 2nd & 3rd

3D3V_FPR
FP1
1 2 0R2J-L-GP 9
1
ER9201
Do Not Stuff 2
3 4 USB_PN8_FPR 3
15 FP_USB20_N
USB_PP8_FPR 4
15 FP_USB20_P DY
2 1 5
FPR_LOCK# 6
EL9201Do Not Stuff FPR_OFF 7
2nd = 068.24900.2001 0922_Allen Swap EL9201 for layout routing 8
C 10 C
ER9202 1 2 0R2J-L-GP
ETY-CON8-24-GP
6 FPR_LOCK# 20.K0786.008
20 FPR_OFF
1122_Allen Change to Hign active 1

R9201
10KR2J-L-GP
3D3V_FPR 1 AFTP9201 Do Not Stuff
2

1 AFTP9202 Do Not Stuff


USB_PN8_FPR 1 AFTP9203 Do Not Stuff
USB_PP8_FPR 1 AFTP9204 Do Not Stuff
FPR_LOCK# 1 AFTP9205 Do Not Stuff
2018.7.19 Change net name FPR_OFF 1 AFTP9206 Do Not Stuff

B B
ED9201
AFTP place close to FPR1
USB_PP8_FPR 1 6 USB_PN8_FPR
I/O1 I/O4
2 5 3D3V_FPR
GND VDD
FPR_LOCK# 3 4 FPR_OFF
I/O2 I/O3
DY
Do Not Stuff
Do Not Stuff
2nd = 75.00199.07C
3rd = 075.01256.007C
1024_Allen Add 2nd

UMA

A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
INT IO (Finger Print)
Size Document Number Rev
A4
FAROE 14" Pavilion SA
Date: Monday, August 06, 2018 Sheet 92 of 106
5 4 3 2 1
5 4 3 2 1

PCH Strap Pin 2018.1.11


Update! CPU Strap Pin
GPP_F6 / GPP_D12 / ISH_SPI_MO
D GPIO GPP_C5/SML0ALERT# SPI0_MOSI GPP_E6 GPP_B23 SPI0_IO2 CNV_BRI_DT CNV_RGI_DT SI / GSPI2_MOSI D

CFG3
23,99 CFG3 PHYSICAL_DEBUG_ENABLED (DFX PRIVACY)
=20K PD= =20K PU= =NO INTERNAL= 2018.6.25
=20K PD= =Internal PU= =20K PD= =Internal PU= =Internal PU=

1
3D3V_S5 3D3V_DSW 3D3V_DSW 3D3V_DSW 1D8V_S5 3D3V_S5
eSPI Disable 2018.3.7 BOOT HALT Reserved Intel DCI-OOB CONSENT STRAP XTAL M.2 CNV Reserved R1420 0 : ENABLED
S5->DSW Disable CRB 20k Frequency MODE Select Do Not Stuff CFG[3] SET DFX ENABLED BIT IN DEBUG INTERFACE MSR
Selection DY
1

1
1
Add For DCI enable
R1401 R1416 R1408 2018.2.6 1 : DISABLED

2
R1403 2018.3.1 R1405 2018.3.1 100k->20k R1424 2018.3.1
DYDo Not Stuff 100KR2F-L2-GP 1k->100k & Stuff
Do Not Stuff 100KR2F-L2-GP ->Stuff
20KR2J-L3-GP
100KR2F-L2-GP Added
DY
Reserved (ICL) Reserved (ICL)
2

2
2
CFG4
Schematic GPP_C5 18 SPI_SI_ROM_R 18,91 GPP_B23 18 SPI_WP_ROM_R 18 CNV_RGI_DT 6,61 GPP_D12 6 23 CFG4
1

1
DISPLAY PORT PRESENCE STRAP
R1404 2018.3.1 R1425 R1421
R1402 DY R1417 R1406
100k->4.7k
R1409
1KR2J-1-GP
DYDo Not Stuff Do Not Stuff DYDo Not Stuff DYDo Not Stuff DYDo Not Stuff Do Not Stuff DY CFG[4]
0 : ENABLED
An external Display Port device is connected to the Embedded Display Port.
2

2
1 : DISABLED (Default)
Reserved No Physical Display Port attached to Embedded DisplayPort*. No connect for disable.

This strap should sample HIGH This strap should sample HIGH XTAL Frequency An external pull-up or pull-down This strap should sample HIGH
0 = LPC Is selected for EC. External pull-up is required. This strap should sample HIGH. Intel DCI-OOB External pull-up is required. is required. External pull-up is required.
Description 1 = eSPI Is selected for EC. Recommend 100K if pulled up to Recommend 100K if pulled up to Selection Recommend 100K if pulled up to
3.3V or 75K if pulled up to 1.8V. 3.3V or 75K if pulled up to 1.8V. 3.3V or 75K if pulled up to 1.8V.
e
S
P
I

D
i
s
a
b
l
e

3
.
3
V
I
N
T
E
G
R
A
T
E
D
C
N
V
I
D
I
S
A
B
L
E
High =default= Reserved Enable IntelR DCI-OOB DISABLED =default= 24M
L
P
C

E
n
a
b
l
e

1
.
8
V
I
N
T
E
G
R
A
T
E
D
C
N
V
I
E
N
A
B
L
E
=default= Reserved Disable IntelR DCI-OOB=default= ENABLED 38.4 MHz =default=
Low

GPIO GPP_B18/GSPI0_MOSI HDA_SDO / I2S0_TXD TBT LSX #0 TBT LSX #1 TBT LSX #2 GPD7 SPI0_IO3 GPP_C2
3D3V_S0
2018.6.1 =20K PD= =20K PD= =20K PD= =20K PD= =20K PD= =PD/U?= 3D3V_DSW = Internal PU= 3D3V_S5 =20K PD=
3.3A->3.3S(CRB)
REBOOT Enable Flash VCC configu-ration VCC configu-ration VCC configu-ration XTAL INPUT MODE A0 PERSONALITY TLS Confi-dentiality
CRB 20k
Descriptor (HVM ONLY) STRAP
1

1
R1410
1D8V_S5 Security
R1415
2018.6.1
DYDo Not Stuff Override 3D3V_DSW R1413 2018.3.1
DYDo Not Stuff 2018.1.10
1k->4.7k(CRB) 2018.1.10 100KR2F-L2-GP ->Stuff ->DY
1

C Added C
2

2
1
R1412 SPI_HOLD_ROM 18,25 WIFI_RF_EN 18,61
Schematic GSPI0_MOSI 6 DYDo Not Stuff Reserved (ICL) Reserved (ICL) Reserved (ICL)

1
DY R1422 2018.2.6
1

Do Not Stuff R1414 GPP_C2 ->WIFI_RF_EN


2

R1411 2018.3.1 2018.2.6


DY DYDo Not Stuff

2
Do Not Stuff 100k->4.7k Delete R1416
HDA_SDOUT_CPU 17 GPD7 19

2
2

Reserved Reserved

0 = Disable “No Reboot” mode.


Flash Descriptor DDP1 I2C /TBT LSX #0 / BSSB-LS DDP2 I2C/TBT LSX #1/ DDP3 I2C/TBT LSX #2/BSSB-LS
This strap should sample HIGH
External pull-up is required.
This strap should sample HIGH
External pull-up is required.
Intel ME Crypto Transport Layer
Security (TLS) cipher suite (no
Description 1 = Enable “No Reboot” mode Security Override #0 pins VCC configuration BSSB-LS #1 pins VCC configuration
#2 pins VCC configuration Recommend 100K. Recommend 100K if pulled up to confidentiality). (Default)
3.3V or 75K if pulled up to 1.8V.
N
o
R
e
b
o
o
t

D
i
s
a
b
l
e

3
.
3
V

3
.
3
V

3
.
3
V
Enable Intel ME Crypto Transport Layer Security
XTAL IS ATTACHED DISABLED =default= Enable (TLS) cipher suite (with confidentiality). Must be
High pulled up to support Intel AMT with TLS.
R
e
b
o
o
t

E
n
a
b
l
e

1
.
8
V

1
.
8
V

1
.
8
V
=default= =default= Disable =default= Disable Intel ME Crypto Transport Layer Security
Low XTAL INPUT IS SINGLE ENDED Enable (TLS) cipher suite (no confidentiality). (Default)

GPIO GPP_H2 ITP_PMODE GPP_H21 GPP_H23


=20K PD= =Internal PU= =Internal PD= =Internal PD=
eSPI Flash DFXTESTMODE XTAL_FREQ_SELECT eSPI Flash Sharing Mode
Sharing
Mode
3D3V_S5

2018.1.10
1

Added(follow CRB)
Reserved (ICL) Reserved Reserved
Schematic Add TP on p99
R1423
4K7R2J-L-GP
2

GPP_H21 19

B B

An external pull-up is required on This strap must be configured to


Description eSPI Flash Sharing Mode Reserved this strap since 38.4 MHz XTAL is
not supported on the PCH.
‘0’(SAFS is disabled) if the eSPI
or LPC strap is configured to ‘0’
(eSPI is disabled)

1 = Slave Attached Flash Sharing (SAFS) is enabled. DFXTESTMODE DISABLED =default= 24MHZ SAF ENABLE
High

Low 0 = Master Attached Flash Sharing (MAFS) is enabled. MAF ENABLE =default=
(Default) DFXTESTMODE ENABLED 38.4/19.2MHZ =default=

A A

UMA

Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title

CPU (STRAP)
Size Document Number Rev
D
FAROE 14" Pavilion SA
Date: Monday, August 06, 2018 Sheet 14 of 106
5 4 3 2 1
5 4 3 2 1

D D
1 TP9901 Do Not Stuff
22 XDP_PREQ#

22 XDP_PRDY# 1 TP9902 Do Not Stuff

1 TP9903 Do Not Stuff


14,23 CFG3

1 TP9904 Do Not Stuff


23 ITP_PMODE

1 TP9905 Do Not Stuff


22 PROC_TCK
C C

1 TP9906 Do Not Stuff


22 PROC_TDI

1 TP9907 Do Not Stuff


22 PROC_TMS

1 TP9908 Do Not Stuff


22 PROC_TRST#

1 TP9909 Do Not Stuff


22 PCH_JTAG_TDO

22 PCH_JTAG_TCK 1 TP9910 Do Not Stuff

B B

UMA

A
Wistron Corporation A
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
Debug (HDT debug)
Size Document Number Rev
A4
FAROE 14" Pavilion SA
Date: Monday, August 06, 2018 Sheet 99 of 106
5 4 3 2 1
5 4 3 2 1

Main Func = CPU


2018.1.17 update
U-Quad Core GT2 (15W) 2018.1.12 updated
Imax = 70A #575412 PDG rev.0.7
1V_CPU_CORE 22uF PCS Cap
VCORE Suggestion 35 330uF*2
1V_CPU_CORE

MLCC on CPU side 16

2018.4.17 Added
PC1001 PC1002 PC1003 PC1004 PC1005 PC1006 PC1007 PC1008 PC1009 PC1010 PC1031 PC1032 PC1033
1

1
Do Not Stuff

SC22U6D3V3MX-L1-GP

SC22U6D3V3MX-L1-GP

SC22U6D3V3MX-L1-GP

SC22U6D3V3MX-L1-GP

SC22U6D3V3MX-L1-GP

Do Not Stuff

SC22U6D3V3MX-L1-GP

SC22U6D3V3MX-L1-GP

SC22U6D3V3MX-L1-GP

Do Not Stuff

SC22U6D3V3MX-L1-GP

SC22U6D3V3MX-L1-GP
DY DY DY
2

2
D D

PC1011 PC1012 PC1013 PC1014 PC1015 PC1016 PC1017 PC1018 PC1019 PC1020
1

1
SC22U6D3V3MX-L1-GP

SC22U6D3V3MX-L1-GP

SC22U6D3V3MX-L1-GP

SC22U6D3V3MX-L1-GP

SC22U6D3V3MX-L1-GP

SC22U6D3V3MX-L1-GP

SC22U6D3V3MX-L1-GP

SC22U6D3V3MX-L1-GP

SC22U6D3V3MX-L1-GP

SC22U6D3V3MX-L1-GP
2

2
PC1021 PC1022 PC1023 PC1024 PC1025 PC1026 PC1027 PC1028 PC1029
1

1
SC22U6D3V3MX-L1-GP

SC22U6D3V3MX-L1-GP

SC22U6D3V3MX-L1-GP

SC22U6D3V3MX-L1-GP

SC22U6D3V3MX-L1-GP

SC22U6D3V3MX-L1-GP

SC22U6D3V3MX-L1-GP
2018.1.17 Added
SC22U6D3V3MX-L1-GP

SC22U6D3V3MX-L1-GP
2

2018.1.12 update

1V_CPU_CORE
C C

2018.05.12
Delete 1V_VCCGT_C

PC1038 PC1039 PC1040 PC1035 PC1036 PC1037


1

1
SC22U6D3V3MX-L1-GP

SC22U6D3V3MX-L1-GP

SC22U6D3V3MX-L1-GP

SC22U6D3V3MX-L1-GP

SC22U6D3V3MX-L1-GP

SC22U6D3V3MX-L1-GP
2

2018.2.1 2018.1.17 update


Renaming part reference of decoupling CAPs: U-Quad Core GT2 (15W)
VCCGT, VCCSA IccMax = 32 A
22uF PCS
1V_VCCGT
VCCGT Suggestion 13 Cap
MLCC on CPU side 10 330uF*1

PC1041 PC1042 PC1043 PC1044 PC1045 PC1046 PC1047 PC1048 PC1049 PC1050
1

1
SC22U6D3V3MX-L1-GP

SC22U6D3V3MX-L1-GP

SC22U6D3V3MX-L1-GP

SC22U6D3V3MX-L1-GP

SC22U6D3V3MX-L1-GP

SC22U6D3V3MX-L1-GP

SC22U6D3V3MX-L1-GP

SC22U6D3V3MX-L1-GP

SC22U6D3V3MX-L1-GP

SC22U6D3V3MX-L1-GP
2

B B

PC1051 PC1052 PC1053 PC1054 PC1055 PC1056 PC1057 PC1058 PC1059 PC1060
1

1
SC22U6D3V3MX-L1-GP

SC22U6D3V3MX-L1-GP

Do Not Stuff

SC22U6D3V3MX-L1-GP

SC22U6D3V3MX-L1-GP

SC22U6D3V3MX-L1-GP

SC22U6D3V3MX-L1-GP

SC22U6D3V3MX-L1-GP

SC22U6D3V3MX-L1-GP

SC22U6D3V3MX-L1-GP

DY
2

PC1061 PC1062 PC1063 PC1064 PC1065 PC1066


1

2018.4.17
SC22U6D3V3MX-L1-GP

SC22U6D3V3MX-L1-GP

SC22U6D3V3MX-L1-GP

SC22U6D3V3MX-L1-GP

SC22U6D3V3MX-L1-GP

SC22U6D3V3MX-L1-GP

PC1041,PC1043,PC1048,PC1049,
PC1050,PC1051,PC1053,PC1054,PC1055,PC1056,
2

PC1059,PC1060,PC1064->Stuff

2018.06.04
PC1001,PC1007,PC1031,PC1053,PC1073->DY

2018.1.17 update
U-Quad Core GT2 (15W)
IccMax= 6A
1V_VCCSA 22uF PCS

A
VCCSA Suggestion 8 A

MLCC on CPU side 3

PC1067 PC1068 PC1069 PC1070 PC1071 PC1072 PC1073 PC1074 UMA


1

1
SC22U6D3V3MX-L1-GP

SC22U6D3V3MX-L1-GP

SC22U6D3V3MX-L1-GP

SC22U6D3V3MX-L1-GP

SC22U6D3V3MX-L1-GP

SC22U6D3V3MX-L1-GP

Do Not Stuff

SC22U6D3V3MX-L1-GP

2018.1.17 Added
DY
Wistron Corporation
2

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,


Taipei Hsien 221, Taiwan, R.O.C.

Title
CPU (Power CAP1)
Size Document Number Rev
A2 FAROE 14" Pavilion SA
Date: Monday, August 06, 2018 Sheet 10 of 106
5 4 3 2 1
5 4 3 2 1

Main Func = CPU


VCCIO VDDQ U-Quad Core GT2 (15W)
Imax = 3.3A

1V_VCCIO 1D2V_S3

+VCCIO(ICCMAX.=3.679A)
D D

1
C1135 C1136 C1137 C1138 C1139 C1140 C1141
1

SC10U6D3V3MX-L-GP

SC10U6D3V3MX-L-GP

SC10U6D3V3MX-L-GP

SC10U6D3V3MX-L-GP

SC10U6D3V3MX-L-GP

SC10U6D3V3MX-L-GP
2018.2.1

SC22U6D3V3MX-L1-GP
C1131 C1132 C1133 C1134 Renaming part reference of decoupling CAPs:

2
SC1U6D3V1MX-GP
SC1U6D3V1MX-GP
SC1U6D3V1MX-GP
SC1U6D3V1MX-GP VCCIO, VDDQ, VccST, VccSG, VccPLL_OC, VCCPLL
2

Place as close to the CPU as possible

1
C1142 C1143 C1144 C1145
SC1U6D3V1MX-GP
SC1U6D3V1MX-GP
SC1U6D3V1MX-GP
SC1U6D3V1MX-GP

2
2018.1.12 update

VccST VccSTG VccPLL_OC VCCPLL


IccMax = 0.06A IccMax = 0.02 A IccMax = 0.12 A IccMax = 0.13 A

1V_S3 1V_VCCIO 1D2V_S3 1V_S3

C C1146 C1147 C1148 C

1
SC22U6D3V3MX-L1-GP

SC22U6D3V3MX-L1-GP

SC22U6D3V3MX-L1-GP
2

2
1

1
C1151 2018.2.22 C1153 2018.2.22 C1154 2018.6.6a
SCD1U25V2KX-L-GP

SCD1U25V2KX-L-GP

SC10U6D3V3MX-L-GP
C1149 C1150 ->P/N C1152 ->P/N Added
SC1U6D3V1MX-GP SC1U6D3V1MX-GP SC1U6D3V1MX-GP
2

2
CLOSE CPU BP11,BP2 CLOSE CPU BG1,BG2 CLOSE CPU BL27,BM26 CLOSE CPU BR11,BT11

VCCPRIM_1P05 VCCDPHY_1P24 VCCRTC 1 2 C1118


3D3V_RTC_AUX 1uF*1
1 2 C1125 1uF*1 N/A SC1U6D3V1MX-GP
1D0V_S5
SC1U6D3V1MX-GP
0.1uF*1(DY)
CLOSE CPU BP20 1 2 C1120
DY Do Not Stuff
B
CLOSE CPU BR23 B
VCCPRIM_CORE VCCDPHY_EC_1P24
2018.2.23 ->Name
2018.2.22 ->P/N
DCPRTC
1D0V_S5 1 2 C1108 1uF*1(DY) 1D24V_VCCDPHY 1 2 C1130 4.7uFx1 3D3V_DCPRTC 1 2 C1116 0.1uF*1(DY)
Do Not Stuff SC4D7U6D3V3KX-L-GP DY Do Not Stuff
DY CLOSE CPU BU15 CLOSE CPU CP25 CLOSE CPU BP24

VCCDSW_1P05 VCCPRIM_1P8
1V_DCPDSW 1 2 C1101 1uF*1 1D8V_S5 1 2 C1111 1uF*1
SC1U6D3V1MX-GP SC1U6D3V1MX-GP 1uF*1(DY)
CLOSE CPU BT24
1 2 C1121
Do Not Stuff

VCCPRIM_MPHY_1P05 DY CLOSE CPU CC18

1 2 C1110
VCCPRIM_3P3
1D0V_S5 22uF*1
SC22U6D3V3MX-L1-GP 3D3V_S5 1 2 C1102 1uF*1(DY)
CLOSE CPU BV12 SC1U6D3V1MX-GP 0.1uF*1(DY)
1 2 C1103
SCD1U16V2KX-L-GP
VCCAMPHYPLL_1P05 CLOSE CPU CB16
1 2 C1106 1uF*1
A 1D0V_S5
SC1U6D3V1MX-GP 47uF*1(DY) 3D3V_DSW1 2 C1115
UMA A

CLOSE CPU BV2 3D3V_DSW 1uF*1(DY)


Do Not Stuff
DY CLOSE CPU BR24 Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
VCCA_XTAL_1P05 Taipei Hsien 221, Taiwan, R.O.C.

1D0V_S5 1 2 C1126 1uF*1 VCCHDA Title


SC1U6D3V1MX-GP 47uF*1(DY) N/A CPU (Power CAP2)
CLOSE CPU CP5
Size Document Number Rev
A3 FAROE 14" Pavilion SA
Date: Monday, August 06, 2018 Sheet 11 of 106
5 4 3 2 1
5 4 3 2 1

2018.7.20 Change P/N

H1 H2 H3 H4 H5

Do Not Stuff

Do Not Stuff

Do Not Stuff

Do Not Stuff

Do Not Stuff
1

1
D D

Do Not Stuff Do Not Stuff Do Not Stuff Do Not Stuff Do Not Stuff

2018.2.22 ->P/N 2018.4.3 ->P/N(ZZ.00PAD.5S1->ZZ.00PAD.VK1)


H6 H7 H8 H9 H10 H11 H12 H13
Do Not Stuff

Do Not Stuff Do Not Stuff Do Not Stuff Do Not Stuff Do Not Stuff Do Not Stuff Do Not Stuff
1

1
Do Not Stuff Do Not Stuff Do Not Stuff Do Not Stuff Do Not Stuff Do Not Stuff Do Not Stuff Do Not Stuff
2018.7.20 ADD
HS1 HS2
STF237R113H86-GP STF237R113H86-GP

C C
1

434.07K0E.0001 434.07K0E.0001

CLIP10 CLIP1 CLIP2 CLIP3 CLIP4 CLIP5 CLIP6 CLIP7 CLIP8 CLIP9
SPRING-166-GP SPRING-166-GP SPRING-166-GP SPRING-166-GP SPRING-166-GP SPRING-166-GP SPRING-166-GP SPRING-166-GP SPRING-166-GP SPRING-166-GP
1

1
34.41L50.001 34.41L50.001 34.41L50.001 34.41L50.001 34.41L50.001 34.41L50.001 34.41L50.001 34.41L50.001 34.41L50.001 34.41L50.001
B B

CLIP11 CLIP12
SPRING-166-GP SPRING-166-GP CLIP13 CLIP14 CLIP15 CLIP16
SUL-1315A1M-GP SUL-1315A1M-GP SUL-1315A1M-GP SUL-1315A1M-GP
1

34.41L50.001 34.41L50.001 34.4VL24.001 34.4VL24.001 34.4VL24.001 34.4VL24.001

SPR1 SPR2 SPR3


SPRING-98-GP SPRING-U4-GP SPRING-U4-GP
34.34S02.002 34.40U07.001 34.40U07.001
1

1
RV1 RV2 RV3
1 2 1 2 1 2

A SFI0603-240E2R5PP-LF-GP SFI0603-240E2R5PP-LF-GP SFI0603-240E2R5PP-LF-GP UMA A


83.60324.0A0 SPR1_GND
83.60324.0A0 SPR2_GND
83.60324.0A0 SPR3_GND
2nd = 83.10603.BA0 2nd = 83.10603.BA0 2nd = 83.10603.BA0
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Title
UNUSED PARTS (ME part)
Size Document Number Rev
A3 FAROE 14" Pavilion SA
Date: Monday, August 06, 2018 Sheet 88 of 106
5 4 3 2 1

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