Lecture 26

MOSFET Small Signal Model

Reading: Jaeger 13.7 and Notes

Georgia Tech ECE 3040 - Dr. Alan Doolittle

 MOSFET Small Signal Model and Analysis

•Just as we did with the BJT, we can consider the

MOSFET amplifier analysis in two parts:
•Find the DC operating point
•Then determine the amplifier output parameters for very
small input signals.

Georgia Tech ECE 3040 - Dr. Alan Doolittle

 MOSFET Small Signal Model and Analysis
Linearize
i1 over “small i1
i2 signal i2
+ Non-Linear I-V + range” + Linear +
V1 relationship
(BJT, MOSFET,
V2 V1 Two Port V2
- etc…) - -
Network -

iDS

iGS
vDS
vGS

General “y-parameter” Network MOSFET “y-parameter” Network

I1=y11V1 + y12V2 IGS=y11VGS + y12VDS
I2=y21V1 + y22V2 IDS=y21VGS + y22VDS

Georgia Tech ECE 3040 - Dr. Alan Doolittle

 MOSFET Small Signal Model and Analysis

[ =[ [ [
IGS
IDS
y11 y12
y21 y22
[[ VGS
VDS y ij =
∂I j
∂Vi VGS ,Q , VDS ,Q
IGS=y11VGS + y12VDS
IDS=y21VGS + y22VDS Derivative of current-voltage equation
evaluated at the Quiescent Point

MOSFET Amplifiers are biased into Saturation (or Active Mode)

I DS =
Kn
2
[ ]
(VGS − VTN )2 (1 + λ VDS ) for V DS ≥ VGS − VTN

1.) Input Conductance

∂I GS ∂I GS
I GS = 0 ⇒ = 0 and =0 ⇒ y11 = 0 and y12 = 0
∂VGS ∂VDS
2.) Output Conductance
∂I DS λ Kn
= y 22 = (VGS − VT )2
∂VDS 2
3.) Transconductance
∂I DS
= y 21 = K n (VGS − VT )(1 + λ VDS )
∂VGS
Georgia Tech ECE 3040 - Dr. Alan Doolittle
 MOSFET Small Signal Model and Analysis
Compare with BJT Results

There is a large amount of symmetry between the MOSFET and the BJT

MOSFET BJT
λ Kn I DS Each of these IC
y 22 = g o = (VGS − VT ) 2
= parameters y 22 =
2 1 V A + VCE
+ VDS act in the
λ same manner

I DS IC
y 21 = g m = K n (VGS − VT )(1 + λ V DS ) = y 21 =
 VGS − VTN  VT
 
 2 

Georgia Tech ECE 3040 - Dr. Alan Doolittle

 MOSFET Small Signal Model and Analysis
Putting the mathematical model into a small signal equivalent circuit

Compare this to the BJT small signal equivalent circuit

Georgia Tech ECE 3040 - Dr. Alan Doolittle

 MOSFET Small Signal Model and Analysis
Example: Jaeger 13.94

Calculate the voltage gain, Av=vo/vs

Given: Kn=1 mA/V2 , λ=0.015 V-1
Bias Point of: IDS=2 mA, VDS=7.5V

Georgia Tech ECE 3040 - Dr. Alan Doolittle

 MOSFET Small Signal Model and Analysis
Example: Jaeger 13.94

λ Kn g m = K n (VGS − VT )(1 + λ VDS )

go = (VGS − VT )2
2

Need to find VGS-VT

I DS =
Kn
2
[ ]
(VGS − VTN )2 (1 + λ VDS )

2 mA =
1 mA / V 2
2
[ ]
(VGS − VTN )2 (1 + 0.015 (7.5) )
4
VGS − VTN = = 1.9V
1.11
Georgia Tech
∴ g m = 2.11 mS g o = 27.1 µ S ⇒ ro = 36.9kΩ ECE 3040 - Dr. Alan Doolittle
 MOSFET Small Signal Model and Analysis
Example: Jaeger 13.94

vo vGS vo
Av = =
vs v s vGS
vGS 1Meg vo
= = 0.99 and = − g m (ro Rd R3) = −2.1mS (3.48k ) = −7.35
vs 10k + 1Meg vGS
vo vGS vo
∴ Av = = = −7.27 [V / V ]
vs v s vGS

Georgia Tech ECE 3040 - Dr. Alan Doolittle

Note source is the
terminal tied to the body MOSFET Amplifiers VSD>VSG-VTP
connection
What is the Maximum Gain Possible?
Is it saturated (Constant current), VDS ≥ VGS − VTP ≥ 0
but VGS = 0
S
G
and VTP ≥ 0 for a depletion mode MOSFET so,
D VDS (a positve number) > (−VTP a negative number)
G D
⇒ Is Saturated!
AC S
Signal
Gate
Bias

go is internal to the
transistor and can not be
avoided. Any additional
Av , Max = − g m ro resistor due to external
circuitry will lower the
K n (VGS − VT )(1 + λ VDS ) gain. For this reason
Av , Max = −
λ K n (VGS − VT )2 current sources are often
used as the “load” instead
Av , Max = −
(1 + λ VDS ) of bias resistors in
λ (VGS − VT ) amplifier circuits.
Georgia Tech ECE 3040 - Dr. Alan Doolittle
 MOSFET Small Signal Model and Analysis
Add in capacitances
Overlap of Overlap of
Gate Oxide Gate Oxide

LD LD
Gate to
channel to
Bulk
capacitance

Reverse Bias Junction capacitances

Georgia Tech ECE 3040 - Dr. Alan Doolittle

 MOSFET Small Signal Model and Analysis
Complete Model of a MOSFET
Overlap of Due to effective
γ modulation of the
Gate Oxide g mb = g m threshold voltage.
2 VSB + 2φ F

Overlap of
Gate Oxide Gate to
and source channel to
Bulk Reverse Bias Junction capacitances
capacitance

Georgia Tech ECE 3040 - Dr. Alan Doolittle

 MOSFET Small Signal Model and Analysis
SPICE MOSFET Model
SPICE models the drain current ( IDS ) of an n-channel MOSFET using the
following parameters/equations (SPICE variables are shown in ALL
CAPPITAL LETTERS)

Cutoff: IDS = 0

Linear:
KP  W 
I DS =  VDS [2(VGS − VTH ) − VDS ](1 + (LAMBDA) VDS )
2  LEFF 
Saturation:
I DS =
KP  W

2  LEFF

[ ]
 (VGS − VTH )2 (1 + (LAMBDA) VDS )

Threshold Voltage:
(
VTH = VTO + GAMMA 2 PHI − VBS − 2 PHI )
Channel Length
LEFF=L-2LD
Georgia Tech ECE 3040 - Dr. Alan Doolittle
 MOSFET Small Signal Model and Analysis
SPICE MOSFET Model – Additional Parameters
SPICE takes many of it’s parameters from the integrated circuit
layout design:

W AD=WxLdiff(drain)
AS=WxLdiff(source)
PS=2xLdiff(source)+W L PD=2xLdiff(drain)+W
Ldiff(source)
Ldiff(drain)

Source Gate Drain

L = polysilicon gate length W = polysilicon gate width

AD = drain area AS = source area
PD = perimeter of drain diffusion (not including edge under gate)
PS = perimeter of source diffusion (not including edge under gate)
NRD = number of “squares” in drain diffusion Specified in terms of the
NRS = number of “squares” in source diffusion minimum feature size
Georgia Tech ECE 3040 - Dr. Alan Doolittle
 MOSFET Small Signal Model and Analysis
SPICE MOSFET Model – Additional Parameters

Most
Used

Georgia Tech ECE 3040 - Dr. Alan Doolittle