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Spring 2001 EE 8223 − Analog IC Design Page 43

Current Sources and Sinks


The Current Mirror

An ideal current source/sink has infinite output impedance and,


subsequently, provides constant current over a wide operating voltage range.

The reality, however, is finite output impedance and limited output voltage
swing. Also, for current mirrors, minimum input voltage requirements.

If M1 and M2 are perfectly matched, then the simple current mirror provides

I D2 I β W L
= o = 2 = 2 1 (since VGS1=VGS2)
I D1 I in β1 W1 L2

if channel length modulation and mobility modulation are neglected, and SI


saturation operating is assumed. In addition, if VSS = 0V, then

Vin ,min = VGS 1 > VTHN , Vout ,min = VGS 2 − VTHN = (VDS ,sat )M2 ,

1
and ro =
λI o

Normally the values for VGS and L are selected and then W is used as a
current scaling factor. Typically VGS is chosen to provide VDS,sat of several
hundred millivolts. Often times the chosen L value is 2 to 5 times greater
than the minimum Ldra to help minimize the channel length modulation and
mobility modulation effects.
Spring 2001 EE 8223 − Analog IC Design Page 44

From the figure below, note the output voltage value at which ID1 = ID2 and
the effect of finite output resistance.

Example 20.2 illustrates how multiple ratioed currents are mirrored. In this
example oxide encroachment has been neglected! Layout techniques that
compensate for this will be discussed soon.

Example of how the basic current mirror can be utilized in biasing schemes:
Spring 2001 EE 8223 − Analog IC Design Page 45

Obviously n-channel transistors are used to implement current sinks whereas


p-channel transistors are used to implement current sources.

The Cascode Current Mirror

The cascode configuration is used to increase the output resistance of the


current sink/source.

Note that the cascode current sink requires more output voltage overhead,
i.e., larger Vout,min (say to stay in SI saturation) than the simple (basic)
current sink.
Spring 2001 EE 8223 − Analog IC Design Page 46

An alternate cascode sink that provides Vout,min = 2∆V is shown below. Note
the relationship between the transistors’ aspect ratios.

The output resistance of the cascode configuration (Fig. 20.5) can be


determined from the small-signal model.

Ro = ro 4 (1 + g m 4 ro 2 ) + ro 2 ≈ g m 4 ro2 [ro = ro2 = ro4, SI sat.]


Spring 2001 EE 8223 − Analog IC Design Page 47

For the general case (replacing ro2 with an arbitary R):

Ro = ro (1 + g m R ) + R ≈ ro (1 + g m R )

This general description of output resistance, Ro = ro (1 + g m R ) + R , can used


to quickly estimate the output resistance of other cascode circuits such as the
triple cascode (Fig. 20.9 and equation 20.13).

Sensitivity of the Basic Current Sink/Source

By definition, the sensitivity of the basic current sink’s output current to


VDD is given as

∆I o
Io Io VDD ∂I o
SVDD = lim = ⋅
∆VDD→0 ∆VDD I o ∂VDD
VDD

In this same manner, Io’s sensitivity to other inputs or component values can
be (individually) obtained.

If ID1 = ID2 (= Io) and VGS changes very little with variations in VDD, then

I VDD 1
SVDD
o
≈ ⋅
Io R

The percentage change in Io is described by

∆I o Io ∆VDD
= SVDD ⋅
Io VDD
Spring 2001 EE 8223 − Analog IC Design Page 48

For computer simulations of circuit sensitivity (a necessity for large


circuits), the excerpt shown below from the HSpice manual regarding
sensitivity analysis might be helpful.

.SENS Statement − DC Sensitivity

General form
.SENS ov1 <ov2 ...>

ov1 ov2 ... Branch currents or nodal voltage for DC


component sensitivity analysis.
Example
.SENS V(9) V(4,3) V(17) I(VCC)

If a .SENS statement is included in the input file, HSPICE determines the DC


small-signal sensitivities of each specified output variable relative to every
circuit parameter. The sensitivity measurement is the partial derivative of
each output variable with respect to the value of a given circuit element, taken
at the operating point, and normalized to the total change in output
magnitude. (Therefore, the sum of the sensitivities of all elements is 100%).
Sensitivities for resistors, voltage sources, current sources, diodes, and BJT’s
are calculated.
Only one .SENS analysis may be performed per simulation. If more than one
.SENS statement is present, only the last will apply.
Note: The .SENS statement can generate large amounts of output for large
circuits.

Temperature Analysis of the Basic Current Sink/Source

The simple current mirror/sink’s temperature coefficient is described by


1 ∂I o 1 I o
TC (I o ) = ⋅ = ⋅S
I o ∂T T T
where
W2 L1 VDD − VGS − VSS
Io = ⋅
W1L2 R
Substituting, we obtain
1 W2 L1 1 ∂VGS I o ∂R 
TC (I o ) = − ⋅ ⋅ + ⋅ 
I o W1 L2 R ∂T R ∂T 

1 ∂R
Recognize that ⋅ is the resistor’s temperature coefficient.
R ∂T
Spring 2001 EE 8223 − Analog IC Design Page 49

∂VGS
To determine , the (temperature dependent) expression for VGS must be
∂T
considered:

Io W2 L1 (VDD − VGS − VSS )


VGS = VTHN + = VTHN + ⋅
β2 2 W
R ⋅ KP (T ) ⋅ 2
W1 L2
2 L2

If VDD − VSS >> VGS, then (after some calculus)

∂VGS ∂VTHN 2 L1 (VDD − VSS )  1   1 ∂KP (T ) 1 ∂R 


= + ⋅ ⋅−  ⋅ +
∂T ∂T W1 R ⋅ KP (T )  2   KP(T ) ∂T R ∂T 

∂VTHN 1 ∂KP(T ) − 1.5


Using = VTHN ⋅ TCVTHN ≈ −2.4mV/°C and ⋅ = ,
∂T KP(T ) ∂T T
TC(Io) becomes

1 W2 L2 VTHN ⋅ TCVTHN 1 L1 VDD − VSS  1 ∂R 1.5   1 ∂R


TC (I o ) = − ⋅  − − −
I o W1 L1  R R W1 2 ⋅ R ⋅ KP (T )  R ∂T T   R ∂T

This expression is used in Example 20.6. Note that the calculated value of
TC(Io) changes with temperature. Also note that the TC(Io) expression can
be set equal to zero to determine the value of Io and R needed for the basic
current sink to have a temperature coefficient of zero (see equ. 20.27).

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