Lect.

23: MOSFET Current Mirror and Active Load

Various bias techniques for MOSFET circuits

How do we make
a constant current source
with MOSFETs?

Electronic Circuits 1 (09/2) Prof. Woo-Young Choi

 Lect. 23: MOSFET Current Mirror and Active Load

Constant current source: 1 ' ⎛W ⎞

= kn ⎜ ⎟ (VGS − Vt )
2
I D1
2 ⎝ L ⎠1

VDD − VGS
I D1 = I REF =
R
Assuming Q1, Q2 have same properties (kn’),

1 ' ⎛W ⎞
kn ⎜ ⎟ (VGS − Vtn )
2
IO = I D 2 =
2 ⎝ L ⎠2

IO (W / L ) 2
=
Î Current
C t mirror
i
I REF (W / L )1
Limitation on Vo? VO ≥ VGS − Vt

Electronic Circuits 1 (09/2) Prof. Woo-Young Choi

 Lect. 23: MOSFET Current Mirror and Active Load

Mismatches between IREF and IO

Due to channel-length modulation For two Q1 and Q2
IO = IREF only if VDS1= VDS2 Î V0=VGS

As VO increased, IO increases from IREF

VO − VGS
I O = I REF +
r0

Comparison with BJT current mirror?

Electronic Circuits 1 (09/2) Prof. Woo-Young Choi

 Lect. 23: MOSFET Current Mirror and Active Load
VDD=3V, Q1 and Q2 are identical with 1 ' ⎛W ⎞
I D1 = I REF = kn ⎜ ⎟ (VGS − Vt )2
L= 1μm, W=100μm, Vt=0.7V, kn’=200μA/V2, 2 ⎝ L ⎠1
ro = 200kΩ
1
100 = × 200 × 10 × (VGS − Vt )2 ,
1. Determine R for IO=100μA. 2
2 What is the lowest value for VO?
2. (VGS − Vt ) = 0.316,
0 316 VGS = 1.016
1 016
3. How much IO changes when VO changes 1V?
VDD − VGS 3 − 1.016
R= = = 19.84kΩ
I REF 0.1mA
0 1mA

VO min = VGS − Vt = VOV = 0.316 V

ΔVO 1V
ΔI O = = = 5μ A
ro 2 200k Ω

Electronic Circuits 1 (09/2) Prof. Woo-Young Choi

 Lect. 23: MOSFET Current Mirror and Active Load

(W / L ) 2
I 2 = I REF
( W / L )1
(W / L ) 3
I 3 = I REF
( W / L )1
I3 = I4

(W / L ) 5
I5 = I4
(W / L ) 4

Current-steering circuits: current source (Q5), current sink (Q2)

Electronic Circuits 1 (09/2) Prof. Woo-Young Choi

 Lect. 23: MOSFET Current Mirror and Active Load

CS amplifier
f

Where is RD ?

Current source as a resistor Î Active load

(Remember Q2 has rO)

Electronic Circuits 1 (09/2) Prof. Woo-Young Choi

 Lect. 23: MOSFET Current Mirror and Active Load
Large change in vO with vI change!
Î Large amplifier gain
Load-line analysis
Q1

Q2

v = VDD-vo

vo= VDD - v

Electronic Circuits 1 (09/2) Prof. Woo-Young Choi

 Lect. 23: MOSFET Current Mirror and Active Load

Gain for CS amplifier with PMOS current mirror

-gm (rO1 || rO2)

PMOS current mirror provides

large “Drain” resistance (Active Load)
as well as bias current!

Î Good for IC!

Electronic Circuits 1 (09/2) Prof. Woo-Young Choi

 Lect. 23: MOSFET Current Mirror and Active Load

VDD=3V, Vtn=|Vtp|=0.6V, kn’=200μA/V2, kp’=65μA/V2,

L=0 4μm W=4μm,
L=0.4μm, W=4μm ro1=200kΩ,
=200kΩ ro2,3 = 100kΩ,
100kΩ
IREF=100μA. 1. Aυ = − gm 1 ( ro1 || ro 2 )

' ⎛W ⎞ 4
1. What is the small-signal voltage gain, vO/vI? g m 1 = 2 k n ⎜ ⎟ I REF = 2 × 200 × × 100 = 0.63mA/V
⎝ L ⎠1 0.4
2 What is the maximum vO for which the above is valid?
2.
∴ Aυ = −0.63(mA/V) ⋅ (200 || 100)(kΩ ) = −42

1 ' ⎛W ⎞
( )
2 VSD ,3
2. For Q 3 , I REF = − Vtp +
2 p ⎜⎝ L ⎟⎠ 3 SG ,33
k V
ro
1 ⎛ 4 ⎞ VSG ,3
( )
2
100 = × 65 ⎜ ⎟ SG
V − 0.6 +
2 ⎝ 0.4 ⎠ 100 K
∴VSG ~ 1.12
1 12V

For vO ,max , VSD 2,min = VSG − | Vtp |= 1.12 − 0.6 = 0.52V

∴ vO ,max
max = VDD − VSD 22,min
min = 2.48V

Electronic Circuits 1 (09/2) Prof. Woo-Young Choi