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Problems

D2

D1

Q1. Considering ideal diodes, calculate
the current through RL = 1 kΩ.

+3 V

+5 V
1 kΩ

Solution:
Both diodes are ON :

2.2 kΩ
IL

RL

5 =i 1 × 1k + ( i 1 + i 2 ) × 1k
3 =i 2 × 2.2k + ( i 1 + i 2 ) × 1k
2.407 mA
⇒ i1 =
i 2 = 0.185 mA

2.2 kΩ
+3 V

+5 V
i1

2.59 mA.
∴iL =

Q2. Calculate the current through the resistor
RL = 1 kΩ when the switch is OFF and ON,
respectively (cut-in voltage = 0.7 V).

IL

1 kΩ

D1

Power supply
(15 V DC)
D2

Solutions:
OFF condition:
12 − 0.7
I L = 11.3 mA.
1k

i2

Battery back up
(12 V DC)

ON condition:
15 − 0.7
=
I L = 14.3 mA.
1k

Department of Electronics & Electrical Communication Engineering, I.I.T. Kharagpur

RL

1
mkmandal@ece.iitkgp.ernet.in

vL

Department of Electronics & Electrical Communication Engineering. I. Kharagpur 2 mkmandal@ece.3 V. A sinusoidal source vi = 12sin100πt V is used in the half-wave rectifier circuit with RL = 1 kΩ. + vD + vi id RL vL - Answer: PRV = 12 V. In the circuit.T.6 V and Vγ2 = 0.I.Half-Wave Rectifier IR Q3. 10 V Solution: = I R V= R R 330 Ω ID D1 ID D2 10 − 0. Calculate the PRV and the power rating of the diode.iitkgp.91 mW. Vγ1 = 0. Calculate the IR.ernet. Power rating = Imax x Vdmax = 7.in .3 330 = 30 mA Q4.7 V. The diode has a cut-in voltage of 0.

43 − 0. Kharagpur The diode with smallest Vγ will be damaged first.5 W.in . 50 Hz sinusoidal signal and has an internal resistance of 12 Ω.T. and cut-in voltage is 0.7 × 2. Diode power rating is 0.43 V .iitkgp.086 = 1. Department of Electronics & Electrical Communication Engineering. peak 42.7 V. The transformer secondary generates 30 V.I.46 W. 3 mkmandal@ece.ernet. ∴id= peak D1 D3 vL D1 vL RL D4 D2 Bridge rectifier circuit. Solutions: = v s= 30 2 42. I.086 A 8 + 12 Required Pd peak = 0.7 = 2.Problems Q5. Design a bridge rectifier to drive a load resistance RL = 8 Ω.

I. Kharagpur 4 mkmandal@ece. function) = 0.357 V using exp.iitkgp. function) Department of Electronics & Electrical Communication Engineering.707 V using exp. 50 Hz) Solutions: T = 1/50 = 20 mS Discharging time constant = RLC = 470 mS. (RL = 1 kΩ.T. C = 470 μF. Calculate the peak-to-peak ripple voltages for a half-wave and a full-wave rectifiers with a capacitor filter. C = 47 μF. vi = 12 V. Solve for T2 first: = 0.Problem Q6.361 = V ( 0. I.722 = • Full-wave rectifier: vr p− p = Vm / ( 2 f RL C ) = 12 2 ( 50 × 1k × 470 µ ) Becomes a complex problem for RL = 1 kΩ.in . T1 = 0 approximation is valid. • Half-wave rectifier: vr p− p = Vm / ( f RL C ) = 12 2 ( 50 × 1k × 470 µ ) V ( 0.ernet.

Kharagpur t (mS) 5 mkmandal@ece. Solutions: 1 = 20 mS f T2 ≈ T = 20 mS T= vr p− p Triangular wave approximation: vr (rms ) = vr | p − p 2 3 Vm = ±10% of 10 V ≈ 9 V .T. Calculate the capacitance required so that the peak-topeak ripple voltage does not exceed ±10% of the average output voltage. a half-wave rectifier dc power supply is to provide 10 V (dc) to a 1 kΩ load.in .I.iitkgp. As shown in the figure. T1 T2 Department of Electronics & Electrical Communication Engineering.ernet. I. Source frequency is 50 Hz.11V vL (V) ∴Vm = 11 V ( C =Vm / f RL vr 10 V p− p ) T =110 µ F . What should be the amplitude of the input voltage? + vD Line voltage + C RL vL Half-wave rectifier with filter.Problem Q7.

I.67 mA I= P= z allowed D / Vz Rs |min ≥ Vi |max −Vz I z allowed ⇒ Rs |min ≥ 12 − 6 ⇒ Rs |min ≥ 90 Ω.ernet. 66. Vi can vary between 9 and 12 V. and RL between 1 kΩ and infinity. Choose a suitable value of Rs to avoid diode burn out.5 k Ω Maximum allowed Zener current: 66.in .T. A Zener diode with Vz = 6 V and PD = 400 mW is used to design the voltage regulator. Department of Electronics & Electrical Communication Engineering.67 m The range of Rs is 90 Ω <Rs <500 Ω. Kharagpur 6 mkmandal@ece. Rs + IL I Vi IZ Vz RL VL Solutions: The diode must be fired: Vi |min × ⇒ 9× RL |min ≥ Vz RL |min + Rs |max 1k ≥6 1k + Rs |max ⇒ Rs |max ≤ 0.Voltage Regulator Q8.iitkgp. In the following circuit.I.

ernet. Department of Electronics & Electrical Communication Engineering. Kharagpur 6V Eqv.3 Ω. 15 V IZ Vz 1 kΩ Solutions: For firing the diode: 15 × RL || 1k ≥6 RL || 1k + 500 ⇒ RL || 1k ≥ 333.3 Ω 10 V The diode is not fired: 15 × 1k VTh = 10 V . 1k + 500 = RTh 1k ||= 500 333.33 Ω ⇒ RL ≥ 500 Ω.I. RZ = 0).iitkgp. Circuit for RL>500 Ω.Problems 500 Ω Q9. I. Circuit for RL<500 Ω. 333. Eqv.T.in . 7 mkmandal@ece. Draw the Thevenin’s equivalent circuit (VZ = 6 V.

Sketch the current through the resistor RL = 1 kΩ.35 mA . I L 0. ∴ For V i 〉 − 1. respectively.in .ernet. V= V i 2k .B. VTh ≥ 0.. the V i that puts the diode D 1 in F.7 ⇒ V i ≤ −1. Also sketch the voltage transfer characteristics.7 ⇒ V i ≥ 1. 1 kΩ + vin D1 The corresponding Vo =0.B.7 V and the break down voltages for diode 1 and 2 are 6V and 9 V.7 V ⇒ IL = −0.4 V.4 V.7 = ∴ For V i 〈1. VTh ≤ −0.7 2k = −0. The corresponding Vo = − 0.iitkgp. VTh V i= V= = i 1k + RL 1k + 1k 2 0V So.4 V.7 V ⇒= 2k 0. Department of Electronics & Electrical Communication Engineering. Kharagpur 8 mkmandal@ece. So. VTh as seen by the parallel diodes (between A-A’): 15 V 1k RL Vi . I. Input voltage. = Vo V i 2 ⇒ = I L V i 2k . Both of the diodes have a cut-in voltage of 0.T.I..Problems Q11. the V i that puts the diode D 2 in F.4 V. o V i 2 ⇒ I= L A D2 + RL v0 - A’ The circuit.35 mA .

4<Vi <1. A D2 + RL v0 0.7 mA - A’ -0.4 V.iitkgp.Problems 1 kΩ + vin D1 D1 in F.4 V.I. Kharagpur 9 mkmandal@ece. 1 kΩ + vin D1 -1.7 Voltage transfer characteristics of the circuit. 2 Vi (V) -0. I. i Department of Electronics & Electrical Communication Engineering. 1 kΩ + vin D1 D2 in F.7 Equivalent circuit for -1.7 mA Equivalent circuit for Vi >1.ernet.4 1.B. A D2 + RL Current sketch.T.4 A D2 1 + RL v0 - A’ Equivalent circuit for V <-1.4 V.B. v0 - - Vo (V) A’ 0.in .

7 V. Vi (V) -9. 1 kΩ 1 kΩ + vi - RL 5v + + v0 vin - - Fig. 7(b). Considering a high value for RL. 7(a). All of the diodes have a cut-in voltage of 0. Cut-in voltages = 0. 7(a). I. 7(b). D1 RL D2 v0 - Fig. respectively.T.ernet. In Fig. Cut-in voltage = 0.Problems Q12.7 V.in . Kharagpur 10 mkmandal@ece. Vz1 = 9 V and Vz2 = 6 V . Department of Electronics & Electrical Communication Engineering.7 V. Draw the voltage transfer characteristics for the following circuits.2.iitkgp.7 Transfer characteristics of Fig.7 Vi (V) 1 1 1 Transfer characteristics of Fig.I. the break down voltages for diode 1 and 2 are 9 V and 6 V.7 1 + Considering RL → ∞ 6. Vo (V) Vo (V) 5.

8(a). 5. Cut-in voltage = 0.B.7 = 5. ∴ For V i ≥ 11.7 ⇒ V i ≥ 11. 1 kΩ A + vi - + 1 kΩ v0 5v - A’ Fig.4 V.Problems Q13. the corresponding V i that puts the diode in F. Vo (V) Equivalent circuit when Vi<11. 8(a). 11.. 11 .7 V.4 V. 1 kΩ A + + 1 kΩ v0 vi - A’ VTh as seen by the diode and the DC voltage source (between A-A’): 1k RL Vi = VTh V i= V= . V i 2 ≥ 5.4 V: Vo = VTh ⇒ Vo = V i 2.7 V.7 v A’ - Equivalent circuit when Vi>11.4 Vo = V i 2.4 V. 1 Vi (V) 2 Transfer function of Fig. ∴ For V i 〈11.4 V: Vo =+ 5 0. i 1k + RL 1k + 1k 2 So.7 1 kΩ A + vi - + 1 kΩ v0 5. Repeat the same considering RL= 1 kΩ.

Vo = V i 2.4 V.4 1 2 Vi (V) -9. ∴ For V i ≥ 13. So. Vo = −9.4 13.B. Kharagpur 12 mkmandal@ece.7 − 9 ⇒ V i ≤ −19. the corresponding V i that simultaneously puts D1 in F.iitkgp. Department of Electronics & Electrical Communication Engineering. ∴ For V i 〈13.7 -19.B.7 Transfer characteristics of the above circuit. Vo (V) 6. VTh V= i 1k + 1k 2 1 kΩ v0 D2 - - A’ Fig. the V i that simultaneously puts D2 in F.T.I.4 V.4 V. and D2 in break down is calculated as VTh ≥ 0.in .4 V. Vo =V i 2. ∴ For V i 〈−19. Similarly. I. Vo = 6.4 V. ∴ For V i ≥ −19.7 + 6 ⇒ V i ≥ 13.ernet.Problems Solution for the second circuit: 1 kΩ + VTh as seen by the diodes (between A-A’): A D1 vin 1k Vi + = . and D1 in break down is calculated as VTh ≤ −0.7 V. 8(b).7 V.4 V.

in . Kharagpur 13 mkmandal@ece.I. 1 and 2. Draw the output voltage waveforms for the circuit of Fig. Negative shunt clamper. 1. C = 4.ernet.7 μF IL 12 V 0V + + vin Vγ 5V RL = 10 kΩ v0 - 2 mS -12 V Input voltage. The corresponding input voltages are shown in the figures. Fig.iitkgp. C = 4.T. Department of Electronics & Electrical Communication Engineering.Biased Clamping Circuits Q14. Positive shunt clamper. 2. I.7 μF IL + + vin - Vγ -5 V RL = 10 kΩ v0 - Fig.

Kharagpur 14 mkmandal@ece.I.3 V + + + -12 V 0. Department of Electronics & Electrical Communication Engineering. = 47 mS<< time period = 2 mS.Biased Clamping Circuits Answer1: 28. RL = 10 kΩ v0 - Positive shunt clamper.T.3 V 2 mS Output voltage.iitkgp. discharging time const.ernet.7 V 5V v0 = 28.16. .3 V 12 V 0V C = 4. 12 V 0. = 0.7 V 5V v0 = 4. • Charging time const. I.in .7 μF IL 2 mS + + vin Vγ 5V - -12 V Input voltage. 4.3 V - Equivalent circuit when the diode is in forward bias.3 V + .3 V - Equivalent circuit when the diode is in reverse bias.16.

3 V RL = 10 kΩ v0 -28.3 V - + 16. Output voltage.I. Negative shunt clamper. I.in .3 V - Equivalent circuit when the diode is in forward bias.3 V - + + 12 V 0.7 V -5 V v0 = -4. Department of Electronics & Electrical Communication Engineering.ernet. -12 V -5 V v0 = -28. Kharagpur 15 mkmandal@ece.7 μF IL 2 mS + + vin Vγ -5 V - -12 V -4.Biased Clamping Circuits Answer2: 2 mS 12 V 0V C = 4. + 16.T.iitkgp.3 V Input voltage.3 V - Equivalent circuit when the diode is in reverse bias.