Long Channel MOSFET

1
 Current Voltage Characteristics
MOSFET regions of operations:
– MOSFET operation can be derived from MOS capacitor operation
Consider n-channel MOSFET:
When VG<0: Accumulation mode
✓ No current can pass between source and drain.
✓ MOSFET in Off mode

When 0<VG<Vth: Depletion mode

✓ Small diffusion current can pass between source and drain
✓ MOSFET in Subthreshold mode (still considered Off mode)

When VG>Vth: Inversion mode

✓ Significant drift current can pass between source and drain
✓ MOSFET in ON mode
Depending on VD, MOSFET is either in Triode or Saturation mode

2
Triode region:
– For long channel devices we can assume that electric field components
are independent of each other:
✓ Electric field in the y direction only produces depletion and inversion layers
✓ Electric field in the x direction drives drain current
– Let us consider a small section at a point x in the channel with a gate
voltage well above threshold. As a result of the drain bias, the inversion
charge will be :
V(x) + dV(x)
Qn = −Cox ( VG − Vth − V ( x ))

– Where V(x) is the channel potential component

due to drain bias. The channel current is a drift
current and can be written as :

I D = q n v drift A
= WµnQn E x

3
• Substituting Ex = -dV(x)/dx, we get I D dx = WµnCox ( VG − Vth − V ( x ))dV ( x )

• Integrating from x = 0 to x = L and from V = 0 to V = VD , we get

W  1 2  ----------- (1)
I D = µnC ox ( VG − Vth )VD − 2 VD  Simplified mostly used for digital design
L  
• In the above derivation, it has been assumed that Vth is independent of V(x), this
is only valid for small values of VD. In case of large VD, Vth depends on V(x) as it
affects Qd. Without such assumption, the drain current becomes:

W VD
I D = µnC ox ( VG − VFB − 2 F − )VD
L 2 Eq.(1)

−
2 2q si N A
3 C ox

(VD + 2F )3 2 − (2F )3 2 



Eq.(2)

Eq.(1)
----------- (2)
Accurate for triode region Eq.(2)

See the proof

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Proof:

Q d = −qN A x d max = − 2qN A  si  s (x ) = − 2qN A  si (2 F +V (x ) )

Q s (x ) = −Q m (x ) = −C ox (VG −V FB − s (x )) = −C ox (VG −V FB − 2F −V (x ))

Q n = Q s − Q d = −C ox (V G −V FB − 2 F −V (x )) + 2qN A  si (2 F +V (x ))

Using the drift current realtion

I D = WµnQn E x

W VD
I D = µnC ox ( VG − VFB − 2 F − )VD
L 2

−
2 2q si N A
3 C ox

(VD + 2F )3 2 − (2F )3 2 



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Saturation region:
– As VD increases, it neutralizes the effect of VG and the inversion layer
starts to disappear near the drain. The channel becomes pinched off at a
voltage VD =VDsat beyond which the drain current saturates with VD.
– The condition for onset of current saturation is given by setting Qn = 0,
hence:
VDsat = ( VG − Vth )

– Where VDsat is the “Drain Saturation Voltage” which is equal to at the drain
end of the channel. Substituting the above expression into the approximate
ID-VD relationship yields:

I Dsat = µnC ox
W
(VG − Vth )2
2L
– This eqn is valid at the onset of saturation, beyond that, ID saturates at a
constant value. Therefore, this eqn also predicts ID for higher VD values.

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 Channel Length Modulation

➢ Current saturation starts as the channel gets pinched-off at the drain.

➢ As drain voltage increase, the pinch-off point moves away from the drain
towards the source. Hence, the effective channel length is decreased by ∆L.
Leff = L − L

➢ In short channel MOSFET, cannot assume L is much larger than ∆L. Hence,
the saturation current is given by:
 C W C W
I D = n s ox ( VG − Vth )2 = n ox ( VG − Vth )2
2 Leff 2( L − L )

1 1 1 1  L 
=   1+ 
L − L L  L  L  L 
 1− 
 L 
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 L
➢ ∆L/L is proportional to the drain voltage. =  VD
L
λ is the channel length modulation parameter.

➢ Hence, the saturation current is given by:

 nC oxW
ID = ( VG − Vth )2 ( 1+ VD )
2L

➢ The saturation current shows clear

increase with drain voltage

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 Long channel Characteristics

1- Triode Region
W  1 2
I D = µnC ox ( VG − Vth )VD − 2 VD 
L  

2- Saturation Region

I Dsat = µnC ox
W
(VG − Vth )2
2L
Including channel length modulation

I Dsat = µnC ox
W
(VG − Vth )2 (1+ VD )
2L
: channel length modulation parameter Channel length modulation

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Subthreshold region
weak inversion region VG <Vth

➢ Subthreshold behavior is of particular Slope = 1/S

of low power-low voltage applications

➢ Subthreshold conduction is dominated

by Diffusion current

Subthreshold Current
2
W  KT  q ( VG −Vth ) / mKT
I D = µC ox ( m − 1 )  e ( 1− e − qVD / KT )
L  q 
Subthreshold Swing
dVG dVG KT  Cd 
S= = ln( 10 ) = 2.3 1 + 
d (log I D ) d (ln I D ) q  C ox 

Insensitive to device parameter

Typically 70 – 100 mV/decade
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 Threshold Voltage Control
Qd Q oi
V th = V FB + 2 F − where V FB =  ms −
C ox C ox

All factors controlling Vth can be controlled to some extent:

Φms : proper choice of gate material
ϕF and Qd : substrate doping
Cox :oxide thickness and dielectric constant
Qoi : reduced by proper oxidation methods

In addition, it is possible to obtain close control of Vth by precisely

introducing a desired amount of charge at a desired depth in the channel
region through ion implantation

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➢ Ion implantation has 3 variables:
Dose: amount of impurities
Energy: depth of impurities profile
Angle: direction (lateral position of impurities)

➢ Figure illustrates the result of Boron

implantation in an n-channel MOSFET
such that the implant profile peak occurs at
the Si-SiO2 interface.

➢ The negatively charged, Boron

acceptors increase the doping level of
the channel. As a result, Vth increases.

➢ Similarly, a shallow boron implant into

a p-channel MOSFET can reduce Vth

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 Substrate Bias Effect (Body effect)
➢ In previous analysis, assumed source
and bulk at the same potential.
➢ In practical circuits, source and bulk
may be at different potentials, but still
keeping source and drain junctions
reverse biased. Negative for
p-substrate

➢ If source is assumed as reference

(ground), then VBS has to be negative for
n-channel MOSFET and positive for p-
channel MOSFET. 14

The effect of reverse substrate 12

bias is to: 10
VBS = 0V
✓ Widen the bulk depletion region. 8
ID (mA)

-1V
6
✓ Raise the threshold voltage. -2V
4 -3V
✓ Reduce the effective mobility. 2

0
0.5 1 1.5 2 2.5 3
VG (V)
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For n-channel MOSFET:
Q
V th = V FB + 2 F − d
C ox
Qd = − 2 si qN A (2 F − VBS ) = − C ox 2 F − VBS

V th = V FB + 2 F +  2 F− VBS
2 si q N A
Where  is the body effect coefficient  =
C ox

Vth =  2 F − VBS −  2 F

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Threshold-voltage variation with
reverse bias for two uniform substrate
doping concentration

2 si q N A
 =
C ox

Body effect coefficient variation

with substrate doping for different
oxide thickness

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 Bulk Mobility

Temperature dependence of the

The electron and hole mobilities of electron mobility in Silicon
silicon at 300 K.

At low dopant concentration, the electron mobility is dominated by phonon scattering.

At high dopant concentration, it is dominated by impurity ion scattering

At lower temperatures, ionized impurity scattering dominates, while at higher

temperatures, phonon scattering dominates, and the actual mobility reaches a
maximum at an intermediate temperature.
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MOSFET Mobility
Four types of charges densities
exist at or near the interface:
1- Inversion layer charge Qn,

2- Bulk ionized impurity charge Qd,

3- Fixed positive charge Qf

4- Interface state charge Qit The Si-SiO2 interface region of an MOSFET

and the charge distributions

MOSFET Carrier scattering

Bulk
Surface
Phonon scattering
Ionized Impurity Scattering + Surface roughness scattering + Coulomb scattering

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➢ Coulomb scattering: scattering caused by the coulombic interaction of carriers
with the charges close to the oxide-semiconductor interface

➢ surface roughness scattering: scattering caused by the deviation of the oxide-

Si interface from the perfectly periodic crystal spatial potential distribution

➢ Each scattering mechanism is associated with a specific mobility.

The net mobility is determined by: 1/ = 1/1 + 1/2 + 1/3
The lowest mobility dominates.

➢ In low-field region, the total carrier surface mobility o (low-field mobility) is

approximated by : 1/ = 1/B + 1/S
where B is bulk carrier mobility and S is the contribution of the additional
scattering centers due to the surface boundary at low field condition

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 In strong inversion: Qn is dominant
Q n = −C ox (V G − V th)  = V FB + 2 F −
Qd
C ox = ox V th
t ox C ox

➢ The surface mobility depends on

the vertical (Ey)and lateral (Ex)
electric fields in the channel.
E y  (V G−V th ) & E x  V D / L

➢ MOSFET (Effective) mobility due

to the vertical and lateral fields can
be expressed as: mobility degradation
due to vertical field
O
 eff =
1 +  (V G− V th )1 + E x E c mobility degradation due to velocity
saturation in lateral direction
 : mobility degradation parameter EC : critical electric field at which velocity saturates

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 Appendix
Gradual Channel Approximation (GCA)
Pao and Sah, 1966

➢ It assumes that the variation of the electric field along the channel
(Ex) is much less than the corresponding variation in the perpendicular
field (Ey) to the channel
➢ Poisson’s equation is reduced to 1-D form.

Charge Sheet Approximation

Brews, 1978

➢ It assumes that all the inversion charges are located at the silicon
surface like a sheet of charge.

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