Birla Vishvakarma Mahavidyalaya

(Autonomous Engineering College. Since 1947)

Vallabh Vidyanagar

Department Of Electrical Engineering

To perform simulation of 3 to 8 line decoder using ladder diagram and

CoDeSys software.

Experiment No: ___ Date: ____________

Theory:
A decoder is a combinational logic circuit that is used to change the code into a set of signals. It is the
reverse process of an encoder. A decoder circuit takes multiple inputs and gives multiple outputs. A
decoder circuit takes binary data of ‘n’ inputs into ‘2^n’ unique output. In addition to input pins, the
decoder has a enable pin. This enables the pin when negated, to make the circuit inactive.

INPUTS OUTPUTS

A2 A1 A0 Z0 Z1 Z2 Z3 Z4 Z5 Z6 Z7

0 0 0 1 0 0 0 0 0 0 0

0 0 1 0 1 0 0 0 0 0 0

0 1 0 0 0 1 0 0 0 0 0

0 1 1 0 0 0 1 0 0 0 0

1 0 0 0 0 0 0 1 0 0 0

1 0 1 0 0 0 0 0 1 0 0

1 1 0 0 0 0 0 0 0 1 0

1 1 1 0 0 0 0 0 0 0 1

3 to 8 Line Decoder
This decoder circuit gives 8 logic outputs for 3 inputs and has a enable pin. The circuit is designed with
AND and NAND logic gates. It takes 3 binary inputs and activates one of the eight outputs. 3 to 8 line
decoder circuit is also called a binary to an octal decoder. The decoder circuit works only when the
Enable pin (E) is high. A0, A1 and A2 are three different inputs and Z0, Z1, Z2, Z3, Z4, Z5, Z6, Z7
are the eight outputs. The logic diagram of the 3 to 8 line decoder is shown below.

Ladder Diagram & Codesys Software:

List of Inputs and Outputs

I0 = I:1/0 Input Q2 = O:2/2 Output
I1 = I:1/1 Input Q3 = O:2/3 Output
I2 = I:1/2 Input Q4 = O:2/4 Output
Q0 = O:2/0 Output Q5 = O:2/5 Output
Q1 = O:2/1 Output Q6 = O:2/6 Output
Q7 = O:2/7 Output
Simulation:
1. If A2=0, A1=0, A0=0 then output=Z0

2. If A2=0, A1=0, A0=1 then output=Z1

3. If A2=0, A1=1, A0=0 then output=Z2

4. If A2=0, A1=1, A0=1 then output=Z3

Similarly, we can obtain other outputs by changing the A0, A1, and A2 bits accordingly.
Program Description:

Conclusion: