Almughtaribeen University

College of Engineering

MID-TERM EXAM FOR ACADEMIC YEAR 2022

Subject: Analogue electronic circuits ② Level: 3th year
Time: 1.5 Hours Date: 21/sep/2022

ANSWER ALL QUESTIONS AS POSSIBLE YOU CAN

QUESTION ONE: Increased, then width of conducting channel..

1- How many diodes a Junction Field Effect A- Decrease

Transistors Contain?
2- What is FET biasing? Explain!, and
What are the FET biasing circuits?
3- Why are FET transistors called unipolar
transistors?
4- Why the channel of a JFET is never
Completely closed at the drain end?
5- What is IDSS is stands for?
QUESTION TWO:
1- IDSS can be defined as:
A- The minimum possible current.
B- The maximum possible current
With VGS held at -4 V.
C- The maximum possible current
With VGS held at 0 V.
D- The maximum drain current
With the source shorted
2- When VGS = 0 V, a JFET is:
A- Saturated.
B- An analog device.
C- An open switch.
D- Cut-off.
3- If reverse bias on the gate of JFET is
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1- Given IDSS=3mA,VGS(OFF)=-6V,
gm(max)=5000µS, Determine the
transconductance for VGS=-4V, and find the
drain current ID at this point.
2- A JFET in fig. below has values of VGS(off)=-
8V and IDSS=16mA. Determine the values of
VGS , ID and VDS for the circuit.
Then try to sketch transfer characteristic curve
of this model

GOOD LUCK