Student Name: SMIT PATEL

Enrollment Number: 19162121031

Semester: 2nd
Branch/Specialization: BIG DATA AND ANALYTICS
Subject Code/Subject Title: COMPUTER ORGANIZATION

GANPAT UNIVERSITY INSTITUTE OF COMPUTER TECHNOLOGY

Ganpat Vidyanagar, Mehsana-Gozaria Highway, Kherva – 384012, North Gujarat, INDIA.
Contact: 1800 233 12345 Mail: info.ict@ganpatuniversity.ac.in Website: www.ict.gnu.ac.in
 Department of Computer Science and Engineering

This is to certify that Mr. / Ms. SMIT PATEL enrollment number

19162121031 has solemnly completed assigned practical tasks &
assessed as part of continuous evaluation of 2nd semester, BDA
specialization laboratory during the academic year 2019 - 2020. This
work is carried out as partial fulfillment of undergraduate program and
adherence of per academic honesty policy and practices.

Submitted for the university Examination held on Click or tap to enter a date.
Course Code: 2CSE205 Course Title: COMPUTER ORGANIZATION
________
Lab Hours: 13 Sessions Lab Attendance: 69.23
Issue Date: 27/05/2020 Submission Regular/Irregular: Regular
Faculty/ TA Name & Sign:
PROFF. USMAN SINDHI
HOD Name & Sign:
PROFF. DHARMESH DARJI

GANPAT UNIVERSITY INSTITUTE OF COMPUTER TECHNOLOGY

Ganpat Vidyanagar, Mehsana-Gozaria Highway, Kherva – 384012, North Gujarat, INDIA.
Contact: 1800 233 12345 Mail: info.ict@ganpatuniversity.ac.in Website: www.ict.gnu.ac.in
 Student Self Declaration for Academic Honesty

I am submitting the assignment/practical/project for:

☒ An individual project or

☒ A group project on behalf of all members of the group. It is hereby confirmed that the submission is
authorized by all members of the group, and all members of the group are required to sign this
declaration.

I/We declare that: (i) the assignment here submitted is original except for source material explicitly
acknowledged/all members of the group have read and checked that all parts of the piece of work,
irrespective of whether they are contributed by individual members or all members as a group, here
submitted are original except for source material explicitly acknowledged; (ii) the piece of work, or a
part of the piece of work has not been submitted for more than one purpose (e.g. to satisfy the
requirements in two different courses) without declaration; and (iii) the submitted soft copy with
details listed in the <Submission Details> is identical to the hard copy(ies), if any, which has(have) been
/ is(are) going to be submitted. I/We also acknowledge that I am/we are aware of the University’s
policy and regulations on honesty in academic work, and of the disciplinary guidelines and procedures
applicable to breaches of such policy and regulations.
In the case of a group project, we are aware that all members of the group should be held
responsible and liable to disciplinary actions, irrespective of whether he/she has signed the
declaration and whether he/she has contributed, directly or indirectly, to the problematic contents.

I/We also understand that assignments without a properly signed declaration by the student
concerned and in the case of a group project, by all members of the group concerned, will not be graded
by the teacher(s).

Signature(s) SMIT PATEL Date 27/05/2020

Name(s) SMIT PATEL Student ID(s) 19162121031
Course Code 2CSE205 Course Title COMPUTER ORGANIZATION

GANPAT UNIVERSITY INSTITUTE OF COMPUTER TECHNOLOGY

Ganpat Vidyanagar, Mehsana-Gozaria Highway, Kherva – 384012, North Gujarat, INDIA.
Contact: 1800 233 12345 Mail: info.ict@ganpatuniversity.ac.in Website: www.ict.gnu.ac.in
Practical Definition Last Date of Submission Status Grade
No. Submission Date
(Given By (Student
Professor) Submission
Date)

Introduction of tool Logisim, revision on basic

1 12/23/2019 12/23/2020 Checked 7
logic gates and hardware parts of computer
To design Ripple carry adder, incrementor
2 12/30/2019 12/30/2019 Checked 7
and decrementor
3 To design ripple carry subtractor 6/1/2020 6/1/2020 Checked 6
4 To design carry look ahead adder 1/13/2020 1/13/2020 Checked 8
5 To study and design combinational multiplier 1/20/2020 1/20/2020 Checked 8
6 To study and design Wallace tree adder 1/27/2020 1/27/2020 Checked 8
7 To design memory cells 2/17/2020 2/17/2020 Checked 8
8 To design up and down counter 2/24/2020 2/24/2020 Checked 8
To study and design bus system for four
9 3/9/2020 3/9/2020 Checked 8
register using multiplexer
10 To study and design ALU 3/16/2020 3/16/2020 Checked 8
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11 ASSIGNMENT 1 Checked 10
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12 ASSIGNMENT 2 Checked 10
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