Computer Science & Engineering

(Artificial Intelligence & Machine Learning)

Subject: CSC405 Microprocessor Class: SE CSE-AIML
========================================================

Register organisation of 80386

The 80386 processor has significantly extended the 8086 registers set. Generally, the registers
of 80386 microprocessor are of 32 bits and they can be used as 8-bit and 16-bit registers.

The registers of 80386 are divided into general-purpose registers and special registers.
General-purpose registers: 32-bit EAX, EBX, ECX, EDX, ESI, SDI, EBP and ESP.
Special registers:
• Segment (selector) registers 16-bit CS, DS, ES, SS, FS, and GS
• 32-BIT EIP
• EFLAGs

General-purpose registers: The general-purpose registers is able to hold 8-, 16-, or 32-bit
data. The AX, BX, CX, DX, SI, DI, BP, SP, FLAGS and IP registers are 16-bit registers and
they have been extended to 32 bits. A 32-bit register is called an extended register and it is
represented by the register name with prefix E. For example, a 32-bit register corresponding to
AX is represented by EAX.
Segment Registers: The 80386 provides 2 new 16-bit segment registers such as FS and GS.
The segment registers of 80386 are CS, DS, ES, SS, FS, and GS. At any given instant, six
segments of memory may be immediately accessible to an executing 80386 program. The
segment registers CS, DS, SS, ES, FS, and GS are used to identify these six current segments.
 Computer Science & Engineering
(Artificial Intelligence & Machine Learning)
Subject: CSC405 Microprocessor Class: SE CSE-AIML
========================================================

Each of these registers specifies a particular kind of segment, as characterized by the associated
mnemonics.
CS: The 80386 fetches all instructions from this code segment, using as an offset the contents
of the instruction pointer.
SS: Subroutine calls, parameters, and procedure activation records usually require that a region
of memory be allocated for a stack. All stack operations use the SS register to locate the stack.
DS, ES, FS, and GS: The DS, ES, FS, and GS registers allow the specification of four data
segments, each addressable by the currently executing program. Accessibility to four separate
data areas helps programs efficiently access different types of data structures.

EFLAG register
The flags register is a 32-bit register named EFLAGS. Figure 2-8 defines the bits within this
register. The flags control certain operations and indicate the status of the 80386.

Instruction Pointer
The instruction pointer register (EIP) contains the offset address, relative to the start of the
current code segment, of the next sequential instruction to be executed. The instruction pointer
is not directly visible to the programmer.
 Computer Science & Engineering
(Artificial Intelligence & Machine Learning)
Subject: CSC405 Microprocessor Class: SE CSE-AIML
========================================================

Control Registers: The 80386 processor has four 32-bit control registers: CR0-CR3. These
registers are used to hold global machine status. These registers perform paged memory
management, cache enable/disable and protected mode operation.
Debugging Registers: The first four registers DR3 to DR0 are used to store four program-
controllable breakpoint addresses. The DR7 and DR6 hold breakpoint control and breakpoint
status information respectively.
System Address Registers: The 80386 has four system address registers to refer the descriptor
tables. The four different types of descriptor tables are Global Descriptor Table (GDT),
Interrupt Descriptor Table (IDT), Local Descriptor Table(LDT), Task State Segment descriptor
(TSS).
The system address and segment registers are used to hold the addresses of descriptor tables
GDT, IDT, LDT and TSS and their respective segments. These registers are called GDTR,
IDTR, LDTR and TR respectively. The GDTR and IDTR are known as system address, but the
LDTR and TR are known as system segment registers.