Name: Chigwa Bruce I

Reg Number: H220396z

Department: Software Engineering

Computer Architecture and Organization Assignment 2

Question 1:
Convert the binary number 10011101 to its Octal, Decimal, and Hexadecimal equivalent.

Octal:
To convert binary to octal, we group the binary digits into sets of three, starting from the right.
Then, we convert each group into its octal equivalent.
100111012
=> 100 111 101
=> 4758
​

Decimal:
To convert binary to decimal, we can use the positional notation. Each digit in a binary number
represents a power of 2.

100111012 = (1 * 27) + (0*26)+ (0*25)+ (1*24)+ (1*23)+ (1*22)+ (0*21)+ (1*20)

= 128 + 0 + 0 16 + 8 + 4 + 0 + 1
= 15710

Hexadecimal:
To convert binary to hexadecimal, we group the binary digits into sets of four, starting from the
right. Then, we convert each group into its hexadecimal equivalent.
100111012
=> 1001 1101
=> 9D16

Question 2:
Superscalar Architecture:
Superscalar architecture is a type of processor architecture that allows multiple instructions to
be executed simultaneously to improve performance. In a superscalar processor, multiple
execution units, such as arithmetic logic units (ALUs) and floating-point units (FPUs), operate
concurrently, fetching and executing multiple instructions in parallel.

Question 3:
Registers play crucial roles in computer systems. Here's a brief description of the mentioned
registers:
● Accumulator: It is a special-purpose register in a CPU that stores the results of arithmetic
and logic operations. It is often used for intermediate calculations.
● Memory Buffer Register (MBR): It holds the data to be written to memory or the data just
read from memory.
 ● Memory Address Register (MAR): It holds the memory address from which data is to be
fetched or to which data is to be stored.
● Program Counter (PC): It holds the address of the next instruction to be fetched and
executed in the program sequence.

Question 4:
Interconnection Network Topologies:
● Single Bus: All devices are connected to a single shared communication bus. Devices
take turns accessing the bus, leading to potential bottlenecks.
● Completely Connected Network: Each node is connected to every other node directly.
This offers high bandwidth but is impractical for large systems due to the high number of
connections required.
● Crossbar Network: It is a matrix of switches where each input can be connected to any
output. It provides full connectivity between nodes, allowing simultaneous
communication between any pair of nodes.

Question 5:
CISC (Complex Instruction Set Computer) vs. RISC (Reduced Instruction Set Computer):
● CISC: CISC architectures have complex and variable-length instructions that can
perform multiple operations. They typically have a large set of instructions, including
instructions for high-level operations like string manipulation and complex arithmetic.
● RISC: RISC architectures have a simplified instruction set with fixed-length instructions.
They focus on executing a smaller set of instructions efficiently and rely on optimizing
compilers to translate high-level code into these simpler instructions.

Question 6:
Hazards in Parallelism:
● Structural Hazards: These occur when hardware resources are not sufficient to support
simultaneous execution of all possible combinations of instructions. For example, if the
CPU has only one ALU, it cannot simultaneously execute two instructions requiring ALU
operations.
● Data Hazards: These occur when an instruction depends on the result of a previous
instruction that has not yet been completed. This can lead to stalls or incorrect results if
not handled properly.
● Control Hazards: These occur when the outcome of a conditional branch instruction is
not known at the time the next instruction needs to be fetched. This can lead to pipeline
stalls or incorrect execution paths.