Ec3462 Lic Lab Manual

DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING
EC3462 LINEAR INTEGRATED CIRCUITS LABORATORY

(R2021)
II YEAR IV SEMESTER
SYLLABUS
OBJECTIVES:
The student should be made to:
➢ To gain hands on experience in designing electronic circuits.
➢ To learn simulation software used in circuit design.
➢ To learn the fundamental principles of amplifier circuits.
➢ To differentiate feedback amplifiers and oscillators.
➢ To differentiate the operation of various multivibrators
LIST OF EXERCISES
DESIGN AND ANALYSIS OF THE FOLLOWING CIRCUITS
1. Series and Shunt feedback amplifiers-Frequency response, Input and output impedance
2. RC Phase shift oscillator and Wien Bridge Oscillator
3. Hartley Oscillator and Colpitts Oscillator
4. RC Integrator and Differentiator circuits using Op-Amp
5. Clippers and Clampers
6. Instrumentation amplifier
7. Active low-pass, High pass & Band pass filters
8. PLL Characteristics and its use as frequency multiplier, clock synchronization
9. R-2R ladder type D-A converter using Op-Amp
SIMULATION USING SPICE: (Using Transistor):

1. Tuned Collector Oscillator
2. Twin -T Oscillator / Wein Bridge Oscillator
3. Double and Stagger tuned Amplifiers
4. Bistable Multivibrator
5. Schmitt Trigger circuit with Predictable hysteresis
6. Analysis of power amplifier
| EC3462 Linear Integrated Circuits Laboratory
COURSE OUTCOMES:
At the end of the course, the student should be able to:
CO1. Analyze various types of feedback amplifiers.
CO2. Design oscillators, tuned amplifiers, wave-shaping circuits and multivibrators.
CO3. Design and simulate feedback amplifiers, oscillators, tuned amplifiers, wave shaping circuits and
multivibrators, filters using SPICE Tool.
CO4. Design amplifiers, oscillators, D-A converters using operational amplifiers.
CO5. Design filters using op-amp and perform an experiment on frequency response.
COURSE OUTCOMES AND PROGRAMME OUTCOMES MAPPING:

Course
Program Outcome
Outcome
PO 1. Engineering Knowledge: Apply the knowledge of mathematics, science,
CO1, CO2,
engineering fundamentals, and an engineering specialization to the solution of complex
CO3, CO4, CO5
engineering problems
PO 2. Problem Analysis: Identify, formulate, review research literature, and analyze
CO1, CO2,
complex engineering problems reaching substantiated conclusions using first
CO3, CO4, CO5
principles of mathematics, natural sciences, and engineering sciences.
PO 3. Design/Development of Solutions: Design solutions for complex engineering
problems and design system components or processes that meet the specified needs CO1, CO2,
with appropriate consideration for the public health and safety, and the cultural, CO3, CO4, CO5
societal, and environmental considerations.
PO 4. Conduct investigations of complex problems: Use research-based knowledge
CO1, CO2, CO3,
and research methods including design of experiments, analysis and interpretation of
CO4, CO5
data, and synthesis of the information to provide valid conclusions.
PO5. Create, select, and apply appropriate techniques, resources, and modern CO3
engineering and IT tools including prediction and modeling to complex engineering
activities with an understanding of the limitations.
PO 5. The Engineer and Society: Apply reasoning informed by the contextual

knowledge to assess societal, health, safety, legal and cultural issues and the CO2, CO5
consequent responsibilities relevant to the professional engineering practice.
CO-PO MAPPING MATRIX:

Course
PO1 PO2 PO3 PO4 PO5 PO6 PO7 PO8 PO9 PO10 PO11 PO12
Outcome
CO1 3 2 2 - - - - - - - - -
CO2 2 2 2 2 - 3 - - - - - -
CO3 3 2 1 1 - - - - - - - -
CO4 3 1 2 - - - - - - - - -
CO5 3 2 1 1 - 3 - - - - - -
CO-PSO MAPPING MATRIX:

Course
PSO1 PSO2 PSO3
Outcome
CO1 3 3 -
CO2 3 3 -
CO3 3 3 -
GRT Institute of Engineering and Technology | Tiruttani

CO4 3 3 -
CO5 3 3 -
Note:1: Slight (Low) 2: Moderate (Medium) 3: Substantial (High)
EVALUATION OF LAB REPORT:
Marks Marks
Evaluation Parameters
Allotted Awarded
Aim & Hardware / Software Required: 10
Design & Circuit Diagram / Algorithm &
30
Flowchart:
Observation & Calculation / Program: 30
Graph / Output & Result: 20
Viva Voce: 10
Total: 100
GRT Institute of Engineering and Technology | Tiruttani

EC3462 LINEAR INTEGRATED CIRCUITS LABORATORY
Exp.No. Page.No.
INDEX
1 Voltage Series Feedback Amplifier (Non-Inverting Amplifier) 2
Voltage Shunt Feedback Amplifier (Inverting Amplifier) 6

2
Integrator 10
3
4 Differentiator 12
Clippers 14
5
Clampers 16
6
7 Instrumentation amplifier 18
8 Active low-pass Filter 20
9 Active High-pass Filter 22
10 Active Band-pass filters 24
PLL characteristics 27
11
Frequency Multiplier using PLL, 30
12
13 R-2R Ladder Type D-A Converter 33
14 RC Phase Shift Oscillator 36
15 Wein- Bridge Oscillator 38
16 Hartley’s Oscillator 40
17 Colpitts’s Oscillator 43
SIMULATION USING PSPICE

18 Tuned Collector Oscillator 47
19 Wein-Bridge Oscillator 49
20 Double and Stagger Tuned Amplifier 51
21 Bistable Multivibrator 53
22 Schmitt Trigger Circuit with Predictable Hysteresis 55
23 Analysis of Power Amplifier 57
CONTENT BEYOND SYLLABUS

24 Design and testing of summing amplifier. 60
25 Design and testing of precision rectifier. 62
26 Voltage and Current Time Base Circuits 64
GRT Institute of Engineering and Technology |Tiruttani 1|Page

EXPT.NO.1 VOLTAGE SERIES FEEDBACK AMPLIFIER

DATE:
AIM:
To construct and test the Voltage Series feedback amplifier and to calculate the following parameters.
1. Bandwidth and cut-off frequencies.
2. Input and output impedance.
APPARATUS REQUIRED:
S.No EQUIPMENTS RANGE QUANTITY
1 AFO (0-3)MHz 1
2 CRO (0-20)MHz 1
3 Resistors As per Design Each one
4 Dual Power supply (0-30V) 1
5 Op-amp μA741 1
6 Bread Board - 1
7 Connecting wires - Required Quantity
THEORY:
The current series feedback amplifier is characterized by having shunt sampling and series
mixing. In amplifiers, there is a sampling network, which samples the output and gives to the feedback
network. The feedback signal is mixed with input signal by either shunt or series mixing technique. Due
to shunt sampling the output resistance increases by a factor of ‘D’ and the input resistance is also
increased by the same factor due to series mixing. This is basically transconductance amplifier. Its input
is voltage which is amplified as current.
PIN DIAGRAM

CIRCUIT DIAGRAM
7
6
DESIGN:
Given values, Av =10(Theoretical value)

Assume, R f = 10KΩ ; formula : Av= 1+ (Rf /R1)
 =>R1 = Rf /(1-Av )= 1KΩ
WAVE FORM

PROCEDURE:
1. Connect the circuit as per the circuit diagram.
2. Keeping the input voltage constant, vary the frequency from 500Hz to 3MHz in regular steps
and note down the corresponding output voltage.
3. Plot the graph: Gain (dB) Vs Frequency
4. Calculate the bandwidth from the graph.
5. To measure the Input and Output current, connect ammeter in μA range and mA range in series with
Input resistance and Load resistance respectively. Measure input current(Ii) and output current(Io) by
keeping Vi and Frequency of input signal a constant value.
OBSERVATIONS:
Vi=1.15V
Frequency Output Voltage (V0) Gain = 20 log(V0/Vi)
(Hz) (volts)
(dB)
500 2.1 x 10 25.23
1000 2.1 x 10 25.23
1500 2.1 x 10 25.23
2100 2.1 x 10 25.23
3000 2.1 x 10 25.23
4000 2.1 x 10 25.23
10K 1.8 x 10 21.94
15K 1.2 x 10 20.36
25K 0.9 x 10 17.87
300K 0.6 x 10 14.34
900K 0.4 x 10 10.83
Ii =0.27μA Io =0.37mA
Ri=Vi/Ii= 4.44 MΩ
Ro= Vo/Io=38.7KΩ
MODEL GRAPH:

RESULT :
Thus, the Voltage Series feedback amplifier was designed, and frequency response was plotted.
Theoretical and Practical value of the following parameters are compared.
Practical Value Theorical Value

Bandwidth 300KHz ∞
Input Impedance 4.44MΩ ∞
Output Impedance 38.7KΩ 0

EXPT.NO.2 VOLTAGE SHUNT FEEDBACKAMPLIFIER

DATE:
AIM:
To design and test the voltage-shunt feedback amplifier and to calculate the following parameters with
and without feedback.
1. Bandwidth and cut-off frequencies.
2. Input and output impedance.
APPARATUS REQUIRED:
S.No EQUIPMENTS RANGE QUANTITY
1 AFO (0-3)MHz 1
2 CRO (0-20)MHz 1
3 Resistors As per design Each one
4 Dual Power supply (0-30V) 1
5 Op-amp μA741 1
6 Bread Board - 1
7 Connecting wires - Required Quantity
THEORY:
In voltage shunt feedback amplifier, the feedback signal voltage is given to the base of the
transistor in shunt through the base resistor RB. This shunt connection tends to decrease the input
resistance and the voltage feedback tends to decrease the output resistance. In the circuit RB appears
directly across the input base terminal and output collector terminal. A part of output is feedback to input
through RB and increase in IC decreases IB. Thus negative feedback exists in the circuit. So this circuit
is also called voltage feedback bias circuit. This feedback amplifier is known a transresistance amplifier.
It amplifies the input current to required voltage levels. The feedback path consists of a resistor and a
capacitor.
PIN DIAGRAM

CIRCUIT DIAGRAM
DESIGN:
Given values, Av =3(Theoretical value)

Let, Rf = 3KΩ ; formula : Av= -(Rf /R1)
 =>R1 = Rf /(-Av )=1K Ω.
WAVE FORM

PROCEDURE:
2. Keeping the input voltage constant, vary the frequency from 50Hz to 3MHz in regular steps
and note down the corresponding output voltage.
3. Plot the graph: Gain (dB) Vs Frequency.
4. Calculate the bandwidth from the graph.
5. To measure the Input and Output current, connect ammeter in μA range and mA range in series
with Input resistance and Load resistance respectively. Measure input current(Ii) and output
current(Io) by keeping Vi and Frequency of input signal a constant value.
Observations:
Vi=1.15 V
Frequency Output Voltage (V0) Gain = 20 log(V0/Vi)
(Hz) (volts)
(dB)
500 2.1 x 10 25.23
1000 2.1 x 10 25.23
1500 2.1 x 10 25.23
2100 2.1 x 10 25.23
3000 2.1 x 10 25.23
4000 2.1 x 10 25.23
10K 1.8 x 10 21.94
15K 1.2 x 10 20.36
25K 0.9 x 10 17.87
300K 0.6 x 10 14.34
500K 0.4 x 10 10.83
Ii = 0.3μA Io =0.35mA
Ri=Vi/Ii=3.83MΩ
Ro= Vo/Io=28.57KΩ
MODEL GRAPH:

RESULT :
Thus the Voltage Shunt feedback amplifier was designed and frequency response was
plotted. Theoretical and Practical value of the following parameters are compared.
Practical Value Theorical Value

Bandwidth 99.9 KHz ∞
Input Impedance 3.83MΩ ∞
Output Impedance 28.57KΩ 0

EXPT.NO.3
INTEGRATOR
DATE:
AIM:
To design an Integrator circuit for the given specifications using Op-Amp IC 741.
APPARATUS REQUIRED:
S.No Name of the Apparatus Range Quantity

1. Function Generator 3 MHz 1
2. CRO 30 MHz 1
3. Dual RPS 0 – 30 V 1
4. Op-Amp IC 741 1
5. Bread Board 1
6. Resistors As per design 1
7. Capacitors As per design 1
8. Connecting wires and probes As required
THEORY:
A circuit in which the output voltage waveform is the integral of the input voltage waveform is
the integrator. Such a circuit is obtained by using a basic inverting amplifier configuration if the
feedback resistor Rf is replaced by a capacitor Cf . The expression for the output voltage is given as,
Vo = - (1/Rf C1 ) ∫ Vi dt
Here the negative sign indicates that the output voltage is 180 0 out of phase with the input
signal. Normally between fa and fb the circuit acts as an integrator. Generally, the value of fa < fb .
The input signal will be integrated properly if the Time period T of the signal is larger than or equal to
R f Cf .
That is,
T ≥ Rf Cf
The integrator is most commonly used in analog computers and ADC and signal-wave shaping
circuits.
1. Select fa equal to the highest frequency of the input signal to be differentiated. Then, assuming a
value of C1 < 1 µF, calculate the value of Rf.
2. Choose fb = 20 fa and calculate the values of R1 and Cf so that R1C1 = Rf Cf.
PIN DIAGRAM:
GRT Institute of Engineering and Technology |Tiruttani 10 | P a g e

CIRCUIT DIAGRAM OF INTEGRATOR:
MODEL GRAPH :
DESIGN:
To obtain the output of an Integrator circuit with component values R1Cf = 0.1ms, Cf = 0.1µF and
also if 1V peak sine wave at 1000Hz is applied as input.
We know the frequency at which the gain is 0 dB, fb = 1 / (2π R1 Cf)
Therefore R1 = 1.6KΩ ; Let Vi = 1 V and f = 1000 Hz, ; VO = - (1/R1 Cf) Vi dt
PROCEDURE:
1. Connections are given as per the circuit diagram.
2. + Vcc and - Vcc supply is given to the power supply terminal of the Op-Amp IC.
3. By adjusting the amplitude and frequency knobs of the function generator, appropriate input voltage
is applied to the inverting input terminal of the Op-Amp.
4. The output voltage is obtained in the CRO and the input and output voltage waveforms are plotted in
a graph sheet.
OBSERVATIONS:
(a). Integrator :
Input Voltage Output Voltage
1v(p-p) 0.5(p-p)
RESULT:
Thus the Integrator circuit for the given specifications using Op-Amp IC 741 was designed and tested and
its input and output waveforms were drawn.

EXPT.NO.4
DIFFERENTIATOR
DATE:
AIM:
To design a Differentiator circuit for the given specifications using Op-Amp IC 741.
APPARATUS REQUIRED:

1. Function Generator 3 MHz 1
2. CRO 30 MHz 1
3. Dual RPS 0 – 30 V 1
4. Op-Amp IC 741 1
5. Bread Board 1
6. Resistors As per design 1
7. Capacitors As per design 1
THEORY:
The differentiator circuit performs the mathematical operation of differentiation; that is, the
output waveform is the derivative of the input waveform. The differentiator may be constructed from a
basic inverting amplifier if an input resistor R1 is replaced by a capacitor C1 . The expression for the
output voltage is given as,
Vo = - Rf C1 ( dVi /dt )
Here the negative sign indicates that the output voltage is 180 0 out of phase with the input
signal. A resistor Rcomp = Rf is normally connected to the non-inverting input terminal of the op-amp to
compensate for the input bias current. A workable differentiator can be designed by implementing the
following steps:
3. Select fa equal to the highest frequency of the input signal to be differentiated. Then, assuming a
value of C1 < 1 µF, calculate the value of Rf.
4. Choose fb = 20 fa and calculate the values of R1 and Cf so that R1C1 = Rf Cf.
PIN DIAGRAM:

CIRCUIT DIAGRAM OF DIFFERENTIATOR:
MODEL GRAPH :
DESIGN:
[To design a differentiator circuit to differentiate an input signal that varies in frequency
from 10 Hz to about 1 KHz. If a sine wave of 1V peak at 1000Hz is applied to the differentiator,
draw its output waveform.]
Given, fa = 1 KHz We know the frequency at which the gain is 0 dB, f a = 1 / (2π Rf C1)
Let us assume C1 = 0.1 µF ; then Rf = 1.6KΩ ;Let Vi = 1 V and f = 1K Hz; Vo = - Rf C1 (dVi
/dt )
PROCEDURE:
7. By adjusting the amplitude and frequency knobs of the function generator, appropriate input voltage
is applied to the inverting input terminal of the Op-Amp.
8. The output voltage is obtained in the CRO and the input and output voltage waveforms are plotted in
a graph sheet.
OBSERVATIONS:
(b). Integrator :
Input Voltage Output Voltage
1V Spike at transition (0.9 V)
RESULT:
Thus the Differentiator circuit for the given specifications using Op-Amp IC 741 was designed and tested
and its input and output waveforms were drawn.

EXPT.NO.5
DATE: CLIPPERS
AIM:
To design and construct a clippers circuit using op-amp and verify the output wave forms.
APPARATUS REQUIRED:
S.No EQUIPMENTS RANGE QUANTIT Y

1 AFO (0-1)MHz 1
2 CRO (0-20)MHz 1
3 Resistors 1K, 10KΏ Each one
4 Power supply (0-30V) 1
5 Op-Amp uA741 1
5 Capacitors 0.1uF 1
6 Connecting wires - Required
7 Bread Board - 1
THEORY:
The circuit is basically a rectifier circuit, which clips the input waveform according to the
required specification. The diode acts as a clipper. There are several clippers like positive clipper,
negative clipper, etc. Depending upon the connection of diode it can be classified as series and
shunt.
CIRCUIT DIAGRAM:
POSITIVE CLIPPER: MODEL GRAPH

NEGATIVE CLIPPER: MODEL GRAPH
TABULATION:
POSITIVE CLIPPER:
INPUT OUTPUT
AMPLITUDE: AMPLITUDE:
TIME PERIOD: TIME PERIOD:
TABULATION:
NEGATIVE CLIPPER:
INPUT OUTPUT
RESULT:
Thus clipper circuits was designed and constructed and their output waveforms are verified.

EXPT.NO.6
DATE: CLAMPERS
AIM:
To design and construct a clippers circuit using op-amp and verify the output wave forms.
APPARATUS REQUIRED:

1 AFO (0-1)MHz 1
2 CRO (0-20)MHz 1
3 Resistors 1K, 10KΏ Each one
5 Op-Amp uA741 1
5 Capacitors 0.1uF 1
7 Bread Board - 1
THEORY:
The clamper circuit is a type of wave shaping circuit in which the DC level of the input
signal is altered. The DC voltage is varied accordingly and it is classified as positive clamper or
negative clamper accordingly.
CLAMPER CIRCUIT:

MODEL
GRAPH:
TABULATION:
POSITIVE CLAMPER:
INPUT OUTPUT
TABULATION:
NEGATIVE CLAMPER:
INPUT OUTPUT
RESULT:
Thus clamper wave shaping circuits was designed and their output waveforms are verified..

EXPT.NO.7
DATE: INSTRUMENTATION AMPLIFIER
AIM:
To design and test instrumentation amplifier using operational amplifier IC 741
APPARATUS REQUIRED:
S.No Name of the Apparatus Range Quantit

y
1. CRO 30 MHz 1
2. Dual RPS 0 – 30 V 2
3. Op-Amp IC 741 3
4. Bread Board 1
5. Resistors As per design
THEORY:
Instrumentation amplifier is a kind of differential amplifier with additional input buffer stages.
The addition of input buffer stages makes it easy to match (impedance matching) the amplifier with the
preceding stage. Instrumentation are commonly used in industrial test and measurement application.
A circuit providing an output based on the difference between two inputs (times a scale factor) is
given in the circuit diagram. In the circuit diagram, opamps labelled IC1 and IC2 are the input buffers.
Anyway the gain of these buffer stages are not unity because of the presence of R1 and Rg. Op amp
labelled IC3 is wired as a standard differential amplifier. R3 connected from the output of IC3 to its
non-inverting input is the feedback resistor. R2 is the input resistor. The voltage gain of the
instrumentation amplifier can be expressed by using the equation below.
Voltage gain (Av) = Vo/ (V2-V1) = (1 + 2R1/Rg) x R3/R2
Vo = {(1 + 2R1/Rg) x R3/R2} (V2-V1)
A practical instrumentation amplifier circuit designed based on uA 741 op amp is shown below.
The amplifier operates from +/-12V DC and has a gain 10.If you need a variable gain, then replace Rg
with a 5K POT.
An instrumentation amplifier is a differential amplifier optimized for high input impedance and
high CMRR. An instrumentation amplifier is typically used in applications in which a small differential
voltage and a large common mode voltage are the inputs.
PIN DIAGRAM:

CIRCUIT DIAGRAM:
DESIGN:
𝑉𝑜 2𝑅1 𝑅
Voltage gain, 𝐴𝑣 = (𝑉2 −𝑉1 )
= (1 + ) ( 3)
𝑅𝑔 𝑅2
2𝑅1 𝑅3
∴ 𝑉0 = (1 + ) ( ) (𝑣2 − 𝑣1 )
𝑅𝑔 𝑅2
PROCEDURE:
3. Set the Input voltage V1 and V2 by DRPS.
4. Calculate the Differential voltage. i.e., V2-V1
5. For setting different ranges of resistance value of RG, the output voltage is can obtained in the CRO
and note down.
6. Compare the obtained voltage with theoretical output voltage by using the formula
OBSERVATIONS:
Input Voltage (V1) = 5 volts
Input Voltage (V2) = 6 volts
Theoretical Output voltage
2𝑅1 𝑅
𝑉0 = (1 + ) ( 3) (𝑣2 − 𝑣1 )
𝑅𝑔 𝑅2
Sl. Differential Resistance Output voltage (Vo)

No voltage(V2 – V1) RG (Ω) Theoretical Obtained
1 1.0 x5 2.2k Ω 9.55 9.2
2 4.7k Ω 7.15 7
3 10k Ω 6 5.85
RESULT:
Thus the design and testing of the Instrumentation Amplifier was done.

EXPT.NO.8
ACTIVE LOW-PASS FILTER
DATE:
AIM:
Design a Second order active Butterworth low pass filter for the given specifications
using IC 741.
APPARATUS REQUIRED:
1. Function Generator 3MHz 1
1. CRO 30 MHz 1
2. Power Supply 15v-0-15v 1
3. Op-Amp IC 741 1
4. Bread Board - 1
6. Capacitors As per design
THEORY:
Second order Low pass filter:
A LPF allows only low frequency signals up to a certain break-point fH to pass through,
while suppressing high frequency components. The range of frequency from 0 to higher cut
off frequency fH is called pass band and the range of frequencies beyond fH is called stop
band.
PIN DIAGRAM:
CIRCUIT DIAGRAM:

Design:
Given:
1
=> 𝑓𝐻 = 𝟏𝟎𝟎𝟎 = − − − − − − − −(1)
2𝜋𝑅𝐶
Let C = 0.1µF => ∴ From Equation (1) =>R = -----------
=> For n = 2 ∴ α (damping factor) = 1.414,
Pass Band Gain Ao = (3 – α) = (3-1.414)=1.586.
𝑅
∴ 𝐴𝑜 = (1 + 𝑅𝑓 ) = 1.586 − − − − − (2)
1
= 1 + 0.586
Let R1 = 10 KΩ, From Equation (2), Rf = 5.86 KΩ
Model Graph:
Observation:
Input voltage (Vin) = 1.2 Volt(s)
Input Frequency Output voltage Gain = 20 log10 (Vo/Vin) in
S.No.
(Hz) Vo(Volts) dB
1 100 2 4.43
2 500 2 4.43
3 1K 2 4.43
4 1100 1.8 3.52
5 1200 1.6 2.50
6 1300 1.4 1.33
7 1500 1.2 0
8 1800 1 -3.52
9 2750 0.6 -6.02
10 5000 0.2 -15.56
PROCEDURE:
3. The signal which has to be made sine is applied to the RC filter pair circuit with the non-inverting
terminal.
4. The supply voltage is switched ON and the o/p voltages are recorded through CRO by varying
different frequencies from 10 Hz to 100 KHz.
5. Tabulate the readings. Calculating gain through the formula and plotting the frequency response
characteristics using Semi-log graph sheet and finding out the 3 dB line for fc.
RESULT:
Thus the second order active Butterworth low pass filter for the given specifications using IC
741 were designed and frequency response curve were drawn on semi log graph.
EXPT.NO.9
HIGH PASS FILTER
DATE:
AIM:
Design a Second order active Butterworth High pass filter for the given specifications using IC
741
APPARATUS REQUIRED:
y
1. CRO 30 MHz 1
3. Op-Amp IC 741 1
4. Bread Board 1
THEORY:
Second order High pass filter:
The high pass filter is the complement of the low pass filter. Thus the high pass filter can be
obtained by interchanging R and C in the circuit of low pass configuration. A high pass filter allows
only frequencies above a certain bread point to pass through and at terminates the low frequency
components. The range of frequencies beyond its lower cut off frequency fL is called stop band.
PIN DIAGRAM:
CIRCUIT DIAGRAM:

Design:
Given:
1
=> 𝑓𝐿 = 𝟏𝟎𝟎𝟎 = − − − − − − − −(1)
2𝜋𝑅𝐶
Let C = 0.1µF => ∴ From Equation (1) =>R = ----------
=> For n = 2 ∴ α (damping factor) = 1.414,
Pass Band Gain Ao = (3 – α) = (3-1.414)=1.586.
𝑅
∴ 𝐴𝑜 = (1 + 𝑅𝑓 ) = 1.586 − − − − − (2)
1
= 1 + 0.586
Let, R1 = 10 KΩ, From Equation (2), Rf = 5.86 KΩ
Model Graph:
Observation:
Input Frequency
(Hz) Output voltage Gain = 20 log10 (Vo/Vin) in
S.No.
Vo(Volts) dB
1 100 0
2 300 0.4 -15.56
3 500 0.6 -7.60
4 800 0.8 -3.52
5 1000 1.2 0
6 2000 1.6 2.50
7 3000 1.8 3.52
8 5000 2.1 4.86
9 7000 2.1 4.86
10 10000 2.1 4.86
PROCEDURE:
3. The signal which has to be made sine is applied to the RC filter pair circuit with the non-inverting
terminal.
4. The supply voltage is switched ON and the o/p voltages are recorded through CRO by varying different
frequencies from 10 Hz to 100 KHz.
RESULT:
Thus the second order active Butterworth High pass filter for the given specifications using IC 741 were
designed and frequency response curve were drawn on semi log graph.

EXPT.NO.10
BAND PASS FILTER
DATE:
AIM:
Design a Second order active Butterworth Band pass filter for the given specifications using IC
741
APPARATUS REQUIRED:
y
1. CRO 30 MHz 1
3. Op-Amp IC 741 1
4. Bread Board 1
THEORY:
Second order Band pass filter:
The BPF is the combination of high and low pass filters and this allows a specified range of
frequencies to pass through. It has two stop bands in range of frequencies between 0 to fL and beyond
fH. The band between fL and fH is called pass band. Hence its bandwidth is BW =(fL-fH).
PIN DIAGRAM:
CIRCUIT DIAGRAM:

Design
Given :
fo =1.7KHz; Q=8; Ao=65 at center frequency fo.
An expression for the Center frequency is given by
1
𝑓𝑜 =
2𝜋√(𝑅1 ∥ 𝑅3 )𝑅2 𝑅1 𝐶1 𝐶2
If C1=C2=C=0.01µf Then, Center frequency becomes
1 𝑅1 + 𝑅3
𝑓𝑜 = √
2𝜋𝐶 𝑅1 𝑅2 𝑅3
The resistor values can be found using the following formulas
𝑄 𝑄 𝑄
𝑅1 = ≈ 𝟏. 𝟐𝑲Ω ; 𝑅2 = ≈ 𝟏𝟓𝟎𝑲Ω; 𝑅3 = ≈ 𝟏. 𝟐𝑲Ω
2𝜋𝑓𝑜 𝐶𝐴𝑜 𝜋𝑓𝑜 𝐶 2𝜋𝑓𝑜 𝐶(2𝑄 2 − 𝐴𝑜 )
The gain can be found by,
𝑅2
𝐴𝑜 =
2𝑅1
Model Graph

Observation:
Input Frequency
(Hz) Output
Gain = 20 log10 (Vo/Vin) in
S.No. voltage
dB
Vo(Volts)
1 320 3.1 11.41
2 450 3.6 12.70
3 610 4 13.62
4 800 4 13.62
5 1K 4 13.62
6 1.3K 4 13.62
7 1.5K 3.6 12.70
8 2K 3 10.52
9 4K 2 7.60
10 10K 1 1.58
PROCEDURE:
8. The signal which has to be made sine is applied to the RC filter pair circuit with the non-inverting terminal.
9. The supply voltage is switched ON and the o/p voltages are recorded through CRO by varying different
frequencies from 10 Hz to 100 KHz.
RESULT:
Thus the second order active Band pass filter for the given specifications using IC 741 were designed and
frequency response curve were drawn on semi log graph.

EXPT.NO.: 11 PLL CHARACTERISTICS

DATE:
AIM:
To construct and study the operation of PLL IC 565 and determine its Characteristics.
APPARATUS REQUIRED:
S.No Components Range Quantity
1 IC 565 - 1
2 Resistors 6.8 KΩ 1
3 Capacitors 0.001 µF 1 each
0.1 µF, 1 µF
4 Function Generator (Digital) 1 Hz – 2 MHz 1
5 C.R.O - 1
6 Dual Power Supply 0- 30 V 1
PIN DIAGRAM (IC 565 - PLL):
THEORY:
The PLL IC 565 is usable over the frequency range 0.1 Hz to 500 kHz. It has highly stable centre
frequency and is able to achieve a very linear FM detection. The output of VCO is capable
of producing TTL compatible square wave. The dual supply is in the range of ±6V to ±12V. The IC
can also be operated from single supply in the range 12V to 24V.


The phase locked loop consists of a phase detector, a voltage control oscillator and, in between
them, a low pass filter is fixed. The input signal „Vi‟ with an input frequency „Fi‟ is conceded by a
phase detector. Basically the phase detector is a comparator which compares the input frequency fi
through the feedback frequency fo. The output of the phase detector is (fi+fo) which is a DC
voltage. The out of the phase detector, i.e., DC voltage is input to the low pass filter (LPF); it
removes the high frequency noise and produces a steady DC level, i.e., Fi-Fo. The Vf is also a
dynamic characteristic of the PLL.
PROCEDURE:
1. The connections are given as per the circuit diagram.

2. Measure the free running frequency of VCO at pin 4, with the input signal Vi set equal to zero.
Compare it with the calculated value = 0.25 / (RT CT).
3. Now apply the input signal of 1 VPP square wave at a 1 KHz to pin 2. Connect one channel of
the scope to pin 2 and display this signal on the scope.
4. Gradually increase the input frequency till the PLL is locked to the input frequency. This
frequency f1 gives the lower end of the capture range. Go on increasing the input frequency, till Pll
tracks the input signal, say ,to a frequency f2.This frequency f2 gives the upper end of the lock range.
If input frequency is increased further, the loop will get unlocked.
5. Now gradually decrease the input frequency till the Pll is again locked. This is the frequency f3,the
upper end of the capture range .Keep on decreasing the input frequency until the loop is unlocked.
This frequency f4 gives the lower end of the lock range.
6. The lock range ∆fL = (f2 – f4).Compare it with the calculated value of ± 7.8 fo / 12 .Also the
capture range is ∆fc = (f3 – f1).Compare it with the calculated value of capture range.
∆fc = ± (∆fL / (2π)(3.6)(103) C)1/2
CIRCUIT DIAGRAM:

MODEL GRAPH:
OBSERVATION:
S.No. Amplitude(mV) Time period
2. Output 1.8*2V = 3.6V 4.4*1 ms = 4.4 ms
MODEL GRAPH:
OUTPUT(MODEL):
RESULT:
Thus the PLL circuit is constructed and its Characteristics is determined and the frequency
multiplier circuit using PLL is constructed and studied.

EXPT.NO.: 12 FREQUENCYMULTIPLIER USING PLL
DATE:
AIM:
To construct Frequency Multiplier circuit using PLL IC 565 and verify its output .
APPARATUS REQUIRED:
S.No Components Range Quantity
1 IC 565 - 1
2 Resistors 6.8 KΩ 1
3 Capacitors 0.001 µF 1 each
0.1 µF, 1 µF
4 Function Generator (Digital) 1 Hz – 2 MHz 1
5 C.R.O - 1
6 Dual Power Supply 0- 30 V 1
PIN DIAGRAM (IC 565 - PLL):
THEORY:
A divide by N network is inserted between the VCO output and the phase comparator input.
In the lock state, the VCO output frequency fo is given by
fo= N fs
The multiplication factor can be obtained by selecting a proper scaling factor N of the counter.

PROCEDURE:
1 The connections are given as per the circuit diagram.

2 Measure the free running frequency of VCO at pin 4, with the input signal Vi set equal to zero.
Compare it with the calculated value = 0.25 / (RT CT).
3 Now apply the input signal of 1 VPP square wave at a 1 KHz to pin 2. Connect one channel of
the scope to pin 2 and display this signal on the scope.
4 Gradually increase the input frequency till the PLL is locked to the input frequency.
5 observe the multiplied frequency output on the CRO
6 -plot the output wave form on the graph sheet.
PLL USED AS FREQUENCY MULTIPLIER
Design:
Let V+ =10 V and V- = -10
Let the input frequency be 1 Khz, and the output frequency 5 Khz, VCO should run at 5 Khz
frequency , fo=(1.2/4*R1*C1)=5Khz
Take C1=0.01μF Then R1=6K Take C2=10μF and C3=0.001μF use Cc=10μF and R=10k for ac
coupling of input signal
CIRCUIT DIAGRAM OF PLL AS FREQUENCE MULTIPLIER:
OBSERVATION:
S.No. Amplitude(mV) Time
period(ms)
1. Input 1.2 4.4
2. Output 3.6 1.8

MODEL GRAPH:
RESULT:
Thus the frequency Multiplier using PLL circuit is constructed and its verified.

EXPT.NO.: 13
R-2R LADDER TYPE D- A CONVERTER USING OP-AMP.
DATE:
AIM:
To design a 8-bit R-2R Ladder Type D- A Converter using Op-amp and observe the output.
APPARATUS REQUIRED:
S.N Components Specification Quantity

o
1. Op-amp IC741 1
2. Resistor R1=2KΩ As req
3. Regulated Power supply (0-30)KHz 1
4. DC power supply ±15V and -5V 1
5. Multimeter - 1
THEORY:
A digital-to-analog converter (DAC, D/A, D2A or D-to-A) is a circuit that converts

digital data (usually binary) into an analog signal (current or voltage). One important specification of
a DAC is its resolution. It can be defined by the numbers of bits or its step size. Wide range of
resistors used Weighted Resistor type DAC. This can be avoided by using R-2R ladder type DAC
where only two values of resistors are required.

CIRCUIT DIAGRAM:
1. To design 3 bit R-2R Digital to Analog converter to convert analog voltage of

binary bit 100.
If binary bit 001:

OBSERVATION:
Vref = -5V
d1 d2 d3 Practical
V0
0
0 0 0
1.25
0 0 1
2.5
0 1 1
3.75
0 1 1
5
1 0 0
6.25
1 0 1
7.5
1 1 0
8.75
1 1 1
PROCEDURE:
□ Check the component using multi meter.
□ Setup the circuit stage by stage on the breadboard
□ Verify the working of circuit separately.
□ Complete the circuit and apply -5V ref if bit=1.
□ Observe the output using multimeter.
□ Plot the output wave form on the graph sheet.
RESULT:
Thus the design of R-2R Ladder Type D- A Converter using Op-amp and its output
isobserved.

EXPT.NO.14
DATE: RC PHASE SHIFT OSCILLATOR
AIM:
To design and construct the RC Phase shift oscillator for the out frequency of 200 Hz and
verify its output waveform and frequency.
APPARATUS REQUIRED:
y
1. CRO 30 MHz 1
2. Op-Amp IC 741 1
3. Bread Board 1
THEORY:
Basically, positive feedback of a fraction of output voltage of a amplifier fed to the input in the
same phase, generate sine wave. The op-amp provides a phase shift of 180 degree as it is used in the
inverting mode. An additional phase shift of 180 degree is provided by the feedback RC network. The
frequency of the oscillator fo is given by,
1
𝑓𝑜 =
2𝜋𝑅𝐶√6
Also the gain of the inverting op-amp should be at least 29, or Rf > 29 R1
PIN DIAGRAM:
CIRCUIT DIAGRAM:

Design:
Frequency of oscillation,
1
𝑓𝑜 =
2𝜋𝑅𝐶√6
Av = [𝑅𝑓 /𝑅1 ] = 29
𝑅1 = 10 𝑅 ; 𝑅𝑓 = 29 𝑅1
Given 𝑓𝑜 = 200 𝐻𝑧. ; Let, 𝐶 = 0.1𝐹
1
𝑅= ≈ 3.3𝐾Ω
(2𝜋𝑓𝑜 𝐶)√6
To prevent the loading of amplifier by RC network, R1≥10R
𝑅1 = 10 ∗ 𝑅 = 33𝐾Ω
Since 𝑅𝑓 = 29𝑅1
𝑅𝑓 = 29 ∗ 33𝐾Ω
𝑅𝑓 = 957𝐾Ω ≈ 1𝑀Ω
Model Graph:
Observation:
Peak to peak amplitude of the output = 8 Volts.
Frequency of oscillation (1/T)=f = 1/5.6ms=168 Hz.
PROCEDURE:
1. Connect the components as shown in the circuit

2. Switch on the power supply and CRO.
3. Note down the output voltage at CRO.
4. Plot the output waveform on the graph.
5. Compare the output with the theoretical value of oscillation.
RESULT:
Thus, the RC phase shift oscillator is studied and its output waveform traced. Obtained
frequency of Oscillations is, RC phase shift fo=168 Hz.;

EXPT.NO.15
DATE: WEIN BRIDGE OSCILLATOR
AIM:
To design and construct Wein Bridge Oscillator with the frequency of 1 KHz and verify its
output waveform and frequency.
APPARATUS REQUIRED:
y
1. CRO 30 MHz 1
2. Op-Amp IC 741 1
3. Bread Board 1
THEORY:
In wein bridge oscillator, wein bridge circuit is connected between the amplifier input terminals
and output terminals. The bridge has a series of RC network in one arm and parallel network in the
adjoining arm. In the remaining 2 arms of the bridge resistors R1and Rf are connected. To maintain
oscillations total phase shift around the circuit must be zero and loop gain unity. First condition occurs
only when the bridge is balanced. Assuming that the resistors and capacitors are equal in value, the
resonant frequency of balanced bridge is given by,
1
𝑓𝑜 =
2𝜋𝑅𝐶
At the frequency the gain required for sustained oscillations is given by,
𝑅
𝐴 = 1 + 𝑅𝑓 = 3 ∴ 𝐴 = 3 => 𝑅𝑓 = 2𝑅1
1
PIN DIAGRAM:

CIRCUIT DIAGRAM:
R1=10 k Rf =20 k
+VCC
+15V
7
–
2 6
IC741
+ 4
3
-Vcc
-15V CRO VO
R = 16k  C 0.01 f
C
16k  0.01  f
R
Design:
Gain required for sustained oscillation is Av = 1/ = 3; 1+Rf/R1 = 3  Rf = 2R1
1
Frequency of Oscillation 𝑓𝑜 = 2𝜋𝑅𝐶; Given fo = 1 KHz ; Let C = 0.01 F;
1
∴𝑅= ; R = 16 K; Let R1 = 10 K =>  Rf = 2 * 10 K = 20K
2𝜋𝑓𝑜 𝐶
Model Graph:
Observation:
Peak to peak amplitude of the output = 6.8 Volts.
Frequency of oscillation f = 900 Hz.
PROCEDURE:
6. Connect the components as shown in the circuit.
7. Switch on the power supply and CRO.
8. Note down the output voltage at CRO.
9. Plot the output waveform on the graph.
10. Compare the output with the theoretical value of oscillation.
RESULT:
Hence the Wein bridge oscillator is studied, and its output waveform traced. Obtained frequency of
Oscillations is, Wein Bridge fo=800 Hz.

EXPT.NO.16
HARTLEY OSCILLATOR
DATE:
AIM:
To design and construct a Hartley oscillator for the given frequency (f0).
APPARATUS REQUIRED:
1 AFO (0-1)MHz 1
2 CRO (0-20)MHz 1
3 Resistors 100 Ohm,100K Ohm Potential Each one
meter
4 Power supply Dual (0-30V) 1
5 Op-amp uA741 1
6 DLB - 2
7 DCB - 1
THEORY:
Hartley oscillator is a type of sine wave generator. The oscillator derives its initial output
from the noise signals present in the circuit. After considerable time, it gains strength and
thereby producing sustained oscillations. Hartley Oscillator have two major parts namely –
amplifier part and feedback part. The amplifier part has a typically Inverting op-amplifies circuit. In
the feedback path, there is a LCL network. The feedback network generally provides a fraction of
output as feedback.
CIRCUIT DIAGRAM:
10KΩ
10mH 1mH
0.1μF

DESIGN:
For Hartley oscillator, the frequency of oscillations is given by
fo = 1/ (2π √ (Leq C))
Where Leq = L1 + L2
For given f0=5KHz, Assume L1= 10mH and L2= 1mH and find C= 0.1 μF
PROCEDURE:
1. Connections are made as per the circuit diagram.

2. Feed the output of the oscillator to a C.R.O by making adjustments in the
Potentiometerconnected obtain a stable sine Wave.
3. Measure the time period of the waveform obtained on CRO. & Calculate the
Frequency of oscillations.
OBSERVATION:
Amplitude (V) Time(s) Frequency (Hz)

5 0.215ms 4.65 KHz
MODEL GRAPH:

RESULT:
Thus, the Hartley oscillator was designed and the frequency of oscillation was obtained
Theoretical frequency :
Practical frequency :

EXPT.NO.17
COLPITTS OSCILLATOR
DATE:
AIM:
To design and construct a Colpitts oscillator for the given frequency (f0).
APPARATUS REQUIRED:
1 AFO (0-1)MHz 1
2 CRO (0-20)MHz 1
3 Resistors 100 Ohm,1000K Ohm Each one

Potential meter
4 Power supply Dual (0-30V) 1
5 Op-amp uA741 1
6 DLB - 1
7 DCB - 2
THEORY:
A Colpitts oscillator is the electrical dual of a Hartley oscillator. In the Colpitts circuit, two
capacitors and one inductor determine the frequency of oscillation. The oscillator derives its initial
output from the noise signals present in the circuit. After considerable time, it gains strength
and thereby producing sustained oscillations. It has two major parts namely – amplifier part and
feedback part. The amplifier part has a typically Inverting op-amplifies circuit. In the feedback path,
there is a CLC network. The feedback network generally provides a fraction of output as feedback.
CIRCUIT DIAGRAM
10KΩ
0.01μF 0.1μF
20mH

DESIGN:
The frequency of oscillations in the Colpitts oscillator is given by
f0 = 1/ (2π√ (LCeq))
Where Ceq = C1 C2 / (C1 + C2)
For given f0= 15KHz Assume C1= 0.01 μF , C2 = 0.1 μF and find L1 =20mH
PROCEDURE:
1. Connections are made as per the circuit diagram.
2. Feed the output of the oscillator to a C.R.O by making adjustments in the Potentiometer
connected obtain a stable sine Wave.
3. Measure the time period of the waveform obtained on CRO. & Calculate the Frequency
of oscillations.
OBSERVATION:
Amplitude (V) Time(s) Frequency (Hz)

6 0.7 x0.1 ms 14.28KHz
MODEL GRAPH:

RESULT:
Thus, the Colpitts oscillator was designed, and the frequency of oscillation was
obtainedTheoretical frequency :15KHz
Practical frequency :14.28KHz

SIMULATION USING PSPICE

EXPT.NO.18
TUNED COLLECTOR OSCILLATOR
DATE:
AIM:
To Simulate the Tuned collector oscillator by using PSPICE software.
SYSTEM REQUIRED:
• PC with SPICE Software
• PC
THEORY:
Tuned collector oscillation is a type of transistor LC oscillator where the tuned circuit (tank)
consists of a transformer and a capacitor is connected in the collector circuit of the transistor. Tuned
collector oscillator is of course the simplest and the basic type of LC oscillators. The tuned circuit
connected at the collector circuit behaves like a purely resistive load at resonance and determines the
oscillator frequency. The common applications of tuned collector oscillator are RF oscillator circuits,
mixers, frequency demodulators, signal generators etc.
PROCEDURE:
1. Construct the circuit as per the circuit diagram.
2. Initialize all the values.
3. Assign the nodes to the circuit.
4. Write the program corresponding to the node.
5. Simulate the program and the waveform was displayed.
CIRCUIT DIAGRAM:

MODEL GRAPH:
RESULT:
Thus, the Tuned Collector Oscillator was Simulated by using PSPICE software and the output
waveform was observed in the waveform viewer.

EXPT.NO.19
WEIN BRIGE OSCILLATOR
DATE:
AIM:
To Simulate the Wein bridge oscillator by using PSPICE software.
SYSTEM REQUIRED:
➢ PC with SPICE Software
➢ PC
THEORY:
Generally in an oscillator, amplifier stage introduces 180o phase shift and feedback network
introduces additional 180o phase shift, to obtain a phase shift of 360o around a loop. This is a condition
for any oscillator. But Wein bridge oscillator uses a non-inverting amplifier and hence does not provide any
phase shift during amplifier stage. As total phase shift requires is 0o or 2n radians, in Wein bridge
type no phase shift is necessary through feedback. Thus the total phase shift around a loop is 0o. The output
of the amplifier is applied between the terminals 1 and 3, which are the input to the feedback network.
While the amplifier input is supplied from the diagonal terminals 2 and 4, which is the output from the
feedback network. Thus amplifier supplied its own output through the Wein bridge as a feed back network..
PROCEDURE:
1. Click on the start menu and select the pspice simulation software
2. Select the parts required for the circuit from the parts menu and place them in the work
space
3. Connect the parts using wires
4. Save the file and select the appropriate analysis
5. Simulate the circuit and observe the corresponding output waveforms
CIRCUIT DIAGRAM:

MODEL GRAPH:
RESULT:
Thus, the Wein bridge Oscillator was Simulated by using PSPICE software and the output

EXPT.NO.20 DOUBLE AND STAGGERED TUNED AMPLIFIER

DATE:
AIM:
To Simulate the double and staggered tuned amplifier by using PSPICE software.
SYSTEM REQUIRED:
➢ PC with SPICE Software
➢ PC
THEORY:
A double-tuned amplifier is a tuned amplifier with transformer coupling between the amplifier
stages in which the inductances of both the primary and secondary windings are tuned separately with
a capacitor across each. The scheme results in a wider bandwidth than a single tuned circuit would
achieve. There is a critical value of transformer coupling coefficient at which the frequency response of
the amplifier is maximally flat in the pass band and the gain is maximum at the resonant frequency.
Designs frequently use a coupling greater than this (over- coupling) in order to achieve an even wider
bandwidth at the expense of a small loss of gain in the centre of the pass band. Staggered tuning is a
technique used in the design of multi-stage tuned amplifiers whereby each stage is tuned to a slightly
different frequency. In comparison to synchronous tuning (where each stage is tuned identically) it produces
a wider bandwidth at the expense of reduced gain.
It also produces a sharper transition from the passband to the stopband. Both staggered tuning and
synchronous tuning circuits are easier to tune and manufacture than many other filter types. The function of
stagger-tuned circuits can be expressed as a rational function and hence they can be designed to any
of the major filter responses such as Butterworth and Chebyshev. The poles of the circuit are easy to
manipulate to achieve the desired response because of the amplifier buffering between stages.
.
PROCEDURE:
CIRCUIT DIAGRAM:

MODEL GRAPH:

RESULT:
Thus, the Double and staggered tuned amplifier was Simulated by using PSPICE software
and the output waveform was observed in the waveform viewer.

EXPT.NO.21
BISTABLE MULTIVIBRATOR
DATE:
AIM:
To Simulate the Bistable multivibrator by using PSPICE software.
SYSTEM REQUIRED:
• PC
THEORY:
Bi- stable multivibrator contains two stable states and no quasi states. It requires two clock or
trigger pulses to change the states. It is also called as flip flop, scale of two toggle circuit, trigger
circuit. It is used in digital operations like counting, storing data’s in flip flops and production of
square waveforms.
PROCEDURE:
CIRCUIT DIAGRAM:
MODEL GRAPH:

RESULT:
Thus, the Bistable multivibrator was Simulated by using PSPICE software and the output

EXPT.NO.22
SCHMITT TRIGGER CIRCUIT WITH PREDICTABLE HYSTERESIS
DATE:
AIM:
To Simulate the schmitt trigger circuit with predictable hysteresis by using PSPICE .
SYSTEM REQUIRED:
• PC
THEORY:
A Schmitt trigger is a comparator circuit with hysteresis, implemented by applying positive
feedback to the input of an amplifier. It is an active circuit which converts an analog input signal to a
digital output signal. The circuit is named a "trigger" because the output retains its value until the input
changes sufficiently to trigger a change. In the non-inverting configuration, when the input is higher than
a certain chosen threshold, the output is high. When the input is below a different (lower) chosen
threshold, the output is low, and when the input is between the two levels, the output retains its value.
This dual threshold action is called hysteresis and implies that the Schmitt trigger possesses
memory and can act as a bistable circuit (latch or flip-flop). There is a close relation between the
two kinds of circuits: a Schmitt trigger can be converted into a latch and a latch can be converted into a
Schmitt trigger.
Schmitt trigger devices are typically used in signal conditioning applications to remove noise from
signals used in digital circuits, particularly mechanical switch bounce. They are also used in closed
loop negative feedback configurations to implement relaxation oscillators, used in function generators
and switching power supplies.
PROCEDURE:
CIRCUIT DIAGRAM:

MODEL GRAPH:
RESULT:
Thus, the Schmitt trigger was Simulated by using PSPICE software and the output waveform
was observed in the waveform viewer.

EXPT.NO.23
ANALYSIS OF POWER AMPLIFIER
DATE:
AIM:
To design and analysis the test performance of power amplifier.
APPARATUS REQUIRED:

1 AFO (0-1)MHz 1
2 CRO (0-20)MHz 1
3 Resistors 1.5 K, 6KΏ,2K, 14k,2.3K, 10K Each one
5 Transistors BC 107 1
6 Capacitors 28uF,10uF,720uF 1
THEORY:
An electronic amplifier is used for increasing the power of a signal. It does this by taking energy from
a power supply and controlling the output to match the input signal shape but with a larger amplitude. In
this sense, an amplifier may be considered as modulating the output of the power supply.
PROCEDURE:
2. Give a negative trigger input to Q2.
3. Note the output of transistor Q2 and Q1.
4. Find the value of Ton and Toff.
DESIGN EXAMPLE:
Given specifications:
VCC= 12V; hfe = 200; f=1 khz; I c = 2mA; Vce (sat) = 0.2v; VBB= - 2V
(i) To calculate RC:

RC = VCC - Vce (sat) / IC
RC = 12 – 0.2 / 2x10-3=5.9KΩ
(ii) To calculate R:
IB2(min)=IC2 / hfe= 2x10-3 / 200 = 10µ A Select IB2 > IB1(min) (say 25µ A)
Then R = VCC – V BE (sat) / IB2
Therefore R= 12-0.7/25x10-6=452KΩ
(iii) To calculate C:
T=0.69RC
1x10-3= 0.69x452x103xC C=3.2nf

To calculate R1 & R2:

VB1= {(VBB R1/ R1 +R2) + (VCE (sat) R2 / R1+R2)} Since Q1 is in off state ,VB1 ≤ 0
Then (VBB R1/ R1 +R2) = (VCE (sat) R2 / R1+R2) VBB R1 = VCE (sat) R2
2 R1 = 0.2 R2
Assume R1=10KΩ, then R2=100 KΩ
Consider, C1= 25pf (commutative capacitor)
TABULATION:
Amplitude(V) Time period(msec)

TON TOFF
CIRCUIT DIAGRAM:
MODEL GRAPH:
RESULT:
Thus, the Power amplifier is designed and the performance is tested.
Theoretical period :
Practical period :

CONTENT BEYOND SYLLABUS

EXPT.NO: 24
DESIGN AND TESTING OF SUMMING AMPLIFIER
DATE:
AIM:
To design and test the operation of Summing amplifier.
APPARATUS REQUIRED:
S.No Components Specification Quantity
1. Resistor 1,10,2k 1,1,1

2. Op-amp IC741 3
3. Dual RPS (0-30)v 1
4. AFO 1-100 KHz 1
5. CRO 20 / 40MHz, Dual Trace 1
6. Bread board - 1
7. Connecting wires - FEW
THEORY:
The Summing Amplifier is a very flexible circuit based upon the standard Inverting
operational amplifier configuration that can be used for combining multiple inputs. We saw
previously in the inverting amplifier tutorial that the inverting amplifier has a single input voltage,Vin
applied to the inverting input terminal. If we add more input resistors to the input, each equal in value
to the original input resistor, Rin. We end up with another operational amplifier circuit called a
Summing Amplifier, “summing inverter" or even a "Voltage adder" circuit .The Summing Amplifier
is a very flexible circuit indeed, enabling us to effectively "Add" or "Sum" together several
individual input signals. If the inputs resistors, R1, R2, R3 etc, are all equal a unity gain inverting
adder can be made. However, if the input resistors are of different values a "scaling summing
amplifier" is produced which gives a weighted sum of the input signals.
The gain of the circuit is

Gain (AV) =Vout/Vin=-Rf/Rin
A1=10k/1k=-10
A2=10k/2k=-5
Vout=(A1xV1)+(A2xV2)
Vout=(-10(2mV))+(-5(5mV))=-45mv
CIRCUIT DIAGRAM:

OBSERVATION:
S. NO. V1(mV) V2(mV) Vout(mV)
1.
2.
PROCEDURE:
1. Connections are given as per the circuit diagram
2. Two input voltages V1 and V2 are provided
3. Two gains A1 and A2 are determined
4. Calculate the output voltage Vout.
MODEL GRAPH:
Input 1
Input 2
Output:
RESULT:
Thus the summing Amplifier is constructed and tested successfully.

EXPT.NO: 25
DESIGN AND TESTING OF PRECISION RECTIFIER
DATE:
AIM:
To design and test the Half Wave and Full Wave Rectifier and to obtain the required graph.
APPARATUS REQUIRED:
S.No Components Specification Quantity
1. Resistor 1,10,2k 1,1,1

2. Op-amp IC741 3
3. Dual RPS (0-30)v 1
4. Audio Oscillator (A / O) 1-100 KHz 1
5. CRO 20 / 40MHz, Dual Trace 1
6. Bread board - 1
7. Connecting wires - FEW
THEORY:
An inverting Op-Amp can be converted into a half wave rectifier by adding two diodes.
When Vi is positive, diode D1 conducts causing Vo to go to positive by one diode drop. Hence
diode D2 is reverse biased. The output voltage Vo is zero because for all practical purposes no
current flows through D1 for –ve input, D2 conducts and D1 is OFF. The – ve input Vi forces the Op-
Amp output Vo –ve and causes D2 to conduct. The circuit then acts like inverter for Rf = R1 and the
output Vo becomes positive. The Op-Amp in the circuit must be high Op-Amp since it alternates
between open loop and closed loop operations. The principal limitation of this circuit is the slew
rate of the Op-Amp. As the input passes through zero the Op-Amp output Vo must change from
0.6 to -0.6v or vice versa as quickly as possible in order to switch over the conduction from one
diode to another
PROCEDURE:
1. Connections are made as per the circuit diagram
2. A sinusoidal signal from audio oscillator is applied to the inverting terminal of op-*amp
3. The rectified output is then obtained on the CRO.
OBSERVATION:
S.NO. Description Input Output
Amplitude(mV) Time(ms) Amplitude(mV) Time(ms)
1 Half Wave 1.2*2=2.4 mV 2*0.2=0.4ms 1.4*2=2.8 mV 2*0.4=0.8ms
2 Full Wave 1.4*2=2.8 mV 2.1*0.1=0.21ms 1.6*2=3.2 mV 2.2*0.1=0.44ms

CIRCUIT DIAGRAM:
1. HALF WAVE RECTIFIER MODEL GRAPH
2. FULL WAVE RECTIFIER
MODEL GRAPH:
FULL WAVE PRECISION RECTIFIER
RESULT:
Thus the Precision rectifier (full wave and half wave) is constructed and tested.

EXPT.NO.26
VOLTAGE AND CURRENT TIME BASE CIRCUITS
DATE:
AIM:
To simulate voltage and current time base circuits by using PSPICE.
REQUIREMENTS:
1. PC
2. PSPICE software
THEORY:
A time base generator, or timebase, is a special type of function generator, an electronic circuit that
generates a varying voltage to produce a particular waveform. Time base generators produce very high
frequency sawtooth waves specifically designed to deflect the beam in cathode ray tube (CRT) smoothly
across the face of the tube and then return it to its starting position.
Time bases are used by radar systems to determine range to a target, by comparing the current
location along the time base to the time of arrival of radio echoes. Analog television systems using CRTs had
two time bases, one for deflecting the beam horizontally in a rapid movement, and another pulling it down the
screen 60 times per second.Oscilloscopes often have several time bases, but these may be more flexible
function generators able to produce many waveforms as well as a simple time base.
PROCEDURE:
1. Click on the start menu and select the pspice simulation software
2. Select the parts required for the circuit from the parts menu and place them in the work space
3. Connect the parts using wires
4. Save the file and select the appropriate analysis
5. Simulate the circuit and observe the corresponding output waveforms
CIRCUIT DIAGRAM:
VOLTAGE TIME BASE CIRCUIT

CURRENT TIME BASE CIRCUIT
MODEL GRAPH:
CURRENT TIME BASE CRCUIT
RESULT:
Thus, the Voltage and Current time base circuits are simulated using Pspice

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DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

EC3462 LINEAR INTEGRATED CIRCUITS LABORATORY

SIMULATION USING SPICE: (Using Transistor):

COURSE OUTCOMES AND PROGRAMME OUTCOMES MAPPING:

PO 5. The Engineer and Society: Apply reasoning informed by the contextual

CO-PO MAPPING MATRIX:

CO-PSO MAPPING MATRIX:

GRT Institute of Engineering and Technology | Tiruttani

Note:1: Slight (Low) 2: Moderate (Medium) 3: Substantial (High)

EVALUATION OF LAB REPORT:

GRT Institute of Engineering and Technology | Tiruttani

EC3462 LINEAR INTEGRATED CIRCUITS LABORATORY

Voltage Shunt Feedback Amplifier (Inverting Amplifier) 6

8 Active low-pass Filter 20

9 Active High-pass Filter 22

10 Active Band-pass filters 24

13 R-2R Ladder Type D-A Converter 33

14 RC Phase Shift Oscillator 36

15 Wein- Bridge Oscillator 38

SIMULATION USING PSPICE

20 Double and Stagger Tuned Amplifier 51

22 Schmitt Trigger Circuit with Predictable Hysteresis 55

23 Analysis of Power Amplifier 57

CONTENT BEYOND SYLLABUS

25 Design and testing of precision rectifier. 62

26 Voltage and Current Time Base Circuits 64

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EXPT.NO.1 VOLTAGE SERIES FEEDBACK AMPLIFIER

S.No EQUIPMENTS RANGE QUANTITY

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Given values, Av =10(Theoretical value)

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Practical Value Theorical Value

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EXPT.NO.2 VOLTAGE SHUNT FEEDBACKAMPLIFIER

S.No EQUIPMENTS RANGE QUANTITY

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Given values, Av =3(Theoretical value)

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Practical Value Theorical Value

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S.No Name of the Apparatus Range Quantity

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S.No Name of the Apparatus Range Quantity

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CIRCUIT DIAGRAM OF DIFFERENTIATOR:

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S.No EQUIPMENTS RANGE QUANTIT Y

POSITIVE CLIPPER: MODEL GRAPH

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S.No EQUIPMENTS RANGE QUANTIT Y

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S.No Name of the Apparatus Range Quantit

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Sl. Differential Resistance Output voltage (Vo)

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