Computer Science Paper II

Chapter 2
Instruction Set of Microprocessor
8085
 Assembly Language
Binary Language/ Hex equiv. Assembly Language
Machine Language
1000 0000 80H ADD A,B *
1100 0010 E2H .
1111 1100 FCH .
. . .
. . .
. . .
. . .

*This is hypothetical case. Not the actual 8085 instruction format

 Assembly Language

Hex Value = 78H

MOV A,B Binary = 0111 1000

OpCode operand

Instruction = OpCode + operand

This Symbolic code for instruction is called “MNEMONICS”

OpCode => Operation Code

 Assembly Language
• Another example is: 1000 0000,
➢ Which translates to 80 in hexadecimal.
➢ Its mnemonic is ADD B.
➢ “Add register B to the accumulator and keep the
result in the accumulator”.
Instruction Set of Microprocessor 8085
– Since the 8085 is an 8-bit device it can have up
to 28 (256) instructions.
– However, the 8085 only uses 246 combinations
that represent a total of 74 instructions.
– Most of the instructions have more than one
format.
 Instruction Set of Microprocessor 8085

• Type of Instruction(Classification Based on Size)

– One Byte Instruction
– Two Byte Instruction
– Three Byte Instruction

OpCode 1 OpCode 1st OpCode 1st

Data/addr Lower Byte
2nd 2nd
data/addr
Upper Byte
data/addr 3rd
 Instruction Set of Microprocessor 8085

– Classification of the Instructions in GROUPS based on the

function :
1. Data Transfer group (Copy)
2. Arithmetic group
3. Logical group
4. Branching group
5. Machine control Group
 Instruction Set of Microprocessor 8085

– Addressing Mode
1. Register Addressing Mode (eg. MOV A,B)
2. Immediate Addressing Mode (eg. MVI A,FFH)
3. Direct Addressing Mode (eg. LDA 2000H)
4. Register Indirect Addressing Mode (eg. MOV A,M)
5. Implied / Implicit addressing Mode (eg. CMA )
Programming Model of Microprocessor 8085

F (5) A (8)
B (8) C (8)
D (8) E (8)
H (8) L (8)
PC (16)
SP (16)
 Instruction Set of Microprocessor 8085
Data Transfer Group
MOV rd, rs [ Move Register]
Format : rd rs Byte: 1
Explanation : will copy the content of source register rs to destination
register rd.
Here rd and rs can be one of the register A,B,C,D,E,H,L
Addressing : register
Example : MOV B,A B A
This will copy data of Accumulator to register B. Before xx 7B
After 7B 7B
 Instruction Set of Microprocessor 8085
Data Transfer Group
MVI rd, 8-bit data [ Move Immediate]
Format : rd data Byte: 2
Explanation : will load the register rd with 8-bit immediate data specified in
second byte of instruction.
Addressing : immediate
Example : MVI A,FFH A
This will load data FFH in register A (Accumulator). FF
 Instruction Set of Microprocessor 8085
Data Transfer Group
LDA addr [ Load Accumulator Direct]
Format : A [addr] Byte: 3
Explanation : will load Accumulator with content of memory location, Whose
address is given in the instruction itself.
Addressing : direct
Example : LDA 2050H
This will load data of M.L. 2050 in Accumulator. A 2050
Before xx 7B
After 7B 7B
 Instruction Set of Microprocessor 8085
Data Transfer Group
STA addr [ Store Accumulator Direct]
Format : [addr] A Byte: 3
Explanation : will store content of Accumulator into the memory location,
whose address is given in the instruction itself.
Addressing : direct
Example : STA 2050H
This will store data of A into M.L. 2050. 2050 A
Before xx 7B
After 7B 7B
 Instruction Set of Microprocessor 8085

Write an ALP* to load all registers(A,B,C,D,E,H,L) with data FFH.

*ALP – Assembly Language Program

 Instruction Set of Microprocessor 8085

Write an ALP to copy 1 byte data stored at location 3050 to new M.L. 4050H.
 Instruction Set of Microprocessor 8085

Write an ALP to exchange 1 byte data stored at M.L. 3050 with M.L. 4050H.
 Instruction Set of Microprocessor 8085
Mnemonics
Label Comments
OpCode Operand

;
;
;
;
;
;
;
;
;
;
;
 Instruction Set of Microprocessor 8085
Data Transfer Group
LXI rp,16-bit data [ Load register pair immediate]
Format : HL data Byte: 3
Explanation : Loads Register pair rp with 16 bit data. Valid rp are BC,DE,HL
and SP. (SP is not register pair but can be used here)
Addressing : immediate
Example : LXI H,C050H H L
This will load C0 in register H and Before XX XX
50 in register L. After CO 50
 Instruction Set of Microprocessor 8085
Arithmetic Group
ADD r [ Add Register]
Format : A A+r Byte: 1 Flags : All
Explanation : Adds the data of register r to Accumulator. Result will be stored
in Accumulator.
Addressing : Register
Example : ADD B A B
This will add data of reg. B to Accumulator. Before 35 37
After ? ?
 Instruction Set of Microprocessor 8085
Arithmetic Group
ADD B
1 1 1 1 1 A B
35H 0 0 1 1 0 1 0 1 Before 35 37
+ 37H + 0 0 1 1 0 1 1 1 After 6C 37
0 1 1 0 1 1 0 0
6 C

Flags : S = 0, Z = 0, Ac = 0, P = 1, Cy = 0
 Instruction Set of Microprocessor 8085
Arithmetic Group
ADD B
1 1 1 1 A B
FAH 1 1 1 1 1 0 1 0 Before FA 13
+ 13H + 0 0 0 1 0 0 1 1 After 0D 13
1 0 0 0 0 1 1 0 1
Cy 0 D

Flags : S = 0, Z = 0, Ac = 0, P = 0, Cy = 1
 Instruction Set of Microprocessor 8085
Arithmetic Group
INR r [ Increment Register]
Format : r r+1 Byte: 1 Flags : All except Cy
Explanation : Increments data of register r by 1.
Addressing : Register
Example : INR C
This will increment content of register C by 1. C
Before 35
After ?
 Instruction Set of Microprocessor 8085
Arithmetic Group
INR C
1 C
35H 0 0 1 1 0 1 0 1 Before 35
+ 01H + 1 After 36
0 0 1 1 0 1 1 0
3 6

Flags : S = 0, Z = 0, Ac = 0, P = 1
 Instruction Set of Microprocessor 8085
Arithmetic Group
DCR r [ Decrement Register]
Format : r r-1 Byte: 1 Flags : All except Cy
Explanation : Decrements data of register r by 1.
Addressing : Register
Example : DCR E
This will decrement content of register E by 1. E
Before 35
After ?
 Instruction Set of Microprocessor 8085
Arithmetic Group
DCR E
E
35H 0 0 1 1 0 1 0 1 Before 35
- 01H - 1 After 34
0 0 1 1 0 1 0 0
3 4

Flags : S = 0, Z = 0, Ac = ?, P = 0
 Instruction Set of Microprocessor 8085
Arithmetic Group
INX rp [ Increment Register Pair]
Format : rp rp + 1 Byte: 1 Flags : None
Explanation : Increments data of register pair rp by 1.
Here rp can be HL,BC,DE or SP.
Addressing : Register
Example : INX H H L
This will increment content of Before CO 50
register pair HL by 1. After C0 51
 Instruction Set of Microprocessor 8085
Arithmetic Group
INX H

H L 1 1
Before CO FF C 0 F F
+ 1
After C1 00
C 1 0 0
 Instruction Set of Microprocessor 8085
Arithmetic Group
DCX rp [ Decrement Register Pair]
Format : rp rp - 1 Byte: 1 Flags : None
Explanation : Decrements data of register pair rp by 1.
Here rp can be HL,BC,DE or SP.
Addressing : Register
Example : DCX B B C
This will decrement content of Before CO 50
register pair BC by 1. After C0 4F
 Instruction Set of Microprocessor 8085
Arithmetic Group
SUB r [ Subtract Register]
Format : A A–r Byte: 1 Flags : All
Explanation : Subtracts the data of register r from Accumulator. Result will be
stored in Accumulator. 2’s Complement method is used for subtraction.
Addressing : Register
Example : SUB B A B
This will subtract data of reg. B from Accumulator. Before 3A 37
After ? ?
 Instruction Set of Microprocessor 8085
Arithmetic Group
SUB B
37 0 0 1 1 0 1 1 1
1 1 1 1
37’ 1 1 0 0 1 0 0 0
3A 0 0 1 1 1 0 1 0
+ 1
+ 37’’ + 1 1 0 0 1 0 0 1
37’’ 1 1 0 0 1 0 0 1
1 0 0 0 0 0 0 1 1
0 3
Complement the carry
A B
Flags : S = 0, Z = 0, Ac = 1, P = 1, Cy = 0 (Borrow) Before 3A 37
After 03 37
 Instruction Set of Microprocessor 8085

1. Write an ALP to add two 1 byte numbers stored at location 3050H and
3051H. Store the one byte result at M.L. 4050H.

2. Write an ALP to add three 1 byte numbers stored at location

3050H,3051H and 3052H. Store the one byte result at M.L. 4050H.
(Assuming that sum is not greater than FFH.)

3. Write an ALP to subtract number stored at location 3051H from 3050H

and store the one byte result at M.L. 4050H.
 Instruction Set of Microprocessor 8085
Branching Group
Jump Instruction

JUMP

Unconditional Conditional
 Instruction Set of Microprocessor 8085
Branching Group
JMP addr [ Jump Unconditionally]
Format : PC addr Byte: 3 Flags : None
Explanation :The control is transferred unconditionally to the memory
location, whose address is specified in the instruction.
Addressing : Immediate
Example : JMP C010H
Next instruction will be executed from ML C010H.
 JMP instruction
2001 ------- 2001 -------
2002 ------- 2002 -------
2003 JMP 2007 2003 -------
2004 ------- 2004 -------
2005 ------- 2005 -------
2006 ------- 2006 JMP 2002
2007 ------- 2007 -------
2008 ------- 2008 -------
 Instruction Set of Microprocessor 8085
Branching Group
Jcondition addr [ Jump Conditionally]
Format : PC addr Byte: 3 Flags : None
Explanation :The control is transferred to the memory location, whose
address is specified in the instruction only if condition is true.
Addressing : Immediate
 Instruction Set of Microprocessor 8085
Branching Group
JC addr Jump if Carry (Cy=1)
JNC addr Jump if No Carry (Cy=0)
JZ addr Jump if Zero (Z=1)
JNZ addr Jump if Not Zero (Z=0)
JP addr Jump if Plus (S=0)
JM addr Jump if Minus (S=1)
JPE addr Jump if Even Parity (P= 1)
JPO addr Jump if Odd Parity (P=0)
 Instruction Set of Microprocessor 8085
Write an ALP to subtract number stored at location 3051H from 3050H and
store the absolute difference at M.L. 3052H.
3050 02
3051 05
3052
 Instruction Set of Microprocessor 8085
Mnemonics
Label Comments
OpCode Operand

LDA 3051H ; Load data of ML 3051H to Accumulator

MOV B,A ; Copy content of Acc. to reg b
LDA 3050H ; Load data of ML 3050H to Accumulator
SUB B ; Subtract content of reg B from Accumulator
JNC NEXT ; Jump to NEXT if there is no carry. (i.e. if Cy=0)
CMA ; Complement the content of Accumulator.
INR A ; increment content of A by 1
NEXT: STA 3052H ; Store content of Accumulator to ML 3052H.
RST 1 ; Restart /Stop
;
 Instruction Set of Microprocessor 8085
Data Transfer Group
MOV rd, M [ Move Indirect]
Format : rd M Byte: 1
Explanation : will copy the content of M.L., whose address is stored in HL, to
destination register rd.
Here rd can be one of the register A,B,C,D,E,H,L
Addressing : register indirect
Example : MOV B,M B HL CO50
This will copy data of ML pointed by HL Before xx C050 7B
to register B. After 7B C050 7B
 Instruction Set of Microprocessor 8085
Data Transfer Group
MOV M, rs [ Move Indirect]
Format : M rs Byte: 1
Explanation : will copy the content of register rs to M.L., whose address is
stored in HL.
Here rs can be one of the register A,B,C,D,E,H,L
Addressing : register indirect
Example : MOV M,D D HL CO50
This will copy data of ML pointed by HL Before 25 C050 xx
to register B. After 25 C050 25
 Instruction Set of Microprocessor 8085
Data Transfer Group
LDAX rp [ Load Accumulator Indirect]
Format : A [rp] Byte: 1
Explanation : will copy the content of M.L., whose address is stored in rp, to
Accumulator.
Here valid rp can be either BC or DE.
Addressing : register indirect
A BC 3000
Example : LDAX B
Before xx 3000 95
This will copy data of ML pointed by BC
After 95 3000 95
to Accumulator.
 Instruction Set of Microprocessor 8085
Data Transfer Group
STAX rp [ Store Accumulator Indirect]
Format : [rp] A Byte: 1
Explanation : will copy the content of Accumulator to M.L., whose address is
stored in rp.
Here valid rp can be either BC or DE.
Addressing : register indirect
Example : STAX B A BC CO50

This will store data of Accumulator Before 22 C050 XX

to ML pointed by BC. After 22 C050 22
 Instruction Set of Microprocessor 8085
Write an ALP to fill block of memory starting from 4050H to 4059H with data
00H. 4050 00
4051 00
4052 00
4053 00
4054 00
4055 00
4056 00
4057 00
4058 00
4059 00
 Instruction Set of Microprocessor 8085
Mnemonics
Label Comments
OpCode Operand

LXI H,4050H ; Initialise reg. pair HL to 4050H

MVI A,00H ; Load 00H in Accumulator
MVI B,0AH ; Load 0AH in Reg. B
UP: MOV M,A ; Copy data of Acc. To ML pointed by HL
INX H ; Increment content of reg. pair HL by 1
DCR B ; Decrement content of reg. B by 1
JNZ UP ; jump to line labeled as UP if counter is non zero (Z=0)
RST 1 ;
;
;
;
 Instruction Set of Microprocessor 8085
Write an ALP to fill block of memory starting from 4050H to 4059H with
series of data 00,01,02……. in Hex. 4050 00
4051 01
4052 02
4052 03
4053 04
4054 05
4055 06
4056 07
4057 08
4058 09
4059 0A
 Instruction Set of Microprocessor 8085
Mnemonics
Label Comments
OpCode Operand

;
;
;
;
;
;
;
;
;
;
;
 Instruction Set of Microprocessor 8085
Write an ALP to COPY block of memory starting from 4050H to new block
starting from 6050H. Length of block is 5.
4050 AA 6050
4051 BB 6051
4052 CC 6052
4053 DD 6053
4054 EE 6054
 Instruction Set of Microprocessor 8085
Mnemonics
Label Comments
OpCode Operand

;
;
;
;
;
;
;
;
;
;
;
 Instruction Set of Microprocessor 8085
Write an ALP to EXCHANGE block of memory starting from 4050H with
another block starting from 6050H of same length. Length of block is 10.
4050 A1 6050 A2
4051 B1 6051 B2
4052 C1 6052 C2
4053 D1 6053 D2
4054 E1 6054 E2
 Instruction Set of Microprocessor 8085
Mnemonics
Label Comments
OpCode Operand

;
;
;
;
;
;
;
;
;
;
;
 Instruction Set of Microprocessor 8085
Write an ALP to find 2’s complement of five numbers stored from ML 4050H
and store it to ML 6050H onwards.

4050 AA 6050
4051 BB 6051
4052 CC 6052
4053 DD 6053
4054 EE 6054
 Instruction Set of Microprocessor 8085
Mnemonics
Label Comments
OpCode Operand

;
;
;
;
;
;
;
;
;
;
;
 Instruction Set of Microprocessor 8085
Arithmetic Group
ADD M [ Add Indirect]
Format : A A+M Byte: 1 Flags : All
Explanation : Adds the data of ML pointed by HL to Accumulator. Result will
be stored in Accumulator.
Addressing : Register INDIRECT
A HL C050
Example : ADD M
Before FF C050 FF
This will add data of ML C050H to Accumulator.
After ? C050 FF
 Instruction Set of Microprocessor 8085
Arithmetic Group
ADD M
1 1 1 1 1 1 1
FFH 1 1 1 1 1 1 1 1
+ FFH + 1 1 1 1 1 1 1 1
1 1 1 1 1 1 1 1 0 A HL C050
F E
Before FF C050 FF

Flags : S = 1, Z = 0, Ac = 1, P = 0, Cy = 1 After FE C050 FF

 Instruction Set of Microprocessor 8085
Arithmetic Group
ADI 8-bit data [ Add Immediate]
Format : A A + data Byte: 2 Flags : All
Explanation : Adds the immediate data to Accumulator. Result will be stored
in Accumulator.
Addressing : Immediate
A
Example : ADI FFH
Before FF
This will add data FFH to Accumulator.
After ?
 BLOCK ADDITION
Write an ALP to Add of five numbers stored from ML 4050H and store result
in ML 4070H onwards beginning with lower byte first.
4050 FF 4070
4051 FF 4071
4052 FF
4053 FF
4054 FF
 Instruction Set of Microprocessor 8085
Mnemonics Mnemonics
Label Comments Label Comments
OpCode Operand OpCode Operand

; ;
; ;
; ;
; ;
; ;
; ;
; ;
; ;
; ;
; ;
; ;
 MULTIPLICATION
Write an ALP to multiply two numbers stored at ML 4050H and 4050H. Store
result at ML 4052H onwards beginning with lower byte first.
4050 05
A
4051 03
4052
B C
4053

D E

H L
 Instruction Set of Microprocessor 8085
Arithmetic Group
DAD rp [ Double Addition]
Format : HL HL + rp Byte: 1 Flags : only Cy
Explanation : Adds the data of rp to HL. Result will be stored in HL.
Addressing : Register
Example : DAD D HL DE
This will add data of register pair DE to HL. Before 3030 2020
(HL = HL + DE) After ? 2020
 Instruction Set of Microprocessor 8085
Arithmetic Group
DAD D

[HL] 3 0 3 0 HL DE
+ [DE] + 2 0 2 0 Before 3030 2020
= [HL] 5 0 5 0 After 5050 2020

Flags : Cy = 0
 Instruction Set of Microprocessor 8085
Logical Group
CMP r [ Compare Register]
Format : A - r Byte: 1 Flags : All
Explanation : Compares accumulator with Register r. All flags are affected.
Contents of A and r will not change.
If A = r then Z=1
Z = 1else
elseZ=0.
Z = 0. If Z=1
If Z Then
= 1 Then
A=r Aelse
= r Aelse
≠ r A ≠ data
If A < r then
thenCy
Cy==1
1 else Cy=0
Cy = 0 If Cy=1
If Cy=1
Then
Then
A <Ar<else
r else
A ≥Ar≥ data
Addressing : Register
Example : CMP E
Compares Accumulator with Register E
 Instruction Set of Microprocessor 8085
Logical Group
Example :
CMP E

A E Flags (After Execution)

CASE 1 20 30 Cy = 1, Z = 0
CASE 2 30 20 Cy = 0, Z = 0
CASE 3 10 10 Cy = 0 Z = 1
 Instruction Set of Microprocessor 8085
Logical Group
CMP M [ Compare Memory]
Format : A - M Byte: 1 Flags : All
Explanation : Compares accumulator with ML whose address is in HL.
All flags are affected. Contents of A and M will not change.
If A = M then Z = 1 else Z = 0. If Z = 1 Then A = M else A ≠ M
If A < M then Cy = 1 else Cy = 0 If Cy=1 Then A < M else A ≥ M
Addressing : Register Indirect
Example : CMP M
Compares Accumulator with M.
 Instruction Set of Microprocessor 8085
Logical Group
CPI 8-bit data [ Compare Immediate]
Format : A - data Byte: 2 Flags : All
Explanation : Compares accumulator with data in second byte of instruction.
All flags are affected. Content of A will not change.
If A = data then Z = 1 else Z = 0. If Z = 1 Then A = data else A ≠ data
If A < data then Cy = 1 else Cy = 0 If Cy=1 Then A < data else A ≥ data

Addressing : Immediate
Example : CPI 0AH
Compares content of Accumulator with data 0AH.
 DIVISION
Write a program that divides two 1-byte hex numbers where the dividend is
stored in 9051H and the divisor is stored in 9052. Store the quotient and the
remainder in the next consecutive memory locations respectively.
A
9051 07
B C 9052 02
A–B C 9053 Q
7–2=5 1 D E 9054 R
5–2=3 2
3–2=1 3
1–2 =? H L

Quotient
Remainder
 Instruction Set of Microprocessor 8085
Mnemonics Mnemonics
Label Comments Label Comments
OpCode Operand OpCode Operand

LXI H, 9050H ; MOV M,C ;

MVI C, 00H ; INX H ;
MOV A,M ; MOV M,A ;
INX H ; RST 1 ;
MOV B,M ; ;
UP: CMP B ; ;
JC DOWN ; ;
SUB B ; ;
INR C ; ;
JMP UP ; ;
DOWN : INX H ; ;
 COUNT OCCURRENCE
A block of data is stored in memory locations from 9000H. The length of the
block is stored at 8FFFH. Write a program that counts the occurrence of the
number AAH in the given Block. Store the result in 9100H.
A
8FFF 05
B C 9000 72
9001 AA
D E 9002 AC
9003 34
H L 9004 AA
 Instruction Set of Microprocessor 8085
Logical Group
ANA r [ Logical AND with Register]
Format : A = A ^ r Byte: 1
Explanation : Contents of accumulator will be logically ANDed with Register r.
Result will be stored in Accumulator.

Flags : Cy = 0, Ac = 1. S,Z and P will be affected

Addressing : Register
Example : ANA B
 Instruction Set of Microprocessor 8085
Logical Group
ANA B
0 1 1 0 1 1 0 0
A B ^ 0 1 0 1 1 0 1 0
Before 6C 5A 0 1 0 0 1 0 0 0
After 48 5A 4 8

Flags : S = 0, Z = 0, P = 1
Cy = 0 , Ac = 1
 Instruction Set of Microprocessor 8085
Logical Group
ANA M [ Logical AND with Memory]
Format : A = A ^ M Byte: 1
Explanation : Contents of accumulator will be logically ANDed with M.L.,
whose address is stored in HL register pair. Result will be stored in
Accumulator.

Flags : Cy = 0, Ac = 1. S,Z and P will be affected

Addressing : Register Indirect
Example : ANA M
 Instruction Set of Microprocessor 8085
Logical Group
ANI data [ Logical AND with 8 bit data]
Format : A = A ^ data Byte: 2
Explanation : Contents of accumulator will be logically ANDed with data
specified in 2nd Byte of instruction. Result will be stored in Accumulator.
Flags : Cy = 0, Ac = 1. S,Z and P will be affected
Addressing : Immediate
Example : ANI 0FH
 Instruction Set of Microprocessor 8085
Logical Group

Accumulator
Example Before After
ANI 0FH 75 AND
ANI F0H 75
=
ANI FFH 75
ANI 00H 75
 Instruction Set of Microprocessor 8085
Logical Group
ORA r [ Logical OR with Register]
Format : A = A ˅ r Byte: 1
Explanation : Contents of accumulator will be logically ORed with Register r.
Result will be stored in Accumulator.

Flags : Cy = 0, Ac = 0. S,Z and P will be affected

Addressing : Register
Example : ORA B
 Instruction Set of Microprocessor 8085
Arithmetic Group
ORA B
0 1 1 0 1 1 0 0
A B ˅ 0 1 0 1 1 0 1 0
Before 6C 5A 0 1 1 1 1 1 1 0
After 7E 5A 7 E

Flags : S = 0, Z = 0, P = 1
Cy = 0 , Ac = 0
 Instruction Set of Microprocessor 8085
Logical Group
ORA M [ Logical OR with Memory]
Format : A = A ^ M Byte: 1
Explanation : Contents of accumulator will be logically ORed with M.L.,
whose address is stored in HL register pair. Result will be stored in
Accumulator.

Flags : Cy = 0, Ac = 0. S,Z and P will be affected

Addressing : Register Indirect
Example : ORA M
 Instruction Set of Microprocessor 8085
Logical Group
ORI data [ Logical OR with 8 bit data]
Format : A = A ˅ data Byte: 2
Explanation : Contents of accumulator will be logically ORed with data
specified in 2nd Byte of instruction. Result will be stored in Accumulator.
Flags : Cy = 0, Ac = 0. S,Z and P will be affected
Addressing : Immediate
Example : ORI 0FH
 Instruction Set of Microprocessor 8085
Logical Group
XRA r [ Logical Ex-OR with Register]
Format : A = A  r Byte: 1
Explanation : Contents of accumulator will be logically Ex-ORed with
Register r.
Result will be stored in Accumulator.

Flags : Cy = 0, Ac = 0. S,Z and P will be affected

Addressing : Register
Example : XRA B
 Instruction Set of Microprocessor 8085
Logical Group
XRA B
0 1 1 0 1 1 0 0
A B  0 1 0 1 1 0 1 0
Before 6C 5A 0 0 1 1 0 1 1 0
After 36 5A 3 6

Flags : S = 0, Z = 0, P = 1
Cy = 0 , Ac = 0
 Instruction Set of Microprocessor 8085
Logical Group
XRA M [ Logical Ex-OR with Memory]
Format : A = A  M Byte: 1
Explanation : Contents of accumulator will be logically Ex-ORed with M.L.,
whose address is stored in HL register pair. Result will be stored in
Accumulator.

Flags : Cy = 0, Ac = 0. S,Z and P will be affected

Addressing : Register Indirect
Example : XRA M
 Instruction Set of Microprocessor 8085
Logical Group
XRI data [ Logical Ex-OR with 8 bit data]
Format : A = A  data Byte: 2
Explanation : Contents of accumulator will be logically Ex-ORed with data
specified in 2nd Byte of instruction. Result will be stored in Accumulator.
Flags : Cy = 0, Ac = 0. S,Z and P will be affected
Addressing : Immediate
Example : XRI 00H
 Instruction Set of Microprocessor 8085
Single Instruction to Clear Accumulator
(i.e. A=00H).

1. MVI A,00H
2. SUB A
3. XRA A
4. ANI 00H
 Instruction Set of Microprocessor 8085
Logical Group
CMA [Complement the Accumulator]
Format : A A Byte: 1 Flags : None.
Explanation : Complements the contents of accumulator.
Addressing : Implied
Example : CMA
0 1 1 0 1 1 0 0
A 6 C
Before 6C 1 0 0 1 0 0 1 1
After 93
9 3
 Instruction Set of Microprocessor 8085
Logical Group
RRC [ Rotate Accumulator Right ]
Format : D7-> D6-> D5-> D4-> D3-> D2-> D1-> D0-> D7 , D0-> Cy Byte: 1
Explanation : The content of Accumulator will be rotated to the right by one
bit. Only Carry flag is affected. Bit D0 goes to D7 as well as in Cy.
Flags : Cy
Addressing : Implied
Cy D7 D6 D5 D4 D3 D2 D1 D0
Example : RRC

Accumulator
 Instruction Set of Microprocessor 8085
Logical Group
RRC
Cy D7 D6 D5 D4 D3 D2 D1 D0
A Cy 0 0 1 1 0 0 1 0 1
Before 65 0 Accumulator
After B2 1

Cy D7 D6 D5 D4 D3 D2 D1 D0
After 1 1 0 1 1 0 0 1 0
Accumulator
 Instruction Set of Microprocessor 8085
Logical Group
RLC [ Rotate Accumulator Left ]
Format : D0-> D1-> D2-> D3-> D4-> D5-> D6-> D7-> D0 , D7-> Cy
Explanation : The content of Accumulator will be rotated to the left by one
bit. Only Carry flag is affected. Bit D7 goes to D0 as well as in Cy.
Byte: 1
Flags : Cy
Cy D7 D6 D5 D4 D3 D2 D1 D0
Addressing : Implied
Example : RLC
Accumulator
 Instruction Set of Microprocessor 8085
Logical Group
RLC
Cy D7 D6 D5 D4 D3 D2 D1 D0
A Cy 0 0 1 1 0 0 1 0 1
Before 65 0 Accumulator
After CA 1

Cy D7 D6 D5 D4 D3 D2 D1 D0
After 0 1 1 0 0 1 0 1 0
Accumulator
 Instruction Set of Microprocessor 8085
Logical Group
RAR [ Rotate Accumulator Right through Carry ]
Format : D7-> D6-> D5-> D4-> D3-> D2-> D1-> D0-> Cy -> D7
Explanation : The content of Accumulator will be rotated to the right by one
bit through Carry. Only Carry flag is affected. Bit D0 goes to CY and Cy to D7.
Byte: 1
Flags : Cy
Cy D7 D6 D5 D4 D3 D2 D1 D0
Addressing : Implied
Example : RAR
Accumulator
 Instruction Set of Microprocessor 8085
Logical Group
RAR
Cy D7 D6 D5 D4 D3 D2 D1 D0
A Cy 0 0 1 1 0 0 1 0 1
Before 65 0 Accumulator
After 32 1

Cy D7 D6 D5 D4 D3 D2 D1 D0
After 1 0 0 1 1 0 0 1 0
Accumulator
 Instruction Set of Microprocessor 8085
Logical Group
RAL [ Rotate Accumulator Left through Carry]
Format : D0-> D1-> D2-> D3-> D4-> D5-> D6-> D7-> Cy -> D0
Explanation : The content of Accumulator will be rotated to the left by one
bit. Only Carry flag is affected. Bit D7 goes to Cy and Cy goes to D0.
Byte: 1
Flags : Cy
Cy D7 D6 D5 D4 D3 D2 D1 D0
Addressing : Implied
Example : RAL
Accumulator
 Instruction Set of Microprocessor 8085
Logical Group
RAL
Cy D7 D6 D5 D4 D3 D2 D1 D0
A Cy 0 0 1 1 0 0 1 0 1
Before 65 0 Accumulator
After CA 0

Cy D7 D6 D5 D4 D3 D2 D1 D0
After 0 1 1 0 0 1 0 1 0
Accumulator
 Reverse Hex Digits(Nibbles)
Write an ALP to reverse digit of one byte hex number stored at M.L. 9051H
and store the new number at M.L. 9052H. Also store the sum of original
number and reverse number at M.L. 9053H.
A
9051 23
B C 9052 32
9053 55
D E

H L
 Instruction Set of Microprocessor 8085
Logical Group
CMC [Complement Carry]
Format : Cy Cy
Addressing : -
Example : CMC Cy
Byte : 1 Before 0 1
After 1 0
 Instruction Set of Microprocessor 8085
Logical Group
STC [Set Carry]
Format : Cy 0
Addressing : -
Example : STC Cy
Byte : 1 Before X
After 1
 Instruction Set of Microprocessor 8085
Data Transfer Group
LHLD addr [ Load HL Direct]
Format : L [addr], H [addr + 1] Byte: 3
Explanation : will load register L with content of M.L., Whose address is given
in the instruction itself and register H with content of very next M.L.
Addressing : direct
Example : LHLD 2050H
This will load data of M.L. 2050H in register L
and data of M.L. 2051H in register H. H L 2050 2051
Before XX XX 50 C0
After C0 50 50 C0
 Instruction Set of Microprocessor 8085
Data Transfer Group
SHLD addr [ Store HL Direct]
Format : [addr] L , [addr+1] H Byte: 3
Explanation : will store content of register L into the memory location, whose
address is given in the instruction itself and content of register H to very next
location.
Addressing : direct
Example : SHLD 2050H
2050 2051 H L
This will store data of reg. L in M.L. 2050H
Before xx xx C0 60
And data of register H in M.L. 2051H.
After 60 C0 C0 60
 Instruction Set of Microprocessor 8085
Arithmetic Group
ADC r [ Add Register]
Format : A A + r + Cy Byte: 1 Flags : All
Explanation : Adds the data of register r to Accumulator along with Carry.
Result will be stored in Accumulator.
Addressing : Register
Example : ADC B A B Cy
This will add data of reg. B to Accumulator. Before 35 37 1
After ? ? ?
 Instruction Set of Microprocessor 8085
Arithmetic Group
ADC B
A B Cy
1 1 1 1 1
Before 35 37 1
35H 0 0 1 1 0 1 0 1
After 6D 37 0
+ 37H + 0 0 1 1 0 1 1 1
0 1 1 0 1 1 0 0
Cy 1
0 1 1 0 1 1 0 1
6 D
Flags : S = 0, Z = 0, Ac = 0, P = 0, Cy = 0
 Instruction Set of Microprocessor 8085
Arithmetic Group
ADC M [ Add Indirect with Carry]
Format : A A + M + Cy Byte: 1 Flags : All
Explanation : Adds the data of ML pointed by HL to Accumulator along with
carry. Result will be stored in Accumulator.
Addressing : Register Indirect
A HL C050 Cy
Example : ADC M
Before FF C050 FF 1
This will add data of M.L. pointed by HL
After ? C050 FF ?
to Accumulator with Carry.
 Instruction Set of Microprocessor 8085
Arithmetic Group
ADC M
A HL C050 Cy
1 1 1 1 1 1 1
Before FF C050 FF 1
FFH 1 1 1 1 1 1 1 1
After FF C050 FF 1
+ FFH + 1 1 1 1 1 1 1 1
1 1 1 1 1 1 1 1 0
Cy 1
1 1 1 1 1 1 1 1
F F

Flags : S = 1, Z = 0, Ac = 1, P = 1, Cy = 1
 Instruction Set of Microprocessor 8085
Arithmetic Group
ACI data [ Add data with Carry]
Format : A A + data + Cy Byte: 2 Flags : All
Explanation : Adds the data to Accumulator along with carry. Result will be
stored in Accumulator.
Addressing : Immediate
A Cy
Example : ACI FFH
Before FF 1
This will add data FFH to
After ? ?
Accumulator with Carry.
 Instruction Set of Microprocessor 8085
Arithmetic Group
ACI FFH
1 1 1 1 1 1 1 A Cy
FFH 1 1 1 1 1 1 1 1 Before FF 1
+ FFH + 1 1 1 1 1 1 1 1 After FF 1
1 1 1 1 1 1 1 1 0
Cy 1
1 1 1 1 1 1 1 1 1
F F

Flags : S = 1, Z = 0, Ac = 1, P = 1, Cy = 1
 Instruction Set of Microprocessor 8085
BCD ( Binary Coded Decimal )
ADD B
A B
1 1 1
Before 25 25
25BCD 0 0 1 0 0 1 0 1
+25BCD After 4A 25
+ 0 0 1 0 0 1 0 1
4A
0 1 0 0 1 0 1 0
4 A

Flags : S = 0, Z = 0, Ac = 0, P = 0, Cy = 0
 Instruction Set of Microprocessor 8085
Arithmetic Group
DAA [ Decimal Adjust Accumulator]
Byte: 1 Flags : All Addressing : Implied
Explanation : The data in accumulator is adjusted to form two four bit BCD
digits after Addition. It can be done as follows :
1. If LN > 9 or Ac = 1 then 06H will be added to Accumulator.
2. If UN > 9 or Cy = 1 then 60H will be added to Accumulator.
3. If LN > 9 or Ac = 1 AND UN > 9 or Cy = 1 then
66H will be added to Accumulator.
*LN = Lower Nibble
*UN = Upper Nibble
 Instruction Set of Microprocessor 8085
Arithmetic Group
ADD B
A B
DAA 1 1 1
Before 25 25
25BCD 0 0 1 0 0 1 0 1
+ 25BCD After 50 25
+ 0 0 1 0 0 1 0 1
4A 0 1 0 0 1 0 1 0
+ 06 0 1 1 0
50BCD 0 1 0 1 0 0 0 0
5 0

Flags : S = 0, Z = 0, Ac = 1, P = 1, Cy = 0
 BCD Addition
Write a program to adds two BCD numbers stored at M.L. 9051H and 9052H.
Store the result 9053 onwards starting with lower byte.

A
9051 95
B C 9052 95
9053 90
D E 9054 01

H L
 2-BYTE BCD ADDITION
Mnemonics Mnemonics
Label Comments Label Comments
OpCode Operand OpCode Operand
LXI H, 9051 ; MOV M,B ;
MOV A,M ; RST 1 ;
MVI B,00H ; ;
INX H ; ;
ADD M ; ;
DAA ; ;
JNC SKIP ; ;
INR B ; ;
SKIP : INX H ; ;

MOV M,A ; ;

INX H ; ;
 BCD Multiplication
Write a program to multiplies two BCD numbers stored at M.L. 9051H and
9052H. Store the result 9053 onwards starting with lower byte.

A
9051 15
B C 9052 15
9053 25
D E 9054 02

H L
 BCD Block Addition
Write a program to add block of BCD numbers. Block starts at M.L. 9000H
and Block length is stored at 8FFFH. Store the result 9100H onwards starting
with lower byte.
A
00 8FFF 05
B C 9000 90
00 05 9001 90
D E 9002 90
9003 90
H L 9004 90
 BCD BLOCK ADDITION
Mnemonics Mnemonics
Label Comments Label Comments
OpCode Operand OpCode Operand
LXI H, 8FFF ; DAA ;
MOV C,M ; MOV B,A ;
XRA A ; MOV A,D ;
MOV B,A ; SKIP : DCR C ;
UP: INX H ; JNZ UP ;
ADD M ; STA 9100H ;
DAA ; MOV A,B ;
JNC SKIP ; STA 9101H ;
MOV D,A ; RST 1 ;

MOV A,B ; ;

ADI 01H ; ;
 Instruction Set of Microprocessor 8085
Data Transfer Group
XCHG [ Exchange HL with DE]
Format : HL DE Byte: 1 Flags : None
Explanation : Swaps data of register H with D and L with E.
Addressing : Register
Example : XCHG.
HL DE
Before C050 D060
After D060 C050
 Instruction Set of Microprocessor 8085
STACK :
• It is LIFO(Last-In First –Out) System.
• Data inserted last can be removed first.
• Operation to insert data is called PUSH and delete is called POP.
• Insertion and deletion takes place at one end called TOP of the stack.
• In µP 8085, Stack Pointer points to the Top of the stack.
 Instruction Set of Microprocessor 8085

F004
F005
F006
F007
F008 SP
F009 XX F009

Stack after initialization

LXI SP,F009H
 Instruction Set of Microprocessor 8085
Stack Operation
PUSH rp [ Push register pair on stack]
Format : [SP-1] rph Byte: 1 Flags : None
[SP-2] rpl
SP SP - 2
Explanation : Content of high order register of register pair rp is moved to ML
one less than of SP. Content of low order register of register pair rp is moved
to ML two less than of SP. Content of SP is than decremented by 2.
Addressing : Register Indirect
Example :
PUSH H PUSH B PUSH D
 Instruction Set of Microprocessor 8085
HL DE
C050 3060
F004 F004 F004 SP
F005 F005 F005 60 F005
F006 F006 SP F006 30
F007 F007 50 F007 F007 50
F008 SP
F008 CO F008 CO
F009 XX F009
F009 XX F009 XX

Stack after initialization Stack after PUSH H Stack after PUSH D

 Instruction Set of Microprocessor 8085
Stack Operation
POP rp [ Pop off stack to register pair]
Format : rpl [SP] Byte: 1 Flags : None
rph [SP+1]
SP SP + 2
Explanation : Content of ML pointed by SP is moved to low order register of
register pair rp. Content of ML pointed by SP+1 is moved to high order
register of register pair rp.. Content of SP is than incremented by 2.
Addressing : Register Indirect
Example :
POP H POP B POP D
 Instruction Set of Microprocessor 8085

HL DE
3060 C050
F004 SP F004
F004
F005 60 F005 F005
F005
F006 30 F006 SP
F006
F007 50 F007 50 F007
F007
F008 CO F008 CO
F008 SP
F009 XX F009 XX
F009 XX F009

Stack Before POP Stack after POP H Stack after POP D

 Instruction Set of Microprocessor 8085
Stack Operation
PUSH PSW [ Push Program Status Word on stack]
Format : [SP-1] A Byte: 1 Flags : None
[SP-2] F
SP SP - 2
Explanation : Content of Accumulator is moved to ML one less than of SP.
Content of Flag Register is moved to ML two less than of SP.
Content of SP is than decremented by 2.
Addressing : Register Indirect PSW
A F
Example : PUSH PSW
 Instruction Set of Microprocessor 8085

A F
F004 F004 25 54
F005 F005
F006 F006 SP
F007 F007 54 F007
F008 SP
F008 25
F009 XX F009
F009 XX

Stack after initialization Stack after PUSH PSW

 Instruction Set of Microprocessor 8085
Stack Operation
POP PSW [ Pop off stack to Accumulator & Flag]
Format : F [SP] Byte: 1 Flags : None
A [SP+1]
SP SP + 2
Explanation : Content of ML pointed by SP is moved to Flag.
Content of ML pointed by SP+1 is moved to Accumulator.
Content of SP is than incremented by 2.
Addressing : Register Indirect
Example : POP PSW
 Instruction Set of Microprocessor 8085

A F
C0 50 F004
F004
F005
F005
F006
F006 SP
F007 50
F007 50 F007
F008 C0 SP
F008 C0
F009 XX F009
F009 XX

Stack after POP PSW

 Instruction Set of Microprocessor 8085
Machine Control Group (Stack Operation)
SPHL [ Move HL to SP]
Format : SP HL Byte: 1 Flags : None

Explanation : Copies the content of register L into lower byte of SP and the
content of register H into higher order byte of SP. This instruction is used to
initialise the SP.
HL SP
Addressing : Register Before F050 XXXX
Example : SPHL After F050 F050
 Instruction Set of Microprocessor 8085
Branching Group
PCHL [ Move HL to PC]
Format : PC HL Byte: 1 Flags : None
Explanation : Copies the content of register L into lower byte of PC and the
content of register H into higher order byte of PC.
This instruction is equivalent to one byte unconditional jump instruction,
with jump address stored in HL pair.
HL PC
Addressing : Register
Before C050 XXXX
Example : PCHL
After C050 C050
 Instruction Set of Microprocessor 8085
Machine Control Group (Stack Operation)
XTHL [ Exchange top of the stack with HL]
Format : L [SP] Byte: 1 Flags : None
H [SP+1]
Explanation : The content of register L is exchanged with content of ML
pointed by SP. The content of register H is exchanged with content of ML
pointed by SP+1.
HL SP Before After

Addressing : Register Before 2030 F007 F007 B0 30

Example : SPHL After A0B0 F007 F008 A0 20

 Subroutine (µP 8085)
• Subroutine is like a function in C++. Main Program Subroutine
C004 ...
• It’s a sub program.
C005 CALL D050 D050 ..
• A subroutine is a sequence of
C006 D051 ..
instructions that perform a specific
C007 ... ..
task, packaged as a unit.
C008 ... … ..
• The subroutine can be called using
PC .. ..
instruction CALL.
D050 … RET
• To return from subroutine to
calling program RET instruction
should be used.
 Instruction Set of Microprocessor 8085
Branching Group
CALL addr [ Unconditional Subroutine Call ]
Format : Byte: 3 Flags : None
[SP-1] PCH
[SP-2] PCL
SP SP-2
PC addr
Explanation :
Addressing : Immediate
Example : CALL D050H
CALL rdkbd CALL output CALL delay
 Instruction Set of Microprocessor 8085
Branching Group
RET [ Unconditional return from subroutine]
Format : Byte: 1 Flags : None
PCL [SP]
PCH [SP+1]
SP SP+2
Explanation :
Addressing : Immediate
Example : RET
 HEX TO ASCII

• A 2-digit hex number is stored in memory location 9000H.

Write a program to convert each digit of this number into ASCII
equivalent, and store the ASCII codes in memory locations
9001H and 9002H.
 Keyboard Subroutine (rdkbd)
• Input :- nothing
• Output :- Acc : character read from keyboard
• Destroys :- A,H,L,F
• For Dyna85 kit address of subroutine: 02E7H
• This routine waits until a character is entered on the
hex kaypad and return. Places the value of the
character in register A.
 Instruction Set of Microprocessor 8085
Machine Control Group (IO)
IN port [ input data to Accumulator from port]
Format : A port Byte: 2 Flags : None
Explanation : When this instruction is executed it sends 8-bit port address on
lower order address bus(A7-A0). Then 8-bit data is placed on data bus by that
port is moved to Accumulator.
A
Addressing : Direct Before XX
Example : IN 80H After *

* 8-bit data from port 80H.

 Instruction Set of Microprocessor 8085
Machine Control Group (IO)
OUT port [ output data from Accumulator to port]
Format : A port Byte: 2 Flags : None
Explanation : When this instruction is executed it sends 8-bit port address on
lower order address bus(A7-A0). Then data of accumulator is transferred to
specified port..
A
Addressing : Direct Before 34
Example : OUT 85H After 34
 Instruction Set of Microprocessor 8085
Machine Control Group
EI [ Enable Interrupt]
Byte: 1 Flags : None
Explanation : EI means interrupt enable. The Interrupt system has been
enabled following the execution of instruction next to EI and all interrupts
are enabled.

DI [ Disable Interrupt]
Byte: 1 Flags : None
Explanation : DI means disable interrupt. As soon as Di is executed, the
Interrupt system is disabled. Interrupts are not recognized during execution
of DI instruction
 Instruction Set of Microprocessor 8085
Machine Control Group
HLT [ HALT and enter wait state]
Byte: 1 Flags : None
Explanation :

NOP [No Operation]

Byte: 1 Flags : None
Explanation :
 Instruction Set of Microprocessor 8085
Machine Control Group
RIM [ Read Interrupt Mask]
Byte: 1 Flags : None
Explanation : this is multipurpose instruction used to read status of interrupts
7.5,6.5,5.5 and read serial input data bit.
This instruction loads eight bits in the accumulator with following representations:

D7 D6 D5 D4 D3 D2 D1 D0
SID I7 I6 I5 IE 7.5 6.5 5.5
Serial input data bit Interrupt masked
Interrupts pending if bit=1
if bit = 1 Interrupt enable flip-flop
is set if bit=1
 Instruction Set of Microprocessor 8085
Machine Control Group
SIM [ Set Interrupt Mask]
Byte: 1 Flags : None
Explanation : this is multipurpose instruction and used to implement interrupts
(RST 7.5,6.5,5.5) and serial output data bit.
This instruction interprets accumulator content as follows:

D7 D6 D5 D4 D3 D2 D1 D0
SOD SED xxx R7.5 MSE M7.5 M6.5 M5.5
Serial
output data
Interrupts pending Reset R7.5 if D4=1
if bit = 1 Masks interrupts if bit=1
Mask set enable if D3=1
 Interrupts of Microprocessor 8085

Interrupts

Hardware Software

RST 0 to
TRAP RST 7.5 RST 6.5 RST 5.5 INTR
RST 7
 Interrupts of Microprocessor 8085

Hardware Vector Priority

Interrupts address
TRAP 0024H 1(Highest) Non-Maskable
RST 7.5 003CH 2 Maskable
RST 6.5 0034H 3 Maskable
RST 5.5 002CH 4 Maskable
INTR ------- 5(lowest) Maskable
Interrupts of Microprocessor 8085
Software Vector
Interrupts address
RST 0 0000H
RST 1 0008H
RST 2 0010H
RST 3 0018H
RST 4 0020H
RST 5 0028H
RST 6 0030H
RST 7 0038H