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CONTENTS

Exp. PAGE
DATE TITLE OF EXPERIMENTS MARK SIGNATURE
No N0
Input and Output Characteristics of BJT in
1 different Configurations.

Output and Transfer Characteristics of N-

2
channel MOSFET.

Fixed Bias amplifier circuit using BJT

3
Design and construct BJT Common Emitter
Amplifier using voltage divider bias (self–
4
bias)

Common Source and Common drain

5 amplifiers using MOSFET

Voltage series Feedback Amplifier

6
Current Shunt Feedback Amplifier
7
CYCLE – II
SIMULATION USING SPICE
Class A Power Amplifier using PSpice
1

Class B Power Amplifier using PSpice

2

Class C Tuned Amplifier using PSpice

3

AVERAGE MARK

STAFF INCHARGE HOD/ECE

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Ex.No: 1
INPUT AND OUTPUT CHARACTERISTICS OF BJT IN COMMON EMITTER
Date: CONFIGURATIONS.

AIM:
To study the input and output characteristics of Bipolar Junction Transistor (BJT) in Common
Emitter (CE) configuration.

APPARATUS REQUIRED:

S.No. Name Range Qty

1 R.P.S (0-30)V 2
(0–10)mA 1
2 Ammeter
(0–1)A 1
(0–30)V 1
3 Voltmeter
(0–2)V 1
4 Transistor BC 547 1
10kW
5 Resistor 1
1kW
6 Bread Board 1
7 Wires As required

CIRCUIT DIAGRAM:

Fig : 4.1Circuit Diagram of Input & Output Characteristics.

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THEORY:

 A BJT is a three terminal two – junction semiconductor device in which the conduction is
due to both the charge carrier. Hence it is a bipolar device and it amplifier the sine
waveform as they are transferred from input to output. BJT is classified into two types –
NPN or PNP.
 A NPN transistor consists of two N types in between which a layer of P is sandwiched. The
transistor consists of three terminals - emitter, collector and base. The emitter layer is the
source of the charge carriers and it is heavily doped with a moderate cross sectional area.
 The collector collects the charge carries and hence moderate doping and large cross
sectional area. The base region acts as path for the movement of the charge carriers. In
order to reduce the recombination of holes and electrons, the base region is lightly doped
and is of hollow cross sectional area. Normally the transistor operates with the EB junction
forward biased.
 In transistor, the current is same in both junctions, which indicates that there is a transfer
of resistance between the two junctions.
PROCEDURE:

INPUT CHARACTERISTICS:
Step1: Connections are made as per the circuit diagram given in Fig 3.2.
Step2: The supply is switched ON.
Step3: The collector-emitter voltage VCE is kept constant.
Step4: By varying the emitter-base voltage VBE, the various base current IB is
noted.
Step5: The same procedure is repeated for various collector-emitter voltages VCE.
Step6: The input characteristic is the curve between input current IB and input
voltage VBE at constant collector-emitter voltage VCE. The base current is
taken along Y-axis and base-emitter voltage along X-axis.

OUTPUT CHARACTERISTICS:
Step1: Connections are made as per the circuit diagram given in Fig 3.2.
Step2: Set IB, Vary VCE in regular interval of steps and note down the corresponding IC
reading. Repeat the above procedure for different values of IB.
Step3: Plot the graph: VCE vs IC for a constant IB.

MODEL GRAPH:

Input Characteristics:

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Fig: 4.2 Input characteristics of CE configuration

Output Characteristics:

Fig: 4.3 Output characteristics of CE configuration

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TABULATION:

Input Characteristics:

VCE = 1V VCE =4 V
VBE(v) IB(A) VBE(v) IB(A)

Output Characteristics :

IB1=40A IB2=60A IB3=80A

VCE (v) IC(mA) VCE (v) IC(mA) VCE (v) IC(mA)

RESULT:
Thus the Input and output characteristics of the BJT under CE configuration is studied.

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VIVA QUESTIONS:

1. Why the CE configuration is commonly used for the amplifier circuits?

2. Why the IB vs VBE plots move outwards for higher values of VCE in CE input characteristics?

3. What is indicated by B, C and 547 in BC547 transistor?

4. What are the regions of operation of a transistor?

5. List out the advantages of CE configuration.

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Ex.No. 1.b INPUT AND OUTPUT CHARACTERISTICS OF BJT IN COMMON

BASE CONFIGURATIONS.

Date

AIM:
1.To observe and draw the input and output characteristics of a transistor connected in common
base configuration.
2.To find α of the given transistor and also its input and output Resistances

APPARATUS:

S.No. Name Range Qty

Regulated power supply (0-30V) 1
(0–10)mA 2
2 Ammeter
(0–10)mA 1
(0–20)V 1
3 Voltmeter
(0–20)V 1
4 Transistor BC107 1

5 Resistor 1KΩ 2

6 Bread Board 1
7 Wires As required

THEORY:
A transistor is a three terminal active device. The terminals are emitter, base, collector. In CB
configuration, the base is common to both input (emitter) and output (collector). For normal
operation, the E-B junction is forward biased and C-B junction is reverse biased. In CB
configuration, IE is +ve, IC is –ve and IB is –ve. So,
VEB = F1 (VCB, IE)
IC = F2 (VEB,IB )

With an increasing the reverse collector voltage, the space-charge width at the output junction
increases and the effective base width ‘W’ decreases. This phenomenon is known as “Early effect”.
Then, there will be less chance for recombination within the base region.With increase of charge
gradient with in the base region, the current of minority carriers injected across the emitter junction
increases.
The current amplification factor of CB configuration is given by,
α = ∆IC/ ∆I

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CIRCUIT DIAGRAM:

MODEL GRAPHS:
A) INPUT CHARACTERISTICS :

B)OUTPUTCHARACTERISTICS:

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A) INPUT CHARACTERISTICS:

B) OUTPUT CHARACTERISTICS:

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PROCEDURE:
A) INPUT CHARACTERISTICS:
1. Connections are made as per the circuit diagram.
2. For plotting the input characteristics, the output voltage VCE
is kept constant at 0V and for different values of VEE note down the values of IE and VBE
3. Repeat the above step keeping VCB at 2V,4V,and 6V and all the readings are tabulated.
4. A graph is drawn between VEB and IE for constant VC.
b) OUTPUT CHARACTERISTICS:
1. Connections are made as per the circuit diagram.
2. For plotting the output characteristics, the input IE .is kept constant at 0.5mA and for different
values of VCC,note down the values of IC and VCB.
3. Repeat the above step for the values of IE at 1mA, 5mA and all the readings are tabulated.
4. A graph is drawn between VCB and Ic for constant I

RESULT:
Thus the Input and output characteristics of the BJT under CB configuration is studied.

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VIVA QUESTIONS:

1. What is the range of α for the transistor?

2. Draw the input and output characteristics of the transistor in CB configuration?

3. Identify various regions in output characteristics?

4. What is the relation between α and β?

5. What are the applications of CB configuration?

6. What are the input and output impedances of CB configuration

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Ex.No. 3 DESIGN AND CONSTRUCT BJT COMMON EMITTER AMPLIFIER USING

VOLTAGE DIVIDER BIAS (SELF–BIAS) WITH AND WITHOUT BYPASSED
Date EMITTER RESISTOR.

AIM: To Design and Construct a Common Emitter Amplifier using voltage divider bias and to
determine the following.
Gain of the amplifier
Bandwidth of the amplifier

APPARATUS REQUIRED:

S.no Requirement Name Range Quan y

tit
1 Transistor [Active] BC 107 1

Components 61kΩ, 10kΩ,

2 Resistor [Passive] 1kΩ,4.7kΩ 1,1,1,2

3 Capacitor [Passive] 10µf, 100µf 2,1

4 Equipment Signal Generator (0-3)MHz 1

5 CRO 30MHz 1

Regulated power (0-30)V

6 supply 1

7 Bread Board - 1

Accessories
8 Connecting Wires Single strand as required

THEORY:
A common emitter amplifier is type of BJT amplifier which increases the voltage level of the
applied input signal Vin at output of collector.
The CE amplifier typically has a relatively high input resistance (1 - 10 KΩ) and a fairly high output
resistance. Therefore it is generally used to drive medium to high resistance loads. It is typically
used in applications where a small voltage signal needs to be amplified to a large voltage signal
like radio receivers.
The input signal Vin is applied to base emitter junction of the transistor and amplifier output Vo is
taken across collector terminal. Transistor is maintained at the active region by using the resistors

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R1,R2 and Rc. A very small change in base current produces a much larger change in collector
current. The output Vo of the common emitter amplifier is 180 degrees out of phase with the applied the
input signal Vin.
SYMBOL:

Fig:6.1 Symbol

CIRCUIT DIAGRAM:
CE Amplifier with Feedback:

Fig:6.2 Circuit Diagram of JFET

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FIGCE Amplifier without Feedback:

`
DESIGN PROCEDURE:
Given specifications:
VCC= 10V, IC=1.2mA, AV= 30, hFE= 100
To calculate RC:
The voltage gain is given by, AV= -hfe (RC|| RF) / hie h ie = β re
re = 26mV / IE = 26mV / 1.2mA = 21.6Ω hie = 150 x 21.6 =3.2KΏ
Apply KVL to output loop,
VCC= IC RC + VCE+ IE RE (1)
Where VE = IE RE (IC= IE)
VE= VCC / 10= 1V
Therefore RE= 1/1.2x10-3=0.8K= 1KΏ VCE= VCC/2= 5V
From equation (1), RC= ( Vcc - VCE - IE RE / IC ) =
To calculate R1&R2:
S=1+ (RB/RE)
Where RE = 1 KΏ and S = 9 RB= (S-1) RE= (R1 || R2) =1KΏ RB=( R 1R2 ) /( R1+ R2) (2)
VB= VBE + VE = 0.7+ 1= 1.7V VB= VCC (R2 / R1+ R2 ) --------(3)
Solving equation (2) & (3),
R1= & R2=
Input coupling capacitor :
Xci= Rif / 10= 2.4 Ω (since XCi << Rif)

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Ci = 1/ 2пfXCi =
Output coupling capacitor:
XCO= Rof /10= 5.2 Ω
CO = 1/ 2пfXCO =
PROCEDURE:
 Connect the circuit as per the circuit diagram.
 Determine the Q-point of the CE amplifier using DC analysis.
 Determine Maximum input voltage that can be applied to CE amplifier using AC analysis.
 Set the input voltage Vin=V MSH /2 and vary the input signal frequency from 0Hz to 1MHz in
incremental steps and note down the corresponding output voltage Vo for at least 20 different
values for the considered range.
 The voltage gain is calculated as Av = 20log (V0/Vi) dB
 Find the Bandwidth and Gain-Bandwidth Product from Semi-log graph taking frequency on x-
axis and gain in dB on y-axis.,
Bandwidth, BW = f2-f1
where f1 lower cut-off frequency f2 upper cut-off frequency
TABULATION [Without Feedback ] :
Input voltage (Vin=V MSH/2) = V

OUTPUT VOLTAGE [ VO] GAIN= 20 log Vo/Vin

S. NO FREQUENCY [Hz]
in Volts
dB
1. 0
2. 100
3. 500
4. 600
5. 800
6.
900
7. 1 KHz
8. 100 KHz
9. 500 KHz
10. 600 KHz
11.
700 KHz
12. 800 KHz
13. 900 KHz
14. 1 MHz
15. 1.1 MHz

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16. 1.5 MHz

With Feedback :
Input voltage (Vin=V MSH/2) = ……………….. V

S. NO FREQUENCY OUTPUT VOLTAGE [VO] in GAIN=20log( vo/vin )dB

[Hz] Volts
1.
0
2. 100
3. 500
4. 600
5. 800
6.
900
7. 1 KHz
8. 100 KHz
9. 500 KHz
10. 600 KHz

RESULT: Thus the design and construct a Common Emitter Amplifier using voltage divider bias
are analyzed and the gain of the amplifier, Bandwidth of the amplifier are calculated.

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Ex.No. 4 OUTPUT AND TRANSFER CHARACTERISTICS OF N- CHANNEL

MOSFET.
Date

AIM: To study the Drain characteristics and Transfer characteristics of given FET & to
determine rd, gm, , IDSS,VP.

APPARATUS REQUIRED:
Name Range Qty
S.No.
Regulated
1 power (0-30)V 2
supply(RPS)
2 Ammeter (0–30)mA 1
(0–30)V 1
3 Voltmeter
(0-10)V 1
4 MOSFET IRF740 1
1k 1
5 Resistor
68k 1
6 Bread Board - 1
As
7 Wires -
required

THEORY:

 The junction gate field-effect transistor (JFET or JUGFET) is the simplest type of field-effect
transistor. They are three-terminal semiconductor devices that can be used as electronically-
controlled switches, amplifiers, or voltage-controlled resistors.
 Unlike bipolar transistors, JFETs are exclusively voltage-controlled in that they do not need
a biasing current. Electric charge flows through a semiconducting channel between
source and drain terminals. By applying a reverse bias voltage to a gate terminal, the channel
is "pinched", so that the electric current is impeded or switched off completely. A JFET is
usually on when there is no potential difference between its gate and source terminals. If a
potential difference of the proper polarity is applied between its gate and source terminals,
the JFET will be more resistive to current flow, which means less current would flow in the
channel between the source and drain terminals. Thus, JFETs are sometimes referred to as
depletion-mode devices.
 JFETs can have an n-type or p-type channel. In the n-type, if the voltage applied to the gate is
less than that applied to the source, the current will be reduced (similarly in the p-type, if the
voltage applied to the gate is greater than that applied to the source). A JFET has a large input
impedance (sometimes on the order of 1010 ohms), which means that it has a negligible effect

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on external components or circuits connected to its gate.
SYMBOL :

Fig:5.1 Symbol

CIRCUIT DIAGRAM:

Fig:5.2 Circuit Diagram of JFET

PROCEDURE:
DRAIN CHARACTERISTICS:
 Step1: Connect the circuit as per the circuit diagram given in Fig 5.2.
 Step2: Set the gate voltage VGS = 0V.
 Step3: Vary VDS in steps of 1 V & note down the corresponding ID.
 Step4: Repeat the same procedure for VGS = -1V.
 Step5: Plot the graph VDS vs ID for constant VGS.

TRANSFER CHARACTERISTICS:
 Step1: Connect the circuit as per the circuit diagram given in Fig 5.2.
 Step2: Set the drain voltage VDS = 5 V.
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 Step3: Vary the gate voltage VGS in steps of 1V & note down the corresponding ID.
 Step4: Repeat the same procedure for VDS = 10V.
 Step5: Plot the graph VGS Vs ID for constant VDS.
TRANSFER CHARACTERISTICS TABULATION:

DRAIN CHARACTERISTICS TABULATION:

S.NO VGS = (Volts) VGS = (Volts)

VDS(Volts) IDS in (mA) VDS(Volts) IDS in (mA)

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Fig: 5.3 Drain characteristics of JFET configuration

Fig: 5.4 Transfer characteristics of JFET configuration

FET PARAMETER CALCULATION:

VDS
VGS
I D
Drain Resistance rd =
I D
VDS
VGS
Transconductance gm =

Amplification factor μ=rd . gm

MANUAL CALCULATION:

RESULT:
Thus the drain and transfer characteristics of a junction field effect transistor are analyzed and the
transconductance (gm), drain to source resistance (rd), amplification factor (μ) are calculated.
(gm) = ----------- mho
(rd) = ----------- ohm
(μ) = ----------- db

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VIVA QUESTIONS:

1. What is the maximum allowed gate current in FET?

2. What happens if this current is exceeded?

3. What is forward transconductance?

.

4. When the PN junctions are reverse biased and how the depletion regions are formed?

5. What are the advantages of FET over BJT?

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Ex.No. 5
FIXED BIAS AMPLIFIER CIRCUIT USING BJT
Date

AIM:
To design and construct a fixed bias amplifier circuit using BJT.
APPARATUS REQUIRED:

S.No APPRATUS REQUIRED RANGE QUANTITY

1 Transistor BC 107 1
2 Resistor 1.2 K,100K As per design As required
3 Capacitor 0.1µF
4 CRO (0-30 )MHz 1
5 RPS (0-10) v 1
6 Function generator (0 – 1 )MHz 1
THEORY :
 If the transistor is replaced by another transistor, eventhough the type is same their
characteristic may differ slightly. In fixed bias circuit, the change in the characteristic of
transistor changes the operating point. For example, if there is a change in value of P there
is change in IC = P IB as IB is constant in fixed biased circuit. The change in IC changes the
operating point and hence we can say that a fixed bias circuit is unsatisfactory if the
transistor is replaced by another of the same type.
 In this the biasing resistor is connected between the collector and the base of the transistor
to provide a feedback path. Thus IB flows through RB and (IC + IB) flows through the RC.
 In this the biasing resistor is connected between the collector and the base of the transistor
to provide a feedback path. Thus IB flows through RB and (IC + IB) flows through the RC.
The BJT fixed bias circuit has the following characteristics:
 Both VCC and VBE have a fixed value.
 RB remains constant.
 IB will also have a continuous value, leading to a limited operating point.
 This bias type provides poor thermal stability due to its β+1 stability factor.
 A resistor is used in series with the device emitter lead to provide voltage feedback,
providing better control of hFE variations from device to device and over temperature.
 Locate capacitors and replace them with an open circuit.
 Locate 2 main loops.
 From KVL;
-VCC+IB RB +VBE =0
IB=(VCC-VBE)/RB

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Advantages of Fixed Bias Circuit

1. This is a simple circuit which uses very few components.

2. The operating point can be fixed anywhere in the active region of the characteristics by simply
changing the value of Thus, it provides maximum flexibility in the design.

Disadvantages of Fixed Bias Circuit

1. This circuit does not provide any check on the collector current which increases with the rise in
temperature, i.e. thermal stability is not provided by this circuit. So the operating point is not
maintained.

IC = β IB + ICEO

2. Since IC = β IB and IB is already fixed; IC depends on P which changes unit to unit and shifts the
operating point.

VCC=IBRB +VBE
IB=(VCC-VBE)/RB
vC=vCC-ICRC
VCE=VC-vE
VE=0V
VB=VBE
IB=(VCC-VBE)/RB

IC=β(DC)IB

IE=(IC +IB)=IC

For Fixed Bias Configuration:

1,Draw Equivalent Input circuit.
2,Draw Equivalent Output circuit.
3.Write necessary KVL and KVL Equations
4.Determine the Quiescent Operating Point
 Graphical Solution using Loadlines
 Computational Analysis
6. Design and test design using a computer simulation

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CIRCUIT DIAGRAM:

TABULATION:

S.No Frquency (HZ) Output Voltage VO/Vin Gain

VO(V) 20 log
(VO/Vin)dB

MODEL GRAPH:

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RESULT:
Thus the design and construct a fixed bias amplifier circuit using BJT and the gain of the
amplifier, frequency of the amplifier are calculated.

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VIVA QUESTION:
1. Why biasing is necessary in BJT amplifers?

2.What is operating point(or) Quiescent Point.

3.List the factors which affect the Q-Point.

3. Why is the operating point selected at the centre of the active region?

4. Whatdo youunderstandby DC& AC loadline?

5. List the types of biasing circuits

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Ex.No: 6 & 7
VOLTAGE SERIES FEEDBACK AMPLIFIER &CURRENT SHUNT FEEDBACK
Date: AMPLIFIER

AIM:
To design and test the current series and voltage shunt feedback amplifier and to determine
the following parameters with and without feedback.
 Mid band gain.
 Bandwidth and cutoff frequencies.
 Input and output impedance.

APPARATUS REQUIRED:
S.No APPRATUS REQUIRED RANGE QUANTITY
1 Transistor BC 107 1
2 Resistor
As per design As required
3 Capacitor
4 CRO (0-30 )MHz 1
5 RPS (0-30) v 1
6 Function generator (0 – 1 )MHz 1

THEORY:
An open loop amplifier suffers from many limitations such as frequency and phase
distortions, non linear distortions and noise. These limitations can be considerably rectified in
feedback amplifiers. The process of injecting a fraction of output energy of some device back to the
input is known as feedback. The output voltage or current is sampled and feedback to the input of
the amplifier in series or in shunt to the input signal source. There are four important topologies
of negative feedback namely voltage series, voltage shunt, current series and current shunt.
Current Series Feedback Amplifier:
A CE RC coupled amplifier without emitter bypass capacitor C E is an example of current series
amplifier. The current series feedback amplifier is characterized by having shunt sampling and
series mixing. In amplifiers, there is a sampling network, which samples the output and gives to
the feedback network. The feedback signal is mixed with input signal by either shunt or series
mixing technique. Due to shunt sampling the output resistance increases by a factor of ‘D’ and the
input resistance is also increased by the same factor due to series mixing. This is basically
transconductance amplifier. Its input is voltage which is amplified as current.
Voltage Shunt Feedback Amplifier:
Here output voltage is sampled and fed in the form of current to the input. In voltage shunt
feedback amplifier, the feedback signal voltage is given to the base of the transistor in shunt
through the base resistor RB. This shunt connection tends to decrease the input resistance and the
voltage feedback tends to decrease the output resistance. In the circuit R B appears directly across
the input base terminal and output collector terminal. A part of output is feedback to input
through RB and increase in IC decreases IB. Thus negative feedback exists in the circuit. So this
circuit is also called voltage feedback bias circuit. This feedback amplifier is known a

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transresistance amplifier. It amplifies the input current to required voltage levels. The feedback
path consists of a resistor and a capacitor.
DESIGN OF CURRENT SERIES FEEDBACK
(i) Without feedback:
Design of Common Emitter amplifier:
Assume VCC=15V
Step1: First select the output impedance RC=4700Ω=4.7k Ω
Step2: Then Choose the voltage drop across VC to be half of the supply voltage VC=15V/2=7.5V
This allows the AC input signal to swing full range of +7.5V to -7.5V .
Step3: Calculate the current through IC=15V-Vc/Rc=7.5/4.7K=1.6mA
Step4: Choose RE=RC/10=470Ω ( for a gain of 10, Zin=βRE)
Step5: To set the base voltage divider note that V E=IERE=ICRE=(1.6mA).(470Ω)=0.75V
Step6: To chose formula that VB=VE+ΔVb=0.75V+0.6V=1.35V
Step7: To limit the power supply current through the base choose R 2<Zin=(1/10)βRE
Let R2=(β/10)RE=10RE=4700Ω (Rule of thumb)
Step8: Then R1 can be calculated by considering the current and voltage drop on R 1.
I2=VB/R2=1.35V/4700Ω =0.29mA
And IB=IC/β=0.0016A
I1=I2+IB=0.31mA
R1=(15V-VB)/I1=(15-1.35)/(0.31x10-3)= R1= 46 kΩ (Use 47kΩ)
Step8: To caluculate input capacitor (Ci):
XCi = Zi / 10 = (hie || RB) / 10 = ?
Where RB=R1||R2 =R1.R2/(R1+R2)=
Ci = 1 / (2πf XCi) = ?
Step9: To calculate output capacitor(Co):
Xco = (RC || RL)/10 =?
Co = 1 / (2πf XCO) =?
Step10: To calculate emitter bypass capacitor(CE)
XCE = RE/10 = ?
CE = 1 / (2πf XCE) =?

(ii) With feedback (Remove the Emitter Capacitor, C E):

Feedback factor, β = -RE = Gm = -hfe / (hie + RE) =
Desensitivity factor, D = 1 + β Gm =
Transconductance with feedback, Gmf = Gm / D =
Input impedance with feedback, Zif = Zi D =
Output impedance with feedback, Z0f = Z0.D =

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CIRCUIT DIAGRAM:

Fig. 1.1 Circuit diagram of current series feedback (Without feedback)

Fig. 1.2 Circuit diagram of current series feedback (With feedback)

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Design of voltage shunt amplifier:
(i) Without feedback:
Assume VCC=15V
Step1: First select the output impedance RC=4700Ω=4.7k Ω
Step2: Then Choose the voltage drop across VC to be half of the supply voltage VC=15V/2=7.5V
This allows the AC input signal to swing full range of +7.5V to -7.5V .
Step3: Calculate the current through IC=15V-Vc/Rc=7.5/4.7K=1.6mA
Step4: Choose RE=RC/10=470Ω ( for a gain of 10, Zin=βRE)
Step5: To set the base voltage divider note that V E=IERE=ICRE=(1.6mA).(470Ω)=0.75V
Step6: To choose formula that VB=VE+ΔVb=0.75V+0.6V=1.35V
Step7: To limit the power supply current through the base choose R2<Zin=(1/10)βRE
Let R2=(β/10)RE=10RE=4700Ω (Rule of thumb)
Step8: Then R1 can be calculated by considering the current and voltage drop on R 1.
I2=VB/R2=1.35V/4700Ω =0.29mA
And IB=IC/β=0.0016A
I1=I2+IB=0.31mA
R1=(15V-VB)/I1=(15-1.35)/(0.31x10-3)=46 kΩ (Use 47kΩ)
Step8: To caluculate input capacitor (Ci):
XCi = Zi / 10 = (hie || RB) / 10 = ?
Where RB=R1||R2 =R1.R2/(R1+R2)=
Ci = 1 / (2πf XCi) = ?
Step9: To calculate output capacitor(Co):
Xco = (RC || RL)/10 =?
Co = 1 / (2πf XCO) =?
Step10: To calculate emitter bypass capacitor(CE)
XCE = RE/10 = ?
CE = 1 / (2πf XCE) =?

(ii)With feedback:
Connect the feedback resistance (Rf) and feedback capacitor (Cf) as shown in the figure.
XCf = Rf / 10
Cf = Rf / 2πf x 10 =
Assume,
Rf = 68 K
β = -1 / Rf
Rm = - hfe (RB || Rf ) (Rc || Rf ) / (RB|| Rf ) + hie
D = 1+ β Rm
AVF = Rmf / RS
RMF = Rm / D
Zif = Zi / D
Zof = Zo / D

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CIRCUIT DIAGRAM:

Fig. 1.3 Circuit diagram of voltage shunt feedback (Without feedback)

WITH FEEDBACK:

Fig. 1.4 Circuit diagram of voltage shunt feedback (With feedback)

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MODEL GRAPH (WITH & WITHOUT FEEDBACK)

Fig. 1.5 Model graph for with and without Feedback

Bandwidth of without feedback circuit = f2 – f1
Bandwidth of with feedback circuit = f4 – f3

PROCEDURE:
Step 1.The connections are made as shown in fig 1.1, 1.2, 1.3, 1.4.
Step 2.Set the input voltage to a fixed value i.e 50 mV.
Step 3.Vary the input frequency from 0Hz to 3 MHz and note down the corresponding output
voltage.
Step 4.Calculate the Gain in dB.
Step 5.Plot the graph with Gain (dB) versus frequency(Hz).
Step 6.Find the input and output impedances using the equations. Calculate the bandwidth
from the graph.
Step 7.Remove the resistor RE from the circuit and repeat the above procedure to obtain the
performance of without feedback effect.

OBSERVATION:
Current series (without feedback)
Vin = ------------ volts
S.No. Frequency O/P voltage (VO ) Gain in dB
(Hz) (volts) AV=20 log Vo/Vi

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With feedback:

S.No. Frequency O/P voltage (VO) Gain in db

(Hz) (Volts AV=20 log VO/Vi

Voltage Shunt (without feedback)

Vin = ------------ volts
S.No. Frequency O/P voltage (VO) Gain in dB
(Hz) (volts) AV=20 log VO/Vi

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With feedback:

S.No. Frequency O/P voltage (VO) Gain in dB

(Hz) (volts) AV=20 log VO/Vi

RESULT:

Types Current series amplifier Voltage shunt amplifier

Parameters With F/B Without F/B With F/B Without F/B
Input Impedance(Zif)
Output impedance(Zof)
Bandwidth(BW)
Trans conductance (gm)

Viva Questions:
1. Define a feedback.

2. Define sensitivity and gain.

3. What are the types of feedback?

4. Define a voltage series feedback.

5. Define a current shunt feedback.

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Ex.No: 8
PSPICE SIMULATION OF CLASS A AMPLIFIER
DATE

AIM:
To simulate the spice simulation of class A power amplifier and plot its frequency response using
SPICE simulation.

APPARATUS REQUIRED:
PC with PSPICE software.

THEORY:
The amplifier is said to be class A power amplifier if the q point and the input signal are selected
such that the output signal is obtained for a full input cycle. For this class the position of q point is
approximately y at the midpoint of the load line. For all the values of input signal the transistor
remains in the active region and never entire into the cutoff or saturation region. The collector
current flows for 3600 (life cycle) of the input signal in other words the angle of the collector
current flow is 3600 the class a amplifiers or furthers classified as directly coupled and
transformer coupled and transformer coupled amplifiers in directly coupled type .The load is
directly connected in the collector circuit while in the transformer coupled type, the load is
coupled to the collector using the transformer.
Advantages:
1. Distortion analysis is very important .
2. 2. It amplifies audio frequency signals faithfully hence they are called as audio amplifiers.
Disadvantages:
1.h parameter analysis is not applicable.
2. Due to large power handling the transistor is used power transistor which is large in size and
having large power rating.
CIRCUIT DIAGRAM:

Fig 6.3 Fig 6.2 Circuit diagram of Class A Amplifier & Model graph for Class A Amplifier

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PROCEDURE:
Step 1: Start->All program->PSpice student -> Capture student
Step 2: File->New project
Step 3: Create PSpice project -> Create a blank project
Step 4: Pick and Place the circuit components from library as per the circuit diagram
Step 5: PSpice -> Create netlist
Step 6: PSpice-> New Simulation Profile -> Name -> t1 (any name) -> Create
Step 7: Analysis type -> Transient (or) DC sweep (as per the requirement)
Step 8: Run to time -> 100ms
Step 9: Apply ->OK.
Step 10: PSpice-> RUN
Step 11: Trace -> Add Trace
Step 12: Simulation output variables -> Select input and output (Vin and Vout)

RESULT:
Thus Class B power amplifier was constructed using SPICE simulation and frequency
response is obtained.

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Viva Questions:

1. Where we can use Class A power amplifier?

2. Which power amplifier has more efficiency?

3. What is the main difference between general amplifier and power amplifier?

4. Why can’t we get more current and voltage gains using general amplifier?

5. Is the power amplifier amplifies the power of input signal?

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Exp. No: 9
PSPICE SIMULATION OF CLASS B AMPLIFIER
Date:
AIM:
To simulate the spice simulation of class B amplifier and plot its frequency response using
SPICE simulation.

APPARATUS REQUIRED:
PC with PSPICE software

THEORY:
Class-B amplifiers improve the efficiency of the output stage by eliminating quiescent
power dissipation by operating at zero quiescent current. This is implemented in Figure 2. As the
input voltage V swings positive, M1 turns on when V exceeds the threshold voltage , and the
output voltage follows the input on the positive swing. When the input voltage swings negative,
M2 turns on when is less than threshold voltage , and the output voltage follows the input on the
negative swing. There is a “dead zone” in the class-B voltage transfer characteristic, where both
transistors are not conducting.

OPERATION:

In the above figure you can see that the operating point is placed some way below the cut-off point
in the DC load-line and so only a fraction of the input waveform is available at the output.

Biasing resistor Rb pulls the base of Q1 further downwards and the Q-point will be set
some way below the cut-off point in the DC load line. As a result the transistor will start
conducting only after the input signal amplitude has risen above the base emitter voltage
(Vbe~0.7V) plus the downward bias voltage caused by Rb. That is the reason why the major
portion of the input signal is absent in the output signal.

Inductor L1 and capacitor C1 forms a tank circuit which aids in the extraction of the
required signal from the pulsed output of the transistor. Actual job of the active element
(transistor) here is to produce a series of current pulses according to the input and make it flow
through the resonant circuit. Values of L1 and C1 are so selected that the resonant circuit
oscillates in the frequency of the input signal.

Since the resonant circuit oscillates in one frequency (generally the carrier frequency) all
other frequencies are attenuated and the required frequency can be squeezed out using a suitably
tuned load. Harmonics or noise present in the output signal can be eliminated using additional
filters. A coupling transformer can be used for transferring the power to the load.

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CIRCUIT DIAGRAM:

PROCEDURE:
Step 1: Start->All program->PSpice student -> Capture student
Step 2: File->New project
Step 3: Create PSpice project -> Create a blank project
Step 4: Pick and Place the circuit components from library as per the circuit diagram
Step 5: PSpice -> Create netlist
Step 6: PSpice-> New Simulation Profile -> Name -> t1 (any name) -> Create
Step 7: Analysis type -> Transient (or) DC sweep (as per the requirement)
Step 8: Run to time -> 100ms
Step 9: Apply ->OK.
Step 10: PSpice-> RUN
Step 11: Trace -> Add Trace
Step 12: Simulation output variables -> Select input and output (Vin and Vout)

MODEL GRAPH:

Fig. Model graph for class B amplifier

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OUTPUT:

RESULT:
Thus Class B power amplifier was constructed using SPICE simulation and frequency
response is obtained.

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VIVA QUESTIONS:
1. What is an Amplifier?

2. What are the efficiencies of various power amplifiers?

3. Specify Q-point location on load line for different power amplifiers?

4. Where we can use Class B power amplifier?

5. What are the classifications of Power amplifiers?

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Exp. No: 10
PSPICE USING CLASS C POWER AMPLIFIER
Date:
AIM:
To simulate analysis of Class C power amplifier and plot its frequency response using SPICE
simulation.
APPARATUS REQUIRED:
PC with PSPICE software
THEORY:
Class C power amplifier is a type of amplifier where the active element (transistor)
conducts for less than one half cycle of the input signal. Less than one half cycle means the
conduction angle is less than 180° and its typical value is 80° to 120°. The reduced conduction
angle improves the efficiency to a great extend but causes a lot of distortion. Theoretical maximum
efficiency of a Class C amplifier is around 90%.Due to the huge amounts of distortion, the Class C
configurations are not used in audio applications. The most common application of the Class C
amplifier is the RF (radio frequency) circuits like RF oscillator, RF amplifier etc where there are
additional tuned circuits for retrieving the original input signal from the pulsed output of the Class
C amplifier and so the distortion caused by the amplifier has little effect on the final output. Input
and output waveforms of a typical Class C power amplifier are shown in the figure below.

OPERATION:

Output characteristics of Class C power amplifier

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In the above figure you can see that the operating point is placed some way below the cut-off point
in the DC load-line and so only a fraction of the input waveform is available at the output.

Biasing resistor Rb pulls the base of Q1 further downwards and the Q-point will be set
some way below the cut-off point in the DC load line. As a result the transistor will start
conducting only after the input signal amplitude has risen above the base emitter voltage
(Vbe~0.7V) plus the downward bias voltage caused by Rb. That is the reason why the major
portion of the input signal is absent in the output signal.

Inductor L1 and capacitor C1 forms a tank circuit which aids in the extraction of the
required signal from the pulsed output of the transistor. Actual job of the active element
(transistor) here is to produce a series of current pulses according to the input and make it flow
through the resonant circuit. Values of L1 and C1 are so selected that the resonant circuit
oscillates in the frequency of the input signal. Since the resonant circuit oscillates in one frequency
(generally the carrier frequency) all other frequencies are attenuated and the required frequency
can be squeezed out using a suitably tuned load. Harmonics or noise present in the output signal
can be eliminated using additional filters. A coupling transformer can be used for transferring the
power to the load.

CIRCUIT DIAGRAM:

V2

L1 12Vdc
C1
0
10u 1mH

C2

Vout
Q1 10u

Q2N2222

R1 R2
V3 R3
2v 10k 1k
10k
0Vdc

Fig 6.1 Circuit diagram of class C amplifier

MODEL GRAPH:

Fig 6.2 Model graph for class C amplifier

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PROCEDURE:
Step 1: Start->All program->PSpice student -> Capture student
Step 2: File->New project
Step 3: Create PSpice project -> Create a blank project
Step 4: Pick and Place the circuit components from library as per the circuit diagram
Step 5: PSpice -> Create netlist
Step 6: PSpice-> New Simulation Profile -> Name -> t1 (any name) -> Create
Step 7: Analysis type -> Transient (or) DC sweep (as per the requirement)
Step 8: Run to time -> 100ms
Step 9: Apply ->OK.
Step 10: PSpice-> RUN
Step 11: Trace -> Add Trace
Step 12: Simulation output variables -> Select input and output (Vin and Vout)
OUTPUT:

RESULT:
Thus the analysis of Class C power amplifier was constructed using PSPICE and
frequency response is obtained.

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VIVA QUESTIONS:
1. What is cross over distortion?

2. What are applications of power amplifier?

3. What is heat sink?

4. Compare the efficiencies of all the power amplifiers

5. What are the classifications of power amplifier?

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CONTENT BEYOND THE SYLLABUS

Exp. No: 11
DESIGN OF HARTLEY OSCILLATOR USING FET
Date:
AIM:
To design and simulate of Hartley oscillator using FET and plot its frequency response
using SPICE simulation.

APPARATUS REQUIRED:
PC with PSPICE software
THEORY:

The Hartley oscillator is an electronic oscillator circuit in which the oscillation frequency is
determined by the tuned circuit consisting of capacitors and inductors, that is, an LC oscillator.
The Hartley oscillator was invented by Hartley while he was working in the Research Laboratory
of the Western Electric Company. The circuit was invented in 1915 by American engineer Ralph
Hartley. The personal feature of Hartley oscillator is that the tuned circuit consists of a single
capacitor in parallel with two inductors are in series or a single tapped inductor, and the feedback
signal needed for oscillation is taken from the center connection of the two inductors.

What are Hartley Oscillators?

Hartley oscillator is inductively coupled; variable frequency oscillators where the oscillator
may be a series or shunt fed. Hartley oscillators are the advantage of having one tuning capacitor
and one center tapped inductor. This processor simplifies the construction of a Hartley oscillator
circuit.

Hartley Oscillator:

Fig 6.1 Circuit diagram of Hartley Oscillator using FET

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MODEL GRAPH:

Model graph for Hartley Oscillator using FET

Operation of Hartley Oscillator Circuit:

When the DC supply (Vcc) is given to the circuit, the collector current starts raising and
begins with the charging of the capacitor C. Once capacitor C is fully charged, it starts discharging
through L1 and L2 and again starts charging. This back-and-fourth voltage waveform is a sine
wave which is a small and leads with its negative alteration. It will eventually die out unless it is
amplified. Now the transistor comes into the picture. The sine wave generated by the tank circuit
is coupled to the base of the transistor through the capacitor CC1.

Since the transistor is configured as common-emitter, it takes the input from tank circuit
and inverts it to a standard sine wave with a leading positive alteration.Thus the transistor
provides amplification along with inversion to amplify and correct the signal generated by the
tank circuit. The mutual inductance between L1 and L2 provides the feedback of energy from
collector-emitter circuit to the base-emitter circuit.

The frequency of oscillations in this circuit is,

fo = 1/ (2π √ (Leq C))

Where Leq is the total inductance of coils in the tank circuit is given as

Leq = L1 + L2 + 2M

For a practical circuit, if L1 = L2 = L and the mutual inductance are neglected, then the frequency
of oscillations can be simplified as

fo = 1/ (2π √ (2 L C))

Advantages:

 Instead of two separate coils L1 and L2, a single coil of bare wire can be used and the coil
grounded at any desired point along it.
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 By using a variable capacitor or by making core movable (varying the inductance),
frequency of oscillations can be varied.
 Very few components are needed, including either two fixed inductors or a tapped coil.
 The amplitude of the output remains constant over the working frequency range.

Disadvantages:

 It cannot be used as a low frequency oscillator since the value of inductors becomes large
and the size of the inductors becomes large.
 The harmonic content in the output of this oscillator is very high and hence it is not
suitable for the applications which require a pure sine wave.

Applications:

 The Hartley oscillator is to produce a sine wave with the desired frequency
 Hartley oscillators are mainly used as radio receivers. Also note that due to its wide range
of frequencies, it is the most popular oscillator
 The Hartley oscillator is Suitable for oscillations in RF (Radio-Frequency) range, up to
30MHZ

RESULT:
Thus the design of Hartley oscillator using FET was constructed using PSPICE and
frequency response is obtained.

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