GCSE The CPU

OCR Unit 1
System architecture,
Computer Science memory and storage
J276

1
Objectives
• Understand the purpose of the CPU
• Explain the role and operation of the following CPU
registers used in Von Neumann architecture:
• MAR (Memory Address Register),
• MDR (Memory Data Register),
• Program Counter,
• Accumulator
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Unit 1 Systems architecture, memory and storage

What is this?
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Unit 1 Systems architecture, memory and storage

The CPU
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Unit 1 Systems architecture, memory and storage

Central Processing Unit (CPU)

• The Central Processing
Unit or CPU is arguably
the most important
component of a
computer
• What does it do?
• If it was one organ in the
human body what would
it be?
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Unit 1 Systems architecture, memory and storage

Central Processing Unit (CPU)

• You can think of the CPU as being like the brain in a
human
• It is responsible for all of a computer’s processing
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Unit 1 Systems architecture, memory and storage

The main components of a

computer
MAIN MEMORY

INPUT CENTRAL PROCESSING OUTPUT

DEVICES UNIT (CPU) DEVICES

SECONDARY
STORAGE
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Unit 1 Systems architecture, memory and storage

Stored program concept

• Before about 1943, early computers stored the data
to be worked on in memory
• The program was not stored – instructions were
input one at a time using switches, or read in from
paper tape and executed one at a time
• In 1943-44, mathematician von Neumann and his
colleagues had the idea of storing the program
instructions as well as the data in the same store
• The stored-program computer was born!
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Unit 1 Systems architecture, memory and storage

Von Neumann architecture

• Computer programs and the data the programs are
using are stored in the same memory
• Data then moves between the memory unit and the processor

1 Program

2 Program

3 Program

5 Data

6 Data

7 Data

8 Data
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Unit 1 Systems architecture, memory and storage

Registers in the CPU

Program
ALU
Counter

General
Control
Purpose
Unit
Registers
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Unit 1 Systems architecture, memory and storage

Registers in the CPU

• Program Counter:
A special purpose register that Program
holds the address of the next Counter

instruction to be executed
• General Purpose Registers:
Hold data, such as numbers during General
Purpose
arithmetic calculations Registers
Some architectures have just a
single register called the
Accumulator
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Unit 1 Systems architecture, memory and storage

Program Counter
1
• The Program Counter points 2
to the next instruction that 3
needs to be executed Program 4
Counter
• It is located in the Control Unit 5 LDA 28

• The Program Counter is 5 6 ADD #2

7 STO 10
incremented after fetching
8
an instruction
9

• This moves it on to point to 10

the next instruction to be 11

executed 12
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Unit 1 Systems architecture, memory and storage

Accumulator
• The accumulator is where
arithmetic and logic results are
temporarily stored much like
the M+ function on a calculator
• Without the accumulator, it
would be necessary to write
the result of each calculation to
main memory
• The accumulator speeds up the
storage and retrieval of
calculations
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Unit 1 Systems architecture, memory and storage

The Arithmetic Logic Unit

• The ALU or Arithmetic Logic Unit performs:
• Logical operations,
• shift operations and
• arithmetic operations

Main ALU
Memory Accumulator
X = 3 ADD X, Y 8
Y = 5
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Unit 1 Systems architecture, memory and storage

Memory registers
• With the von Neumann architecture, both the
instructions and the data are stored together in RAM
• Two registers are required to implement this:

MAR MDR
(Memory (Memory
Address Data
Register) Register)
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Unit 1 Systems architecture, memory and storage

Memory Address Register

• The MAR holds the address of the current instruction
being executed
• The MAR knows the location of the data that needs
to be accessed
• It keeps track of where data is located

MAR
(Memory
Address
Register)
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Unit 1 Systems architecture, memory and storage

Memory Data Register

• The MDR holds the actual data that is being stored
in RAM
• It acts as a buffer and holds data that is copied from
RAM, ready for the CPU to process it

MDR
(Memory
Data
Register)
The CPU
Unit 1 Systems architecture, memory and storage

Working together
MAR (Memory Address Register)
MDR (Memory Data Register)
The two work together; The MAR knows where to look
for data in RAM, the MDR keeps hold of that data until
it’s ready to be used by the CPU

MAR MDR
(Memory (Memory
Memory Data
Address
Register) Register)
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Unit 1 Systems architecture, memory and storage

Control Unit
• The control unit coordinates all
of the activities taking place
within the CPU
• Much like the conductor of an
orchestra
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Unit 1 Systems architecture, memory and storage

Processor registers
ALU: Temporarily
stores arithmetic
and logic results

PC: Points to
the next MDR: Stores
instruction the actual data

CIR (Current Instruction MAR: Stores

Register): Holds the the address of
current instruction to be the data
executed
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Unit 1 Systems architecture, memory and storage

Fetch – Decode – Execute

• The CPU operates by repeating
three operations:
• FETCH – causes the next
instruction and any data
involved to be fetched from
main memory
• DECODE – decodes the
instruction
• EXECUTE – carries out the
instruction
• Repeat…
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Unit 1 Systems architecture, memory and storage

Example – Step 1 (Add 8 + 4)

1 • PC points to next instruction in
2 location 5
3
• Instruction is passed to
4 Program
Counter the CIR and PC is incremented
5 LDA 10

6 ADD #4 5 • Memory location 10 is passed

7 STO 11 to the MAR
8

9
• The value in location 10 is
10 8
passed from main memory to
11
the MDR
12 • 8 is loaded into the accumulator
The CPU
Unit 1 Systems architecture, memory and storage

Example – Step 2
1 • PC now points to next
2 instruction in location 6
3
• Instruction is passed to
4
the CIR and the PC is
5 LDA 10 Program
Counter incremented
6 ADD #4

7 STO 11 6 • 4 is added to 8 in the ALU and

8 the result is stored in the
9 accumulator
10 8

11

12
The CPU
Unit 1 Systems architecture, memory and storage

Example – Step 3
1 • PC points to the next
2 instruction in location 7
3
• Instruction is passed to
4
the CIR
5 LDA 10

6 ADD #4 Program • Memory location 11 is passed

Counter
7 STO 11 to the MAR
8 7
9
• Total value 12 transferred from
10 8
the accumulator into memory
11 12
location 11
12
The CPU
Unit 1 Systems architecture, memory and storage

Worksheet
• Complete Tasks 1-3 on the worksheet
The CPU
Unit 1 Systems architecture, memory and storage

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