Chapter 16 CMOS Amplifiers

 16.1 General Considerations

 16.2 Operating Point Analysis and Design
 16.3 CMOS Amplifier Topologies
 16.4 Common-Source Topology
 16.5 Summary and Additional Examples
 16.6 Chapter Summary

1
 Chapter Outline

CH 16 CMOS Amplifiers 2
 Example: Desired I/O Impedances

Rin   Ramp  0

CH 16 CMOS Amplifiers 3
 Method to Measure the I/O Impedances

vX vX
Rin  Rout 
iX iX

 To measure Rin(Rout), deactivate all the other independent

sources in the circuit and find the ratio of vX/iX.

CH 16 CMOS Amplifiers 4
 Example: Input Impedance of a Simple Amplifier

i X  0  Rin  

CH 16 CMOS Amplifiers 5
 The Concept of Impedance at a Node

 When the other node of a port is grounded, it is more

convenient to use the concept of impedance at a node.

CH 16 CMOS Amplifiers 6
 Example: Impedance Seen at Drain

Rout  rO

CH 16 CMOS Amplifiers 7
 Example: Impedance Seen at Source

1
Rout 
gm

CH 16 CMOS Amplifiers 8
 Impedance Summary

 Looking into the gate, we see infinity.

 Looking into the drain, we see rO if the source is (ac) grounded.
 Looking into the source, we see 1/gm if the gate is (ac)
grounded and rO is neglected.

CH 16 CMOS Amplifiers 9
 Bias and Signal Levels for a MOS Transistor

 Bias point analysis establishes the region of operation and the

small-signal parameters.
 On top of the bias point, small signals are applied to the circuit.

CH 16 CMOS Amplifiers 10
 General Steps in Circuit Analysis

 First, the effects of constant voltage/current sources are

analyzed when signal sources are deactivated.
 Second, small-signal analysis is done when constant sources
are set to zero.

CH 16 CMOS Amplifiers 11
 Simplification of Supply Voltage Notation

CH 16 CMOS Amplifiers 12
 Example: Amplifier Driven by a Microphone

Microphone Output

20mV

0V

 Since the DC (average) value is at zero, and 20mV is not

sufficient to turn on M1, M1 is off and Vout is at VDD.

CH 16 CMOS Amplifiers 13
 Example: Amplifier with Gate Tied to VDD

 Since the gate voltage level is fixed at VDD, no signal current

will be produced my M1, leading to no amplification.

CH 16 CMOS Amplifiers 14
 Example: Amplifier with Gate Bias

 With proper value of VB, M1 can operate in the desired

saturation region and amplify the incoming voice signal.

CH 16 CMOS Amplifiers 15
 Simple Biasing

R2
VGS  VDD
R1  R2

 In (a), VGS=VDD, whereas in (b) VGS equals to a fraction of VDD.

CH 16 CMOS Amplifiers 16
 Example: Bias Current and Maximum RD

VTH  0.5V
 nCox  100A / V 2
W L  5 0.18
 0
R1  20 K
R2  15K

2
1 W  R2 
ID   nCox  VDD  VTH   102A
2 L  R1  R2 
VD min  VGS  VTH  0.271V  VRD max  1.529  RD  15K

CH 16 CMOS Amplifiers 17
 Capacitive Coupling

 Capacitive coupling is used to block the zero DC output value

of the microphone and pass the voice signal to the amplifier.

CH 16 CMOS Amplifiers 18
 Biasing with Source Degeneration

 R2VDD 
VGS  V1  VTH   V  2V1 
2
  VTH 
 R1  R2
1

1
V1 
W
 nCox RS
L

CH 16 CMOS Amplifiers 19
Example: ID and Maximum RD for Source Degeneration Biasing

VTH  0.5V
 nCox  100A / V 2
W / L  5 / 0.18
 0

1
V1   0.36V
W
 nCox RS
L
 RV 
VGS  V1  VTH   V12  2V1  2 DD  VTH   0.974V
 R1  R2 
V  (VX  VTH )
RD  DD  3.25K
ID

CH 16 CMOS Amplifiers 20
 Example: Maximum W/L and Minimum RS

VTH  0.5V
 nCox  100A / V 2
RD  2.5K
 0

2I D
V V  A  W VGS  VTH  1.041V
 DD Y  406A   50 2  0.38V 
2
I D max W
RD  V L  nCox
L
W
 56.2 V  VGS
L RS min  X  604
max ID

CH 16 CMOS Amplifiers 21
 Self-Biased MOS Stage

 nCox VDD  RS  RD I D  VTH 2

1 W
ID 
2 L

 The gate voltage is provided by the drain with no voltage drop

across RG and M1 is always in saturation.

CH 16 CMOS Amplifiers 22
 Example: Self-Biased MOS Stage

 nCox  100A / V 2
VTH  0.5V
 0

I D  556A
I D  278A  RD  2.867 K

CH 16 CMOS Amplifiers 23
 Example: PMOS Stage with Biasing

 p Cox  50A / V 2
W L  5 0.18
 0
R1  20 K
R2  15K
VTH  0.5V

R2
VGS   VDD  0.771V
R1  R2

 p Cox VGS  VTH 2  56A

1 W
ID 
2 L
Saturation  RD max  27.3K
CH 16 CMOS Amplifiers 24
 Example: PMOS Stage with Self-Biasing

 p Cox  50A / V 2
W L  5 0.18
 0
VTH  0.5V

I D   p Cox VDD  I D RD  VTH 

1 W 2

2 L
I D  418A

CH 16 CMOS Amplifiers 25
 Good Example of Current Source

 As long as a MOS transistor is in saturation region and λ=0, the

current is independent of the drain voltage and it behaves as an
ideal current source seen from the drain terminal.

CH 16 CMOS Amplifiers 26
 Bad Example of Current Source

 Since the variation of the source voltage directly affects the

current of a MOS transistor, it does not operate as a good
current source if seen from the source terminal

CH 16 CMOS Amplifiers 27
 Possible I/O Connections to a MOS Transistor

 Of all the possible I/O connections to a MOS transistor, only

(a,d), (a,e) and (b,d) are functional.

CH 16 CMOS Amplifiers 28
 Common Source (CS) Stage

 If the input is applied to the gate and the output is sensed at the
drain, the circuit is called a “common-source” (CS) stage.

CH 16 CMOS Amplifiers 29
 Small-Signal Model of CS Stage

vout
  g m v1
RD
Av   g m RD

CH 16 CMOS Amplifiers 30
 Example: CS Stage

I D  1mA
 nCox  100A / V 2
VTH  0.5V
 0

2I D
VGS  VTH  1.1V
W 1 W
g m  2  nCox I D   nCox
L 300 L
VGS  VTH  0.6V ,VDD  RD I D  0.8V
Av   g m RD  3.33
0.8  0.6  Saturation

CH 16 CMOS Amplifiers 31
 Example: Faulty CS Stage Design

Power  1mW
VDD  1.8V
Av  5
VTH  0.5V
 nCox  100A / V 2
W L  5 0.18
 0

Power  1mW  I D  556A  g m  1 569

Av  5  RD  2845

 However, no solution exists since M1 is out of the saturation

region (VDD-IDRD<VGS-VTH).

CH 16 CMOS Amplifiers 32
 CS Stage I/O Impedance Calculation

vx vx
Rin    Rout   RD
ix ix

CH 16 CMOS Amplifiers 33
 CS Stage Including Channel-Length Modulation

Av   g m RD || rO 
Rout  RD || rO

CH 16 CMOS Amplifiers 34
 Example: ½ Gain

No Channel-Length Modulation With Channel-Length Modulation

Av  x Av  x 2

1
rO   RD
I D
1

I D RD

CH 16 CMOS Amplifiers 35
 Example: RD → ∞

Av   g m rO
W
2 nCox
Av  L  2 nCoxWL
 ID ID

CH 16 CMOS Amplifiers 36
 CS Stage with Current Source Load

Av   g m1 rO1 || rO 2 
Rout  rO1 || rO 2

CH 16 CMOS Amplifiers 37
 Example: CS Stage with Current Source Load

Av   g m1 rO1 || rO 2 

CH 16 CMOS Amplifiers 38
 CS Stage with Diode-Connected Load

 1 
Av   g m1  || rO 2 || rO1 
 gm2 
1
Rout  || rO 2 || rO1
gm2

CH 16 CMOS Amplifiers 39
 Example: CS Stage with Diode-Connected PMOS

 1 

Av   g m 2  || rO 2 || rO1 
 g m1 

CH 16 CMOS Amplifiers 40
 CS Stage with Source Degeneration

RD
Av  
1
 RS
gm

CH 16 CMOS Amplifiers 41
 Example: CS Stage with Source Degeneration

RD
Av  
1 1

g m1 g m 2

CH 16 CMOS Amplifiers 42
 Example: Degeneration Resistor

Without Degeneration With Degeneration

g m  1 200 g m  1 200
Av  8 Av  4

g m RD  8  RD  1.6 K
g m RD
 4  RS  1 g m  200
1  g m RS

CH 16 CMOS Amplifiers 43
 Effective Transconductance

iout gm
Gm  
vin 1  g m RS

CH 16 CMOS Amplifiers 44
 Effect of Transistor Output Resistance

Rout  rO  g m rO  1RS
Rout  rO 1  g m RS 

CH 16 CMOS Amplifiers 45
 Stage with Explicit Depiction of rO

 Sometimes, the transistor’s output resistance is explicitly

drawn to emphasize its significance.

CH 16 CMOS Amplifiers 46
 Example: NMOS Current Source Design

I D  1mA
Rout  20 K
 nCox  100A / V 2
  0.25V 1
VDS min  0.3V

VDS min  VGS  VTH  0.3

2I D 1
 gm  
VGS V TH 150
1  g m R S rO  RS  20 K
 RS  578

CH 16 CMOS Amplifiers 47
Example: Output Resistance of CS Stage with Degeneration I

 1  1
R out  rO1 1  g m1  
 gm2  gm2
 g m1  g m 2  g m  Rout  2rO1

CH 16 CMOS Amplifiers 48
Example: Output Resistance of CS Stage with Degeneration II

Rout  1  g m1rO1 rO 2  rO1

Rout  g m1rO1rO 2

CH 16 CMOS Amplifiers 49
 Example: Failing Microphone Amplifier

No Amplification!!

100 || 50 K
VX   2.5V  2.5mV
100 K  100 || 50 K

 Because of the microphone’s small low-frequency output

resistance (100Ω), the bias voltage at the gate is not sufficient
to turn on M1.

CH 16 CMOS Amplifiers 50
 Capacitive Coupling

 To fix the problem in the previous example, a method known as

capacitive coupling is used to block the DC content of the
microphone and pass the AC signal to the amplifier.

CH 16 CMOS Amplifiers 51
 Capacitive Coupling: Bias Analysis

2
1 W  R2 
I D   nCox  VDD  VTH 
2 L  R1  R2 

 Since a capacitor is an open at DC, it can be replaced by an

open during bias point analysis.

CH 16 CMOS Amplifiers 52
 Capacitive Coupling: AC Analysis

  g m RD || rO 
vout
vin

 Since a capacitor is a short at AC, it can be replaced by a short

during AC analysis.

CH 16 CMOS Amplifiers 53
 Capacitive Coupling: I/O Impedances

Rin1  
Rout  RD || rO
Rin2  R1 || R2

CH 16 CMOS Amplifiers 54
 Example: Amplifier with Direction Connection of Speaker

 This amplifier design still fails because the solenoid of the

speaker shorts the drain to ground.

CH 16 CMOS Amplifiers 55
 Example: Amplifier with Capacitive Coupling at I/O

Req  RD || Rsp  8
Av  g m RD || Rsp   0.08

 This amplifier design produces very little gain because its

equivalent output resistance is too small.

CH 16 CMOS Amplifiers 56
 Source Degeneration with Bypass Capacitor

R1 || R2
Av   g m RD
RG  R1 || R2

 It is possible to utilize degeneration for biasing but eliminate its

effect on the small-signal by adding a bypass capacitor.

CH 16 CMOS Amplifiers 57
Example: Source Degeneration with Bypass Capacitor Design

Av  5
Rin  50 K
Power  5mW
 nCox  100A / V 2
VTH  0.5V
 0
VDD  1.8V
VRS  400mV

RS  148
g m  1 46.3
W L  864
RD  463 2 
R1  64.3K, R2  225K
CH 16 CMOS Amplifiers 58
 Concept Summary

CH 16 CMOS Amplifiers 59
 Common-Gate Stage

 In a common-gate stage, the input is applied at the source

while the output is taken at the drain.

CH 16 CMOS Amplifiers 60
 Small Signal Analysis of Common-Gate Stage

Av  g m RD

CH 16 CMOS Amplifiers 61
 Example: Common-Gate Stage Design

I D  0.5mA
W L  50
 nCox  100A / V 2
VTH  0.5V
VDD  1.8V

VDD  I D RD  Vb  VTH  RD  2.71k

g m  1 447  Av  6.06

CH 16 CMOS Amplifiers 62
 Input Impedance of Common-Gate Stage

1
Rin 
gm

CH 16 CMOS Amplifiers 63
 The Use of Low Input Impedance

 The low input impedance of a common-gate stage can be used

to impedance match a 50-Ω transmission line.

CH 16 CMOS Amplifiers 64
 Output Impedance of Common-Gate Stage

Rout  rO || RD

CH 16 CMOS Amplifiers 65
 Example: Alternate Av Expression of CG Stage

Rout
Av 
Rin

CH 16 CMOS Amplifiers 66
 CG Stage in the Presence of Finite Source
Resistance

vout RD

vin 1
 RS
gm

CH 16 CMOS Amplifiers 67
 Output Impedance of a General CG Stage

Rout  RD || 1  g m RS rO  RS 

CH 16 CMOS Amplifiers 68
 CG and CS Stages Output Impedance Comparison

RoutCG  RoutCS  RD || 1  g m RS rO  RS 

 Since when calculating the output impedance, the input voltage

source of the CG stage is grounded, the result will be identical
to that of a CS stage if the same assumptions are made for both
circuits.
CH 16 CMOS Amplifiers 69
 Example: AV and Rout

vout g m1 RD   1  
 Rout   g m1rO1  || RS   rO1  || RD
vin 1  g m1  g m 2 RS   gm2  
λ=0 λ>0

CH 16 CMOS Amplifiers 70
 Example: CG Stage Lacking Bias Current

 Although the capacitor C1 isolates the DC content of the signal

source, it also blocks the bias current of M1, hence turning it
OFF.

CH 16 CMOS Amplifiers 71
 Example: CG Stage with Source Shorted to Ground

 Although there is now a path for bias current to flow to ground,

the signal current also goes with it, hence producing no gain.

CH 16 CMOS Amplifiers 72
 CG Stage with Proper Bias Circuitry

1 1
Rin  Av   g m RD
1  1  g m R1 RS
|| R1
gm

 R1 is used to provide a path for bias current to flow without

directly shorting the source to ground.
 However, it also lowers the input impedance of the circuit
CH 16 CMOS Amplifiers 73
 Input Current Flowing Paths

1
R1 
gm

 To maximize the useful current i2, R1 needs to be much larger

than 1/gm.

CH 16 CMOS Amplifiers 74
 Example: CG with Complete Bias Network

 nCox  100A / V 2
VTH  0.5V
 0
Av  5
RS  0, R1  500
1 / g m  50
Power  2mW
VDD  1.8V

VGS  0.8V
W L  244
g m  2 I D / VGS  VTH   136.4 
1

RD  682
RG1  45k, RG 2  135k

CH 16 CMOS Amplifiers 75
 Example: Min W/L

 nCox  100A / V 2
VTH  0.5V
 0
Av  5
RS  0, R1  500
1 / g m  50
Power  2mW
VDD  1.8V

VDD  I D RD  VGS  VR1  VTH

VDD 
Av
VGS  VTH   VGS  VTH  VR1
2
W 2I D
 2
L  V V 
 nCox  2 DD R1 
 Av  2 
CH 16 CMOS Amplifiers 76
 Source Follower

 Source follower sense the input at the gate and produces the
output at the source.

CH 16 CMOS Amplifiers 77
 Source Follower’s Response to an Input Change

 As the input changes by a small amount, the output will follow

the input and changes by a smaller amount, hence the name
source follower.

CH 16 CMOS Amplifiers 78
 Small-Signal Model and Voltage Gain for Source Follower

vout RS

vin R  1
S
gm

CH 16 CMOS Amplifiers 79
 Example: Source Follower with Current Source

VA  

Av  1

CH 16 CMOS Amplifiers 80
 Source Follower Acting as a Voltage Divider

vout RS

vin R  1
S
gm
CH 16 CMOS Amplifiers 81
 Complete Small-Signal Model with rO

vout rO || RS

vin r || R  1
O S
gm

CH 16 CMOS Amplifiers 82
 Example: Source Follower with a Real Current Source

rO1 || rO 2
Av 
1
rO1 || rO 2 
gm

CH 16 CMOS Amplifiers 83
 Example: Source Follower with a Real Current Source

RS  50
Av  0.5
Power  10mW
 nCox  100A / V 2
VTH  0.5V
 0
VDD  1.8V

RS
Av   0.5
1
 RS
gm
1
gm 
50
W L  360

CH 16 CMOS Amplifiers 84
 Output Resistance of Source Follower

1
Rout  || rO || RS
gm

CH 16 CMOS Amplifiers 85
 Example: Source Follower with Biasing

I D  1mA
Av  0.8
 nCox  100A / V 2
VTH  0.5V
 0
VDD  1.8V
RG  50k

RS
Av   RS  867
VGS  VTH
 RS
2I D
VGS  VDD  I D RS  0.933V
W L  107
CH 16 CMOS Amplifiers 86
 Source Follower with Current Source Biasing

 In IC technology, source follower is often biased by a current

source to avoid the bias current’s dependence on the supply
voltage.

CH 16 CMOS Amplifiers 87
 Summary of MOS Amplifier Topologies

CH 16 CMOS Amplifiers 88
 Example: Common Source Stage I

 1 

Av   g m1  || rO1 || rO 2 || rO 3 
 g m3 
1
Rout  || rO1 || rO 2 || rO 3
g m3

CH 16 CMOS Amplifiers 89
 Example: Common Source Stage II

rO 2
Av  
1 1
 || rO 3
g m1 g m 3

CH 16 CMOS Amplifiers 90
 Example: CS and CG Stages

AvCS   g m 2 1  g m1rO1 RS  rO1  || rO1

rO 2
AvCG 
1
 RS
g m1

CH 16 CMOS Amplifiers 91
 Example: Composite Stage I

RD
Av 
1 1

g m1 g m 2

CH 16 CMOS Amplifiers 92
 Example: Composite Stage II

1
|| rO 2
vout1 gm2

vin 1 1
|| rO 2 
gm2 g m1
1
|| rO 3 || rO 4
vout 2 g m3

vin 1 1
 || rO 2
g m1 g m 2

CH 16 CMOS Amplifiers 93
 Chapter Summary

 The impedances looking into the gate, drain, and source of a

MOS are equal to ∞, rO and 1/gm respectively (under proper
conditions).
 The transistor has to be properly biased before small-signal
can be applied.
 Resistive path between the supply rails establishes the gate
bias voltage.
 Only three amplifiers topologies are possible.
 CS stage provides moderate AV, high Rin and moderate Rout.
 Source degeneration improves linearity but lower AV.
 Source degeneration raises the Rout of CS stage considerably.
 CG stage provides moderate AV, low Rin and moderate Rout.
 AV for CS and CG stages are similar but for a sign.
 Source follower provides AV less than 1, high Rin and low Rout,
serving as a good voltage buffer.
CH 16 CMOS Amplifiers 94