OTA000004 SDH Principle

Issue 2.0

Optical Network Curriculum

Development Section
 Objectives

 Upon completion of this course, you will be able to

:
 Understand the basic of SDH m
ultiplexing standard

 Know the features, applications

and advantages of SDH based eq
uipment
 Course Contents

Part 1 SDH Overview

i. Emergence of SDH
ii. Disadvantages of PDH Part 2 Frame Structure & Multiplexing Methods
iii. Advantages of SDH
iv. Disadvantages of SDH
Part 3 Overhead & Pointers

Part 4 Logical Functional Blocks

 References

 SDH Principle Manual

 ITU-T G.701, G.702, G.707
 Emergence of SDH

---- Synchronous Digital Hierarchy

What is ---- It defines frame structure,
SDH? multiplexing method, digital rates hierarchy
and interface code pattern.

---- Needfor a system to process

Why did SDH
increasing amounts of information.
emerge? ---- New standard that allows mixing
equipment from different suppliers.

BACK
 Disadvantages of PDH

Plesiochronous
1. Interfaces Digital Hierarchy
Electrical interfaces
--- Only regional standards. 3 PDH rate
hierarchies for PDH: European (2.048 Mb/s),
Japanese, North American (1.544 Mb/s).
Optical interfaces
--- No standards for optical line equipment,
manufacturers develop at their will.
 Disadvantages of PDH

2. Multiplexing methods
Asynchronous Multiplexing for PDH
The location of low-rate signals in high-rate signals
is not regular nor predictable.
 Disadvantages of PDH

140 Mb/s 140 Mb/s

34 Mb/s 34 Mb/s

8 Mb/s 8 Mb/s
de-multiplexer multiplexer

de-multiplexer multiplexer

de-multiplexer multiplexer

2 Mb/s

level by level
Not suitable for huge-volume transmission
 Disadvantages of PDH

3. OAM function
--- Weak Operation, Administration & Maintenance
function.
--- Provisioning circuits is time consuming & labor-
intensive.

4. No universal network management

interface
--- Capabilities to setup a TMN is limited.

Telecommunications Management
Network
 Advantages of SDH

1. Interfaces
Electrical interfaces
--- Can be connected to all existing PDH
signals.
Optical interfaces
--- Can be connected to multiple vendors’
optical transmission equipment.

BACK
 Advantages of SDH

2. Multiplexing method
Synchronous Transport Module, level 1

--- Basic rate is STM-1, other rates are

multiples of the basic rate
--- PDH signal to/from SDH signal
--- Low level SDH to/from high level SDH
STM-1
622 Mbit/s 622 Mbit/s
De-multiplexing

Multiplexing

STM-1

STM-1
STM-4
STM-1

2 Mbit/s Low rate SDH High rate SDH

 Advantages of SDH

Low rate SDH to higher rate SDH

STM-64
×4 10 Gb/s

STM-1 ×4 STM-4 ×4 STM-16

155 Mb/s 622 Mb/s
2.5 Gb/s

WDM 10 Gb/s
 Advantages of SDH

byte interleaved multiplexing method

One Byte
STM-1 from STM-1 A
A

STM-1 B A D C B A D C B A …
B 4:1 STM-4

STM-1
C

STM-1
D
 Advantages of SDH
√ Optical Interface only scrambles the electrical
signal

√ The optical code pattern SDH uses is Scrambled

NRZ

√ PDH uses mBnB

√ Synchronous multiplexing method and flexible

mapping structure

√ Use multistage pointer to align PDH loads in SDH

frame, thus, dynamic drop-and-insert capabilities
 Advantages of SDH

General concept

P STM-1
D Packing PKG Alignment
H
PKG PKG
a b
 Advantages of SDH

3. OAM function
--- Abundant overheads bytes for automation,
network monitoring and maintenance
--- About 5% of the total bytes are being used
 Advantages of SDH

4. Compatibility
PDH, SDH,
ATM, FDDI
Signals
packing

package STM-N SDH STM-N package

network
transmit receive Processing
Processing
unpacking

PDH, SDH,
ATM, FDDI
Signals
BACK
 Disadvantages of SDH

1. Low bandwidth utilization ratio.

Signal Digital Bit Rate Channels
E0 64 kbit/s One 64 kbit/s
Non-Synchronous,
E1 2.048 Mbit/s 32 E0
PDH Hierarchy
E2 8.448 Mbit/s 128 E0
E3 34.368 Mbit/s 16 E1
E4 139.264 Mbit/s 64 E1

Bit Rate Abbreviated SDH SDH Capacity

155.52 Mbit/s 155 Mbit/s STM-1 63 E1, 3 E3 or 1 E4

622.08 Mbit/s 622 Mbit/s STM-4 252 E1, 12 E3 or 4 E4

2488.32Mbit/s 2.5 Gbit/s STM-16 1008 E1, 48 E3 or 16 E4

9953.28Mbit/s 10 Gbit/s STM-64 4032 E1, 192 E3, 64 E4

SDH Hierarchy BACK
 Disadvantages of SDH

2. Mechanism of pointer adjustment is

complex.

3. Large-scale application of software makes

SDH system vulnerable to viruses or
malpractice.
 Questions

1. Why did SDH emerge?

2. What are the advantages & disadvantages of
SDH?
3. What is the basic transmission rate in SDH
and what are the other common ones?
Time to think
Soon Coffee
Time!
 Answers

1. Click to SDH Emergence

2. Click to Advantages and Disadvantages of
SDH
3. STM-1. STM-4, STM-16, STM-64
 Course Contents

Part 1 SDH Overview

Part 2 Frame structure & Multiplexing Methods

i. Frame Structure of STM-N
ii. Functions of each parts Part 3 Overheads & Pointers
iii. SDH tributary multiplexing

Part 4 Logical functional Blocks

 Part 2 SDH Frame Structure

From ITU-T G.707:

Frame = 125 us
1. STM-1 is the basic
transmission format
2. One frame lasts for 125
microseconds (8000
frames/s

123456789
3. Rectangular block structure
9 rows and 270 columns 9 rows
4. Each unit is one byte (8
bits)
5. Transmission mode: Byte
by byte, row by row, from
left to right, from top to
bottom
270 Columns

1 byte = One 64 kbit/s channel

STM-N = 9 X 270 X N (N = 4, 16, 64)
 SDH Frame Structure

Frame = 125 us

Three parts: SOH

123456789
1. Information PTR Information
9 rows
Payload Payload
2. Section SOH
Overhead
3. Pointer
9

270 Columns
 Information Payload
Information Payload

√ Also known as Virtual Container level 4 (VC-4)

√ Used to transport low speed tributary signals
√ Contains low rate signals and Path Overhead (POH)
√ Location: rows #1 ~ #9, columns #10 ~ #270

POH

SOH
package
PTR
POH

loading and low rate signal

9 rows Payload
aligning

SOH package

POH
9 1 Data
package
270 Columns
 SDH Overhead

Concept of Path and Section

one Path ( low rate signal)

one Path ( low rate signal) Section
(SDH signal)
one Path ( low rate signal)

Two main types of overheads:

1. Section Overhead
2. Path Overhead
 Section Overhead

Fulfills the section layer OAM functions

RSOH Types of Section Overhead

123

PTR Information 1. Regenerator Section

9 rows Overhead (RSOH), monitors
56789

Payload the whole STM-N

MSOH 2. Multiplex Section Overhead
(MSOH), monitors STM-1 in
STM-N
√ Location:
9
1. RSOH: rows #1 ~ #3,
270 Columns columns #1 ~ #9
2. MSOH: rows #5 ~ #9,
columns #1 ~ #9
 Pointer

√ Indicates the first

RSOH
byte of the payload
container
4 AU-PTR Information
√ Pointers permit 9 rows
phase and frequency Payload
differences of the VCs MSOH

► Location:
row #4, columns #1 ~ #9 9

270 Columns
Two stage alignment operation: TU-PTR AU-PTR
1st alignment 2nd alignment
2M

34 M
 SDH Multiplexing

SDH Multiplexing includes:

√ Low to high rate SDH signals (STM-1  STM-N)

√ PDH to SDH signals (2M, 34M & 140M  STM-N)
√ Other hierarchy signals to SDH Signals (ATM  STM-N)

Some terms and definitions:

► Mapping
► Aligning
► Multiplexing
► Stuffing
Go to glossary
 SDH Multiplexing Structure
×1 Mapping
STM-64 AUG-64
Aligning
×4
×1 Multiplexing
STM-16 AUG-16
×4 Pointer processing
×1
STM-4 AUG-4

×4
×1 ×1
STM-1 AUG-1 AU-4 VC-4 C-4 139264 kbit/s

×3

×1 34368
TUG-3 TU-3 VC-3 C-3
kbit/s

×7
TUG-2

Go to glossary TU-12 VC-12 C-12 2048 kbit/s

×3
 SDH Tributary Multiplexing (140M)

140 Mbit/s to STM-N

C4 VC4
1 1
1
P
Rate Add POH Next
140M
adaptation O page

9 Mapping
H 9
Packing
1 260 1 261
125 μs 125μs
 SDH Tributary Multiplexing (140M)

AU-4 AUG-1 STM-1

1 270
10 270
1
Add 1 9 RSOH
AU-PTR Add Info
Pointer ×1 AU-PTR
SOH
Payload
9 MSOH
Aligning Multiplexing STM-N
AUG-N 1 270X N
1
Multiplexing route:
1X140M  1XVC-4 
1XSTM-1
One STM-1 frame can load 9
only one 140Mbit/s Signal Multiplexing
 SDH Tributary Multiplexing (34M)

34 Mbit/s to STM-N

C3 VC3
1 1
1
P
34M Rate Add POH Next
Adaptation O page

9
H 9
Packing 84 Mapping 85
1 1
125μs 125μs
 SDH Tributary Multiplexing (34M)

TU-3 TUG-3 VC-4

1 86 1 86 1 261
3
1 1 H1 1
H1 H2
H2 H3
H3 P
1st Fill O R R
×3
gap H
align R

9 9 9

Aligning Stuffing Multiplexing Same

as for
Multiplexing route: 1X34M  1XTU-3  3XTUG-3  C4
1XAU-4---One STM-1 can load three 34Mbit/s signals
 SDH Tributary Multiplexing (2M)

2 Mbit/s to STM-N
C12 VC12 TU12
POH
1 4 1 4 1 4
1 1 1

Rate Add Add Next

2M
Adaptation POH Pointer page

9 9 9

Packing 125μs Mapping Aligning TU-PTR

 SDH Tributary Multiplexing (2M)

TUG-2 TUG-3
1 12 1 86
1 1

R R
×3 ×7

9 9

Same
Multiplexing Multiplexing as for
C3
Multiplexing route: 1X2M  3XTU12 
7XTUG-2  3XTUG-3  1XSTM-1--- One
STM-1 can load 3X7X3 = 63X2M Signals
Multiplexing structure: 3-7-3 structure
 Questions
1. What are the main parts of the SDH Frame
structure?
2. What is the transmission speed of STM-1?
Why is that so?
3. Why is multiframe used for the 2Mbit/s
signal?
 Answers

1. Three main parts: a. Information Payload b.

SOH c. PTR
2. Transmission speed = 155.52 Mbit/s,
270X9X8000X8
3.
 Glossary

► Mapping - A process used when tributaries are

adapted into VCs by adding justification bits and POH
information

► Aligning - This process takes place when a pointer is

included in a Tributary Unit (TU) or an Administrative Unit
(AU), to allow the 1st byte of the VC to be located

GO back to SDH Multiplexing

 Glossary

► Multiplexing - This process is used when multiple

low-order path signals are adapted into a higher-order
path signal, or when high-order path signals are adapted
into a Multiplex Section

► Stuffing – As the tributary signals are multiplexed

and aligned, some spare capacity has been designed into
the SDH frame to provide enough space for all various
tributary rates. Therefore, at certain points in the
multiplexing hierarchy, this space capacity is filled with
“fixed stuffing” bits that carry no information, but are
required to fill up the particular frame GO back to SDH Multiplexing
 Glossary

 SDH Multiplexing Structure

C = Container
VC = Virtual Container
TU = Tributary Unit
AU = Administrative Unit
TUG = Tributary Unit Group
AUG = Administrative Unit Group
STM = Synchronous Transfer Module

Go back
 Glossary

 TU Multiframe
In the floating TU mode, four consecutive 125 microsecond frames
of the VC-4 are combined into one 500 microsecond structure, cal
led a TU Multiframe. The occurrence or the TU Multiframe and its
phase is indicated in the VC-N Path Overhead.
 Concatenation
The linking together of various data structures. In SDH, a number
(M) of TUs can be linked together to produce a concatenated cont
ainer, M times the size of the TU.
 Course Contents

Part 1 SDH Overview

Part 2 Frame structure & Multiplexing Methods

Part 3 Overheads & Pointers

SOH
a. RSOH
b. MSOH Part 4 Logical functional Blocks
. POH
a. H.O. POH
b. L.O. POH
i. POINTERS
a. AU-PTR
b. TU-PTR
 Part 3 Section Overheads

R A1 A1 A1 A2 A2 A2 J0
S 1 2 3
B1 ∆ ∆ E1 ∆ F1
O
S H D1 ∆ ∆ D2 ∆ D3
T AU-PTR
M
- B2 B2 B2 K1 K2
5 6 7 8 9

1 M D4 D5 D6
S
O D7 D8 D9
H
D10 D11 D12
S1 M1 E2
∆ = Media dependent bytes
 A1 and A2 Bytes

 Framing Bytes – Indicate the beginning of the

STM-N frame
 The A1, A2 bytes are unscrambled
 A1 = f6H (11110110), A2 = 28H (00101000)
 In STM-N: (3XN) A1 bytes, (3XN) A2 bytes

stream

STM-N STM-N STM-N STM-N STM-N STM-N

Finding frame head

 A1 and A2 Bytes

Framing

N
Find
A1,A2

OOF
Y
over 3ms

LOF

Next AIS
process
Back
 D1 ~ D12 Bytes

Data Communications Channels (DCC) Bytes –

 Message-based Channel for OAM between NEs
and NMS
 RS-DCC – D1 ~ D3 – 192 kbit/s (3X64 kbit/s)
 MS-DCC – D4 ~ D12 – 576 kbit/s (9X64kbit/s)

NE NE NE NE

DCC channel
TMN OAM Information: Control, Maintenance,
Remote Provisioning, Monitoring (Alarm &
Performance), Administration
 E1 and E2 Bytes

 Orderwire Bytes – Provides one 64 kbit/s each for

voice communication
 E1 – RS Orderwire Byte – RSOH orderwire message
 E2 – MS Orderwire Byte – MSOH orderwire message

NE NE NE NE

E1 and E2

Digital telephone channel

E1-RS, E2-MS
 B1 Byte

Bit interleaved Parity Code (BIP-8) Byte –

 A parity code (even parity), used to check the
transmission errors over the RS
 B1 BBE is represented by RS-BBE

A1 00110011 STM-N

A2 11001100 Tx Rx
A3 10101010
BIP-8
A4 00001111 Calculate
2#STM-N
1#STM-N B1, B2

B 01011010 2#STM-N
Verify B1
B2 1#STM-N
 B2 Byte

Bit interleaved Parity Code (MS BIP-24) Byte –

 This bit interleave parity NX24 code is used to
determine transmission errors occurred over the MS
 B2 BBE is represented by MS-BBE

Insert Detect
B2 B2

SDH STM-N SDH

Equipment Equipment
Sending NE Receiving NE
If error blocks occur
 MS-BBE performance event
 M1 Byte

Multiplex Section Remote Error Indication （ MS-REI ） Byte

 A return message from Rx to Tx ,when Rx find MS-BB
E
 A count of the number of BIP-24xN (B2) errors
 Tx generate corresponding performance event MS-RE
I

Traffic

Tx Rx

Return
Gener M1 Find MS-
ate BBE
MS-
REI
 K1 and K2 (b1 ~ b5)

Automatic Protection
Switching (APS channel)
bytes

Transmitting APS signaling

Implement equipment self-healing function

Used for network multiplex

protection switch function
 K2 (b6 ~ b8)

 Multiplex Section Remote Start

Defect Indication (MS-RDI): K
2 (b6-b8)
Detect
 Rx detects K2 (b6-b8)=" K2(b6- 110
111" generate MS-AIS alar b8)
m after 5 consecutive fram 111
es
Generate
 Rx detects K2 (b6-b8)=" MS-AIS
110" generate MS-RDI alar
m
Return MS- Generate
RDI MS-RDI
 S1 Byte

Synchronization Status Message Byte (SSMB): S1

(b5~ b8)
 Value indicates the sync. level
 Used to implement the clock source protection
function
bits 5 ~ 8 Meaning
Quality unknown (existing sync.
0000
Network)

0010 G.811 PRC

0100 SSU-A (G.812 transit)

1000 SSU-B (G.812 local)

1011 G.813 (Sync. Equipment Timing Clock)

1111 Do not use for sync.

 Path Overheads
1 2 3 4 5 6 7 8 9 10
1 J1
2 B3
3 C2
4 G1
5 F2
6 H4
7 F3
8 K3
9 N1
VC-n Path Trace Byte
Path BIP-8
Path Signal Label
Path Status
Path User Channel
TU Multiframe Indi
Path User Channel
AP Switching
Network Operator

Higher Order Path Overhead

 Path trace byte: J1

Detect J1

> The first byte of VC-4 N

Match
Y
> User-programmable
> Required match
HP-TIM Next
process

Insert AIS
downward
 Path BIP-8 Byte

> Path bit interleaved parity

code byte (even parity code)

> Used to detect Verify B3

transmission errors
(Performance Monitoring)

> Calculated over all bits N Y

of the previous VC before correct
scrambling and placed in
the B3 of the current frame

HP-BBE Next
process
 Signal label byte: C2

> Specifies the mapping Detect C2

type in the VC-N

> 00 H  Unequipped N Y
00H
02 H  TUG structure
13 H  ATM mapping Y N
Match HP-UNEQ

> Requires matching

Next HP-SLM
process

Insert AIS
downward
 Path Status Byte: G1

Detect receiving
VC4
> Return performance messa
ge from Rx to Tx

> HP-REI  b1 ~ b4 N
HP-
UNEQ Y
HP-TIM
HP-SLM
> HP-RDI  b5 HP-
N Y Return
BBE
HP-RDI

Next
Return
proces
HP-REI
s
 Path Overheads
Low Order Path Overhead
1 4
1
V5 J2 N2 K4

VC-12 VC-12 VC-12 VC-12

9
500μs VC-12 multiframe
 Path Overhead Bytes

V5
> First byte of the multiframe
> Indicated by TU-PTR
> Functions: Error checking, Signal Label and Path Status
of VC-12

 b1 ~ b2  Error Performance Monitoring (BIP-2)

 b3  Return Error detected in VC-12 (LP-REI)
 b4  Return Failure declared in VC-12 (LP-RFI)
 b5 ~ b7  Signal Label for VC-12
 b8  Indicate Defect in VC-12 path (LP-RDI)
 Path Overhead Bytes

Detect V5

Detect b5-b7
Verify b1 b2

N Y
000 N Y
match
Y N LP-UNEQ
Match
LP-BBE Next
Next process
process LP-SLM

Return LP-
REI b3
Return LP-
RDI b8
 Pointers

Pointers

AU-PTR TU-PTR
 AU-PTR

RSOH

AU-PTR 4

MSOH
 AU-PTR

> Payload pointers to permit differences in

phase and frequency of the VC-N wrt the STM-N
> Indicates the offset between VC payload &
STM-N frame by pointing to the 1st byte in the
VC
> Consists of H1, H2 and H3 Bytes
> Divide the VC-4 payload bytes into 3  783
units
> Each unit is given an address  0 ~ 782

H1 H1 H1 H2 H2 H2 H3 H3 H3
3 x AU-3 1 = All 1s
Y = 1001ss11
1 x AU-4 H1 Y Y H2 1 1 H3 H3 H3
(S bits unspecified)
 AU-PTR
> H1 & H2 Bytes  Pointer bytes:
VC pointer bytes specify the VC frame location
 Used to align the VC and STM-1 SOHs in an STM-N
 Perform frequency justification

> H3 Byte  Pointer action byte

 Used for frequency justification
 Depending on the pointer value, the bytes are used
as buffers for positive or negative pointer justifications

> If receiver side cannot interpret the PTR value,

AU-LOP then AIS alarms are inserted downwards
> Receiving H1H2H3H3H3 all 1s, insert AU-AIS
downwards
 TU-PTR
1 4
1

VC-12 VC-12 VC-12 VC-12

9 V1 V2 V3 V4
500μs VC-12 multiframe
TU POINTERS
 TU-PTR

> TU payload PTR allows dynamic alignment of the L

-O VC-12 within the Multiframe
> Payload PTR value is located in bits 7~ 16 of V1 & V
2 Bytes
> VC-12 Multiframe is divided into 140 units, each unit
is 1 Byte. Each Byte has an address, Range 0~ 139, U
nit 1 (Add = 0) is located after V2 Byte in the Multifram
e
> If receiver side cannot interpret the PTR value, TU-L
OP then AIS alarms are inserted downwards
> Receiving V1, V2, V3, V4 all 1s, insert TU-AIS downw
ards
> Indication of Multiframe in H4 Byte
 Questions
 Which bytes in the Overhead are not scrambled for trans
mission?
 Which byte is used to monitor the MS-AIS and MS-RDI?
 What is the mechanism for R-LOF generation?
 What are the alarms generated when the receiver have d
etected that the AU-PTR is 800 or 1023?
 Which bytes implement the layered error monitoring?
 Answers
 A1, A2 & J0
 K2
 See Framing Bytes (Go To)
 After 8 consecutive frames AU-LOP then AU-AIS will be g
enerated
 B1, B2 and B3
 Summary

 SOH consists of RSOH & MSOH

 POH consists of L-O POH & H-O POH
 PTR consists of AU-PTR & TU-PTR
 Course Contents

Part 1 SDH Overview

Part 2 Frame structure & Multiplexing Methods

Part 3 Overheads & Pointers

Part 4 Composition of SDH Equipment

i. SDH Network Elements

ii. SDH Logical Functional Blocks
 Part 4 Common SDH NE

TM (Terminal Multiplexer)
 Two ports device: Line Port (Optical Port),
Tributary Port
 Used in the terminal station of a network
 Cross-connect function: TU  LU

TM

STM-N W

E1 E4
Hua Wei E3
STM-M
Default Note: M<N
 Common SDH NE

ADM (Add and Drop Multiplexer)

 Three ports device: Tributary Port, Line Port West
(Left), Line Unit East (Right)
 Used as an intermediate station, the most important
NE type
 Cross-connect function: TU  LU (W/E), LU
(W)  LU (E)

ADM
STM-N W E STM-N

E1 E4
Note: M<N
E3
STM-M
 Common SDH NE

Applications of TM & ADM

TM TM

W W
STM-N STM-N
E1 E4
E3 STM-M Note: M<N
ADM

TM ADM ADM TM ADM ADM

chain
ring ADM
 Common SDH NE

REG
 Two ports device: LU (W) & LU (E)
Used due to the long distance between Multiplexers
 O/E, Signal regenerating (recovers timing, replaces
RSOH bytes, MSOH, POH & payload are not altered)
 Equivalent to ADM

W E
REG
STM-N STM-N
 Common SDH NE

DXC
 Multi-port device
 Used to interconnect larger number of STM-N
signals
 Can be used for the grooming (consolidating
& segregating) of STM-Ns
 Used in complex & backbone network
 DXC m/n (m ≥ n) Input Line: n
…
equivalent to

m DXC n
Input Line: m
 SDH Logical Functional Blocks

Purpose
SDH requires a
unified Interface
Realized differently by
different vendors
ITU-T recommends a
unified basic functional
block standard
 Logical Functional Block for SDH
Equipment
w TTF

STM A B C D E F
SPI RST MST MSP MSA

HOI
140Mb/s G.703
M L G
PPI LPA HPT HPC
F

LOI HOA

2Mb/s G.703 K I G F
PPI
J LPA LPT
H LPC H HPA HPT
34Mb/s

Note: Taking 2Mb/s

as example Q Interface
SEMF MCF
F Interface
OHA OHA Interface P N
D4—D12 D1—D3

External Synchronous
SETS SETPI
Signal Interface
 SPI Functional Block

SPI: Synchronous Physical

Interface
 Implements interface SPI
function
 O/E, extracts timing signal
from STM-N
 Monitors corresponding
alarm Receiving Transmitting
B A
AB

E/O
O/E
Extract Receive Fail
Timing R-LOS
Signal
 RST Functional Block
Receiving
BC

R-LOS Framing
Put all “1” at C A1, A2

Fail Normal
R-OOF, R-LOF Unscramble
RST: Regenerator Section All “1” at C Process E1, D1~D3
Termination
 Processes RS overhead Verify B1
 Processes RSOH in Rx RS-BBE
direction
 Writes RSOH in Tx direction
 RST Functional Block

Transmitting
CB

Writes Scrambles
RSOH STM-N frame

Calculates Add E1
B1 D1-D3
 MST Functional Block

MST: Multiplex Section

Termination Receiving
 Processes MSOH CD

Extract APS Detect Detect

K1, K2 (b1-b5) K2 (b6-b8) B2

111 Overflow
110 Abnormal
MS-AIS MS-EXC (B2)
MS-RDI MS-BBE All “1” at D
All “1” at D
 MST Functional Block

Transmitting
D→C

Write MSOH

Receiving MS-BBE Receiving MS-AIS

Return M1MS-REI Return K2110 MS-RDI
 MST Functional Block

Signal frame structure

at reference point D
Concept of RS, MS

MST RST SPI SPI RST MST

RS (regenerator section)
MS (multiplex section)
 MSP Functional Block

MSP: Multiplex Section Protection

 Implements MS layer protection switch
 Switch conditions: R-LOS, R-LOF, MS-AIS alarm

Equipment Model Functional Block

Main Main Signal Path

M M
TM TM M MST MST M
S S
A S S A
Stand-by P P
MST MST

Stand-by Signal Path

 MSA Functional Block

Receiving
MSA: Multiplex Section EF
Adaptation
 Implements AUG to
VC-4 or VC-4 to AUG De-interleaved
conversion AUG  N×AU-4

Read
AU-PTR

H1H2H3 are all “1” Invalid pointer or 8 NDF

AU-AIS AU-LOP
All “1” at F All “1” at F
 MSA Functional Block

Transmitting
1 261
FE 1

VC-4
Writes Byte interleaved 9

AU-PTR N×AU- 4  AUG

Signal frame structure
at Point F
 Functional Blocks

HPC: High-Order Path Cross-connect

 Cross-connect Matrix control &
Implementation only for VC-4
 Only chooses the route, does not
process signals

HPT: High-Order Path Termination

 Processes HO-POH in VC-4
 VC-4 Real-Time monitoring
 HPT Functional Block

Receiving
FG

Verify B3 Detect J1 Detect C2 Transmit H4

Invalid Mismatch Mismatch to HPA
 HP-BBE  HP-TIM  HP-SLM
 00H: HP-UNEQ

All “1” at G All “1” at G

 HPT Functional Block

Transmitting
GF

Receiving HP-TIM,
Receiving HP-BBE HP-SLM, HP-UNEQ
Write HO-POH Return HP-REI (G1)
Return HP-RDI (G1)

1 260
1

C4
9
G point
 Functional Block

 HOI: High-Order Interface (HPT, LPA, PPI)

 140 M --- VC-4

 HOA: High-Order Assemble (HPT, HPA)

 VC-12 --- VC-4

 LPC: Low-Order Path Connection

 For VC-12 & VC-3 Cross-connect Matrix
 Only chooses route, does not process signals

 LPT: Low-Order Path Adaptation

 Real-Time Monitoring of Low-Order VC-12
 Functional Block

LPA: Low-Order Path Adaptation

 Implements pack/unpack and restores original signal
 PDH <---> C

PPI: PDH Physical Interface

 Extract PDH tributary signal timing
 Code pattern conversion
 Interface between device and PDH line
 PPI Functional Block

PPI

Receiving Transmitting
LM ML
JK KJ

Code pattern No input signal

Code pattern
conversion T-ALOS,
conversion
Extract timing EX-TLOS
 HPA Functional Block

Receiving
HPA: High order GH
Path Adaptation
 Implements C4
De-interleaved
to VC-12 C4  63XTU-12
conversion

Read
TU-PTR

V1V2V3 are all “1” Invalid pointer or 8 NDF

TU-AIS TU-LOP
All “1” at H All “1” at H
 HPA Functional Block

Transmitting
HG

Write Pointer Byte Interleave

TU-PTR, VC-12TU12 TU12C-4
 LPT Functional Block

LPT: Low-Order Path Termination

 Process LO-POH

LPT

Receiving Transmitting
HI IH

Detect V5 Write LO-POH

LP-BBE
LP-SLM, LP-UNEQ
Receive LP-BBE, Return LP-REI
Receive LP-SLM, UNEQ, Return LP-RDI
 Auxiliary Functional Blocks

SEMF: Synchronous Equipment Management Functio

n
 Monitoring center of the whole equipment
 Implements OAM of local equipment and other equipm
ent
MCF: Message Communication Function
 Provides D1~D3 Interface for communication
 Implements network management termination interfac
e to equipment: f/Qx
 Auxiliary Functional Blocks

SETS: Synchronous Equipment Timing Source

 Provides local timing clock signal to other fun
ctional blocks
 Provides timing clock signal to other equipme
nt
SETPI: Synchronous Equipment Timing Physical I
nterface
 Provides external interface of SETS
 External timing clock signal and output timing
clock signal
OHA: Overhead Access
 Processes order wire messages E1, E2, F1
 Alarm Flow Chart

R-LOS R-LOF

MS-EXC MS-AIS

AU-LOP AU-AIS HP-UNEQ HP-TIM HP-SLM

TU-AIS