Syllabus

• Fault Modeling and Simulation, Testability, Analysis Technique

• Design for testability:

• Ad-hoc Methods and General guidelines,
• Scan Technique, Boundary Scan
• Built in Self Test

• Analog Test Buses, Design for Electron Beam Testability, Physics of Interconnects
in VLSI, Scaling of Interconnects, A Model for Estimating Wiring Density, A
Configurable Architecture for Prototyping Analog Circuits.

1
Fault Model
• Fault Model: a model for how faults
occur and their impact on circuits.
• The most popular model is called the
Stuck-At model
• stuck at zero (Stuck-At-0, S-A-0)
• stuck at one (Stuck-At-l, S-A-l)

• It is evident that to ensure the most

accurate modeling, faults should be
modeled at the transistor level because it
is only at this level that the complete
circuit structure is known.
2
Fault Model (cont.)
• A particular problem that arises
with CMOS is that it is possible for
a fault to convert a combinational
circuit into a sequential circuit.
• If nMOS transistor A is stuck open

• Z’ is the previous state of the gate

3
Fault Model (cont.)
• Stuck closed states can be detected by
observing the static VDD current (IDD)
while applying test vectors.

Output is connected
to Vdd  If any input
is 1  Static current
flow from Vdd

4
Fault Model (cont.)
• Observability
• The observability of a particular circuit node is the degree to which you can observe that
node at the outputs of an integrated circuit (i.e., the pins). It is the aim of good chip
designers to have easily observed gate outputs.
• Controllability
• The controllability of an internal circuit node within a chip is a measure of the ease of
setting the node to a 1 or 0 state. An easily controllable node would be directly settable
via an input pad. A node with little controllability, such as the most significant bit of a
counter, might require many hundreds or thousands of cycles to get it to the right state.
• Repeatability
• The repeatability of system is the ability to produce the same outputs given the same
inputs. Combinational logic and synchronous sequential logic is always repeatable when it
is functioning correctly. However, certain asynchronous sequential circuits are
nondeterministic. For example, an arbiter may select either input when both arrive at
nearly the same time.
5