Building a Register and

RAM
LECTURER: PAZIR AHMAD
To get bigger memory we can simply combine flip-flops
The circuit we get this way is called a register
It uses one clock signal to save all inputs in parallel

4-Bit Register
(x =input=output)
If we want to add a control for input and output , we use a controlled buffer:

•a controlled buffer is a so-called tristate device

• it has three instead of two states: true, false, unknown
• it has a data and a control input
• if control is 1, it acts like a normal wire
• if control is 0, it’s like a cut wire: the output is unknown
4-Bit Register with load and Read control
You can use Register for shifting
Shift Right Register

Shift Left has similar implementation

Universal Register
Can we use same register for multiple purpose?
◦ (parallel load, shift Right, shift left and preserve the previous content )
◦ Use Multiplexer

S1 S2 Input for Register

0 0 No change
0 1 Shift Right
1 0 Shift Left
1 1 Parallel load
Universal shift Register
Building RAM
A Register is practical for some bits... but not for RAM
our memory chip would need at least 2 pins for every bit.
So we need a clever way to put those flip-flops together

The simulation is available.

RAM Design Ideas
1. Data is read and written in words, not bits (e.g. 16 or 32 bits)
2. There is an address input that decides which word to read or write
3. We put the same input to all flip-flops, they are only written when selected
4. we activate the output of a flip-flop only when selected, so we use common output lines
RAM: Inputs and Outputs
Inputs needed:
1. data in
2. address bits (choose which flip-flop to read or write)
3. read bit (do we want to read or write?)
4. chip select (tell the chip if we want to use it)

Outputs needed:
• data out
 RAM: Data Input
We look at an example 4×4 RAM (4 words with 4 bits each):
Example RAM: Inputs
RAM: Addressing
We use a decoder to address a specific word in the RAM
Example RAM: Addressing
 Combining In- and Outputs

•in- and output pins are never used at the same time
• therefore we can we can use the same pins for both
• we need to disconnect the output lines when writing to the chip.
• Otherwise the output would overwrite the incoming data.
• we use a controlled buffer:
A Complete 4×4 RAM
4×4 RAM: Observations
• When CS (chip select) is 0, the RAM cannot be read or written
• When RD is 1, the RAM is read, when it’s 0 the data input is written
• to activate the output lines, OE (output enable) has to be set to 1
• only the row of flip-flops activated by the two address bits can be accessed