Doha XT2019 Moto G8 Plus - LCM 6.3FHD+ - TIANMA - Riga M - SD

Material or Methods Specification NO.
SD68C44925
TITLE: LCD MODULE, 65.304×151.876×1.23MM, MIPI,DISPLAY, ±5.5V,1.8V （ W18 Compliant ）
REVISION DATE: 2/20/2019 MEMO: ISSUE: A PAGE 1 / 50
SPECIFICATION
FOR
APPROVAL
( ) Preliminary Specification
(●) Final Specification
Title Customer Approval Sheet for Moto Riga M
Customer Lenovo
Part Number SD68C52386
SUPPLIER 天马
MODEL TL063FVMC54-00
Version A
SIGNATURE DATE APPROVED BY DATE
REVIEWED BY
Please return 1 copy for your confirmation with

your signature and comments.
Motorola Mobility Confidential Restricted - Do Not Redistribute

Information contained on pages of this document cannot be reproduced or used in whole or in part without Motorola’s written consent.
Printed copies of this document are not controlled.
Material or Methods Specification NO. SD68C44925
CONTENT LIST
No ITEM Page
COVER 1
CONTENTS 2
RECORD OF REVISIONS 6
1 GENERAL DESCRIPTION 7
2 ABSOLUTE MAXIMUM RATINGS 14
3 ELECTRICAL SPECIFICATIONS 15
4 OPTICAL CHARACTERISTICS 31
5 MECHANICAL CHARACTERISTICS 38
6 RELIABLITY TEST 44
7 INTERNATIONAL STANDARDS 45
8 PACKING 46
9 Incoming Inspection Standard 49
10 Checklist 50

SCOPE
The purpose of this document is to provide a better understanding of Motorola, Inc.'s requirements for
Organic Light Emitting Diode (OLED) Displays to suppliers. Its goal is to clarify quality control procedures
and components specifications, so that suppliers ship only 100% acceptable material to Motorola.
This document contains specific electrical, optical, mechanical, environmental, packaging, and general
Motorola manufacturing, quality, and qualification requirements.
APPLICABLE DOCUMENTS
12M80967A78 Motorola Supplier Material Quality Control
12G13933A01 Motorola Receiving Barcode Specification
12G13933A12 Component Temperature Requirements to Support “Pb-Free” Solder Assembly (if
applicable)
12S10601A Packaging Requirements for Inbound Shipments to Motorola
12G02897W18 Motorola Controlled and Reportable Materials Disclosure
12M05053A65 Purchased Material Change Notification Procedure
12M09192A78 MOTOROLA PROCESS CHANGE NOTIFICATION PROCEDURE
71014125001 MOTOROLA SCT GUIDELINES FOR FPC TESTING AND VALIDATION REQUIREMENTS
71014011001 DISPLAY FLEX FABRICATION NOTES
MBG-S-PQM-061 Motorola Cosmetic Specification for Molded and/or Decorated Plastic
Surfaces and Lenses for
Handheld Products
12G13933C77 Qualification Procedure for LCD Displays
12M09192A78 Motorola PCS Process Change Notification Procedure
12M09195A44 LCD Mechanical Strength 4-Point Bending Test Method
12M09195A47 Display Module Design Validation Test
12M09195A43 Display Limit Sample Setup (only if applicable)
01019576 Display and Lens Module Assembly ME Drawing

72014110001 Display Module Assembly ME Drawing

CAUTION: This specification cannot be distributed to parties outside of Motorola Mobility without first having
on file a signed Non-Disclosure Agreement.

If this part does NOT comply with the ESD, Latch-up, or any stress tests as outlined in 12G13933C77, the
following note(s) are required to be added.

CAUTION: This device does not meet all the reliability stress test requirements according to Motorola
Mobility ALT test conditions at the product level. Testing conditions in ALT at product level may have wider
temperature ranges compared with the conditions that are specified in this document.

WARNING: IC's on this product are inherently static sensitive devices. As a result, extreme caution should
be used when handling these parts. Every possible precaution should be taken in the manufacturing
process to insure that any AMOLED display is not exposed to any static voltages.


REQUIREMENT TO 12G13933C77
●This item must be qualified according to the requirements in 12G13933C77.
●Cpk data acquisition:

○ [ ] If this box is checked, Calculate Cp/Cpk on all specified parameters
per Motorola 12M80967A78.
○ [✔ ] If this box is checked, Calculate Cp/Cpk on "[X]" and <ST> parameters
only per Motorola 12M80967A78.
DESCRIPTION
This display is a color Active Matrix Organic Light Emitting Diode display (AMOLED) of glass
construction with White pixels on a Black background. The display consists of 1080 (RGBG - Diamond)
x 2340 pixels (sub pixel rendered) with a color depth of 16.6 M colors (24 bpp). The display interface is
1 MIPI channel with four DSI lane. The touch interface is via I2C.
This display module is constructed of

●The Organic Light Emitting Diode Display Glass consisting of the top glass plate, top circular polarizer
organic material, and LTPS backplane containing the pixel transistors.
●Chip-on-Flex (COF) with the driver (“chip”) located at bottom front of panel.
●FPC with the necessary passive/active components.
●Tearing Effect output signal
●Display has 1/3 RAM. (1080x2340x24 ) / 3 = 20,217,600 virtual bits
Note: This platform display may be used on devices with operating systems such as Android, Linux and
Java which are open source, and thus may be published and available to the general public. The
information contained in any display interaction open source file will be the minimum required to
successfully communicate and configure the display module.
Note: Do not ship any samples for any reason without MTPing the correct manufacturer/version
numbers in registers A1h, DAh, DBh, DCh. If they are not programmed correctly, they will be rejected
as defective. If you have a question regarding the correct programming. contact Motorola DDC
immediately.
CHANGES TO PLATFORM DISPLAY

This document describes a platform display glass and driver intended for reuse in multiple display
modules within Motorola. As a result, no element of the display design may change without the written
permission from Motorola and an appropriate re-qualification of the display glass and driver.
Furthermore, any requests or discussion for changes to the displays from within Motorola must be
signed off by the following representatives on the Strategy Commodity Team: the head of the global
display commodity team, the head of the Display Design Center.

QUALIFICATION REQUIREMENTS
Cpk data must be presented to Component Technologies Engineering for the following process control
parameters for initial qualification purposes. Data must be continuously collected for these process control
parameters, and be made available to Motorola upon request for the prior 2 EPrs.
Definitions:
Box-X, [X]: Process Control Parameter: Parameter indicative of process control and capability of
manufacturing component. Refer to 12M80967A78 for further details.
<ST>: Statistical Tolerance Parameter: Used where statistically valid samples are required for non Box-X,
[X] parameters for module approval. Refer to 12M80967A78 for further details.

RECORD OF REVISIONS
Revision No. Revision Date Page Description
A First release

1-1. GENERAL DESCRIPTION
Block Diagram
LCD Signal
TFT LCD
TFT LCD
1080*2280
1080X1920
LCD Power
Input connector
DC/DC
Converter
LED Cathode
IC
Output
Pin LED Light Bar
LED Anode
Features
TL063FVMC54-00 is 6.3” color TFT-LCD (Thin Film Transistor Liquid

Crystal Display) module composed of LCD panel, MIPI driver ICs,
control circuit ,backlight and cover lens. By applying 8 bit digital data,
1080×RGB (3) ×2280, color images are displayed on the 6.3” diagonal
screen

1-2. General Spec
No Item Specification unit Remark
1 Screen Size 6.3 inch -
2 Active Area 68.526(H)x148.176 (V) mm -
3 Panel Size 64.904(H)x144.666 (V) mm -
4 Outline Dimension W/CG 73.27(H)×154.561(V)×2.1 mm -
5 Display Resolution 1080(H) ×RGB×2280 (V) pixel -
6 Pixel Pitch 63.45*63.45 um -
7 Display Method LTPS - -
8 Display Mode FFS - -
9 Display Color 16.7M - 8bit
10 Color Gamut Typ: 82% (CIE 1931) % typ
11 Luminance 450 nit Typ, center P
12 Contrast Ratio 1500 - Typ, center P
13 Viewing Angle 85/85/85/85 ° CR>10(U/D/L/R)
14 Pol Surface Treatment HC - -
15 Weight - g max
16 D-IC FT8719 - RAMless
17 Inversion Method Column -
18 LED Q’ty 16 ea String8*Parallel2
19 Power Consumption 175 mw Logic

1-3. Key Part List(5pcs average data)
item Supplier Spec/Size Weight/ g Remark
TFT Glass AGC 1300*1500mm*0.5t 4
C/F Glass AGC 1300*1500mm*0.5t 4
Upper Pol 三星 149.53×64.80×0.076mm 0-TAC
Lower Pol 三星 149.68×65.00×0.108mm With APF
Liquid Crystal Merk LCCC-16-1211

Cell
UV Glue/Tuffy AICA Z-519T3 0.046
D-IC FT8719 FT8719 0.1
ACF(COG) 日立 AC-17358 NA
ACF(FOG) 日立 MF-372 NA
COG Ass’y Tianma G5.5
FPC 上达
EMI coating 方邦 HSF6000-2
Main Connector 松下 AXQ2401HF1 0.1

LED lightbar CNT N/A
FPCA Insulation Tape 知行 H3610
Conductive Tape 前海东洋 TSC200-60GD
Release film on
美信 MX-466-0100AX
conductive tape
CNT Stiffener sus 304
FPC Ass’y 弘信
B/W tape 力王 LK05
Upper Prism 友辉 GZ234I-3B-LS/0.094
Lower Prism 友辉 GZ242I-LS/0.064
Diffuser Sheet Kimoto 38TMQ/0.051
LGP 住化 TR1801A/0.37
BLU
Mold frame PC 亚伦
Reflector 3M ESR80-V2
LED 穂晶 3004
LED Lightbar inhouse 0.15
BLU Ass’y inhouse TBD
Total - - - TBD

1-3-1. FPCA Gerber/Layout and Schematic Diagram

top
bot
all

1-3-2. FPC Pin Assignment

Please pay attention that IC bump up(COF)
302 DUMMY 242 VSP 182 VSSD_OSC 122 VDD1 61 VGH
301 GND 241 VGH 181 VDDD 121 VDD1 60 VGH
300 GND 240 VGH 180 VDDD 120 HS_VCC 59 VGH
299 GND 239 C21P 179 VDDD 119 HS_VCC 58 VSSD_P_R
298 GND 238 C21P 178 VDD1 118 HS_VCC 57 VSSD_P_R
297 FPCTEST 237 C21P 177 VDD1 117 HS_LDO 56 VSSD_P_R
296 FPCTEST 236 C21N 176 VDD1 116 HS_LDO 55 VSN
295 VGH 235 C21N 175 VDDD 115 HS_VSS 54 VSN
294 VGH 234 C21N 174 VDDD 114 HS_VSS 53 VSN
293 VGH 233 VSN 173 VDDD 113 HS_VSS 52 C31N
292 VGH 232 VSN 172 VSSD 112 DATA2P 51 C31N
291 VGL 231 VSN 171 VSSD 111 DATA2P 50 C31N
290 VGL 230 VSSD_P_L 170 VSSD 110 DATA2N 49 C31P
289 VGL 229 VSSD_P_L 169 SAFE_MODEX 109 DATA2N 48 C31P
288 VTCOMB 228 VSSD_P_L 168 RESX 108 GND 47 VGL
287 VTCOMA 227 VGL 167 TP_EXT_RSTN 107 DATA1P 46 VGL
286 VTCOMC 226 VGL 166 TP_IO_TSIX 106 DATA1P 45 VSP
285 COFTESTL<1> 225 VDDD 165 TP_IO_I2C_SDA 105 DATA1N 44 VSP
284 COFTESTL<2> 224 VDDD 164 TP_IO_I2C_SCL 104 DATA1N 43 VSP
283 VGLO_L 223 VDDD 163 TP_IO_SPI_SS 103 GND 42 VDDD
282 VGLO_L 222 VSSA 162 TP_IO_SPI_MISO 102 CLKP 41 VDDD
281 VGHO_L 221 VSSA 161 TP_IO_SPI_MOSI 101 CLKP 40 VCOM_R
280 VGHO_L 220 VSSA 160 TP_IO_SPI_SCL 100 CLKN 39 VCOM_R
279 VCCAREGT_L 219 VSSA 159 FLASH_HOLD 99 CLKN 38 VCOM_R
278 VCCAREGT_L 218 VSP 158 FLASH_WP 98 GND 37 VREF
277 VCCAREGT_L 217 VSP 157 FLASH_SS 97 DATA0P 36 VREF
276 VSSACT_L 216 VSP 156 FLASH_MISO 96 DATA0P 35 VSSA
275 VSSACT_L 215 VSN 155 FLASH_MOSI 95 DATA0N 34 VSSA
274 VSSAT_L 214 VSN 154 FLASH_SCL 94 DATA0N 33 VSSA
273 VSSAT_L 213 VSN 153 VSSD 93 GND 32 VSSA
272 VSSAT_L 212 VSSA 152 VSSD 92 DATA3P 31 VSSAT_R
271 VSSD 211 VSSA 151 VSSD 91 DATA3P 30 VSSAT_R
270 VSSD 210 VSSA 150 VSSD 90 DATA3N 29 VSSAT_R
269 VSSD 209 VSSD 149 VDD 89 DATA3N 28 VSSACT_R
268 VMD 208 VSSD 148 VDD 88 GND 27 VSSACT_R
267 VMD 207 VSSD 147 VDD 87 VDD1 26 VCCAREGT_R
266 VMD 206 VDD1 146 VDD1 86 VDD1 25 VCCAREGT_R
265 VREF 205 VDD1 145 VDD1 85 VDD1 24 VCCAREGT_R
264 VREF 204 VDD1 144 VDD1 84 VSSA 23 VGHO_R
263 SHK[1] 203 VSP_G_L 143 GPIO_DMY6 83 VSSA 22 VGHO_R
262 SHK[2] 202 VSP_G_L 142 GPIO_DMY5 82 VSSA 21 VGLO_R
261 SHK[3] 201 VSSA_G_L 141 GPIO_DMY4 81 VSSA_G_R 20 VGLO_R
260 SHK[4] 200 VSSA_G_L 140 GPIO_DMY2 80 VSSA_G_R 19 COFTESTR<1>
259 SHK[5] 199 VSN_G_L 139 GPIO_DMY1 79 VSN_G_R 18 COFTESTR<2>
258 VTESTOUTP_L 198 VSN_G_L 138 SDI 78 VSN_G_R 17 VTCOMC
257 VTESTOUTN_L 197 VSNR 137 SCL 77 VSP_G_R 16 VTCOMA
256 AN_DEBUG[0] 196 VSPR 136 CSX 76 VSP_G_R 15 VTCOMB
255 VSP 195 VREF 135 DCX 75 VSP 14 VGL
254 VSP 194 VREF 134 PCLK 74 VSP 13 VGL
253 VCOM_L 193 VSSA 133 DE 73 VSN 12 VGL
252 VCOM_L 192 VSSA 132 IM[1] 72 VSN 11 VGH
251 VCOM_L 191 VCOM 131 IM[0] 71 VSSA 10 VGH
250 VDDD 190 VCOM 130 FRM 70 VSSA 9 VGH
249 VDDD 189 VCL 129 DSWAP[1] 69 VSSA 8 VGH
248 VDDD 188 VCL 128 DSWAP[0] 68 VSSA 7 FPCTEST
247 VSSA 187 VCL 127 PNSWAP 67 VSSD 6 FPCTEST
246 VSSA 186 VSP 126 LEDPWM 66 VSSD 5 GND
245 VSSA 185 VSP 125 TE 65 VSSD 4 GND
244 VSP 184 VSP 124 TE1 64 VDDD 3 GND
243 VSP 183 VSSD_OSC 123 VDD1 63 VDDD 2 GND
62 VDDD 1 DUMMY

1-3-3. Pol General Spec

1-4. Change List
Change Details
No. Reason Remarks
Before After
CG
左右孔形状
1 客户需求 sensor
变更
孔变更
H/W change
Design Change
S/W change
Remarks:
1.H/W change includes all materials, components, label etc.
2.Design change includes size, position etc.
3.S/W change includes initial code etc.
Please pay attention that this list is just a summary, an individual Design
Change List which contain much more information is also needed

2-1. Absolute Maximum Ratings

The following are maximum values which, if exceeded, may cause faulty operation or damage to the unit.
Table 2.1 Absolute Maximum Ratings
Values
Parameter Symbol Units Notes
Min Max
VSP 4.5 6 V
LCD Analog Voltage
VSN -4.5 -6 V
LCD I/O Voltage IOVCC 1.65 1.95 V
LED Current ILED - 20 mA
Storage Humidity Hstg 5% - %RH
Storage Temperature Tstg -30℃ 80 ℃

3-1. ELECTRICAL CHARACTERISTICS
Table 3.1 Electrical Characteristics Of TFT-LCD Module
Values
Unit
Parameter Symbol Notes
Min Typ Max s
VSP-Vss 5.4 5.5 -5.6 V

LCD Input Analog Voltage
VSN-Vss -5.4 -5.5 5.6 V
LCD Logic I/O Voltage IOVCC-Vss 1.7 1.8 1.9 V
LED Input Current ILED - 40 40 mA
Applicable
“H” Level Input Voltage VIH 0.7xIOVCC - IOVCC V
Pin ： REST
Applicable
“L” Level Input Voltage VIL 0.0 - 0.3xIOVCC V
Pin ： REST
Applicable
“H” Level Output Voltage VOH 0.8xIOVCC - IOVCC V Pin ： BC
I OUT = -1mA
Applicable
“L” Level Output Voltage VOL 0.0 - 0.2xIOVCC V Pin ： BC
I OUT = +1mA
Input high level leakage Applicable

I IH - - 1 µA
current Pin ： REST
Input low level leakage H ： IOVCC
I IL -1 - - µA
current L ： Vss
1(no touch)
Normal PN - TBD TBD W
LCD Estimated value
Power
Sleep in PD - TBD TBD uW
Consumption
BLU PB - TBD TBD mW 2
Notes:
(1) The specified current and power consumption are under the conditions at VSP = 5.5V,VSN=-5.5V,IOVCC = 1.8V, T = 25°C, and
fv = 60 Hz, at white pattern (TYP)
The specified current and power consumption are under the conditions at VSP = 5.5V,VSN=-5.5V,IOVCC = 1.8V, T = 25°C, and fv =
60 Hz, at R/G/B pattern (MAX)
(2) LED Backlight assumptions:19.2Vf(MAX), 60 mA. (6S3P LED Total Input )
3-2. Logic Power Consumption
Values
Typ Max
IIOVCC 28.5 43 mA
White Pattern
Normal Mode IVsp 8.5 13 mA
(no touch)
IVsn 7.5 12 mA
IIOVCC 1050 3000 uA
Sleep Mode IVsp 25 40 uA
IVsn 2 20 uA

3-3. BACK LIGHT UNIT

3-3-1 The edge-lighting type of back light unit consists of 12LEDs which is connected in serial.
Table 2-3-1 Electrical Characteristics Of Back Light Unit
Values
Min Typ. Max
LED Current ILED 20 25 mA 6S2P
LED Forward Voltage VLED 18 19.8 V 6S2P
LED Circuit Diagram
3-3-2 LED Rank
Luminous Flux Rank Chart
Flux Rank 36 37
Color Rank Chart LED:SJ-S264GZW490

I13S1 、 I13S2~I
Color Rank
13S8

3-4. LCD INTERFACE CONNECTIONS
Interface Connector: AXE630124, filled by supplier
Table 3.4 LCD Connector Pin Configuration
Pin No. Symbol I/O Description

1 GND I Ground
2 SCLK I SPI interface clock pin for touch
3 SMOSI I SPI interface data input for touch
4 MISO O SPI interface data output for touch
5 SS I SPI interface enable pin for touch
6 GND I Ground
7 MCU_RESET I Reset for touch
8 I2C_SDA - NC
9 I2C_SCL - NC
10 T_INT - interrupt
11 NC - Not connect
12 NC - Not connect
13 LED_C2 I LED-
14 LED_C1 I LED-
15 LED_A I LED+
16 NC I Not connect
17 NC I Not connect
18 VSN - Power Supply, 5.5V
19 VSP I Power Supply, 5.5V
20 NC I Not connect
21 IOVCC I Power Supply, 1.8V
22 RESET I REST PIN
23 TE I Tearing Effect
24 LEDPWM I Backlight PWM control
25 GND I Ground
26 D2_P I MIPI Input Data Pair
27 D2_N I MIPI Input Data Pair
28 GND I Ground
31 GND I Ground
32 CLK_P I MIPI Input CLK Pair
33 CLK_N I MIPI Input CLK Pair
34 GND I Ground
37 GND I Ground
40 GND I Ground

3-5. SIGNAL TIMING SPECIFICATIONS

ITEM SYNBOL Timing 　 UNIT
LCD Frame Rate - 60 Hz
Frequency fCLK 162 MHz
DCLK
Period Tclk 6.17 ns
Horizontal total time tHP 1112 tCLK
Horizontal Active time tHadr 1080 tCLK
Horizontal Horizontal Pulse Width tHsync 4 tCLK
Horizontal Back Porch tHBP 12 tCLK
Timing
Horizontal Front Porch tHFP 16 tCLK
Vertical total time tvp 2412 tH
Vertical Active time tVadr 2280 tH
Vertical Vertical Pulse Width tVsync 4 tH
Vertical Back Porch tVBP 8 tH
Vertical Front Porch tVFP 120 tH
Differential Swing VDswing 250 mV
Bit Rate TX SPD(MBPS) 972 Mbps
※Please refer to initial code Pixel Fomat 24 Data bit/pixel

Lane 4 Lane

3-6. MIPI Data&CLK Line Impedance Test Result

(1) MIPI Interface Timing Sequence
(a) MIPI interface DC characteristic ：
Item Parameter Min. Typ. Max. Unit
Thevenin output high level VOH 1.1 1.2 1.3 V

LP_T
Thevenin output low level VOL -50 　 50 mV
W
Output impedance of LP transmitter ZOLP 110 －－ Ω
Common-mode voltage HS receive mode VCMRX(DC) 70 － 330 mV
Differential input high threshold VIDTH －－ 70 mV

Differential input low threshold VIDTL -70 －－ mV
HS_RX Single-ended input high voltage VIHHS －－ 460 mV
Single-ended input low voltage VILHS -40 －－ mV
Single-ended threshold for HS termination
VTERM-EN －－ 450 mV
enable
Differential input impedance ZID 80 100 125 Ω
Logic 1 input voltage VIH 880 －－ mV
LP_RX
Logic 0 input voltage. not in ULPState VIL －－ 550 mV
Input hysteresis VHYST 25 －－ mV
Logic 1 contention threshold VIHCD 450 －－ mV

LP_CD
Logic 0 contention threshold VILCD －－ 200 mV
MIPI DC Diagram

Signal-ended and Resulting Differential HS Signals Diagram

(b) MIPI data to clock timing definitions
Clock Parameter Symbol Min Typ. Max. Unit
UI instantaneous UI INST 2 － 12.5 ns
Data to Clock Setup Time [Receiver] T SETUP[RX] 0.15 －－ UI INST
Clock to Data Hold Time [Receiver] T HOLD[RX] 0.15 －－ UI INST
Data to Clock Skew (Measured at transmitter) T SKEW[TX] -0.15 － 0.15 －
【 Note 】
*1) This max value corresponds to a minimum 80 Mbps data rate per lane
*2) The minimum UI shall not be violated for any single bit period, i.e., any DDR half cycle within a
data
burst.
*3) Total silicon and package delay budget of 0.3 UIINST
*4) Total setup and hold window for receiver of 0.3* UIINST
*5) T SETUP[Rx] and T HOLD[RX] are only for RX without FPCB and connector and guaranteed by
design.
MIPI data to clock timing definitions

(2)Reset Input Timing
Symbol Parameter Pad Min. Typ. Max. Unit Note
tRESW Reset low pulse width RESX 10 us
RESX 5 Reset during Sleep In mode

tREST Reset completion time ms Reset during Sleep Out
RESX 120(5)
mode
【 Note 】
*1) Spike due to an electrostatic discharge on RESX line does not cause irregular system reset according to
the table below.
RESX Pulse Action
Shorter than 5us Reset Rejected

Longer than 10us Reset
Between 5us and 10us Reset Start
*2) During the reset period, the display will be blanked. (The display is entering blanking sequence, for
which the maximum time is 120ms, when Reset starts is sleep out-mode. The display remains in the
blank state is Sleep In-mode) and then return to default condition for H/W reset.
*3) During Reset Completion Time, ID bytes (or similar) value in MTP block will be latched to the internal
register during this period. This loading is done every time when there is H/W reset complete time
(tREST) within 5ms after a rising edge of RESX.
*4) Spike Rejection also applies during a valid reset pulse as shown below:
*5) It is necessary to wait for 5msec after releasing RESX before sending commands. Also Sleep Out command
cannot be sent for 120msec.

(3)TE
4.1 Tearing Effect Line Modes
the tearing effect output signal consists of V-sync information only.
t vdh = The LCD display is not updated.

t vdl = The LCD display is updated (except Invisible line-see below).
•NOTE: During sleep in mode, the tearing effect output pin is low.
4.2 TE Input Timing
Symble Parameter Specification Unit Descripti

on
Min. Typ. Max.
tvdl Vertical timing low duration Base on MPU video mode

Setting
us
tvdh Vertical timing high duration
NOTE: The signal's rise and fall times (tf, tr) are stipulated to become equal to or less than 15ns.
Note Figure: Rise and Fall Times

3-7. Power On/Off Sequence
EE
Figure 1 Interface power on/off sequence

3-7. Power On/Off Sequence
EE
Figure 2 Interface power on/off sequence

Remark ： VDDI—>IOVCC ， RESX—>Reset

3-8. Software Flow
Block A : Power On
Block B : Initialize
Block C : MIPI CMD mode on
Block D : Sleep Out & BC_CTRL enable & Display On
Normal mode
Block E : Display Off & BC_CTRL_disable & Sleep In
Standy by mode
Block F : MIPI CMD mode off
Block G : Power Off
Fig 3.7 Software Flowchart

3-9. Initial Code
Command List
1 Power on IOVCC=1.8V
2 Delay 大于 3ms
3 Power on AVDD=5.5V
4 Delay 大于 10ms
5 Power on AVEE=-5.5V
6 Delay 大于 10ms
7 Reset Pin=High
8 Delay 大于 130ms (load flash)
　　 Tx Initial Setting 　
Register Address Value Remark
9
　 Change to DCS Command
10 0x11 - Sleep Out

　 Delay >120ms
11 0x00 0x00 //Enable Command2 & Enable Shift Function

12 0xFF 0x87 　
13 　 0x19 　
14 　 0x01 　
　　　　
15 0x00 0x80 //Enable Focal Command
16 0xFF 0x87 　
17 　 0x19 　
　　　　
18 0x35 0x00 //TE
　 Delay =20ms
24 0x29 - Display On
Display off&Sleep in sequence
　 Change to DCS Command
25 0x28 - Display Off
　 Delay =20ms
Sleep In
0x10 -
26 send more than 3 frames after submit 10h
　 Delay >120ms
　 Power off AVEE=-5.5V
　 Delay >10ms
　 Power off AVDD=5.5V
　 Delay >10ms
　 Reset Pin=low
　 Delay >10ms
　 Power off IOVCC=1.8V
3-9-7: Exit deep standby
Step Command
Command name Operation
Parameter
1 Reset
3-9-8: CE off
Step Command
Parameter
1 N/A
3-9-9: CE on
Step Command
Parameter
1 N/A

3-9-10: CABC off
Step Command
Parameter
1 55h=00
3-9-11: CABC on
Step Command
Parameter
1 55h = 01 UI mode
Delay 5ms
3-9-12: ACO off

Step Command
Parameter
1 N/A
3-9-13: ACO on
Step Command
Parameter
1 N/A
3-9-14: SRE off
Step Command
Parameter
1 N/A
3-9-15: SRE on
Step Command
Parameter
1 N/A

3-10. IC General Spec and Size

3-11. Power Consumption

Parameter Symbol Typ Unit Remarks
L0 143.1 mW
L32 147.8 mW
L64 146.8 mW
L96 146.6 mW
L127 143.1 mW
L160 145.3 mW
L192 139.4 mW
L224 166.5 mW
Logic Power
L255 189.4 mW
R255 167.3 mW
CABC off
G255 167.3 mW
B255 148.6 mW
8 color bar 143.1 mW
0-255 Gray Transition 147.8 mW
Lenovo UI
Lenovo will send pic.
Icon Interface
25% on mW
50% on mW
BLU
75% on mW
100% on mW
Symbol Logic BLU Remarks

L0 143.1
L32 147.8
L64 146.8
L96 146.6
L127 143.1
L160 145.3
L192 139.4
CABC on
L224 166.5
L255 189.4
R255 167.3
G255 167.3
B255 148.6
8 color bar 143.1
0-255 Gray Transition 147.8
Lenovo UI
Lenovo will send pic.
Icon Interface
If there is more than one mode for CABC function, please fill out all data

4. OPTICAL CHARACTERISTICS
4-1. Optical Characteristics – Backlight 100%
Parameter Symbol Condition Min Typ Max Unit Remarks
Θ12 80 88 - ° Note 1
Θ6 80 88 - ° Note 1
Viewing Angle CR >10 -
Θ9 80 88 ° Note 1
Θ3 80 88 - ° Note 1
Contrast Ratio CR Optimal 1000 1500 - - Note 1,4
Brightness Lv Optimal 380 450 - Cd/m 2
Note 1
Brightness Uniformity Y Optimal 72% 83% - % Note 1,7(9P)
Flicker @ G128 - - -30 dB Note 1,2
Crosstalk - - 2 % Note 1,3
Θ =0 °
Response time τf or τr - 30 35 ms Note 1,6
Ta =25 °C
Color Gamut NTSC - 77 82 - % Note 1
u 0.1943 - Note 1
v 0.4604 - Note 1
White Chromaticity CIE 1976 Suv = max 0.13, huv = 0~360
Toleranc - Note 1
e Suv = max 0.2, huv = 225 ±45
Suv 3.58±0.1 - Note 1
Red Chromaticity -
Huv 14.2±1 - Note 1
Suv 1.79±0.1 - Note 1
Green Chromaticity -
Huv 124±3 - Note 1
Suv 4.1±0.25 - Note 1
Blue Chromaticity -
Huv 268±3 - Note 1
4-2. Cell&BLU Optical Characteristics

Parameter Typ Unit Remarks
Aperture Ratio 4.4%(mis1.0) %
Upper Pol Trans. 43 %
Lower Pol Trans. 42.5 %
Panel Trans. % w/o APF
Panel Trans. 5.0 % with APF
BLU Luminance Cd/m 2
Center
BLU Luminance Uniformity % Note1,7

4-3. Gamma/Color Coordinate Uniformity/CE Function/CABC Function

4.3-1 Gamma Curve
Request: R/G/B/W, 0-255 gray scale, step 1 gray scale
待 MOD 品产出后实测
4.3-2 Color Coordinate Uniformity

Request: white pattern, 0-255 gray scale, step 15 gray scale.
Gray Scale x y White x y
0 0.2445 0.2484 135 0.2871 0.3099
15 0.2729 0.2923 150 0.2874 0.3103
30 0.2834 0.3058 165 0.2878 0.3108
45 0.2853 0.3084 180 0.2883 0.3113
60 0.286 0.3089 195 0.2888 0.3119
75 0.2863 0.3091 210 0.2895 0.3126
90 0.2864 0.3093 225 0.294 0.3136
105 0.2866 0.3095 240 0.296 0.3152
120 0.2868 0.3097 255 0.299 0.3185
4.3-3 CABC function(on and off)

Request: Movies comparison( three segments with different frames details, lighter, light+dark, darker)
Measure LCD power consumption of three segments , including logic and BLU

4-4. LCD Spectrum and BLU Spectrum

Center Point
待 MOD 品产出后实测
CF Spectrum R G B W
100%
90%
80%
70%
60%
50%
40%
30%
20%
10%
0%
380 480 580 680 780

[Note 1] Optical Test Equipment Setup
The LCD module should be turn-on to a stable luminance level to be reached. The
measurement should be executed after lighting Backlight for 20 minutes and in a dark
room.
Fig 4.1. Optical Characteristic Measurement Equipment and Method
[Note 2] Flicker
The flicker level should be measured with horizontal gray/black stripes. The flicker is essentially a ratio of
the powers in the frequency spectrum at 30 Hz (PX) and 0 Hz (P0- DC level).
F = 20 Log (PX/ P0)
G1
G2
G1280

[Note 3] Crosstalk
H/2
H/8 H/8
P1
V/8
P2 P5 P3
V
P4 V/2
V/8
Fig 2-5. Crosstalk measurement points
A: Luminance for P1 ~ P4 with all 127gray pixels

B: Luminance for P1 ~ P4 with 127gray pixels when the black box is applied
Crosstalk [%] = Maximum [ Absolute ( A-B

A )]

[Note 4]
Contrast Ratio is defined as follows ;
Photo detector output with LCD being “White”

Contrast Ratio(CR) =
Photo detector output with LCD being “Black”
[Note 5]
Viewing Angle Range is defined as follows;
UP θ=0o
(12 o’clock) z
A
Φ=90o
yu θ
Φ
LEFT RIGHT
xl xr
(9 o’clock) (3 o’clock)
Φ=180o Φ=0o
TFT-LCD
Module
yd
DOWN
(6 o’clock)
Φ=270o
Fig 4.2 Viewing Angle Definitions

[Note 6]
Response time is obtained by measuring the transition time of photo detector output, when input
signals are applied so as to make the area “black” to and from “white”.
White
Photo detector Output
100%
90%
10%
0%
Black Black
τr τf
[Note 7] Time
Fig 4.3 Response Time Definition
The brightness measurement is taken at point 5P/13P.
Brightness Minimum Photo detector output for P1-P400with all pixels white
= X 100
Uniformity Maximum Photo detector output for P1-P400with all pixels white
Fig 4.4 Brightness Measurement Points

5. MECHANICAL CHRACTERISTICS
The contents provide general mechanical characteristics for the model.
In addition the figures in the next page are detailed mechanical drawing of the LCD.
Items Description Typ. Tolerance Unit

Mother Glass Size 1300*1500mm*0.5t - mm
Q-Panel Size 650*750*0.5t - mm
C/F and TFT
thickness
thickness 0.14/ 0.14 ±0.02 mm
after
slimming
A/A 63.504 x 148.176 - mm
C/F 64.904 x 149.876 ±0.2 mm
TFT 64.904x 150.776 ±0.2 mm
BM(U/D/L/R) 0.8/1.8/0.7/0.7 - mm
Panel
IC Bonding Area N/A - mm
Pol Size 64.9*149.526 - mm
Gap Between
Pol~C/F border 0/0/0/0 ±0.15 mm
(U/D/L/R)
Horizontal 65.3 ±0.15 mm
Vertical 151.876 ±0.15 mm
Thickness 1.234 -0.1/+0.08 mm
Module
UV Glue Thickness <0.18 - mm
Gap between
0.2/0.2/0.2/0.9 ±0.2 mm
Glass~LCM outline

5.1 LCM Drawing

Folded and unfolded status
(1) Front side
The tolerance, not show in the figure, is ±0.2mm. [Unit ： mm]

(1) Rear side

The tolerance, not show in the figure, is ±0.2mm. [Unit ： mm]

5.2-1 BLU Outline Dimension

Including each film

5.3 Panel Outline Dimension

5.4 FPCA Outline Dimension

6. RELIABLITY TEST
Must be accordance with Lenovo RA test items
Test Items Conditions

Operation Temperature -20℃ To 60℃
Operating Humidity 20% ~ 90%
Temperature when
-30℃ To 70℃
stored
Humidity when stored 5% ~ 90%
MTBF >10,000POH
If after 10,000 hours, the brightness of the panel is 50% greater than the
initial value, the MTBF report and SDA test report should be given to
providers.

7. Safety & Environment Test Reports

8. Package
8.1. Packing Description
ME

8.2. Description of Packing Tray

8.3. Description of Packing Box
ME

9. Incoming Inspection Standard
9.1 Defect defination

Critical defect CR : (Ac=0 Re=1)Bring on or maybe hurt to user.
Major defect MA :
1. Reflect on parts invalidation or unstable;
2. Product function can not meet spde;
3. Cosmetic defect obverously.
Minor defect MI :
1. Do not impact product function & performance;
2. Cosmetic defect unclear;
3. Defect can be repaired easily.
9.2 Incoming Inspection

Refer to GB2828. 1-2003, general inspection level Ⅱ, Qualification level is as
below
MA: AQL 0.4 MI: AQL 1.0

10. Checklist
Description Request Value
MIPI Impedance 100±10Ω Yes

BTB CNT Yes
Connection
ID Pin GND GND
IC Protection Shielding tape on IC N/A
Bending Area Not exceed M/F YES
FPC status Unfolded while direct bonding Yes
FPC GND Area Need GND area to connect FR4 NO
Test Points Need shieling tape on it Yes
Bending Area Single layer Yes
SUS 4 Corner side At lease 1.2mm No
Glass Generation G5?G6? G5.5

Cutting Q’ty panel Q’ty each mother glass
Display mode VA/IPS FFS
Mask Q’ty Array mask 12

Pixel Domain 1 or 2? P2D
ITO@C/F ITO square resistance, thickness <60Ω/□ , 500Å

Scan direction Single scan or dual scan Dual scan
Main: Φ10um,
density=0.052%,
PS Parameter Main/Sub PS density and size
Sub: Φ11um, density=1.
Panel 260%
Cell gap Center gap 3.0um
LC injection Vacuum injection or ODF ODF

LC Margin >6% 6%
None compensation
Pol compensation A+C/B+B/None compensation film
film(0-Tac)
UV Glue Fill out at IC around No
Direct bonding: HC+Glare Direct bonding: HC

Pol surf. Treatment
Air bonding: Haze44+glare(>4inch) Air bonding:HC
Direct bonding: pol is higher 0.05mm than M/F Higher than M/F
Pol position
Air bonding: pol is lower 0.05mm than M/F 0.05mm
Surface resistance 10^4~10^9Ω Yes

Package Friction voltage ≦ 100V Yes
Layer in one Box <10layer Yes


Doha XT2019 Moto G8 Plus - LCM 6.3FHD+ - TIANMA - Riga M - SD

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Material or Methods Specification NO.

Title Customer Approval Sheet for Moto Riga M

Part Number SD68C52386

SIGNATURE DATE APPROVED BY DATE

Please return 1 copy for your confirmation with

Motorola Mobility Confidential Restricted - Do Not Redistribute

9 Incoming Inspection Standard 49

Motorola Mobility Confidential Restricted - Do Not Redistribute

01019576 Display and Lens Module Assembly ME Drawing

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This display module is constructed of

CHANGES TO PLATFORM DISPLAY

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Motorola Mobility Confidential Restricted - Do Not Redistribute

Revision No. Revision Date Page Description

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1-1. GENERAL DESCRIPTION

TL063FVMC54-00 is 6.3” color TFT-LCD (Thin Film Transistor Liquid

Motorola Mobility Confidential Restricted - Do Not Redistribute

1-2. General Spec

No Item Specification unit Remark

1 Screen Size 6.3 inch -

2 Active Area 68.526(H)x148.176 (V) mm -

3 Panel Size 64.904(H)x144.666 (V) mm -

4 Outline Dimension W/CG 73.27(H)×154.561(V)×2.1 mm -

5 Display Resolution 1080(H) ×RGB×2280 (V) pixel -

6 Pixel Pitch 63.45*63.45 um -

7 Display Method LTPS - -

8 Display Mode FFS - -

9 Display Color 16.7M - 8bit

10 Color Gamut Typ: 82% (CIE 1931) % typ

11 Luminance 450 nit Typ, center P

12 Contrast Ratio 1500 - Typ, center P

13 Viewing Angle 85/85/85/85 ° CR>10(U/D/L/R)

14 Pol Surface Treatment HC - -

16 D-IC FT8719 - RAMless

17 Inversion Method Column -

18 LED Q’ty 16 ea String8*Parallel2

19 Power Consumption 175 mw Logic

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Upper Pol 三星 149.53×64.80×0.076mm 0-TAC

Lower Pol 三星 149.68×65.00×0.108mm With APF

Liquid Crystal Merk LCCC-16-1211

COG Ass’y Tianma G5.5

EMI coating 方邦 HSF6000-2

Main Connector 松下 AXQ2401HF1 0.1

Conductive Tape 前海东洋 TSC200-60GD

Upper Prism 友辉 GZ234I-3B-LS/0.094

Lower Prism 友辉 GZ242I-LS/0.064

Diffuser Sheet Kimoto 38TMQ/0.051

LED Lightbar inhouse 0.15

BLU Ass’y inhouse TBD

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1-3-1. FPCA Gerber/Layout and Schematic Diagram

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1-3-2. FPC Pin Assignment

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1-3-3. Pol General Spec

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1-4. Change List

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2-1. Absolute Maximum Ratings

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Differential input high threshold VIDTH －－ 70 mV

Logic 1 input voltage VIH 880 －－ mV

Input hysteresis VHYST 25 －－ mV

Logic 1 contention threshold VIHCD 450 －－ mV

Data to Clock Setup Time [Receiver] T SETUP[RX] 0.15 －－ UI INST

Clock to Data Hold Time [Receiver] T HOLD[RX] 0.15 －－ UI INST