FLIP FLOP CONVERSIONS

• SR to D • D to T
• SR to JK • D to SR
• SR to T • T to D
• JK to T
• JK to D
• JK to SR
 PROCEDURE FOR CONVERSION

1. Draw the block diagram of the target flip

flop from the given problem.
2. Write truth table for the target flip-flop.
3. Write excitation table for the available flip-
flop.
4. Draw k-map for target flip-flop.
5. Draw the block diagram.
SR(Available) to D(Target) Flip flop
Conversion
• Truth table • Excitation
table Present Next Present
Input state state state Next state Flip flop Inputs

D Qn Qn+1 Qn Qn+1 S R

0 0 0 0 0 0 X

0 1 0 0 0 0 1

1 0 1 0 1 1 0

1 1 1 1 1 X 0
 SR to D Flip flop Conversion
Conversion Table
K- MAP
Input
Present
Next state Flip flop Inputs SIMPLIFICATI
state O N

D Qn Qn+1 S R

0 0 0 0 X

0 1 0 0 1

1 0 1 1 0

1 1 1 X 0
SR to D
 SR(Available) to JK(Target) Flip-
Conversion Table Flop
Input Present Next State Flip-Flop Inputs
State
J K Qn Qn+1 S R

0 0 0 0 0 X

0 0 1 1 X 0

0 1 0 0 0 X

0 1 1 0 0 1

1 0 0 1 1 0

1 0 1 1 X 0

1 1 0 1 1 0

1 1 1 0 0 1
 SR to JK
• K-map Simplification
Logic Diagram (SR to JK)
SR(Available) to T(Target)
Conversion Table
K- MAP
SIMPLIFICATIO
Present
Input state Next state Flip flop Inputs N

T Qn Qn+1 S R

0 0 0 0 X

0 1 1 X 0

1 0 1 1 0

1 1 0 0 1
Logic Diagram (SR to
T)
JK(Available) to T
C(oTnaverrgsieont)TCaboel nv

ersion state
Input
Present Next
Flip flop Inputs
K- MAP
SIMPLIFICATIO
stat N
e

T Qn Qn+1 J K

0 0 0 0 X

0 1 1 X 0

1 0 1 1 x

1 1 0 x 1
Logic Diagram (JK to
T)
 JK(Available) to D(Target)Flip-flop
Conversion Table
Conversion
K- MAP
SIMPLIFICATIO
Present Next
Input state Flip flop Inputs N
stat
e

D Qn Qn+1 J K

0 0 0 0 X

0 1 0 X 1

1 0 1 1 x

1 1 1 x 0
Logic Diagram (JK to
D)
D(Available) to T(Target)Flip-Flop
Conversion Table
Present Flip flop K- MAP
Input Next state
state Inputs SIMPLIFICATIO
N

T Qn Qn+1 D

0 0 0 0

0 1 1 1

1 0 1 1

1 1 0 0
Logic Diagram(D to
T)
 T (Available) to D(Target) Flip-flop
Conversion Table Conversion
Present Flip flop K- MAP SIMPLIFICATION
Input state Next state Inputs

D Qn Qn+1 T

0 0 0 0

0 1 0 1

1 0 1 1

1 1 1 0
JK(Available) to SR(Target)Flip-flop
Conversion Table
conversion
Input Present Next State Flip-Flop Inputs
State
S R Qn Qn+1 J K

0 0 0 0 0 X

0 0 1 1 X 0

0 1 0 0 0 X

0 1 1 0 X 1

1 0 0 1 1 X

1 0 1 1 X 0

1 1 0 X X X

1 1 1 X X X
JK(Available) to SR(Target)Flip-flop
conversion
 JK to SR
• Logic Diagram
D(Available) to SR(Target) Flip-Flop
Conversion Table Conversion
Input Present Next State Flip-Flop Inputs
State
S R Qn Qn+1 J K

0 0 0 0 0 0

0 0 1 1 1 1

0 1 0 0 0 0

0 1 1 0 0 0

1 0 0 1 1 1

1 0 1 1 1 1

1 1 0 X X X

1 1 1 X X X
 D to SR
K- MAP
SIMPLIFICATIO
N
Logic Diagram For D to SR