COMP541

Final Missing Pieces of MIPS:

Adding Memory & I/O

Montek Singh

Apr 2, 2018

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Memory-Mapped I/O
 Simple technique for accessing I/O
 give each I/O device a “fake” memory address
 i.e., CPU reads and writes a specific range of memory
locations for I/O devices
 using lw and sw
 pretending I/O devices were simply memory locations
 net effect is reading and writing I/O
 each device is assigned its own range of memory
 “address space”
 example:
 data memory from 0x1001_0000 to 0x1001_00FC
 VGA display (screen memory) from 0x1002_0000 to 0x1002_12BC
 keyboard status at 0x1003_0000
 accelerometer status at 0x1003_0004
 sound output register at 0x1003_0008 … etc.
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Adding I/O
 Memory-mapped I/O
 Conceptually like the picture
 In reality:
 isolated from CPU; I/O controllers in the middle
 on standard buses: e.g., PCI
 For our projects:
 much simpler
 just memory
addresses

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 Memory Map for our projects

Also see the lab writeup for details

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Projects: Memory Configuration
 MARS
 Use memory configuration “Default”
 instruction memory starts at: 0x0040_0000
 data memory starts at: 0x1001_0000
 Why use this configuration?
 allows us to simulate (parts of) our demo in the MARS simulator
 other configurations available in MARS are too restrictive

 Verilog
 Simple translation to actual addresses used by hardware
 strip off higher order address bits
 (sometimes) strip off last two bits (to divide by 4)

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Projects: Memory Sizes
 Data Memory
 64 words may be sufficient for most
 this includes the stack for procedure calls
 and … global variables
 if you need more, please modify address ranges
 e.g.: if program needs to store large matrices, or a second copy of
the contents of the screen
 Instruction Memory
 256 to 1024 words should be sufficient!
 will depend on the size of your program
 maybe 256 instructions?
 maybe 1024 instructions?? (please no more!)
– picture on next slide is for 1024 instructions
– use fewer address bits if you need fewer

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Projects: Instruction Memory
 Instruction memory
 in MARS: starts at 0x0040 0000
 we will simply drop the upper bits
 our instruction memory starts at 0x0
 Size:
 will depend on the size of your program
 picture below is for 1024 instructions
 use fewer address bits if you need fewer

0x0040 1000
0x0040 0FFC 0000 0000 0100 0000 0000 1111 1111 1100
instr
starting at mem starting at
0x0040 0000 0000 0000 0100 0000 0000 0000 0000 0000

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Projects: Data & Memory-Mapped I/O
 Use “Default” memory configuration in MARS
gray bits ignored

0x1003 000C LED lights 0001 0000 0000 0011 0000 0000 0000 1100
0x1003 0008 sound 0001 0000 0000 0011 0000 0000 0000 1000
0x1003 0004 accelerometer 0001 0000 0000 0011 0000 0000 0000 0100
0x1003 0000 keyboard 0001 0000 0000 0011 0000 0000 0000 0000
gap red bits select
0x1002 12C0 module
0x1002 12BC 0001 0000 0000 0010 0001 0010 1011 1100
screen (the upper limit assumes a 30x40 char screen size)
mem
0x1002 0000 0001 0000 0000 0010 0000 0000 0000 0000
gap trimmed
0x1001 0100
0x1001 00FC 0001 0000 0000 0001 0000 0000 1111 1100
data
mem
0x1001 0000 0001 0000 0000 0001 0000 0000 0000 0000
Projects: The Big Picture
Memory and I/O Unit
LED reg LED lights
sound
sound reg
accelerometer

keyboard

VGA Display
screen Driver
instr memory mem read-only port
mem MIPS mapper read/write port

data
mem
read/write port
Memory and I/O: More details

Memory and I/O Unit

lights_wr
LED reg LED lights
lights
sound_wr
sound
sound reg period
accelerometer
{7’b0, accelX, 7’b0, accelY}

keyboard
keyb_char

smem_wr
VGA Display
screen smem_addr Driver
instr memory mem
MIPS mapper read/write read-only charcode
mem port port

dmem_wr

data
mem
read/write
port
Memory and I/O: All connections!

clock
Memory and I/O Unit

cpu_writedata
lights
LED reg LED lights
lights_wr
cpu_writedata period
sound reg sound
sound_wr
{7’b0, accelX, 7’b0, accelY}
accel_val accelerometer

keyb_char
mem_wr cpu_wr keyboard
mem_addr cpu_addr
memory mapper smem_wr
MIPS mem_readdata cpu_readdata
cpu_addr[31:2] vga_addr
mem_writedata cp smem_readdata screen VGA Display
u_ vga_readdata
wr cpu_writedata mem Driver
ite
da
t a dmem_wr

dmem_readdata cpu_addr[31:2]
data
mem
cpu_writedata

cpu_addr[31:2]

cpu_writedata
Summary
 Add I/O to complete the MIPS processor
 I/O is “memory-mapped”
 shares the address space with memory
 different regions of memory reserved for data mem, display, input
devices, etc.

 Final Project:
 start thinking about what you want for your demo!

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