Speed/power performance of

available technologies.
nMOS transistor IDS Vs VDS
Before and after channel formation
NMOS_ Ids in
three regions
 (1)

(2) Time for carrier to cross channel

We know Ids= Q/τ
 (3)

Substituting Equation 2 and 3 in equation 1

Sometimes it is convenient to use gate capacitance per unit area C0 (which
is often denoted Cox) rather than Cg in this and other expressions. Noting that
 If Vgd < Vt, channel pinches off near drain
 When Vds > Vdsat = Vgs – Vt
 Now drain voltage no longer increases
current
NMOS & PMOS _Ids
Summary
Find Device, region and Id
Find Device, region and vgs
 Channel Length Modulation
• In saturation, pinch-off point moves
– As VDS is increased, pinch-off point moves
closer to source
– Effective channel length becomes shorter
– Current increases due to shorter channel

Ids = 0.5k (Vgs - Vt)2 [1 + L Vds]

 = channel length modulation coefficient

Body Effect
threshold voltage

source-to-body substrate bias

surface potential

threshold voltage for zero substrate

body effect parameter

oxide thickness

oxide permitivity
permitivity of silicon

doping concentration

charge of an electron
Sub threshold region
 Subthreshold current

Subtreshold
region

As VG increases, the surface

potential will increase.

There is very little majority carriers

underneath the gate.

There are two pn junctions. (B-S and B-D)

The density of the minority carrier
depends on the difference in the
voltage across the two pn junction diode.
A diffusion current will result the electron densities
at D and S are not identical.
Mobility variation
Fower-Nordheim Tunneling
 Drain Punchthrough
• Punch through in a MOSFET is an extreme case of
channel length modulation where the depletion layers
around the drain and source regions merge into a
single depletion region. The field underneath the gate
then becomes strongly dependent on the drain-source
voltage, as is the drain current. Punch through causes
a rapidly increasing current with increasing drain-
source voltage. This effect is undesirable as it
increases the output conductance and limits the
maximum operating voltage of the device
• Hot electrons
– High-velocity electrons can also impact the
drain, dislodging holes
– Holes are swept towards negatively-charged
substrate → cause substrate current
– Called impact ionization
– This is another factor which limits the process
scaling → voltage must scale down as length
scales
 pMOS I-V Characteritics

 All dopings and voltages are inverted for

pMOS
 Mobility p is determined by holes
 Typically 2-3x lower than that of electrons n
 120 cm2/V*s in AMI 0.6 mm process
 Thus pMOS must be wider to provide same
current
 In this class, assume n / p = 2
SECOND ORDER EFFECTS

Channel length modulation

Threshold voltage (body effect)
Sub threshold region
Mobility variation
Fower-Nordheim Tunneling
Drain punchthrogh
Hot electrons
Hot Electrons

Energy gained Carriers

Molecule loses free electrons and holes will comedown to substrate (latchup)
 VELOCITY SATURATION

Saturation velocity is the maximum velocity a charge carrier in a

semiconductor, generally an electron, attains in the presence of very high
electric fields. When this happens, the semiconductor is said to be in a state of
velocity saturation.
 Channel Length Modulation
• In saturation, pinch-off point moves
– As VDS is increased, pinch-off point moves
closer to source
– Effective channel length becomes shorter
– Current increases due to shorter channel
L  L  L
'

W
I D   nCox VGS  VTN  1  VDS 
1 2
2
L
 = channel length modulation coefficient
threshold voltage

source-to-body substrate bias

surface potential

threshold voltage for zero substrate

body effect parameter

oxide thickness

oxide permitivity
permitivity of silicon

doping concentration

charge of an electron