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GRBNeT prototype layout
Detection Unit
130m
40m
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GRBNeT basic characteristics
No dependency on cables
– Cost effective & easy to deploy
– Can be placed around any active underwater telescope
PMTs look towards the horizon where there is maximum sensitivity for UHE
neutrinos
– Use high signal thresholds (> 5 p.e) to reduce data rate and minimize background
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Block Diagram of the Electronics Container
Optical Modules
…
Input lines
10MHz Clock
FMC
PPS
Microcontroller
Atomic
Clock Spartan - 6 Compass Tilt-meter Acoustic
FPGA Modem
Slow Control
Unit
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Electronics Container
ANALOG ELECTRONICS
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PMT base
To minimize power consumption we developed a new PMT base
– Cockroft-Walton (CW) voltage multiplier to operate up to 2.5kV
– HV-controller with ultra low-power microcontrollers
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Gain vs. High Voltage
• Comparison between PMTs with CW-base and
Resistive-base
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Multiple Threshold Discriminator
• Each PMT transmits the analog signal to a multiple threshold level
discriminator
– 4 thresholds for this prototype are chosen to cover a large dynamic
range of PMT signals
– Analog signal is compared to a very low, low, medium and a high
threshold
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DIGITAL ELECTRONICS
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FPGA Design Requirements
Detect events of interest, based on PMTs digitized outputs
Collect and store operational data and data from auxiliary devices
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Hardware Components
Spartan-6
LX16 Evaluation Kit
FMC XM105
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Chip Scale Atomic Clock
FPGA Design Block Diagram
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Coincidence Logic Unit
Searches for PMT signals that “coincide” within a small
time window
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Time Over Threshold calculation
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Writing to SD Card
Communication wit SD cards via SPI protocol
Current estimate of trigger rates ~ 10Hz
Data size of each detected event ~200bytes
Worst-case scenario of continuous
10Hz rate => 7.2Mb/hour => ~63Gb/year
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Control Unit
– Handles synchronization and control signals
– Responsible for data and command handling
– Periodically initiate data storage to the SD cards
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FPGA Design Implementation Results
FPGA Utilization
Implementation Slice Slice LUTs Occupied MUXCYs RAMB16
Results Registers Slices
FPGA 3098 2039 1168 672 25
Design (17%) (22%) (51%) (15%) (78%)
Power Consumption
(Xilinx power analyzer)
Total Power 375 mW
Quiescent Power 93mW
Dynamic Power 282 mW
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CSAC Atomic Clock
• Chip Scale Atomic Clock (Microsemi SA)
– World’s smallest, lowest power atomic clock technology
– Low power consumption (< 125mW)
– Enables atomic timing accuracy in portable, battery powered
applications
– Provides 10 MHz clk and PPS
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Conclusions
• Developed the DAQ system of the GRBNeT autonomous
detection unit
– Flexible design
• utilize general purpose FPGA
– Compartmentalized functionality
– Can easily be adapted to future changes
• Project is on-going
– All aspects of the project are being tested in lab. environment
– Preparations for the deployment have started
– Schedule for deployment with HCMR R/V "AEGAEO" is being prepared
…Stay tuned!!!
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Thank you for
your attention!!
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BACKUP SLIDES
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PMT Calibration with the CW-base
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