There are three types of FET biasing configurations: fixed bias, self-bias, and voltage divider bias. The fixed bias uses a battery to ensure the gate is negatively biased with respect to the source. The self-bias replaces the gate supply with gate and source resistors to produce gate and source potentials. The voltage divider bias also uses resistors in a voltage divider configuration to set the gate-source voltage according to the voltage divider rule.
There are three types of FET biasing configurations: fixed bias, self-bias, and voltage divider bias. The fixed bias uses a battery to ensure the gate is negatively biased with respect to the source. The self-bias replaces the gate supply with gate and source resistors to produce gate and source potentials. The voltage divider bias also uses resistors in a voltage divider configuration to set the gate-source voltage according to the voltage divider rule.
There are three types of FET biasing configurations: fixed bias, self-bias, and voltage divider bias. The fixed bias uses a battery to ensure the gate is negatively biased with respect to the source. The self-bias replaces the gate supply with gate and source resistors to produce gate and source potentials. The voltage divider bias also uses resistors in a voltage divider configuration to set the gate-source voltage according to the voltage divider rule.
1. Fixed Bias Configuration 2. Self Bias Configuration 3. Voltage Divider Configuration Fixed Bias Configuration • The fixed bias is given by using a battery. • This battery ensures the gate is negative with respect to source. • Therefore no gate current flows through Rg. i.e, gate current IG=0. Plotting graph using Shockley’s equation • Using below table we can draw the transfer characteristics Finding Q point for fixed bias • A vertical line is drawn at VGS=-VGG • The point where the vertical line touches the transfer characteristics curve is referred as the quiescent or operating point • The quiescent level of ID is determined by drawing a horizontal line from the Q point to the vertical ID axis. Self – Bias Configuration • The self-bias circuit replaces the gate supply (−VGG) with a gate resistor RG and a source resistor RS . • The gate gets connected to ground via RG . Let the potential at the gate be VG . • The resistor RS added in the source circuit helps to produce a potential at the source VS . Graphical solution Voltage divider bias Example for voltage divider rule VDD-IR1-IR2 = 0 VDD-I(R1+R2) = 0 VDD = I(R1+R2)