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PHY 234 - Week 8th - Lecture - Adder-Subtractor
PHY 234 - Week 8th - Lecture - Adder-Subtractor
PHY 234
Fall 2021
Miscellaneous information
Binary numbers conversions
Applications of logic gates
Half adder
Full adder
Half subtractor
Full subtractor
• Indexing &
IC configuration
AND XOR
Full Adder
Binary addition can involve more
than two digits.
Simple half adders can not be
employed to get more digit addition operation.
To deal with three digits binary addition operation,
two half adders with one OR gate are required.