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Electronics

PHY 234
Fall 2021

Dr. Muhammad Habib


Department of Physics
COMSATS University Islamabad
Applications of gates/flip flops

 Shift registers

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D flip flop JK inputs are shorted through a
NOT gate.

 D flip flop is constructed by tying together JK inputs in a way that


input K is always inverted of J.
 When the D input is at logic ‘1’, the J and K inputs will be at
logic 1 and 0 respectively.
 Under this condition, the Q output will go to the logic 1
state when clocked.
 When the D input is a logic 0, the J and K inputs are a
logic 0 and 1 respectively.
 Under these input conditions, the Q output will go to the
logic 0 state when clocked.
 Thus, in both cases, the D input is passed on to the output when
the flip-flop is clocked.

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Applications of flip flops

Shift register
 The property of D flip flop to transfer and store data
lead them to be used in the Shift registers.
 A register that exhibits the ability to shift its contents
is called a shift register.
 The level-sensitive gated latches are not suitable,
because a change in the value of In would propagate through more
than one latch during the time when the clock is equal to 1.

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Shift registers

Types
 There are four types of shift registers.
 Register type depends on how the data is
transmitted and fetched from the register.
 In other words, how the inputs are given and
outputs are taken from the registers, determine
the type of a register.

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Register types
Serial in serial out shift register
 Serial in serial out shift register is formed by
connecting D flip flops in series with each other.
 Number of flip flops used in this register depends
on the number of bits needs to be saved/shifted.
 Each bit will be sequentially in and sequentially
out of the flip flops.
 If 4 bits need to be shifted through the
register, then eight clock pulses would be needed.

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Register types
Serial in and parallel out shift register
 The control signal Shift/Load is used to
select the mode of operation.
 If /Load = 0, then the circuit operates as
a shift register.
 If /Load = 1, then the parallel input data
are loaded into the register.
 In both cases the action takes place on
the positive edge of the clock.

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Register types
 Serial in serial out shift register
 Serial in parallel out
 Parallel in serial out
 Parallel in parallel out

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Thanks for your attention please.

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