COMPUTER ORGANIZATION AND

ARCHITECTURE
IKSAN BUKHORI, M.PHIL.
LET’S REFRESH OUR MEMORY
SIMPLIFICATION OF BOOLEAN EXPRESSION
AND KARNAUGH MAP
EXAMPLE 1: ALGEBRAIC SIMPLIFICATION

 Try to simplify the following logic circuit

 First of all, by tracing through all wires, we can see that the output is
EXAMPLE 1: ALGEBRAIC SIMPLIFICATION

 Using deMorgan’s law we can simplify this to be

 Using Boolean algebra we can simplify further

 This now is the simplest form of the original expression. The logic circuit thus looks as follows
EXAMPLE II: ALGEBRAIC SIMPLIFICATION

 Simplify the expression

Solution:
HOW TO DESIGN LOGIC CIRCUIT

Boolean
Logic Spec Truth Table Simplify
Formula
HOW TO DESIGN LOGIC CIRCUIT: EXAMPLE

 Design a logic circuit with three inputs A, B, and C and whose output is HIGH only when the majority of
the inputs are HIGH
KARNAUGH MAP

 Karnaugh Map (or as what is commonly called in the

business, K-map), is a tool that can make algebraic
simplification of logic expression easier and more structured
 It is also commonly used to convert a truth table to its
corresponding logic circuit
 Theoretically, it can be used for any number of input
variables, but its practical usefulness is limited to five or six
input variables
 Karnaugh Map can be used to build a Boolean expression in
the form of SOP or POS form. However, in this course we
will focus on SOP form
 In SOP form, we can represent the truth value as the
complement of the variable having that value (see figure for
some examples)
HOW TO BUILD K-MAP

 K-Map consists of a grid of grid where n is the number of input variables

 Each square in K-map represents the output of one particular combination of these input variables
 Column and row headers of K-map represents the combination of one or more of the input variables. For
example, a three input variable expressions can be put into K-Map by having its rows representing the
binary values of the one variable while the columns represent the combination of the other two variables.
 Each adjacent square in K-map, either horizontally or vertically, should only differ in one variable. This
can be achieved by constructing the so called Gray Code for row and column header
 GRAY CODE

https://www.allaboutcircuits.com/textbook/digital/chpt-8/logic-simplification-karnaugh-maps/
K-MAP EXAMPLES

 3 Variables Example
 5 Variables Example

 4 Variables Example
LOOPING PAIR
LOOPING QUADS
LOOPING OCTETS
STEPS IN USING K-MAPS
SEQUENTIAL LOGIC
COMBINATIONAL VS SEQUENTIAL LOGIC

 All examples of logic circuit we

had discussed belongs to a family
of logic circuit called
Combinational Logic Circuit
 In this family, only present inputs
affect the output, disregarding past
inputs
 Also, this type of circuit does not
have clock, which we shall discuss
further later
STORAGE ELEMENTS: SR LATCH

 SR Latch is a circuit where it remembers the previous state the circuit is in.
 One possible design for SR Latch is as follows

Set Reset Q (output)

0 0 Hold

1 0 1

0 1 0

1 1 Undefined
STORAGE ELEMENT: D-LATCH

 Now, let’s add one more level of complexity. Suppose that we want to have two inputs, called Data and
Store. Whenever Store signal is ‘1’, we want Data signal to be passed through to the output. Otherwise,
the output should stay as the last value it was in.
 We can do this by controlling the Input S and R of SR Latch to obtain what we want, i.e. we want to find
two functions and
 The final design is as follows
CLOCK SIGNAL

 Instead of manually switching store signal on and off, we can instead use a special signal that is turning
on and off (that is bouncing between ‘1’ and ‘0’) regularly. This signal is called a clock. An example of a
clock signal with a period T is shown below
STORAGE ELEMENTS: D-FLIP FLOP

Let’s use the D-Latch that we have created and created something similar with the addition of Clock
signal. Remember, what we want is to have a register which will store the data in Data line when the
Clock signal changes from ‘0’ to ‘1’.
One way we can achieve this is by using two D-Latches. The first latch should act as temporary
storage. When the clock is ‘0’, this latch should store the Data value and pass it to the second latch. This
second latch should store the value passed by the first latch only when the clock is ‘1’.
 With this setup, the Data is stored only in the first latch when clock is stable at ‘0’ or at ‘1’. When clock
changes to ‘1’, the data in the first D Latch is propagated through the second D Latch to the output.
THANK YOU