Chapter Five

Combinational Logic

Prepared by: Esubalew Mulat

Target Group: ECE 3rd Year Students

Debre Berhan University, February 2013 E.C.

 Topics
• Introduction
• Basic Combinational Logic Circuits
• The Universal Property of NAND and NOR Gates
• Implementing Combinational Logic
• Pulsed Waveforms

Debre Berhan University, February 2013 E.C.

 Introduction
The digital system consists of two types of circuits, namely

(i) Combinational circuits and

(ii) Sequential circuits

Debre Berhan University, February 2013 E.C.

 Introduction…
 A combinational circuit consists of logic gates, where outputs at any
instant and are determined only by the present combination of
inputs without regard to previous inputs or previous state of outputs.

 A combinational circuit performs a specific information-processing

operation assigned logically by a set of Boolean functions.

Debre Berhan University, February 2013 E.C.

 Introduction…
Any combinational circuit can be designed by the following steps of
design procedure.
1. The problem is stated.
2. Identify the input variables and output functions.
3. The input and output variables are assigned letter symbols.
4. The truth table is prepared that completely defines the
relationship between the input variables and output functions.
5. The simplified Boolean expression is obtained by any method
of minimization—algebraic method, Karnaugh map method, or
others.
6. A logic diagram is realized from the simplified expression
using logic gates.
Debre Berhan University, February 2013 E.C.
 Introduction…

 Sequential circuits contain logic gates as well as memory cells.

 Their outputs depend on the present inputs and also on the states of
memory elements.
 The outputs of sequential circuits depend not only on the present
inputs but also on past inputs.

Debre Berhan University, February 2013 E.C.

Basic Combinational Logic Circuits

Debre Berhan University, February 2013 E.C.

 AND-OR Logic
• In Sum-of-Products (SOP) form, basic combinational circuits can be
directly implemented with AND-OR combinations if the necessary
complement terms are available.
• An example of an SOP implementation is shown. The SOP
expression is an AND-OR combination of the input variables and
the appropriate complements.

Debre Berhan University, February 2013 E.C.

AND-OR Logic…

Debre Berhan University, February 2013 E.C.

 AND-OR-Inverter Logic
• When the output of a SOP form is inverted, the circuit is called an
AND-OR-Invert circuit. The AOI configuration lends itself to
product-of-sums (POS) implementation.
• An example of an AOI implementation is shown. The output
expression can be changed to a POS expression by applying
DeMorgan's theorem twice.

Debre Berhan University, February 2013 E.C.

 Exclusive OR Logic
• Although this circuit is considered a type of logic gate with its
own unique symbol, it actually is a combination of two AND
gates, one OR gate, and two inverters, as shown in Figure.

Debre Berhan University, February 2013 E.C.

 Exclusive NOR Logic

• The exclusive-NOR can be implemented by simply inverting

the output of an exclusive OR, or by directly implementing the
expression AB.

Debre Berhan University, February 2013 E.C.

 NAND Logic
• NAND gates are universal gates and can form all of the basic
gates.
• A NAND gate can function as either a NAND or a negative-OR
because, by De-Morgan's theorem,

Debre Berhan University, February 2013 E.C.

NAND Logic…

Debre Berhan University, February 2013 E.C.

 NOR Logic
• NOR gates are also universal gates and can form all of the basic
gates.
• A NOR gate can function as either a NOR or a negative-AND, as
shown by DeMorgan's theorem.
(A+B)’ = A’B’

Debre Berhan University, February 2013 E.C.

NOR Logic…

Debre Berhan University, February 2013 E.C.

Universal Property of NAND and NOR

Debre Berhan University, February 2013 E.C.

 Universal Property of NAND and NOR
• The NAND gate is a universal gate because it can be used to
produce the NOT, the AND, the OR, and the NOR functions.

Debre Berhan University, February 2013 E.C.

 Universal Property of NAND and NOR
• NOR gates are also universal gates and can form all of the
basic gates.

Debre Berhan University, February 2013 E.C.

Implementing Combinational Logics

Debre Berhan University, February 2013 E.C.

 Implementing Combinational Logics…

• Implementing a SOP expression is done by first forming the AND

terms; then the terms are ORed together.
• Example: Show the circuit that will implement the Boolean
expression
X = A’BC’ + AB’D + BD’E
• Solution: Start by forming the terms using three 3-input AND gates.
Then combine the three terms using a 3-input OR gate.

Debre Berhan University, February 2013 E.C.

Implementing Combinational Logics…

Debre Berhan University, February 2013 E.C.

 Case Study

• Consider a voting circuit with 3 inputs: A, B and C.

• We want the output to represent the majority vote of the inputs.
• That is, if we have more 1s than 0s at the input, we want the output
to be a 1. Otherwise the output will become 0.

Debre Berhan University, February 2013 E.C.

 Case Study…
• Let’s use SOP minimization technique.
• First, let us draw a truth table for our function.

Debre Berhan University, February 2013 E.C.

Case Study…

Debre Berhan University, February 2013 E.C.

 Case Study…

• The simplified SOP expression is:

• The simplified circuit is:

Debre Berhan University, February 2013 E.C.

 Example

Design a circuit that implements the logic in the truth table

Debre Berhan University, February 2013 E.C.

 Example

Solution

Debre Berhan University, February 2013 E.C.

 Example

Design an AND/OR circuit which has 4 inputs (A = A3, A2, A1, A0)
and 2 outputs (P & Q) which has the following specifications.

1. P becomes HIGH when the decimal value of A is where n =

0, 1, 2, 3).
2. P becomes 0 when at least 3 inputs are HIGH.
3. P is don’t care for the cases besides 1 and 2.
4. Q becomes HIGH when A is odd.
5. Q becomes LOW when the decimal value of A is 10.

Debre Berhan University, February 2013 E.C.

 Example

A3 A2 A1 A0 P Q A3 A2 A1 A0 P Q

0 0 0 0 X X 1 0 0 0 1 X

0 0 0 1 1 1 1 0 0 1 X 1

0 0 1 0 1 X 1 0 1 0 X 0
Finish
0 0 1 1 X 1 1 0 1 1 0 1
Design
0 1 0 0 1 X 1 1 0 0 X X

0 1 0 1 X 1 1 1 0 1 0 1

0 1 1 0 X X 1 1 1 0 0 X

0 1 1 1 0 1 1 1 1 1 0 1

Debre Berhan University, February 2013 E.C.

 Example

• Reduce the combinational logic circuit in the following figure to a

minimum form

Debre Berhan University, February 2013 E.C.

 Example

Answer

Debre Berhan University, February 2013 E.C.

 Example

What is the output of the following circuit?

Answer:
Z1 = X +Y
Z2 = X Y
Debre Berhan University, February 2013 E.C.
 Exercise
Simplify the following combinational circuits.

Debre Berhan University, February 2013 E.C.

Circuit Operation with Pulsed Waveforms

Debre Berhan University, February 2013 E.C.

 Circuit Operation with Pulsed Waveforms

• For combinational circuits with pulsed inputs, the output can

be predicted by developing intermediate outputs and
combining the result.
• For example, the circuit shown can be analysed at the outputs
of the OR gates.

Debre Berhan University, February 2013 E.C.

Circuit Operation with Pulsed Waveforms...

Alternatively, you can develop the truth table for the circuit and
enter 0's and 1's on the waveforms. Then read the output from the
table.
Debre Berhan University, February 2013 E.C.
Circuit Operation with Pulsed Waveforms…

Debre Berhan University, February 2013 E.C.

Thank you,
Questions?

Debre Berhan University, February 2013 E.C.