EC3451

LINEAR INTEGRATED CIRCUITS

UNIT I
Current mirror and current sources, Current sources as
active loads, Voltage sources, Voltage
References, BJT Differential amplifier with active loads,
Basic information about op-amps – Ideal
Operational Amplifier – General operational amplifier
stages -and internal circuit diagrams of IC
741, DC and AC performance characteristics, slew rate,
Open and closed loop configurations –
MOSFET Operational Amplifiers – LF155 and TL082.
 Amplifiers VS Op Amp
AMPLIFIER OP AMPLIFIER
Amplifiers are used to increase the power It is an Integrated form of differential
of an input signal with the aid of an amplifier.  An op-amp has two input
external power source. terminals, two power inputs and one
output terminal.
most important qualities are gain, In practice, the input resistance is very
bandwidth, efficiency, linearity noise and large, and the output resistance is very
output dynamic range. small. The maximum output voltage of the
op-amp is equal to the operating voltage
coming from the external power source.

important in fields such as music and Operational amplifiers are very useful in
audio engineering, signal processing signal comparison, noise reduction,
switching, measurements, differentiation,
integration, addition, and subtraction
circuits

a limited capability of amplifying DC op-amps are capable of amplifying DC

signals signals.
Eg: BC108A, BAW68, BF239, BFY51 Eg: IC741, LF155, TL082
BJT
 Op Amp
• An operational amplifier is a direct coupled high gain
amplifier consisting of one or more differential
amplifiers, followed by a level translator and an
output stage.
• Ideal characteristics of OPAMP:
1. Open loop gain infinite
2. Input impedance infinite
3. Output impedance low
4. Bandwidth infinite
5. Zero offset, ie, Vo=0 when V1=V2=0
The Ideal Op-Amp
•These characteristics are illustrated in figure. The input
voltage ,Vin , appears b/w the two terminals, and the output
voltage is AvVin , as indicated by the internal voltage source
symbol.
 OPAMP PARAMETERS
Common Mode
• Two signal voltages of the same phase, frequency and amplitude are
applied to the two inputs as shown is figure 12-6.
• This results in a zero output voltage (as difference is 0V). This action is
called common-mode rejection.
CMRR(COMMON MODE REJECTION RATIO):
• Desired signals can appear on only one input or with opposite
polarities on both input lines. These desired signals are
amplified and appear on the output.
• Unwanted signals (noise) appearing with the same polarity on
both input lines are essentially cancelled by the op-amp and
don’t appear on the output. The measure of an amplifier’s
ability to reject common-mode signals is a parameter called
the CMRR (Common-Mode Rejection Ratio).

• The CMRR is often expresses in decibels (dB) as

INPUT OFFSET VOLTAGE: ie, Vo=0 when V1=V2=0
•However, due to mismatch of the base emitter voltages of
differential pair, a small dc voltage VOUT(error) , appears at the
output when no differential input voltage is applied.

•Input offset voltage VOS ,is the differential dc voltage required

between the inputs to force the output to zero volts.

•Typical values of input offset voltage are in the range of 2mV

or less. It is 0V in ideal case.

•Input offset voltage drift is a parameter related to VOS ,that

specifies how much change occurs in the input offset voltage
for each degree change in temperature.
INPUT BIAS CURRENT
• Input terminals of a differential amplifier are the transistor
bases and therefore , the input currents are the bias currents as
shown in the figure.

❑
𝐼 𝐵+¿ ❑

𝐼 𝐵 =𝐼 +
𝐵− ¿
2

❑
𝐼 𝐵+¿ ❑

𝐼 𝐵 =𝐼 +𝐵− ¿
2
INPUT IMPEDANCE
• The Differential input impedance is the total resistance
between the inverting and non-inverting terminals as
illustrated in figure (a).
• The common-mode input impedance is the resistance
between each input and ground as illustrated in figure (b).
INPUT OFFSET CURRENT

• Ideally, the two input bias currents are equal and thus their
difference is zero.

• However, in a practical op-amp, the bias currents are not

exactly equal.

• The input offset current , IOS is the magnitude of the difference

between input bias currents.
INPUT OFFSET VOLTAGE
OUTPUT IMPEDANCE
•The output impedance is the resistance viewed from the output
terminal of the op-amp as shown in figure below
Slew Rate
• The slew rate (SR) of an op-amp is the maximum rate at which
the output voltage can change in response to input voltage.
When the SR is too slow for the input, distortion happens.

• This happens because voltage change in the second stage

( Voltage Amplifier(s) is limited by the charging and
discharging of capacitors.

• The slew rate is expressed as :

SR = ∆VO/∆t
• The unit of SR is volts per microseconds.
Operational Amplifier – IC741
Specifications
Power Supply: 5V up to 18V
Input Impedance: About 2 MΩ
Output impedance: About 75 Ω
Voltage Gain: 200,000 for low frequencies (200 V / mV)
Maximum Output Current: 20 mA
Recommended Output Load: Greater than 2 KΩ
Input Offset: Ranges between 2 mV and 6 mV
Slew Rate: 0.5V/µS (It is the rate at which an Op-Amp can detect
voltage changes)

The high input impedance and very small output

impedance makes IC 741 a near ideal voltage
amplifier.
Internal circuit
• Input Stage: It creates a difference between the two
input signals and then amplify the differentiated signal.

• Intermediate Stage: So, in this stage, the DC voltage is

greater than the ground potential or 0V.

• Level Shifting Stage: uses As in this stage the shifting

of voltage level happens that is why it is called Level
Shifting Stage.

• Output Stage: In this stage, the push-pull amplifier is

used. The push-pull amplifier increases the output
voltage.
 Differential
Amplifier

Current Voltage level Push Pull

Class A
mirrors shifter amplifier
amplifier
• IC741 operational amplifier: 20 transistors and 11 resistors in
a monolithic chip.

• Inputs: connected to NPN Q1 & Q2 (act as emitter follower)

• Their outputs fed to a pair of PNP transistors: Q3 & Q4
• Voltage swings at the inputs cause current fluctuation in IC.
Current mirror circuits are used to prevent that.

• Q8, Q9 ; Q12, Q13 ; Q10 & Q11 are the three current mirror
circuits. The transistors Q8 and Q12 are the controlling
transistors, which sets the emitter base voltage of the other
transistor in the corresponding pair.

• Q10 & Q11 acts as a high-impedance connection between

the input circuit and negative of the power supply. It provides
a reference voltage without loading the input circuit
• Transistor Q6 along with resistors 4.5 KΩ and 7.5 KΩ form a
voltage level shifter circuit, which prevent signal distortions
at the output amplifier stage.

• Transistors Q15, Q19 & Q22 work as a class A amplifier and

transistors Q14, Q17 & Q20 form the output stage.

• To balance any irregularities at the input differential circuit,

transistors Q5, Q6 and Q7 are used to form an arrangement
that takes in two inputs (Offset null(+), Offset  null(-)) and
balances both the inverting and non-inverting inputs
accordingly.
 DC characteristics of Op Amp
• Current is taken from the source into the op-
amp inputs respond differently to current and
voltage due to mismatch in transistor. DC
output voltages of an Op Amp are:
1.  Input bias current
2.  Input offset current
3.  Input offset voltage
4.  Thermal drift
 Input bias current
• The op-amp‘s differential amplifier, may be BJT or FET. Ideally,
we assume that no current is drawn from the input terminals.

• The base currents entering into the inverting and non-

inverting terminals : IB-& IB+ respectively.

• IB- and IB+ are not exactly equal: internal imbalance - input bias

current IB
• Bias current = 𝐼 = 𝐼 ❑ + 𝐼 𝐵 +¿ ¿ ❑

𝐵 𝐵−
2
• If input voltage Vi = 0V. The output Voltage Vo should also be
(Vo = 0) but for IB = 500nA with a 1M feedback resistor,
Vo = 500nA X 1M = 500mV
• The output is driven to 500mV with zero input. This can be
compensated by a compensation resistor Rcomp added
between the non-inverting input terminal and ground.
• Current IB+ flowing through the compensating resistor Rcomp,
then by KVL,
-V1+0+V2-Vo = 0 (or) Vo = V2 – V1 ——>(1)

•  By selecting proper value of Rcomp, V2 can be cancelled with

V1 and the Vo = 0. The value of Rcomp is derived as
V1  =IB+R*comp                  (or) IB+ = V1/Rcomp  ——>(2)
• So with Vi = 0 we get,
I1 = V1/R1 ------------------------ (3)
I2 = V2/Rf ------------------------ (4)
• For compensation, (Vo = 0, Vi = 0). i.e. from equation (3)
V2 = V1. So that,
I2 = V1/Rf -----------------------> (5)
• KCL at node ‘a’ gives,
IB - = I2 + I1 =( V1/Rf ) +(V1/R1)
= V1(R1+Rf)/R1Rf ------------------------ (5)
• Assume IB - = IB + and using equation (2) & (5) we get
V1 (R1+Rf)/R1Rf = V1/Rcomp Rcomp
= R1 || Rf ------------------------ (6)
• i.e. to compensate for bias current, the compensating resistor,
Rcomp should be equal to the parallel combination of resistor
R1 and Rf.
 Input offset current
• Bias current compensation will work if both bias currents IB+ and
IB- are equal.  
• Since the input transistor cannot be made identical. There will
always be some small difference between IB+ and IB-. This
difference is called the offset current.
|Ios| = IB+ IB-   ------------->(7)
• Even with bias current compensation, offset current will produce
an output voltage when Vi = 0.
V1 = IB + Rcomp --->(8) & I1 = V1/ R1 ------>(9)
Output voltage 𝑉𝑜 = 𝑅𝑓𝐼𝑂𝑆
• Again V0 = I2 Rf – V1 => Vo = I2 Rf - IB + Rcomp ----->(10)
• By using the above Equation the offset current can be
minimized by keeping feedback resistance small.

• To obtain high input impedance, R1 must be kept large. R1

large, the feedback resistor Rf must also be high. So as to
obtain reasonable gain.

• The T-feedback network is a good solution. This will allow

large feedback resistance, while keeping the resistance to
ground low.

• The T-network provides a feedback signal as if the network

were a single feedback resistor.
• By T to Π conversion,

• To design T- network first pick Rt<< Rf/2

 Input offset voltage
• Due to unavoidable imbalances inside the op-amp and one
may have to apply a small voltage at the input terminal to
make output (Vo) = 0. This voltage is called input offset voltage
Vos.
 Total output offset voltage
• The total output offset voltage VOT could be either more or
less than the offset voltage produced at the output due to
input bias current (IB) or input offset voltage alone(Vos).

• This is because IB and Vos could be either positive or negative

with respect to ground.

• Therefore the maximum offset voltage at the output of an

inverting and non-inverting amplifier without any
compensation technique used is given by many op-amp
provide offset compensation pins to nullify the offset voltage.
• The op amp offset null connections enable the input circuit balance to be
obtained by applying external circuitry.

• Using the offset null adjustment requires a potentiometer. The value for
the potentiometer may typically be around 10 KΩ to 100 KΩ but again
check the data sheet for the most suitable value.
 Thermal drift
• Bias current, offset current, and offset voltage change with
temperature.

•  A circuit carefully nulled at 25ºC may not remain constant. So

when the temperature rises to 35ºC the values of offset current
and voltage drifts. This is called thermal drift.

•  Offset current drift is expressed in nA/ºC.

•  These indicate the change in offset for each degree Celsius

change in temperature
 Circuit Stability
• A circuit or a group of circuit connected together as a
system is said to be stable, if its o/p reaches a fixed
value in a finite time.

• A system is said to be unstable, if its o/p increases with

time instead of achieving a fixed value.

• Bode plots are compared of magnitude Vs Frequency

and phase angle Vs frequency.
 AC Characteristics of Op Amp
• Frequency Response:
• The manner in which the gain of the op-amp responds
to different frequencies is called the frequency
response. Ideal Op-amp should have an infinite
bandwidth.

• Practical Op amp should have high gain across wide

frequencies. The op-amp gain decreases at higher
frequencies due to capacitive component in the
equivalent circuit of the op-amp.
 Open loop-op-amp Configuration
• The term open-loop indicates that no feedback in any
form is fed to the input from the output.

• When connected in open – loop, the op-amp functions

as a very high gain amplifier. There are three open –
loop configurations of op-amp namely
1.        differential amplifier
2.        Inverting amplifier
3.        Non-inverting amplifier
Open–loop Differential Amplifier
 Inverting amplifier
• The output voltage is
1800 out of phase with
respect to the input and
hence, the output voltage
V0 is given by,

V0 = -AVi
 Non Inverting amplifier
• The input signal is applied
to the non-inverting input
terminal of the op-amp.

• The input signal is

amplified by the open –
loop gain A and the
output is in-phase with
input signal.
 Open Loop - Limitations
• only very small values of input voltages can be applied

• When operated in the open-loop configuration, the output of

the op-amp is either in negative or positive saturation, or
switches between positive and negative saturation levels. This
prevents the use of open – loop configuration of op-amps in
linear applications.

• loop gain of the op – amp is not a constant and it varies with

changing temperature and variations in power supply. Also, the
bandwidth of most of the open- loop op amps is negligibly small.
 Closed Loop Configurations
• The term closed-loop indicates that a feedback loop is
fed to the input from the output.

• When connected in closed – loop, the op-amp

functions as a controlled gain amplifier. There are
three closed – loop configurations of op-amp namely
1.        differential amplifier
2.        Inverting amplifier
3.        Non-inverting amplifier
 Differential Amplifier

• This circuit is a combination of inverting and non-inverting

amplifier. (i.e)

• When Vx is reduced to zero the circuit is non-inverting amplifier

•
• When Vy is reduced to zero the circuit is inverting amplifier.
 Non inverting amplifier configuration
• An op-amp in a closed-loop
configuration as a non-inverting
amplifier with a controlled
amount of voltage gain.
• The input signal is applied to the
non-inverting (+) input.
• The output is applied back to the
inverting(-) input through the
feedback circuit (closed loop)
formed by the resistors Ri and Rf.
• Resistors Ri and Rf form a voltage-
divider circuit which reduces Vout
and connects the reduced voltage
Vf to the inverting input.
 VOLTAGE FOLLOWER CONFIGURATION
Voltage Follower
• It is a special case of the non-
inverting amplifier where all of the
output voltage is fed back to the
inverting (-) input by a straight
connection.
• The straight feedback connection has
a voltage gain of 1.
• The closed-loop voltage gain of a
non-inverting amplifier is 1/B.

• Since B= 1 for a voltage follower case,

the closed-loop voltage gain of the
voltage follower is Acl(VF) = 1/1= 1
 INVERTING AMPLIFIER CONFIGURATION
InvertingAmplifier
• The input signal is applied through a series
input resistor Ri to the inverting (-) input.
The output is fed back through Rf to the
same input. The non inverting input is
grounded.
• An infinite input impedance implies zero
current at the inverting input.
• If there is zero current through the input
impedance, then there must be no voltage
drop between the inverting and non
inverting terminals.
• This means that the voltage at the inverting
(-) input is zero. This zero voltage at the
inverting input terminal is referred to as
virtual ground.
• Since there is no current at the inverting input, the current through
Ri and the current through Rf are equal i.e, Iin = If. Also the voltage
across Rf equals -Vout because of virtual ground and therefore
IF = -VOUT/RF
since If = IIN+
-VOUT/RF = VIN/Ri
Rearranging the terms
-VOUT/VIN = RF/Ri
Therefore the overall gain is given by
ACL= -RF/Ri.
The –ve sign indicates out of phase relation between
the input and output.
 MOSFET Op Amps
• LF155:  
First monolithic JFET input operational amplifier
Low input bias and offset currents and offset voltage drift 
Precision high speed integrators Fast D/A and A/D converters High
impedance buffers Wideband, low noise, low drift amplifiers
• TL082:
These devices are low cost, high speed, dual JFET input operational
amplifiers
– Low input bias current: 50 pA
– Low input noise voltage: 16nV/ÖHz
– Low input noise current: 0.01 pA/ÖHz
– Wide gain bandwidth: 4 MHz
– High slew rate: 13 V/μs