Chapter 4 -- Modular Combinational Logic

Decoders

y0
LSB x0 y1
x1
n -to -2 n
D eco d er

M S B x n-1
y 2 n -1
 Decoder Realization
LSB A LSB A
m0 m0
M SB B M SB B

m1 m1

m2 m2

m3 m3

(a) (b )

m1

LSB A
m0
M SB B

m2

m3
(c)
 More complex decoders
C B A

A
m0
B
m0 = CBA m1
A
C
m1 = CBA A
m2

m2 = CBA B
m3
A
m3 = CBA A
m4
B
m4 = CBA
m5
A
C
m5 = CBA A
m6

m6 = CBA B
m7
A
m7 = CBA
(b )

(a )

m0 m1 m2 m3

k0 m4 m5 m6 m7

C k1
2 -to -4
D m8 m9 m10 m11
k2
M SB

k3 m12 m13 m14 m15

l2
l1
l0 l3

2 -to -4

B A
LSB
(c )
 Example 4.1 -- Realize f(Q,X,P) =
m(0,1,4,6,7) = M(2,3,5)

0 0
P P
A 1 A 1
X X
B 2 B 2
Q Q
C 3 f(Q , X , P ) C 3 f(Q , X , P )
4 4
5 5
6 6
7 7

(a) (b )
 Example 4.1 (concluded)

0 0
P P
A 1 A 1
X X
B 2 B 2
Q Q
C 3 f(Q , X , P ) C 3 f(Q , X , P )
4 4
5 5
6 6
7 7

(c) (d )
K-Channel multiplexing/demultiplexing
M u ltip lex e r D e m u ltip le x e r

A in Aout

B in B out

SW 1 SW 2

K in Kout
S in g le
ch an n el
(a)

A in S in g le Aout
ch an n el
a a
B in
B out

b É b É
K in
Kout

k k
(b )

Figure 4.22
Four-to-one multiplexer design
D0
D1 4 -to -1
M u ltip lex er Y
D2
D3

B A Y
0 0 D0
0 1 D1
B A 1 0 D2
S electio n co d e 1 1 D3
(a) (b )

D0 D0

D1 D1

Y Y
D2 D2

D3 D3

0 1 2 3
2 -to -4
D eco d er

B A B A
(c) (d )
Use a 74151A multiplexer to Realize
f(x1,x2,x3) = m(0,2,3,5)

VCC

74151A
D0
i C B A Y
D1
x1 x2 x3 f
D2
0 0 0 0 1 D0 = 1
1 0 0 1 0 D1 = 0 D3
2 0 1 0 1 D2 = 1 D4 Y f(x 1 , x 2 , x 3 )
3 0 1 1 1 D3 = 1 D5 W
4 1 0 0 0 D4 = 0
5 1 0 1 1 D5 = 1 D6
6 1 1 0 0 D6 = 0 D7
7 1 1 1 0 D7 = 0 G
C B A
(a)

x1 x2 x3
S electio n co d e
(b )

Figure 4.30
 Half Adders

xi yi xi

si
xi yi ci si
0 0 0 0
HA 0 1 0 1 yi
1 0 0 1
1 1 1 0
ci
(b )
ci
si
(a) (c)

Figure 4.35 (a) -- (c)

 Full Adders
xi

xi y i c i-1
xi yi c i-1 ci si yi
si
0 0 0 0 0
0 0 1 0 1
0 1 0 0 1 c i-1
FA 0 1 1 1 0
1 0 0 0 1
1 0 1 1 0
1 1 0 1 0
1 1 1 1 1
ci
si (e) ci
(d )

(f)
xi
yi si

c i-1
(g )

Figure 4.35 (d) -- (g)

 Ripple Carry Adder

x n-1 y n-1 x1 y1 c0 x0 y0
c n-2 c1

FA FA HA

c n-1

z n-1 z1 z0
zn
(en d carry )

Figure 4.36
Addition Time for a Basic Ripple-Carry Adder
Let tgate = the propogation delay through a typical logic gate

Half adder propagation delays

tadd = 3 tgate
tcarry = 2 tgate

Full adder propagation delays

tadd = 3 tgate
tcarry = 2 tgate

Ripple-Carry Adder (n-bits)

tadd = (n - 1)2 tgate + 3 tgate
= (2n + 1) tgate
SN7482 Two-Bit Pseudo Parallel Adder Module
A2 B2 S2 GND C2 NC NC
14 13 12 11 10 9 8

B2 S2 C2
A2

S1
A1 B1 C0

1 2 3 4 5 6 7
S1 A1 B1 V CC C0 NC NC
(a)

Package Pin Configuration

SN7482 Pseudo Parallel Adder -- Truth Table

In p u ts O u tp u ts

W h en C 0 = L W h en C 0 = H
A2 A1 B2 B1 C2 S2 S1 C2 S2 S1
L L L L L L L L L H
L L L H L L H L H L
L L H L L H L L H H
L L H H L H H H L L
L H L L L L H L H L
L H L H L H L L H H
L H H L L H H H L L
L H H H H L L H L H
H L L L L H L L H H
H L L H L H H H L L
H L H L H L L H L H
H L H H H L H H H L
H H L L L H H H L L
H H L H H L L H L H
H H H L H L H H H L
H H H H H H L H H H

(b )
SN7482 Pseudo Parallel Adder -- Logic Diagram
C0

A1

S1
B1

C1

S2
B2

A2

C2

(c)
 SN7482 Two-Bit Adder -- Logic Equations
C1 = C0A1 + C0B1 + A1B1 (4.20)

1 = C0C1 + A1C1 + B1C1 + A1B1C0

= C1(C0 + A1 + B1) + A1B1C0
= (C0+A1)(C0+B1)(A1+B1) (C0 +A1+B1) +A1B1C0
= (C0+ A1B1)(A1+B1)(C0 +A1+B1) +A1B1C0 (4.21)
= [C0(A1+B1)+ C0A1B1](A1+B1)+A1B1C0
= C0A1B1+C0A1B1+C0A1B1+A1B1C0
= C0  A1  B1

Similarly

C2 = C1A2 + C1B2 + A2B2 (4.22)

2 = C1  A2  B2
Add Time for SN7482 Adder Circuits

SN7482 propagation delays

t1 = 5 tgate
tC1 = 2 tgate
t2 = 6 tgate
tC2 = 4 tgate

SN7482-based ripple-carry adder (n-bits)

tadd = (2n + 2) tgate

SN7483 Four-Bit Adder Module
B4 S4 C4 C0 GND B1 A1 S1
16 15 14 13 12 11 10 9

S4 C4 C0 B1 A1
B4 S1

A4 A2
S3 A3 B3 S2 B2

1 2 3 4 5 6 7 8
A4 S3 A3 B3 V CC S2 B2 A2
(a)

Package Pin Configuration

SN7483 Four-Bit Adder Module -- Logic Diagram

C4

B4
P4

S4
A4

C3

B3
P3

S3
A3

C2

B2
P2

S2
A2

C1
B1
P1
S1

A1
C0
C0

(b )
SN7483 Four-Bit Adder -- Logic Equations

Pi = (BiAi)(Ai + Bi)
= (Ai + Bi)(Ai + Bi)
= Ai  Bi (4.24)

i = Pi  Ci-1
= Ai  Bi  Ci-1 (4.25)

C1 = [C0(A1B1) + (A1 + B1)]

= [C0(A1B1)](A1 + B1)
= (C0+(A1B1))(A1 + B1)
= C0A1 + C0B1 + A1B1 (4.26)

Similarly

Ci = Ci-1Ai + Ci-1Bi + AiBi

Add Times for SN7483 Adder Circuits

SN7483 propagation delays

t1 = 3 tgate
t2 = t3 = t4 = 4 tgate
tC1 = tC2 = tC3 = tC4 = 3 tgate

SN7483-based Ripple-Carry Adder (n-bits)

tadd = (3m + 1) tgate

where m = n/4.
 Fully Parallel Three-Bit Adder
c 0 = x 0y 0 (4.30)
s0 = x 0  y 0
c1 = x1y1c0’+x1y1c0+x1y1’c0+x1’y1c0
= x1y1+(x1y1)c0
= x1y1+(x1y1)(x0y0) (4.31)
s1 = x1y1c0
= x1y1 x0y0
c2 = x2y2+(x2y2)c1
= x2y2+(x2y2)[x1y1+(x1y1)(x0y0)]
= x2y2+(x2y2)(x1y1)+(x2y2)(x1y1)(x0y0) (4.32)
s2 = x2y2c1
= x2y2[x1y1+(x1y1)(x0y0)]
Add Time for a Fully Parallel Adder

Assuming a three-level realization

tadd = 3 tgate

However, the fan in requirements become impractical

as n increases.
 Carry Look-Ahead Adders -- Basic Idea
Recall that ci = xiyi + xici-1 + yici-1
= xiyi + xiyici-1 + xiyici-1 + xiyici-1 + xi yici-1
= xiyi + xiyici-1 + xi yici-1
= xiyi + (xiyi + xi yi)ci-1
= xiyi + (xi  yi)ci-1

Let g i = xi yi [carry generate] (4.33)

p i = xi  yi [carry propagate] (4.34)

Then ci = gi + pi ci-1

si = pi  ci-1 (4.38)
Carry Look-Ahead Adders -- Three-Bit Example

c0 = g 0 (4.35)
s0 = p 0

c1 = g 1 + p 1 c0
= g1 + p1g0 (4.36)
s 1 = p 1  c0

c2 = g 2 + p 2 c1
= g2 + p2(g1 + p1g0)
= g2 + p2g1 + p2p1g0 (4.37)
s 2 = p 2  c1
Carry Look-Ahead Adder Design
xi yi ci
g2 p2 g1 p1 g0

gi pi si c2 c1 c0
(a) (b )

x2 y2 x1 y1 x0 y0 0

A d d er A d d er A d d er

g2 p2 g1 p1 g0 p0
s2 s1 s0

C L A circu it

c2 c1 c0

(c)

Figure 4.39
Add Times for Carry Look-Ahead Adders

Adder modules

tg = tp = ts = tgate

CLA module

tc = 2 tgate

Overall

tadd = tgate + 2 tgate + tgate

= 4 tgate
 Binary Subtraction Circuits

Recall that (R)2 = (P)2 - (Q)2

= (P)2 + (-Q)2
= (P)2 + [Q]2
= (P)2 + (Q)2 + 1

For an SN7483 adder

()2 = (A)2 + (B)2 + (C0)2 (4.39)

where  = 4321, A = A4A3A2A1, and B = B4B3B2B1

If C0 = 0, A = P, and B = Q, then ()2 = (P)2 + (Q)2 .

If C0 = 1, A = P, and B = Q, then ()2 = (P)2 - (Q)2 .

Two’s Complement Adder/Subtracter
Q = (q 3 q 2 q 1 q 0 ) 2

P = (p 3 p 2 p 1 p 0 ) 2

4A 3A 2A 1A 4B 3B 2B 1B
S elect
M U X (7 4 1 5 7 ) S
4Y 3Y 2Y 1Y G

A4 A3 A2 A1 B4 B3 B2 B1

C4 A D D E R (7 4 8 3 ) C0
S elect F u n ctio n
S4 S3 S2 S1
0 R =P+Q
1 R =P+Q +1
R = (r 4 r 3 r 2 r 1 ) 2

Figure 4.41
Arithmetic Overflow Detection

an-1 bn-1 cn-2 cn-1 sn-1 V

0 0 0 0 0 0
0 0 1 0 1 1
0 1 0 0 1 0
0 1 1 1 0 0
1 0 0 0 1 0
1 0 1 1 0 0
1 1 0 1 0 1
1 1 1 1 1 0
Overflow Detection Circuits a n -1 b n -1 a n -2 b n -2

FA FA
c n -1 c n -2 c n -3

s n -1 s n -2

V (a )

a n -1 b n -1 a n -2 b n -2

c n -2
FA FA
c n -1 c n -3

s n -1 s n -2

V
(b )

Figure 4.42
 B
D ata acq u isitio n T o p lev el
sy stem

B1 B2 B3
In p u t sen so r d ata C o m p u te v alu es S elect o u tp u t L ev el 2

*
B1 B1 B2 B2 B2 B2
S en1so r S en2so r A1 + A2Ð M in3 (A , M ax4 (A , L ev el
A B B B B) B) 3

* * * *
B23 B23 B24 B24
C o m1 p ar S elec
2 C o m1 p ar S elec
2 L ev el
* = L eaf A e& t A e& Mt a 4
node B M in B x
* * * *
(a)
 B1 Ð
S en so r In p u t B2 Ð
s B1 C o m p u tatio n
C o n1v ert
A
A
B1
C o n2v ert
B B

B2 B2
B in1 ar B in2 ar
adyd e su b tracto
y
r r
B23 B23 B24 B24
C o m1 p ar S elec
2 C o m1 p ar S elec
2
e t e t

B2 B2
3 M ax4 im u
M in im u m m

F u n ctio
selec
n
t
P ro cessB co n tro l O uBtp3 u t s1
sy stem select
s2

O u tp u t

(b )
 Decoders

y0
LSB x0 y1
x1
n -to -2 n
D eco d er

M S B x n-1
y 2 n -1
 Decoder Realization
LSB A LSB A
m0 m0
M SB B M SB B

m1 m1

m2 m2

m3 m3

(a) (b )

m1

LSB A
m0
M SB B

m2

m3
(c)
 More complex decoders
C B A

A
m0
B
m0 = CBA m1
A
C
m1 = CBA A
m2

m2 = CBA B
m3
A
m3 = CBA A
m4
B
m4 = CBA
m5
A
C
m5 = CBA A
m6

m6 = CBA B
m7
A
m7 = CBA
(b )

(a )

m0 m1 m2 m3

k0 m4 m5 m6 m7

C k1
2 -to -4
D m8 m9 m10 m11
k2
M SB

k3 m12 m13 m14 m15

l2
l1
l0 l3

2 -to -4

B A
LSB
(c )
 Example 4.1 -- Realize f(Q,X,P) =
m(0,1,4,6,7) = M(2,3,5)

0 0
P P
A 1 A 1
X X
B 2 B 2
Q Q
C 3 f(Q , X , P ) C 3 f(Q , X , P )
4 4
5 5
6 6
7 7

(a) (b )
 Example 4.1 (concluded)

0 0
P P
A 1 A 1
X X
B 2 B 2
Q Q
C 3 f(Q , X , P ) C 3 f(Q , X , P )
4 4
5 5
6 6
7 7

(c) (d )
x0
y0

x1
y0
x0
y1
x1 y1

y2
y2
E
y3

y3
E
(a) (b )
 y0 O0
I0 x0

I1 x1 y1 O1

y2 O2
E
y3 O3

y0 O4
x0

x1 y1 O5
y0
I2 x0
y2 O6
I3 x1 y1 E
y3 O7
y2
1 E
y3

y0 O0 y0 O8
I0 x0 x0

I1 x1 y1 O1 x1 y1 O9

y2 O2 y2 O 10
I2 E E
y3 O3 y3 O 11

y0 O4 y0 O 12
x0 x0

x1 y1 O5 x1 y1 O 13

y2 O6 y2 O 14
E E
y3 O7 y3 O 15

(a ) (b )
 (6 )
G1
(4 )
G2A D ata
G 2 B (5 ) o u tp u ts
(1 5 ) Vc
Y0 c Y0 Y1 Y2 Y3 Y4 Y5 Y6

(1 4 ) 16 15 14 13 12 11 10 9
Y1

(1 3 )
Y2
(1 ) Y0 Y1 Y2 Y3 Y4 Y5
A
(1 2 )
Y3
(2 ) A Y6
B
(1 1 ) G2 G2
Y4
(3 ) B C A B G1 Y7
C
(1 0 )
Y5

(9 )
Y6 1 2 3 4 5 6 7 8
G2 G2
(7 ) A B C A B G1 O
Y u7 tp u GND
Y7 S elec E n ab l t
t e
(b
(a) )

In p u t O u tp u t
s
E n ab l S elec
s '1 3 8/
B IN
e G2 t OCT (1 5 )
0 (1 ) 0 (1 4 Y 0
G1 * C B A Y0 Y1 Y2 Y3 Y4 Y5 Y6 Y7 A 1 A 1 1 ) Y1
(2 )
H L L L L L H H H H H H H B 2 2 2 Y2
B (3 ) (1 3 )
H L L L H H L H H H H H H C 3 3 3 Y3
H L L H L H H L H H H H H C (1 2 )
4 4 Y4
H L L H H H H H L H H H H (1 1 )
H L H L L H H H H L H H 5 (6 ) 5 Y5
(1 0 )
H L H L H H H H H H L H H 6 (4 ) 6 Y6
G 12 7 G1 & 7 (9 ) Y 7
H L H H L H H H H H H L H G 2 (5 )
A
G2 E (7 )
H L H H H H H H H H H H L A
 H    H H H H H H H H B G2 N
L ´    H H H H H H H H B
G2* = G2A +
G2B (c (d (e
) ) )
 G1
G2

4
In p u ts O u tp u ts
VCC
5 24 23 22 21 20 19 18 17 16 15 14 13

6
A A B C D G2 G1 15 14 13 12
7
0 11
B
8 1 2 3 4 5 6 7 8 9 10
C
9
1 2 3 4 5 6 7 8 9 10 11 12
D
GND
10 O u tp u ts

(b )
11

12

13

14

15

AAB BCCDD
(a )
 In p u ts O u tp u ts
G1 G2 D C B A 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
L L L L L L L H H H H H H H H H H H H H H H
L L L L L H H L H H H H H H H H H H H H H H
L L L L H L H H L H H H H H H H H H H H H H
L L L L H H H H H L H H H H H H H H H H H H
L L L H L L H H H H L H H H H H H H H H H H
L L L H L H H H H H H L H H H H H H H H H H
L L L H H L H H H H H H L H H H H H H H H H
L L L H H H H H H H H H H L H H H H H H H H
L L H L L L H H H H H H H H L H H H H H H H
L L H L L H H H H H H H H H H L H H H H H H
L L H L H L H H H H H H H H H H L H H H H H
L L H L H H H H H H H H H H H H H L H H H H
L L H H L L H H H H H H H H H H H H L H H H
L L H H L H H H H H H H H H H H H H H L H H
L L H H H L H H H H H H H H H H H H H H L H
L L H H H H H H H H H H H H H H H H H H H L
H L     H H H H H H H H H H H H H H H H
L H     H H H H H H H H H H H H H H H H
H H  ´ ´ ´ H H H H H H H H H H H H H H H H

(c)
'154 '154
B IN /O C T (1 )
0 (2 3 ) 0 (2 ) 0
A 1 A 1 1 (3 ) 1
2 (2 2 ) 2 (4 ) 2
B 3 2 3 (5 ) 3
4 B (2 1 ) 4 (6 ) 4
C 5 4 5 (7 ) 5
6 (2 0 ) 6 (8 ) 6
D 7 C 8 7 (9 ) 7
8 8 8
9 9 (1 0 ) 9
D (1 1 ) 10
10 10 (1 3 )
11 11 11
(1 4 ) 12
12 12 (1 5 )
13 13 13
(1 6 ) 14
14 14 (1 7 )
15 15 15
(1 8 )
G1 G1 &
G2 (1 9 )
G2 EN

(d ) (e)
n -B it a d d ress
S D ev ice 0
y0
A0 x0 S D ev ice 1
y1
A1 x1
É
É É
AnÐ1 xnÐ1

E
y 2n Ð 1

D ev ice a ccess S D ev ice 2 n Ð 1

co n tro l sig n a l
S = select d ev ice
 0
1 2
2
3
4
5 7 4 0 8 /4
Z
23
A 6 7 4
7 6 f2 = P M (6 , 9 )
22 B 8
Y 9 10
5
C
21 10
X D
11 14
20 12
W 13 9
14 17
10
8 f1 = å m (1 , 9 , 1 2 , 1 5 )
15 12
13
G1 7 4 2 0 /2
18 G2
19

74154
 B C D co d e
0 DCBA D ecim a l d ig its
1 0000 0
0001 1
D 2 0010 2
3 D ecim a l 0011 3
BCD C
in p u t o u tp u ts 0100 4
B 4 0101 5
0110 6
A 5 0111 7
6 1000 8
1001 9
7
(a ) (b )
8
9
 DC D DC D DC D
BA 00 01 11 10 BA 00 01 11 10 BA 00 01 11 10
0 4 12 8 0 4 12 8 0 4 12 8
00 1 d 00 d 00 1 d

1 5 13 9 1 5 13 9 1 5 13 9
01 d 01 1 d 01 d 1
3 7 15 11 A 3 7 15 11 A 3 7 15 11 A
11 d d 11 d d 11 d d
B 2 6 14 10
B 2 6 14 10
B 2 6 14 10
10 d d 10 d d 10 d d

C C C
(a ) (b ) (c)
 a a
Ð + + Ð
a a

f f
f b f b

b g b g
g C om m on g C om m on
anode ca th o d e
e e
e c e c

c c
d d
d d
(a ) (b )
 AB A AB A
CD 00 01 11 10 CD 00 01 11 10
0 4 12 8 0 4 12 8
00 1 0 d 1 00 1 1 d 1

1 5 13 9 1 5 13 9
01 0 1 d 1 01 1 0 d 1
3 7 15 11 D 3 7 15 11 D
11 1 1 d d 11 1 1 d d
C 2 6 14 10
C 2 6 14 10
10 1 0 d d 10 1 0 d d

B B
(a ) (b )
 A1
x3

0 4 12 8
d 1 d 1

1 5 13 9
0 d d d
X0
3 7 15 11 x0
A0
X1 4 -to -2 d d d d
E n co d er x1
X2 2 6 14 10
A1 0 d d d
X3

(a ) x2

A1 = X2 + X3

A0
X3
X3 X2 X1 X0 A1 A0
0 4 12 8
0 0 0 0 d d
0 0 0 1 0 0 d 0 d 1
0 0 1 0 0 1 1 5 13 9
0 0 1 1 d d 0 d d d
0 1 0 0 1 0
0 1 0 1 d d 3 7 15 11 X0
0 1 1 0 d d d d d d
0 1 1 1 d d
X1
1 0 0 0 1 1 2 6 14 10
1 0 0 1 d d 1 d d d
1 0 1 0 d d
1 0 1 1 d d
1 1 0 0 d d X2
1 1 0 1 d d
1 1 1 0 d d A0 = X1 + X3
1 1 1 1 d d

(b ) (c)

X1
A0
X3

X2
A1
X3

(d )
 A0
x4

0 4 12 8
1

1 5 13 9
x1
A0 1
x2 4 -to -3 x1
A1 3 7 15 11
E n co d er
x3
A2
x4 x2 2 6 14 10

(a )
x3

A1
x4

0 4 12 8

X4 X3 X2 X1 A2 A1 A0
1
0 0 0 0 0 0 0 1 5 13 9
0 0 0 1 0 0 1
0 0 1 0 0 1 0
3 7 15 11 x1
0 0 1 1 0 0 0
0 1 0 0 0 1 1
0 1 0 1 0 0 0 x2 2 6 14 10
0 1 1 0 0 0 0
0 1 1 1 0 0 0 1
1 0 0 0 1 0 0
1 0 0 1 0 0 0 x3
1 0 1 0 0 0 0
1 0 1 1 0 0 0 A2
x4
1 1 0 0 0 0 0
1 1 0 1 0 0 0 0 4 12 8
1 1 1 0 0 0 0 1
1 1 1 1 0 0 0
1 5 13 9
(b )

3 7 15 11 x1

x2 2 6 14 10

x1 x3
x2
x3 (c)
x4
A0
x1
x2
x3 x1
x4 x2
x3 A2
x1
x2 x4
x3
x4
A1
x1
x2
x3
x4

(d )
 A1
x3

0 4 12 8
1 1 1

1 5 13 9
1 1 1

3 7 15 11 x0

x0 A0 1 1 1
4 -to -2 A1 x1
x1 2 6 14 10
P rio rity 1 1 1
x2 en co d er GS
x3 EO x2

(a ) A1 = X2 + X3

A0 x3

00 01 11 10
In p u ts O u tp u ts 0 4 12 8

X3 X2 X1 X0 A1 A0 G S EO
00 1 1

0 0 0 0 0 0 0 1 1 5 13 9
0 0 0 1 0 0 1 0 01 1 1
0 0 1 0 0 1 1 0
x0
0 0 1 1 0 1 1 0 3 7 15 11
0 1 0 0 1 0 1 0 11 1 1 1
0 1 0 1 1 0 1 0 x1 2 6 14 10
0 1 1 0 1 0 1 0
0 1 1 1 1 0 1 0 10 1 1 1
1 0 0 0 1 1 1 0
1 0 0 1 1 1 1 0 x2
1 0 1 0 1 1 1 0
1 0 1 1 1 1 1 0
1 1 0 0 1 1 1 0 A 0 = X 3 + X 1X 2
1 1 0 1 1 1 1 0
1 1 1 0 1 1 1 0 (c)
1 1 1 1 1 1 1 0
x1
(b )
x2

A0
x3

x2
A1

EO
x0
GS
(d )
 In p u ts O u tp u ts
1
1 2 3 4 5 6 7 8 9 D C B A
H H H H H H H H   H H H
        L L H H L
2        L H L H H H
      L H H H L L L
A      L H H H H L L H
    L H H H H H L H L
   L H H H H H H L H H
  L H H H H H H H H L L
 L H H H H H H H H H L H
3
L H H H H H H H H H H H L

(b )

4
In p u ts
O u tp u t O u tp u ts
V cc NC D 3 2 1 9 A
B
5
16 15 14 13 12 11 10 9

6
D 3 2 1 9

4 A

C 5 6 7 8 C B
7

8 1 2 3 4 5 6 7 8
4 5 6 7 8 C B GND
D
9 In p u ts O u tp u ts

(a ) (c)
0

EO In p u ts O u tp u ts
EI 0 1 2 3 4 5 6 7 A2 A1 A0 GS EO
GS
         H H H H H
1 L  H H H H H H H H H H H L
L        L L L L L H
L       L H L L H L H
L      L H H L H L L H
2 L     L H H H L H H L H
A0 L    L H H H H H L L L H
L   L H H H H H H L H L H
L  L H H H H H H H H L L H
L L H H H H H H H H H H L H
3
(b )

4
O u tp u ts In p u ts
O u tp u t
V cc EO GS 3 2 1 0 A0
A1 16 15 14 13 12 11 10 9
5

6 EO GS 3 2 1 0

4 A0

5 6 7 El A2 A1
A2
7

1 2 3 4 5 6 7 8
4 5 6 7 E1 A2 A1 GND
El
In p u ts O u tp u ts
(a ) (c)
K-Channel multiplexing/demultiplexing
M u ltip lex e r D e m u ltip le x e r

A in Aout

B in B out

SW 1 SW 2

K in Kout
S in g le
ch an n el
(a)

A in S in g le Aout
ch an n el
a a
B in
B out

b É b É
K in
Kout

k k
(b )

Figure 4.22
Four-to-one multiplexer design
D0
D1 4 -to -1
M u ltip lex er Y
D2
D3

B A Y
0 0 D0
0 1 D1
B A 1 0 D2
S electio n co d e 1 1 D3
(a) (b )

D0 D0

D1 D1

Y Y
D2 D2

D3 D3

0 1 2 3
2 -to -4
D eco d er

B A B A
(c) (d )
In p u t F irst
lin es lev el

I0 D0

I1 D1
Y
I2 D2

I3 D3
B A

I4 D0

I5 D1
Y
I6 D2 S eco n d
lev el
I7 D3
B A
D0

D1 O u tp u t lin e
Y Z
D2

D3
B A
I8 D0

I9 D1
Y
I1 0 D2 S3 S2
S electio n co d e
I1 1 D3
(h ig h er-o rd er b its)
B A

I1 2 D0

I1 3 D1
Y
I1 4 D2

I1 5 D3
B A

S1 S0
S electio n co d e
(lo w er-o rd er b its)
 D a ta in p u ts D a ta select In p u ts O u tp u ts
V cc 4 5 6 7 A B C
S elect S tro b e
16 15 14 13 12 11 10 9
C B A G Y W
´ ´ ´ H L H
L L L L D0 D0
L L H L D1 D1
D4 D5 D6 D7 A B L H L L D2 D2
L H H L D3 D3
H L L L D4 D4
D3 C H L H L D5 D5
H H L L D6 D6
D2 D1 D0 Y W S H H H L D7 D7

(b )

'1 5 1 A
1 2 3 4 5 6 7 8 0
3 2 1 0 Y W S tro b e GND 1
G
D a ta in p u ts O u tp u ts 2
3
(a ) Y
4
W
S tro b e G 5
en a b le 6
D0
7
G C B A
D1

D2 (d )

D3
'1 5 1 A
(7 )
O u tp u t Y G EN
O u tp u t W (1 1 )
D4 A 0
(1 0 ) 0
B G
D5 (9 ) 7
CÊ 2
(4 )
D6 D0 0
(3 ) (5 )
D1 1 Y
D7
(2 ) (6 )
D2 2 W
(1 )
D3 3
A A B B C C (1 5 )
D4 4
A (1 4 )
D5 5
B (1 3 )
D6 6
(1 2 )
C D7 7

(c) (e)
 S tr o b e
G1
e n a b le

D a ta In p u ts D a ta select E0
VCC 8 9 10 11 12 13 14 15 A B C
24 23 22 21 20 19 18 17 16 15 14 13 E1

E2
E8 E9 E10 E11 E12 E13 E14 E15 A B
E7 C E3
E6 E5 E4 E3 E2 E1 E0 S W D
E4

1 2 3 4 5 6 7 8 9 10 11 12
E5
7 6 5 4 3 2 1 0 S tro b e W D GND
D a ta in p u ts G O u t- D a ta
p u t select E6
(a )

E7
W
E8 O u tp u t

In p u ts E9

S elect S tro b e O u tp u t
E10
D C B A G W
´ ´ ´ ´ H H E11
L L L L L E0
L L L H L E1
L L H L L E2 E12
L L H H L E3
L H L L L E4
L H L H L E5 E13
L H H L L E6
L H H H L E7
H L L L L E8 E14
H L L H L E9
H L H L L E10
E15
H L H H L E11
H H L L L E12
H H L H L E13 A A B B C C D D
H H H L L E14
H H H H L E15 A

(b ) B

D (c)
 '1 5 0 '1 5 0
(9 )
E0 G EN
E1 (1 5 )
A 0
E2 (1 4 )
B 0
(1 3 ) G
E3 C (1 1 ) 15
E4 D 3

E5 (8 )
E0 (7 ) 0
E6 E1 1
(6 )
E7 E2 2
(5 )
E8 E3 (4 ) 3 (1 0 )
W E4 4 W
E9 (3 )
E5 5
(2 )
E10 E6 6
(1 )
E11 E7 7
(2 3 )
E8 8
E12 (2 2 )
E9 (2 1 ) 9
E13 E10 10
(2 0 )
E14 E11 11
(1 9 )
E15 E12 (1 8 ) 12
E13 13
(1 7 )
G E14 14
(1 6 )
D C B A E15 15

(d ) (e)
 1C0
P a ir 0
2C0

1C1
P a ir 1 1C0
2C1 1Y 0
O u tp u t
p a ir 2C0
1C2 2Y S electio n co d e
P a ir 2 1C1 2
(B A )2
2C2 1 C0
2C1 2
1Y C1 2
1C3 2 Y
P a ir 3 2Y
2C3 1C2 C2
BA (L S B ) 2 2
2C2 C3
BA
1C3
3
2C3 2
S electio n co d e
P o sitio n (c)
(a ) (b )

S tr o n g 1 G '15
(e n a b le ) 3
1C0 (1 4 )
A 0 0
(2 ) G
O u tp u t B 1 3
1C1
D a ta 1 1Y
1C2 M UX
(1 )
1 G (6 ) EN
1C3 1 C 0 (5 ) 0
1 C 1 (4 )
B 1 C 2 (3 ) 1 (4 )
1Y
S elect 1 C 3 (1 5 ) 2
A
2 G (1 0 ) 3
(1 1 )
2C0 2 C 0 (1 2 )
2 C 1 (1 3 ) (7 )
2C2 2Y
2C1
2C3
D a ta 2 O u tp u t
2C2 2Y

2C3
S tr o b e (e)
(e n a b le ) 2 G
(d )
 In p u ts In p u ts
O u tp u t O u tp u t
V cc S tro b e 4ZA 4B 4Y 3A 3B 3Y
16 15 14 13 12 11 10 9

G 4A 4B 4Y 3A 3B
In p u ts O u tp u t
S 3Y S tro b e S elect D a ta
G S A B Y
1A 1B 1Y 2A 2B 2Y H ´ ´ ´ L
L L L  L
L L H ´ H
L H  L L
L H  H H
1 2 3 4 5 6 7 8
(b )
S elect 1A 1B 1C 2A 2B 2Y GND
O u tp u t O u tp u t
In p u ts In p u ts

(a )

1A

1Y
1B

2A '15
7
2Y
(1 5 )
2B G EN
(1 )
A /B G1
3A

(2 ) M UX
3Y 1A 1 (4 )
3B (3 )
1B 1Y
(5 ) 1
2A (6 )
2B (7 )
4A (1 1 ) 2Y
3A
3B (1 0 )
4Y 4A (1 4 ) (9 )
4B (1 3 ) 3Y
4B
S tro b e G
(1 2 )
S e le c t S 4Y

(d )
(c)
 In p u ts In p u ts
O u tp u t O u tp u t
V cc S tro b e 4ZA 4B 4Y 3A 3B 3Y
16 15 14 13 12 11 10 9

G 4A 4B 4Y 3A 3B
In p u ts O u tp u t
S 3Y S tro b e S elect D a ta
G S A B Y
1A 1B 1Y 2A 2B 2Y H ´ ´ ´ L
L L L  L
L L H ´ H
L H  L L
L H  H H
1 2 3 4 5 6 7 8
(b )
S elect 1A 1B 1C 2A 2B 2Y GND
O u tp u t O u tp u t
In p u ts In p u ts

(a )

1A

1Y
1B

2A '15
7
2Y
(1 5 )
2B G EN
(1 )
A /B G1
3A

(2 ) M UX
3Y 1A 1 (4 )
3B (3 )
1B 1Y
(5 ) 1
2A (6 )
2B (7 )
4A (1 1 ) 2Y
3A
3B (1 0 )
4Y 4A (1 4 ) (9 )
4B (1 3 ) 3Y
4B
S tro b e G
(1 2 )
S e le c t S 4Y

(d )
(c)
 S o u rc e X S o u rc e W
D 7ÐD 0 D 7ÐD 0
8 8
D 3Ð D 0
D 7ÐD 4 D 3ÐD 0
4 4 D 7ÐD 4 4 4

4AÐ 1A 4BÐ 1B 4AÐ 1A 4BÐ 1B

G 0 G 0
74157 74157
S S
4 YÐ 1 Y 4 YÐ 1 Y

4
4
S elect
D 7Ð D 4 8 D 3Ð D 0 0=X
1= W
D 7Ð D 0
D estin a tio n
(a )

S o u rc e M S o u rc e N S o u rc e O S o u rc e P
D 3ÐD 0 D 3Ð D 0 D 3Ð D 0 D 3ÐD 0
4 4 4 4

4AÐ 1A 4BÐ 1B 4AÐ 1A 4BÐ 1B

G G
74157 74157
S S
4Y 3Y 2Y 1Y 4Y 3Y 2Y 1Y

S0 S1

S0 S1 S o u rce
0 0 M
0 1 N
1 0 O
D3 D2 D1 D0 1 1 P
D estin a tio n
(b )
Use a 74151A multiplexer to Realize
f(x1,x2,x3) = m(0,2,3,5)

VCC

74151A
D0
i C B A Y
D1
x1 x2 x3 f
D2
0 0 0 0 1 D0 = 1
1 0 0 1 0 D1 = 0 D3
2 0 1 0 1 D2 = 1 D4 Y f(x 1 , x 2 , x 3 )
3 0 1 1 1 D3 = 1 D5 W
4 1 0 0 0 D4 = 0
5 1 0 1 1 D5 = 1 D6
6 1 1 0 0 D6 = 0 D7
7 1 1 1 0 D7 = 0 G
C B A
(a)

x1 x2 x3
S electio n co d e
(b )

Figure 4.30
 c D0
0 D1 f(a , b , c)
a b f(a , b , c) M U X In p u ts
c D2 Y
0 0 c D0 = c 1 D3
0 1 0 D1 = 0
1 0 c D2 = c B A
1 1 1 D3 = 1

(a ) a b
S electio n co d e
(b )

0 D0
1 D1 f(a , b , c)
b c f(a , b , c) M U X In p u ts
a D2 Y
0 0 0 D0 = 0 a D3
0 1 1 D1 = 1
1 0 a D2 = a B A
1 1 a D3 = a

(c) b c
S electio n co d e
(d )
 C B A Y VC
x4 C
i X1 X2 X3 X4 f f
0 0 0 0 0 1 74151A
0 0 0 1 1 1 D0 = 1
D0
1 0 0 1 0 1
D1
0 0 1 1 1 1 D1 = 1
2 0 0 0 1 D2
1
0 1 0 1 0 X4 D2 = X4 D3 f(x 1 , x 2 , x 3 , x 4 )
3 0 1 1 0 0 D4 Y
0 1 1 1 0 0 D3 = 0 D5 W
4 1 0 0 0 0 D6
1 0 0 1 1 X4 D4 = X4 D7
5 1 0 1 0 0 G
1 0 1 1 0 0 D5 = 0 C B A
6 1 1 0 0 0
1 1 0 1 1 X4 D6 = X4
7 1 1 1 0 1 x1 x2 x3
1 1 1 1 1 1 D7 = 1 S electio n co d e

(a ) (b )
 In p u t
D
E Y0

E n a b le
Y0 Y1

Y1 Y2
1 -to -n
In p u t O u tp u ts
D e m u ltip le x e r
É Y3

m0 m1 m2 m3
YnÐ 1
2 -to -4
D ecoder

1 2 É S
S electio n B A
co d e S electio n
(a ) co d e
(b )
 8 1
x0 E0 0 x0
7 2
x1 E1 74150 74154 1 x1
x2
6 3
E2 2 x2
x3
5 4
4
E3 3 x3
x4 S in g le d a ta 5
3
E4
ch a n n el (Q ) 4 x4
x5 E5
6
2 5 x5
x6 E6
7
1 6 x6
x7 E7 10 8
x8
23 M u ltip le x e r D e c o d e r / d e m u ltip7le x e r 9 x7
E8 Y 8 x8
x9
22 18 10
E9
21 G1 9 x9
x 10 E 10 11
20 10 x 10
x 11 E 11 13
19 11 x 11
x 12 E 12 G2 14
x 13
18 19 12 x 12
E 13 15
x 14
17 13 x 13
16
E 14 16
x 15 14 x 14
9
E 15 17
G D C B A D C B A 15 x 15

1 6 lin es 11 13 14 15 20 21 22 23
C3
C2
C1
C0

5 lin es
A2 B2 S2 GND C2 NC NC
14 13 12 11 10 9 8

C0

B2 S2 C2 A1
A2 S1
B1

S1
A1 B1 C0

1 2 3 4 5 6 7
S1 A1 B1 VCC C0 NC NC C1
(a)

In p u ts O u tp u ts

W h en C 0 = L W h en C 0 = H
A2 A1 B2 B1 C2 S2 S1 C2 S2 S1 S2
B2
L L L L L L L L L H
L L L H L L H L H L
L L H L L H L L H H A2
L L H H L H H H L L
L H L L L L H L H L
L H L H L H L L H H
L H H L L H H H L L
L H H H H L L H L H
H L L L L H L L H H C2
H L L H L H H H L L
H L H L H L L H L H
H L H H H L H H H L
H H L L L H H H L L (c)
H H L H H L L H L H
H H H L H L H H H L
H H H H H H L H H H

(b )
B4 S4 C4 C0 GND B1 A1 S1
16 15 14 13 12 11 10 9

S4 C4 C0 B1 A1
B4 S1

A4 A2
S3 A3 B3 S2 B2

1 2 3 4 5 6 7 8
A4 S3 A3 B3 VCC S2 B2 A2
(a)
 C4

B4
P4

S4
A4

C3

B3
P3

S3
A3

C2

B2
P2

S2
A2

C1
B1
P1
S1

A1
C0
C0

(b )
xi yi ci
g2 p2 g1 p1 g0

gi pi si c2 c1 c0

(a) (b )

x2 y2 x1 y1 x0 y0 0

A d d er A d d er A d d er

g2 p2 g1 p1 g0 p0
s2 s1 s0

C L A circu it

c2 c1 c0

(c)
 In p u ts O u tp u ts

V cc P2 G2 Cn C n+x C n+ y G C n+ z

16 15 14 13 12 11 10 9

P2 G2 Cn C n+x C n+ y G

G1 C n+z

P1 G0 P0 G3 P3 P

1 2 3 4 5 6 7 8
G1 P1 G0 P0 G3 P3 P GND
In p u ts O u tp u t
(a)

In p u ts O u tp u t In p u ts O u tp u t
G3 G2 G1 G0 P3 P2 P1 G P3 P2 P1 P0 P
L       L L L L L L
 L      L A ll oth er
  L L L
 ´ L com b in ation s H
   L L L L L
A ll oth er com b in ation s H
(c)
(b )

In p u ts O u tp u t In p u ts O u tp u t
G0 P0 Cn C n+ x G1 G0 P1 P0 Cn C n+ y

L   H L     H
 L H H  L    H
A ll oth er   L L H H
com b in ation s L A ll oth er com b in ation s L

(d ) (e)

In p u ts O u tp u t
G2 G1 G0 P2 P1 P0 Cn C n+ z

L       H
 L      H
   L L ´  H
   L L L H H
A ll oth er com b in ation s L
(f)
 P or X

G or Y

P 3 or X 3
G 3 or Y 3

C n+ z
or
C n+ z
P 2 or X 2
G 2 or Y 2

C n+ y
or
P 1 or X 1 C n+ y
G 1 or Y 1

C n+ x
P 0 or X 0 or
G 0 or Y 0 C n+ x

C n or C n

(g)
 Q = (q 3 q 2 q 1 q 0 )2

P = (p 3 p 2 p 1 p 0 )2

4A3A 2A 1A 4B 3B 2B 1B
S elect
M U X (7 4 1 5 7 ) S
4Y 3Y 2Y 1Y G

A4 A3 A2 A1 B4 B3 B2 B1

C4 A D D E R (7 4 8 3 ) C0
S elect Fu n ction
S4 S3 S2 S1
0 R=P+Q
1 R=P+Q+1
R = (S 4 S 3 S 2 S 1 )2
 anÐ 1 b nÐ 1 anÐ 2 bnÐ 2

FA FA É
cnÐ 1 c nÐ 2 cnÐ 3

snÐ 1 sn Ð 2

V (a)

a nÐ 1 bnÐ 1 anÐ 2 bn Ð 2

FA
cnÐ 2
FA É
cnÐ 1 c nÐ 3

sn Ð 1 sn Ð 2

V
(b )
 i A1 A0 B1 B0 f1 f2 f3

0 0 0 0 0 0 1 0
1 0 0 0 1 1 0 0
2 0 0 1 0 1 0 0
3 0 0 1 1 1 0 0
f1 , A < B 4 0 1 0 0 0 0 1
2 5 0 1 0 1 0 1 0
A 6 0 1 1 0 1 0 0
M agn itu d e
com p arator f2 , A = B 7 0 1 1 1 1 0 0
B 8 1 0 0 0 0 0 1
2 9 1 0 0 1 0 0 1
f3 , A > B 10 1 0 1 0 0 1 0
11 1 0 1 1 1 0 0
12 1 1 0 0 0 0 1
(a) 13 1 1 0 1 0 0 1
14 1 1 1 0 0 0 1
15 1 1 1 1 0 1 0

(b )

f1 , A < B A1 f2 , A = B A1

0 4 12 8 0 4 12 8
1
1 5 13 9 1 5 13 9
1 1
3 7 15 11 B0 3 7 15 11 B0
1 1 1 1
B1 2 6 14 10 B1 2 6 14 10
1 1 1

A0 A0

f3 , A > B A1

0 4 12 8
1 1 1
1 5 13 9
1 1
3 7 15 11 B0

B1 2 6 14 10
1

A0

(c)
A1

f3

B1

A0

f1

B0

f2
 D ata in p u ts

V cc A3 B2 A2 A1 B1 A0 B0
16 15 14 13 12 11 10 9

A3 B2 A2 A1 B1 A0

B3 B0
A<B A=B A>B A>B A=B A<B
In In In Out Out Out

1 2 3 4 5 6 7 8
B3 A<B A=B A>B A>B A=B A<B GND
D ata In In In Out Out Out
in p u t
C ascad e in p u ts C ascad e ou tp u ts
(a)

C om p arin g C ascad in g
in p u ts in p u ts O u tp u ts
A3, B 3 A2, B 2 A1, B 1 A0, B0 A>B A<B A=B A>B A<B A=B
A3 > B3 ´ ´ ´    H L L
A3 < B3       L H L
A3 = BA32 > B2 ´ ´    H L L
A3 = BA32 < B2      L H L
A3 = BA32 = B2 A1 > B1     H L L
A3 = BA32 = B2 A1 < B1     L H L
A3 = BA32 = B2 A1 = B1 A0 > B0    H L L
A3 = BA32 = B2 A1 = B1 A0 < B0    L H L
A3 = BA32 = B2 A1 = B1 A0 = B0 H L L H L L
A3 = BA32 = B2 A1 = B1 A0 = B0 L H L L H L
A3 = BA32 = B2 A1 = B1 A0 = B0 L L H L L H
A3 = BA32 = B2 A1 = B1 A0 = B0    L L H
A3 = BA32 = B2 A1 = B1 A0 = B0 H H L L L L
A3 = BA32 = B2 A1 = B1 A0 = B0 L L L H H L

(b )
 A3
B3

A>B

A2
B2

A<B

A=B A=B
A>B

A1
B1

A<B

A0
B0

(c)
 0 1 0

c3 c2 c1
B0
A0
B1
A1
B2
7485
A2
B3
A3
f3 f2 f1

C ascad ed in p u ts
c3 c2 c1
B4
A4
B5

7485 B6
A5
7485
4 A6
D ata A B7
c1 A7
A<B f1 A<B f3 f2 f1
C ascad e c2
A=B f2 A=B C ascad ed in p u ts
in p u ts c3
A>B f3 A>B c3 c2 c1
B8
D ata B
4 A8
B9

(a)
B10
A9
7485
A10
B11
A11
f3 f2 f1

C ascad ed in p u ts
c3 c2 c1
B12
A12
B13 f1 A<B
A13
B14
7485 f2 A=B
A14 f3 A>B
B15 C ircu it
A15 ou tp u ts

(b )
 ai bi

Ci C iÐ 1
S2
A LU
S1
S0

fi
(a)

anÐ 1 bnÐ 1 a1 b1 a0 b0

C nÐ 1 C nÐ 2 C1 C0 CÐ1
C -G E N
A LU A LU A LU

S2
S1
S0

fn Ð 1 f1 f0

(b )
 ai bi

C iÐ 1

x y x y c in

LU AU
co u
f t f
S1
S0
Ci

fL U i fA U i

x1 x0

M UX s S2

fi
x1 x0

y
 S1 S0 x y FLU
x y 0 0 0 0 0
0 0 0 1 0 x AND y
0 0 1 0 0
0 0 1 1 1
0 1 0 0 0
0 1 0 1 1 x OR y
0 1 1 0 1
0 1 1 1 1
1 0 0 0 1
x0 x1 x2 x3
1 0 0 1 1 NOT x
s0 S0
M UX 1 0 1 0 0
s1 S1 1 0 1 1 0
y 1 1 0 0 0
1 1 0 1 1 x XOR y
1 1 1 0 1
1 1 1 1 0
f
(a) (b )
x y

s1
s1 s0
s0
xy 00 01 11 10
0 4 12 8
00 0 0 0 1
1 5 13 9
01 0 1 1 1
3 7 15 11
11 1 1 0 0
2 6 14 10
10 0 1 1 0

(c)

f
(d )
 S1 S0 bi yi

0 0 0 0 Add
0 0 1 1
0 1 0 1 S u b tract
0 1 1 0
1 0 0 0 In crem en t
1 0 1 0
1 1 0 1 D ecrem en t
1 1 1 1
(a)
bi

S1S0
S1
bi 00 01 11 10
0 2 6 4
0 0 1 1 0
1 3 7 5
S0
1 1 0 1 0

(b )

yi
(c)
 S1 S0 CÐ1

0 0 0 Add
0 1 1 S u b tract
1 0 1 In crem en t
1 1 0 D ecrem en t

(a)

S1
S0 0 1
0 2
0 0 1 CÐ1

1 3
1 1 0
S1 S0
(b ) (c)
 ai bi

Y -G E N
S1
S0

C iÐ 1

LU

fL U FA
i AU
fA U
Ci i

S2

M UX
f
i
 S torage
A d d er register

M od u le: S R
K eyp ad
in p u t
M od u le: FA 4
D isp lay
d river

gn d

a0
ad d 0
s0
a1 M od u le:
FA 1
a2
a3
ad d 1 s1
M od u le:
FA 1
FA 4
M od u le
d esign
ad d 2 s2
M od u le:
FA 1
b0
b1
b2 ad d 3 s3
M od u le:
b3
FA 1

N ,C .

a
x1
b X1 s
X2
c in

FA 1
a1 M od u le
A1
d esign
co u
a2 t
A2 R1

a3
A3
 M o d u le: F A 1

a
s
b
cou
t
c in

(a)

H ierarch ical
con n ectors

a
x1
b X1 s
X2
c in

a1
A1
co u
a2 t
A2 R1

a3
A3
(b )
A (3 :0 )
A (0 )
A0
A (1 ) S (3 :0 )
A1
A (2 ) S (0 )
A2 S0
A (3 ) S (1 )
B (3 :0 ) A3 S1
FA 4 S (2 )
B (0 ) S2
B0 S (3 )
B (1 ) S3
B1
B (2 )
B2
B (3 )
B3

(a)

A (3 :0 )
P in A (3 :0 )

S (3 :0 )
P in S (3 :0 )

B (3 :0 )
P in B (3 :0 )

FA 4

(b )
 T im e a(3 :0 ) b (3 :0 ) s(3 :0 )
0 0000 0000 0000
5 0110 0101 0000
7 0110 0101 1011
10 0110 0001 1011
12 0110 0001 0111
(a)

a(3 :0 ) 0000 0110

b (3 :0 ) 0000 0101 0001

s(3 :0 ) 0000 1011 0111

0 5 10 15
T im e
(b )