MEMORY CONNECTIONS TO CPU

for increase number of words by a factor

Dr M Rajasekhara Babu
Vellore Institute of Technology (VIT)
Vellore-632014, Tamil Nadu, India
 Computations of Memory chips Computation of Memory chips for Scalable Memories

Number of Words =N
Width of Word =W
Available Chip size =NxW
Required memory size = NI x WI

NI
p= Where NI ≥ N
N

q= W
I
Where WI ≥ W
W

p *q, N x W Chips are needed for NI x WI memory size

denotes the smallest integer grater than or equal

Dr M Rajasekhara Babu, Vellore Institute of Technology (VIT)-Vellore Slide.# 2

 Computations of Memory chips There are different types of organization of N1 x W1 –
 Different memory Organizations memory using N x W –bit chips

Case 1: If NI > N & WI = W

NI
Increase number of words by the factor of p = N

Case 2: If NI = N & WI > W

q
Increase the word size of a Memory by a factor of = W I

Case 3: If NI > N & WI > W

Increase number of words by the factor of p &
Increase the word size of a Memory by a factor of q

Dr M Rajasekhara Babu, Vellore Institute of Technology (VIT)-Vellore Slide.# 3

 Computations of Memory chips Example1
 Different memory Organizations
 Example-1 How many 1024x 8 RAM chips are needed
to provide a memory capacity of 2048 x 8?
Available Chip size = N x W = 1024 x 8
Required memory size = NI x WI = 2048 x 8
NI 2048
p= = = 2 Where NI ≥ N
N 1024

q= WI = 8 Where WI ≥ W
W = 1
8

p * q, N x W Chips are needed for NI x WI memory size

2 *1 =2, 1024 x 8 RAM Chips are needed for 2048x 8 memory size

Dr M Rajasekhara Babu, Vellore Institute of Technology (VIT)-Vellore Slide.# 4

How many 1024x 8 RAM chips are needed to
provide a memory capacity of 2048 x 8?
No. of Required p= q= x y z
Memory Memory Available memory N = 2 p = 2 T= 2z x+ y+ z
x y

NI WI p *q
Types= Type Chip size size =
T =NxW NI x WI N W
1 RAM 1024 x 8 2048 x 8 2 1 2 10 1 0 11
How many 1024x 8 RAM chips are needed to
provide a memory capacity of 2048 x 8?
No. of Required p= q= x y z
Memory Memory Available memory N = 2 p = 2 T= 2z x+ y+ z
x y

NI WI p *q
Types= Type Chip size size =
T =NxW NI x WI N W
1 RAM 1024 x 8 2048 x 8 2 1 2 10 1 0 11
How many 1024x 8 RAM chips are needed to
provide a memory capacity of 2048 x 8?
No. of Required p= q= x y z
Memory Memory Available memory N = 2 p = 2 T= 2z x+ y+ z
x y

NI WI p *q
Types= Type Chip size size =
T =NxW NI x WI N W
1 RAM 1024 x 8 2048 x 8 2 1 2 10 1 0 11

Hexadecimal address Address bus

Component
From To 15 14 13 12
11 10 9 8 7 6 5 4 3 2 1 0
RAM[1,1] 0000 3FF 0 x x x x x x x x x x
RAM[2,1] 400 7FF 1 x x x x x x x x x x
How many 1024x 8 RAM chips are needed to
provide a memory capacity of 2048 x 8?
No. of Required p= q= x y z
Memory Memory Available memory N = 2 p = 2 T= 2z x+ y+ z
x y

NI WI p *q
Types= Type Chip size size =
T =NxW NI x WI N W
1 RAM 1024 x 8 2048 x 8 2 1 2 10 1 0 11

Hexadecimal address Address bus

Component
From To 15 14 13 12
11 10 9 8 7 6 5 4 3 2 1 0
RAM[1,1] 0000 3FF 0 x x x x x x x x x x
RAM[2,1] 0400 7FF 1 x x x x x x x x x x
10 9-0

RAM
1024 X 8

RAM
1024 X 8
 Summary
• Case-1: Increase number of words by a factor
• Chips organization for scalable memory
– Case-1: (p-rows) x (1-column)
• Formula to compute number of address lines
for
– words/chip
– Size of de-multiplexer
• Address map table
• Chip organization with memory
connection to CPU

Dr M Rajasekhara Babu, Vellore Institute of Technology (VIT)-Vellore Slide.# 10

Dr M Rajasekhara Babu, Vellore Institute of Technology (VIT)-Vellore Slide.# 11
MEMORY CONNECTIONS TO CPU
for increasing word size by a factor

Dr M Rajasekhara Babu
Vellore Institute of Technology (VIT)
Vellore-632014, Tamil Nadu, India

Dr M Rajasekhara Babu, Vellore Institute of Technology (VIT)-Vellore Slide.# 12

 Outline
Session objectives

Brief overview on “How to find number

chips needed and memory address map for
increasing word size by a factor”

Demonstration of Memory connections to

CPU with an example for increasing word
size by a factor

Summary

Dr M Rajasekhara Babu, Vellore Institute of Technology (VIT)-Vellore Slide.# 13

 Objective

To appraise with Brief

overview on “How to find
number chips needed and
memory address map for
increasing word size by a
factor”

To Demonstrate Memory
connections to CPU with
an example for increasing
word size by a factor

Dr M Rajasekhara Babu, Vellore Institute of Technology (VIT)-Vellore Slide.# 14

 Computations of Memory chips Computation of Memory chips for Scalable Memories

Number of Words =N
Width of Word =W
Available Chip size =NxW
Required memory size = NI x WI

NI
p= Where NI ≥ N
N

q= W
I
Where WI ≥ W
W

p *q, N x W Chips are needed for NI x WI memory size

denotes the smallest integer grater than or equal

Dr M Rajasekhara Babu, Vellore Institute of Technology (VIT)-Vellore Slide.# 15

 Computations of Memory chips There are different types of organization of N1 x W1 –
 Different memory Organizations memory using N x W –bit chips

Case 1: If NI > N & WI = W

NI
Increase number of words by the factor of p = N

Case 2: If NI = N & WI > W

q
Increase the word size of a Memory by a factor of = W I

Case 3: If NI > N & WI > W

Increase number of words by the factor of p &
Increase the word size of a Memory by a factor of q

Dr M Rajasekhara Babu, Vellore Institute of Technology (VIT)-Vellore Slide.# 16

 Computations of Memory chips Example-2
 Different memory Organizations
 Example-1, Example-2 How many 1024x 4 RAM chips are needed
to provide a memory capacity of 1024 x 8?
Available Chip size = N x W = 1024 x 4
Required memory size = NI x WI = 1024 x 8
NI 1024
p= = = 1 Where NI ≥ N
N 1024

q= WI = 8 Where WI ≥ W
W = 2
4

p * q, N x W Chips are needed for NI x WI memory size

1 * 2 =2, 1024 x 4 RAM Chips are needed for 1024x 8 memory size

Dr M Rajasekhara Babu, Vellore Institute of Technology (VIT)-Vellore Slide.# 17

How many 1024x 4 RAM chips are needed to
provide a memory capacity of 1024 x 8?
No. of Required p= q= x y z
Memory Memory Available memory N = 2 p = 2 T= 2z x+ y+ z
x y

NI WI p *q
Types= Type Chip size size =
T =NxW NI x WI N W
1 RAM 1024 x 4 1024 x 8 1 2 2 10 0 0 10
 How many 1024x 4 RAM chips are needed to
provide a memory capacity of 1024 x 8?
No. of Required p= q= x y z
Memory Memory Available memory N = 2 p = 2 T= 2z x+ y+ z
x y

NI WI p *q
Types= Type Chip size size =
T =NxW NI x WI N W
1 RAM 1024 x 4 1024 x 8 1 2 2 10 0 0 10

Hexadecimal address Address bus

Component
From To 15 14 13 12
11 10 9 8 7 6 5 4 3 2 1 0
RAM[1,1] RAM[1,2] 0000 3FF x x x x x x x x x x
 How many 1024x 4 RAM chips are needed to
provide a memory capacity of 1024 x 8?
No. of Required p= q= x y z
Memory Memory Available memory N = 2 p = 2 T= 2z x+ y+ z
x y

NI WI p *q
Types= Type Chip size size =
T =NxW NI x WI N W
1 RAM 1024 x 4 1024 x 8 1 2 2 10 0 0 10

Hexadecimal address Address bus

Component
From To 15 14 13 12
11 10 9 8 7 6 5 4 3 2 1 0
RAM[1,1] RAM[1,2] 0000 3FF x x x x x x x x x x
9-0

RAM RAM
1024 X 4 1024 X 4
 Summary
• Case-2: Increase the word size of a Memory
by a factor
• Chips organization for scalable memory
– Case-2: (1-row) x (q-columns)
• Formula to compute number of address lines
for
– words/chip
– Size of de-multiplexer
• Address map table
• Chip organization with memory
connection to CPU

Dr M Rajasekhara Babu, Vellore Institute of Technology (VIT)-Vellore Slide.# 22

Dr M Rajasekhara Babu, Vellore Institute of Technology (VIT)-Vellore Slide.# 23
 MEMORY CONNECTIONS TO CPU
for increasing number of words as well as word size by a factor

Dr M Rajasekhara Babu
Vellore Institute of Technology (VIT)
Vellore-632014, Tamil Nadu, India

Dr M Rajasekhara Babu, Vellore Institute of Technology (VIT)-Vellore Slide.# 24

 Outline
Session objectives

Brief overview on “How to find number

chips needed and memory address map for
increasing number of words as well
asword size by a factor”

Demonstration of Memory connections to

CPU with an example for increasing
number of words as well as word size by a
factor

Summary

Dr M Rajasekhara Babu, Vellore Institute of Technology (VIT)-Vellore Slide.# 25

 Objective
To appraise with Brief overview
on “How to find number chips
needed and memory address
map for increasing number of
words as well as word size by a
factor”

To Demonstrate Memory
connections to CPU with an
example for increasing number
of words as well as word size
by a factor

Dr M Rajasekhara Babu, Vellore Institute of Technology (VIT)-Vellore Slide.# 26

 Computations of Memory chips Computation of Memory chips for Scalable Memories

Number of Words =N
Width of Word =W
Available Chip size =NxW
Required memory size = NI x WI

NI
p= Where NI ≥ N
N

q= W
I
Where WI ≥ W
W

p *q, N x W Chips are needed for NI x WI memory size

denotes the smallest integer grater than or equal

Dr M Rajasekhara Babu, Vellore Institute of Technology (VIT)-Vellore Slide.# 27

 Computations of Memory chips There are different types of organization of N1 x W1 –
 Different memory Organizations memory using N x W –bit chips

Case 1: If NI > N & WI = W

NI
Increase number of words by the factor of p = N

Case 2: If NI = N & WI > W

q
Increase the word size of a Memory by a factor of = W I

Case 3: If NI > N & WI > W

Increase number of words by the factor of p &
Increase the word size of a Memory by a factor of q

Dr M Rajasekhara Babu, Vellore Institute of Technology (VIT)-Vellore Slide.# 28

 Computations of Memory chips
Example3
 Different memory Organizations
 Example-1, Example-2, Example-3
How many 1024x 4 RAM chips are needed
to provide a memory capacity of 2048 x 8?
Available Chip size = N x W = 1024 x 4
Required memory size = NI x WI = 2048 x 8
NI 2048
p= = = 2 Where NI ≥ N
N 1024

q= WI = 8 Where WI ≥ W
W = 2
4

p * q, N x W Chips are needed for NI x WI memory size

2 * 2 =4, 1024 x 4 RAM Chips are needed for 2048x 8 memory size

Dr M Rajasekhara Babu, Vellore Institute of Technology (VIT)-Vellore Slide.# 29

How many 1024x 4 RAM chips are needed to
provide a memory capacity of 2048 x 8?
No. of Required p= q= x y z
Memory Memory Available memory N = 2 p = 2 T= 2z x+ y+ z
x y

NI WI p *q
Types= Type Chip size size =
T =NxW NI x WI N W
1 RAM 1024 x 4 2048 x 8 2 2 4 10 1 0 11
 How many 1024x 4 RAM chips are needed to
provide a memory capacity of 2048 x 8?
No. of Required p= q= x y z
Memory Memory Available memory N = 2 p = 2 T= 2z x+ y+ z
x y

NI WI p *q
Types= Type Chip size size =
T =NxW NI x WI N W
1 RAM 1024 x 4 2048 x 8 2 2 4 10 1 0 11

Hexadecimal address Address bus

Components organization
From To 15 14 13 12
11 10 9 8 7 6 5 4 3 2 1 0
RAM[1,1] RAM[1,2] 000 3FF 0 x x x x x x x x x X
RAM[2,1] RAM[2,2] 400 7FF 1 x x x x x x x x x X
 How many 1024x 4 RAM chips are needed to
provide a memory capacity of 2048 x 8?
No. of Required p= q= x y z
Memory Memory Available memory N = 2 p = 2 T= 2z x+ y+ z
x y

NI WI p *q
Types= Type Chip size size =
T =NxW NI x WI N W
1 RAM 1024 x 4 2048 x 8 2 2 4 10 1 0 11

Hexadecimal address Address bus

Components organization
From To 15 14 13 12
11 10 9 8 7 6 5 4 3 2 1 0
RAM[1,1] RAM[1,2] 000 3FF 0 x x x x x x x x x X
RAM[2,1] RAM[2,2] 400 7FF 1 x x x x x x x x x X
10 9-0

RAM RAM
1024 X 4 1024 X 4

RAM RAM
1024 X 4 1024 X 4
 Summary
• Case-3: Increase the word size as well as
number of words of a Memory by a factor
• Chips organization for scalable memory
– Case-3: (p-rows) x (q-columns)
• Formula to compute number of address lines
for
– words/chip
– Size of de-multiplexer
• Address map table

• Chip organization with

memory connection to CPU
Dr M Rajasekhara Babu, Vellore Institute of Technology (VIT)-Vellore Slide.# 34
Dr M Rajasekhara Babu, Vellore Institute of Technology (VIT)-Vellore Slide.# 35
 MEMORY (Different) CONNECTIONS TO CPU
for increasing number of words as well as word size by a factor

Dr M Rajasekhara Babu
Vellore Institute of Technology (VIT)
Vellore-632014, Tamil Nadu, India

Dr M Rajasekhara Babu, Vellore Institute of Technology (VIT)-Vellore Slide.# 36

 Outline

Session objectives

Brief overview on “How to find number chips

needed and memory address map for increasing
number of words as well asword size by a
factor”
Demonstration of connection of different types
of Memories to CPU with an example for
increasing number of words as well as word size
by a factor

Summary

Dr M Rajasekhara Babu, Vellore Institute of Technology (VIT)-Vellore Slide.# 37

 Objective
To appraise with Brief
overview on “How to find
number chips needed and
memory address map for
increasing number of
words as well as word
size by a factor”
To Demonstrate Memory
connections to CPU with
an example for increasing
number of words as well
as word size by a factor

Dr M Rajasekhara Babu, Vellore Institute of Technology (VIT)-Vellore Slide.# 38

 Memory Address Map
Table to build large memory from different types of small
memories

Dr M Rajasekhara Babu
Vellore Institute of Technology (VIT)
Vellore-632014, Tamil Nadu, India

Dr M Rajasekhara Babu, Vellore Institute of Technology (VIT)-Vellore Slide.# 39

 Outline

Session objectives

Scalable Memories using different types of

memories

Example-4: computation of number of

chips

Example-4: Development of address Map

table

Summary
Dr M Rajasekhara Babu, Vellore Institute of Technology (VIT)-Vellore Slide.# 40
 Objective
To appraise with
organization of
different memory
chips for a large
memories from
smaller memory chips

To develop an address
map table for design
of scalable memory
using different types
of memories
Dr M Rajasekhara Babu, Vellore Institute of Technology (VIT)-Vellore Slide.# 41
 Example-4
A computer employs RAM chips of 1024 x 8 and ROM
chips of 2048 x 4. The computer system needs 2K bytes of
RAM, and 2K bytes of ROM . The highest-order bit of the
address bus is assigned 0 for RAM and 1 for ROM.
a). How many RAM and ROM chips are needed?
b). How many lines of the address bus must be used to
access 2048 bytes of RAM and 2048 bytes of ROM? How
many of these lines will be common to all chips?
c). How many lines must be decoded for chip select?
Specify the size of the decoder
d). Draw a memory-address map for the system.
e). Draw a memory-address map for the system and Give
the address range in hexadecimal for RAM, ROM

Dr M Rajasekhara Babu, Vellore Institute of Technology (VIT)-Vellore Slide.# 42

 Computations of Memory chips
Example4
 Different memory Organizations . A computer employs RAM chips of 1024 x 8 and ROM chips of 2048 x 4.
The computer system needs 2K bytes of RAM, and 2K bytes of ROM . The
 Example-1, Example-2,
highest-order bit of the address bus is assigned 0 for RAM and 1 for ROM.
Example-3
RAM ROM
Available Chip size = N x W = 1024 x 8 = 2048x 8
Required memory size = NI x WI = 2048 x 4 = 2048 x 8

2048 NI 2048
NI = 1
p= = = 2 p= =
1024 N 2048
N
q= W
I
q= WI = 8 = 8
= 1 W = 2
W 4
8

p * q, N x W Chips are needed for NI x WI memory size

2 *1 =2, 1024 x 8 RAM Chips are needed for 2048x 8 memory size
1 *2 =2, 2048 x 4 ROM Chips are needed for 2048x 8 memory size
Dr M Rajasekhara Babu, Vellore Institute of Technology (VIT)-Vellore Slide.# 43
employs RAM chips of 1024 x 8 and ROM chips of 2048 x 4. The
computer system needs 2K bytes of RAM, and 2K bytes of ROM .
The highest-order bit of the address bus is assigned 0 for RAM and
1 for ROM.
No. of Required p= q= x y z
Memory Memory Available memory N = 2 p = 2 T= 2z x+ y+ z
x y

NI WI p *q
Types= Type Chip size size =
T =NxW NI x WI N W
2 RAM 1024 x 8 2048 x 8 2 1 2 10 1 1 11
2 ROM 2048 x 4 2048 x 8 1 2 2 11 1 1 12
 employs RAM chips of 1024 x 8 and ROM chips of 2048 x 4. The
computer system needs 2K bytes of RAM, and 2K bytes of ROM .
The highest-order bit of the address bus is assigned 0 for RAM and
1 for ROM.
No. of Required p= q= x y z
Memory Memory Available memory N = 2 p = 2 T= 2z x+ y+ z
x y

NI WI p *q
Types= Type Chip size size =
T =NxW NI x WI N W
2 RAM 1024 x 8 2048 x 8 2 1 2 10 1 1 11
2 ROM 2048 x 4 2048 x 8 1 2 2 11 1 1 12

Hexadecimal address Address bus

Components organization
From To 15 14 13 12
11 10 9 8 7 6 5 4 3 2 1 0
RAM[1,1] 000 3FF 0 0 x x x x x x x x x x
RAM[2,1] 400 7FF 0 1 x x x x x x x x x x
ROM[1,1] ROM[1,2] 1 x x x x x x x x x x x
 employs RAM chips of 1024 x 8 and ROM chips of 2048 x 4. The
computer system needs 2K bytes of RAM, and 2K bytes of ROM .
The highest-order bit of the address bus is assigned 0 for RAM and
1 for ROM.
No. of Required p= q= x y z
Memory Memory Available memory N = 2 p = 2 T= 2z x+ y+ z
x y

NI WI p *q
Types= Type Chip size size =
T =NxW NI x WI N W
2 RAM 1024 x 8 2048 x 8 2 1 2 10 1 1 11
2 ROM 2048 x 4 2048 x 8 1 2 2 11 1 1 12

Hexadecimal address Address bus

Components organization
From To 15 14 13 12
11 10 9 8 7 6 5 4 3 2 1 0
RAM[1,1] 000 3FF 0 0 x x x x x x x x x x
RAM[2,1] 400 7FF 0 1 x x x x x x x x x x
ROM[1,1] ROM[1,2] 1 x x x x x x x x x x x
Address Bus 11 10 9-0
RAM
1024 X 8

RAM
1024 X 8

ROM ROM
2048 X 4 2048 X 4
 Summary
• Organization of large memory from smaller
memory chips using different types of
memories
• Chips organization for scalable memory
– (p-rows) x (q-columns)
• Formula to compute number of address lines
for
– words/chip
– Size of de-multiplexer
• Address map table
• Chip organization with memory
connection to CPU
Dr M Rajasekhara Babu, Vellore Institute of Technology (VIT)-Vellore Slide.# 48
Dr M Rajasekhara Babu, Vellore Institute of Technology (VIT)-Vellore Slide.# 49