Digital Electronics

Lecture 5

Simplification using Karnough Map,

Combinational Logic Circuit Design
 Lecture 5 outline
 Review of last Lecture
 Simplification using Karnough Map
 Simplification using logic converter in
MULTISIM
 Combinational logic circuits
 Review of Last Lecture

 Simplification using Boolean Algebra

 Continuation of simulation for OR, NOT,
Ex-OR, NAND gates
 Simplification using Karnough
Map

 This technique is
used for minimizing
Boolean functions. A
B
0 1

0 0 1
This technique
1 2 3
enables the mapping
of every on of 2n
input combinations
for "n" variables.
 Example 1
Simplify the following using K-
map.
_ _
 F = AB + AB + A B
_ _
 = AB + AB + AB + A B
Using theorem 7 B 1
0
_ _ A
 = A(B + B) + B(A + A )
0 1
Using theorem 8
 = A(1) + B(1) 1 1 1
Using theorem 2
 =A+B
 Example 2

 Simplify the following using K- map.

_ _ _ _ _ _ _ _
 F = A B C + A BC + A BC + AB C +
_
ABC Circuit diagram using original
expression BC
00 01 11 10
A
0 1 1 1

1 1 1
 Using Boolean Algebra
_ _ _ _ _ _ _ _
 F = A B C + A BC + A BC + AB C +
_
ABC
_ _ _ _
 F = A B +B C +BC
_ _ _
 F = A B + C (B + B )
_ _
 F=AB+ C
Decimal Binary
ABCD

0 0 000
1 0 001
2 0 010
AB
3 0 011 00 01 11 10
CD
4 0 100 0 1 3 2
00
5 0 101 5 6
01 4 7
6 0 110
11 12 13 15 14
7 0 111
8 1 000 10 8 9 11 10
9 1 001
Map for 4 variables (A, B, C and D)
10 1 010
11 1 011
12 1 100
13 1 101
14 1 110
15 1 111
 Example – 4 Variables

 Simplify the following using K-map.

_ _ _ _ _ _ _ _ _ _
 F= A B C D + A B C D+ A B C D
_ _ _ _ _
+ A B C D + A BCD + A B C D +
_ _ _ _ _
ABC D + ABCD + ABCD + AB C D +
_ _
AB C D
 Main Points

 Simplification using K-map

 Simplification using logic converter in
Multisim
 The End

 Thank you for your

attention.