Int. J. Electron. Commun. (AE) 62 (2008) 114 121 www.elsevier.

de/aeue

The inverting second generation current conveyors as universal building blocks

Ahmed M. Soliman
Electronics and Communication Engineering Department, Faculty of Engineering, Cairo University, Egypt Received 18 October 2006; accepted 4 March 2007

Abstract The inverting second generation current conveyor ICCII includes two types. This paper concentrates on the two new types of the inverting current conveyor namely ICCII+ and ICCII. Although it may seem that there is only minor difference between the two types, there is a signicant difference as will be evident from some applications considered in this paper. Both the ICCII+ and the ICCII are universal building blocks as will be demonstrated in this paper. 2007 Elsevier GmbH. All rights reserved.
Keywords: Current conveyors; Inverting current conveyors; Analog lters

1. Introduction
The inverting second generation current conveyor (ICCII) was rst introduced in [1] as a new block to the current conveyor family to obtain and design current-mode circuits from their voltage-mode counterparts [2,3]. This active building block can be easily implemented with CMOS technology. The symbolic representation of the ICCII with both of its two types is shown in Fig. 1. The relation between terminal voltages and currents is given by [1] IY VX IZ 0 = 1 0 0 0 0 0 1 0 VY IX . VZ

(1)

to distinguish between the two types. It should be noted that both types of the ICCII are considered as special cases from the two output differential voltage conveyor (DVC) introduced in [4]. The ICCII+ is also a special case from the differential difference current conveyor (DDCC) introduced in [5]. Therefore, several CMOS realizations of the ICCII+ are given as special cases from the CMOS realizations of the DVC or the DDCC in [4,5]. A very attractive CMOS realization of the ICCII which avoids the use of current mirrors in the transfer of current from X to Z is shown in Fig. 2(a) [1]. A CMOS realization of the DVC is shown in Fig. 2(b) [4] which with Y 1 grounded realizes both the ICCII+ and the ICCII.

That is the voltage at terminal X is the inversion of the voltage at terminal Y. The positive sign in the third row applies to the ICCII+, whereas the negative sign applies to the ICCII. The proper sign will be written at the Z terminal

2. The ICCII+ and the ICCII as universal building blocks

There are many universal active building blocks that have been introduced in the literature [611]. It was shown in [6] that any circuit function can be realized with the CCII, which was called in [6] as the three terminal nullor.

E-mail address: asoliman@ieee.org. 1434-8411/$ - see front matter 2007 Elsevier GmbH. All rights reserved. doi:10.1016/j.aeue.2007.03.006

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Other universal building blocks include the rst, second and third generation current conveyors, as well as all the nine classes of the operational ampliers [10]. Although the ICCII+ and the ICCII are not realizable directly using nullators and norators as was demonstrated in [1], they are similar to the CCII+ in that respect. They require new types of singular elements that were introduced in [1,12] and known as the voltage mirror and the current mirror. It is desirable here to show that both the ICCII+ and the ICCII are universal building blocks.

Fig. 1. Symbolic representation of ICCII.

Fig. 3 represents two alternative block diagram realizations of the CCII, from two ICCII+. Since the CCII can be realized using the ICCII+ as shown in Fig. 3 and since the CCII is a universal element, therefore, the ICCII+ is also a universal element. The realization of CCII can also be achieved using two ICCII in a similar topology as in Fig. 3; therefore, the ICCII is also a universal building block. Fig. 4 represents four alternative block diagram realizations of the ICCII using two ICCII+. Before discussing the applications of each of the two types of the ICCII, it is of interest to see how to realize an ICCII with controllable current gain from two ICCII or two ICCII+. Fig. 5 represents these two realizations of the ICCII having, Iz = Ix R1 /R2 . The ICCII can also be used in the realization of a negative admittance using a single ICCII as shown in Fig. 6. The circuits have the special feature that the current

Fig. 2. (a) CMOS realization of the ICCII [1]. (b) CMOS realization of the DVC [4].

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Fig. 3. Two alternative realizations of the CCII from two ICCII+.

Fig. 4. Four alternative realizations of the ICCII from two ICCII+.

leaving port 2 equals the current entering port 1 which may be useful in some applications. It is worth noting that a oating negative impedance converter (NIC) can also be realized with two ICCII as in the cases of two CCII+ or two CCII [13,14]. It may seem that both the ICCII+ and the ICCII are very similar in all circuit applications; however, they are similar in some applications and completely different in other applications as will be demonstrated in the next sections of this paper.

The ICCII can be used in the same application resulting in the same Vo with an opposite sign. In most applications in which the ICCII is used without any feedback the ICCII+ and the ICCII can be both used as is the case with the CCII+ and the CCII. As a second application of the CCII+; consider the grounded one port circuit shown in Fig. 8 in which the input port is the X terminal of the ICCII+. The input admittance is given by Yin = Y1 + Y2 + Y 1 Y2 . Y3 (3)

3. Applications of the ICCII+

As a rst application of the ICCII+ is in the realization of balanced output differential integrators in a similar way to the CCII+ and CCII [15]. Fig. 7 represents two alternative balanced output integrators using two ICCII+. The integrator output voltage Vo is given by Vo = V2 V 1 . sCR (2)

It is seen that this is the equivalent circuit of the wellknown Ford and Girling op amp inductor circuit [16] which was realized in [17] using the CCII. It should be noted that a single ICCII cannot be used in this application as well as a single CCII+ as they result in negative admittances. It is seen that a parallel RL circuit is realizable from this circuit by using a capacitor for Y3 and conductors for Y1 and Y2 . A frequency-dependent negative resistor (FDNR) in parallel with a capacitor is also realizable from this circuit by using a conductance for Y3 and capacitances for Y1 and Y2 .

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The application of this non-ideal FDNR in the realization of a low-pass lter [18] is the circuit shown in Fig. 9. The voltage transfer function of this grounded-capacitor low-pass lter is given by 1 VLP . = 2 Vi s C1 C2 R1 R2 + s(C1 + C2 )R1 + 1 For a specied by C1 = C 2 = C , R2 = 2Q oC and R1 = 1 2Q
oC o

The

and the Q passive sensitivities are given by (7) (8a) C2 . C1 + C 2 (8b)

SR1o = SR2o = SC1o = SC2o = 0.5, SR1 = SR2 = 0.5, SC1 = SC2 = 0.5 +
Q Q Q Q

(4)

and Q, the design equations are given (5) . (6)

For the equal C design, the Q sensitivities with respect to C1 and C2 equal to zero. It should be noted that the circuit shown in Fig. 9 cannot be used with the ICCII.

4. Applications of the ICCII+ and ICCII

A very important application of both ICCII+ and ICCII in realizing a grounded C band-pass low-pass lter is considered in this section. From Fig. 9, it is observed that the current in the resistor R2 has a band-pass nature. To utilize this current and convert it to a voltage, a second ICCII is needed. Fig. 10 (a) represents an inverting band-pass low-pass lter using both types of ICCII. The low-pass response with both polarities is available at nodes X and Y of the ICCII+: VBP sC 1 R2 = 2 , Vi s C1 C2 R1 R2 + sC 1 R1 + 1 VLP 1 = 2 . Vi s C1 C2 R1 R2 + sC 1 R1 + 1 For a specied by C2 = QC 1 , R1 = 1 o C2 and R2 = 1 . o C1
o

(9) (10)

and Q, the design equations are given (11) (12)

Fig. 5. (a) Realization of ICCII with controllable current gain from two ICCII. (b) Realization of ICCII with controllable current gain from two ICCII+.

Fig. 10(b) represents a non-inverting band-pass low-pass lter using both types of ICCII. The low-pass response with both polarities is available at nodes X and Y of the ICCII. The design equations are the same as given above.

Fig. 6. Two alternative realizations of a negative admittance using ICCII. (a) Current driven and (b) voltage driven.

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Fig. 7. Two alternative balanced output differential integrators using two single outputs ICCII+.

Fig. 8. Ford Girling equivalent circuit using ICCII+.

Fig. 9. Non-inverting and inverting low-pass lter using ICCII+.

Fig. 10. (a) Inverting band-pass and low-pass lter using ICCII+ and ICCII. (b) Non-inverting band-pass and low-pass lter using ICCII and ICCII+.

5. Applications of the ICCII

It should be noted that the band-pass low-pass lters based on the FDNR circuit and using the classical conveyors were given in [19] and it uses two identical CCII types that is either two CCII or two CCII+. Another important application for using both ICCII+ and ICCII is in the realization of gyrators which may have some useful applications and are not discussed here to limit the paper length. The ICCII can be used in realizing high input impedance lters. Two alternative grounded C rst-order all pass lters are shown in Fig. 11. For the circuit of Fig. 11(a) sCR 1 Vo . = Vi 2(sCR + 1) (13)

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Fig. 11. (a) High input impedance grounded C rst-order all-pass circuit using ICCII. (b) An alternative high input impedance grounded C rst-order all-pass circuit using ICCII.

Fig. 13. (a) Inductor circuit using two ICCII (current driven). (b) Inductor circuit using two ICCII (voltage driven).

Fig. 12. High input impedance universal lter using ICCII.

For the circuit of Fig. 11(b) Vo sCR 1 . = Vi 2(sCR + 1) (14)

Fig. 14. The high-pass lter characteristics realized with the grounded inductor of Fig. 13(a).

The high input impedance universal lter shown in Fig. 12 realizes all-pass or notch at Vo3 , low-pass at Vo1 and band-pass at Vo2 . Applying the RC : CR transformation to the lower part of the circuit results in a high-pass response at Vo1 . The circuit topology is similar to the CCII introduced in [20] and the low-pass band-pass part using CCII, was also given in [21]. It should be noted that this single ICCII realizes complex poles and the design equa-

tions for a specied o and Q and for the minimum passive sensitivity [20] are given by C1 = C2 = C , R= 1 . o CQ (15) (16)

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For a notch response, the necessary condition is a= b . b+2 b . b+4 (17)

For an all-pass response, the necessary condition is a= (18)

A very important application of the ICCII is in the realization of an ideal grounded inductor using two ICCII as shown in Fig. 13(a) and (b). The necessary condition is that G 3 = G1 + G 2 . (19)

The ICCII at the input acts as an NIC resulting in a positive ideal grounded inductor at the input port. It is worth noting that if the resistor R3 is removed from the circuits of Fig. 13, then a oating non-ideal inductor is obtained at the input with magnitude equals to L = CR 1 R2 , in parallel with an equivalent resistor equal to R1 in parallel with R2 [17,18]. It is worth noting that the two ICCII used in each of Fig. 13(a) and (b) realizes a CCII similar to the realizations given in Fig. 3 and which uses two ICCII+. As an application for the inductor based on Fig. 13(a), a high-pass lter was realized using the ICCII of Fig. 2(a). The circuit components of Fig. 13(a) are taken as R1 = R2 = 1 k , C = 10 pF, resulting in L = 10 H in parallel with R = 0.5 k . The maximally at magnitude response high-pass lter was constructed from this inductor resistor circuit in series with C = 20 pF. Fig. 14 represents the Spice simulation results which are in good agreement with the ideal simulated one.

6. Conclusion
The inverting second generation current conveyor ICCII includes two types. This paper concentrates on the two new types of the inverting current conveyor namely ICCII+ and ICCII. Although it may seem that there is only minor difference between the two types, there is a signicant difference as is evident from some applications considered in this paper. Both the ICCII+ and the ICCII are universal building blocks as was proved in this paper. It is hoped that the few applications considered in this paper demonstrates the similarities and differences between the ICCII and the classical CCII family.

[3] Carlosena A, Moschytz GS. Nullators and norators in voltage to current mode transformations. Int J Circuit Theory Appl 1993;21:4214. [4] Elwan HO, Soliman AM. A novel CMOS differential voltage current conveyor and its applications. IEE Proc Circuits Dev Syst 1997;144:195200. [5] Chiu W, Liu SI, Tsao HW, Chen JJ. CMOS differential difference current conveyors and their applications. IEE Proc Circuits Dev Syst 1996;143:916. [6] Carlin HJ. Singular network elements. IEEE Trans Circuit Theory 1964;11:6772. [7] Svoboda JA. Current conveyors, operational ampliers and nullors. Proc IEE 1989;136:31722. [8] Payne A, Toumazou C. Analog ampliers: classication and generalization. IEEE Trans Circuits Syst I 1996;3:4350. [9] Toumazou C, Lidgey FJ, Haigh DG. Analog IC design: the current mode approach. Peter Peregrines; 1999. [10] Schmid H. Approximating the universal active element. IEEE Trans Circuits Syst II 2000;47:11609. [11] Cabeza R, Carlosena A, Arbel A. Use of CCII as a universal building block. Microelectron J 1997;28:54350. [12] Awad IA, Soliman AM. On the voltage mirrors and the current mirrors. Analog Integrated Circuits Signal Process 2002;32:79 81. [13] Toumazou C, Lidgey J, Payne A. Emerging techniques for high frequency BJT amplier design: a current mode perspective. The rst international conference on electronics, circuits and systems. Cairo, Egypt; 1994. p. 56. [14] El-Adawy AA, Soliman AM, Elwan HO. Low voltage digitally controlled CMOS current conveyor. Arch Elektron Ubertragungstech 2002;56:13744. [15] Soliman AM. Voltage integrators using op-amps, current conveyors and transconductance ampliers. Arch Elektron Ubertragungstech 1996;50:4668. [16] Ford RL, Girling FEJ. Active lters and oscillators using simulated inductance. Electron Lett 1966;2:52. [17] Soliman AM. FordGirling equivalent circuit using CC II. Electron Lett 1978;14:7212. [18] Soliman AM. Generation of current conveyor based lowpass lters from passive RLC lter. J Franklin Inst 1998;335B:128397. [19] Soliman AM. Generation of CCII and CFOA lters from passive RLC lters. Int J Electron 1998;85:293312. [20] Soliman AM. Generation of current conveyor based all-pass lters from op-amp based circuits. IEEE Trans Circuits Syst II 1997;44:32430. [21] Liu SI, Tsao HW. The single CC II biquads with high input impedance. IEEE Trans Circuits Syst 1991;38:45661.

References
[1] Awad IA, Soliman AM. Inverting second-generation current conveyors: the missing building blocks, CMOS realizations and applications. Int J Electron 1999;86:41332. [2] Roberts GW, Sedra AS. All current-mode selective circuits. Electron Lett 1989;25:75961.

Ahmed M. Soliman was born in Cairo, Egypt, on November 22, 1943. He received the B.Sc. degree with honors from Cairo University, Cairo, Egypt, in 1964, the M.S. and Ph.D. degrees from the University of Pittsburgh, Pittsburgh, PA, U.S.A., in 1967 and 1970, respectively, all in Electrical Engineering. He is currently Professor Electronics and Communications Engineering Department, Cairo University, Egypt.

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From September 1997 to September 2003, Dr. Soliman served as Professor and Chairman Electronics and Communications Engineering Department, Cairo University, Egypt. From 1985 to 1987, Dr. Soliman served as Professor and Chairman of the Electrical Engineering Department, United Arab Emirates University, and from 1987 to 1991 he was the Associate Dean of Engineering at the same University. He has held visiting academic appointments at San Francisco State University, Florida Atlantic University and the American University in Cairo. He was a visiting scholar at Bochum University, Germany (Summer 1985) and with the Technical University of Wien, Austria (Summer 1987). In 2005, Dr. Soliman was invited to visit Taiwan and gave lectures at Chung Yuan Christian University and at

National Central University of Taiwan. Dr. Soliman gave also a lecture at Nanyang Technological University, Singapore. Dr. Soliman is a Member of the Editorial Board of the IET Circuits, Devices and Systems. Dr. Soliman is a Member of the Editorial Board of Analog Integrated Circuits and Signal Processing. Dr. Soliman served as Associate Editor of the IEEE Transactions on Circuits and Systems I (Analog Circuits and Filters) from December 2001 to December 2003 and is Associate Editor of the Journal of Circuits, Systems and Signal Processing from January 2004 till now. In 1977, Dr. Soliman was decorated with the First Class Science Medal, from the President of Egypt, for his services to the eld of Engineering and Engineering Education.