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fully edited. Content may change prior to final publication. Citation information: DOI 10.1109/TCSII.2018.2868744, IEEE
Transactions on Circuits and Systems II: Express Briefs
1549-7747 (c) 2018 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission. See http://www.ieee.org/publications_standards/publications/rights/index.html for more information.
This article has been accepted for publication in a future issue of this journal, but has not been fully edited. Content may change prior to final publication. Citation information: DOI 10.1109/TCSII.2018.2868744, IEEE
Transactions on Circuits and Systems II: Express Briefs
1 IY VCII
𝑖𝑥 + 𝑠𝐶𝑥 ± 𝛽 0 𝑣𝑥 Y
𝑟𝑥 𝑖𝑦
𝑣𝑦 = (2) R1
0 𝑟𝑦 + 𝑠𝐿𝑦 0 Vin
𝑣𝑧 𝑖𝑧
𝛼 0 𝑟𝑧 + 𝑠𝐿𝑧
In (2), α, β, ry, Ly, rx , Cx, rz and Lz are the voltage gain Fig 2. VCII as voltage amplifier
between X and Z terminals, the current gain between Y and X
terminals, the parasitic resistances associated to Y terminal R C
(ideal value=0), the parasitic inductance at Y terminal X
Vout X
VCII Z
(ideal=0), the parasitic resistance at X terminal (ideal=∞), the VCII Z
As it is seen from Fig.2, a voltage amplifier can be realized It is important to note that, for integrator/differentiator
using only one VCII, while two CCIIs are required for the application, the output is inverted. Compared to Op-amp
same purpose [9]. Therefore, compared to CCII, the Based integrator/differentiator, VCII based circuits enjoy low
advantage of using VCII in voltage amplifier application power consumption and reduced complexity.
consists of reduced power consumption and a simpler The application of VCIIs as trans-resistance amplifiers is
circuitry. In fact, in the CCII based voltage amplifier, an extra shown in Fig 4-a. By assuming Zx>>R, we have:
voltage buffer is needed while the VCII can produce voltage
output. In comparison to Op-amps, transfer functions 𝑉𝑥 = 𝐼𝑥 𝑅 =≈ ±𝛽𝐼𝑖𝑛 𝑅 (8)
implemented with VCII exhibit wider frequency performance. Using (8), voltage Vout and transfer function are found as:
Since the op-amp typically operates in negative feedback loop, 𝑉𝑜𝑢𝑡
𝑉𝑜𝑢𝑡 = 𝛼𝑉𝑥 = ±𝛽𝛼𝑅𝐼𝑖𝑛 → 𝑅𝑚 = = ±𝛽𝛼𝑅 (9)
there is a gain bandwidth trade off in all applications 𝐼𝑖𝑛
implemented with Op-amp. The voltage amplifier Here also VCII is much more suitable for this application
implemented with Op-amps suffers from fixed gain-bandwidth since only one VCII is required to realize an I to V converter,
product, while the voltage amplifier implemented with VCII instead of two CCIIs [9]. Fig. 4-b, on the other hand, shows
enjoys a fixed -3dB bandwidth. the application of VCII as V to I converter. By ignoring
Fig. 3-a shows the application of VCII to perform a terminals parasitics, a simple analysis gives its transfer
voltage differentiation. In this circuit, the transfer function is function as:
found as (by ignoring VCII parasitic): 𝐼𝑜𝑢𝑡 ±𝛽
𝐺𝑚 = ≈ (10)
𝑉𝑖𝑛 𝑅
𝑉𝑜𝑢𝑡
≈ ∓𝛽𝛼𝑠𝐶𝑅 (6) Similarly to the CCII based V to I converter, also its VCII
𝑉𝑖𝑛
counterpart consists of just one building block, so for this
application the use of either a CCII or a VCII is equivalent.
[Type text]
1549-7747 (c) 2018 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission. See http://www.ieee.org/publications_standards/publications/rights/index.html for more information.
This article has been accepted for publication in a future issue of this journal, but has not been fully edited. Content may change prior to final publication. Citation information: DOI 10.1109/TCSII.2018.2868744, IEEE
Transactions on Circuits and Systems II: Express Briefs
where:
𝑔𝑚 4 𝑔𝑚 5 𝑔𝑚 4 𝑔𝑚 7
R 𝑔𝑚′4 = , 𝑔𝑚′6 =
𝑔𝑚 5 +𝑔𝑚 4 𝑔𝑚 5 +𝑔𝑚 4 (16)
X Vout
±
X
VCII Z
VCII ± Z
R
while gmi, roi denote the transconductance and the output
Y
Y impedance of the related transistor respectively and roIBi is the
Iin
Vin
output impedance of related current source. Then, Req is also
the equivalent resistance seen from drain of M4.
Also, a super transistor (MA1-MA3) [13-14] has been used in
(a) (b) the implementation of voltage buffer. The negative feedback
Fig 4. VCII as a) I to V converter b) V to I converter loop in the super transistor provides a very low impedance at
Z terminal and a high accuracy in transferring voltage signals
Iout X
X
between X and Z terminals. The small signal analysis of the
± Vout
VCII Z
VCII
±
Z super transistor is given in [14]. Using the latter, the voltage
Vin
Y transfer between X and Z terminals is found as:
Y
Iin
𝑣𝑧 𝑟𝑜𝐼𝐵4 1
(a) (b) 𝛼= =
𝑣𝑥 𝑟𝑜𝐼𝐵4 + 𝑔𝑚8 −1 1 + [𝑔𝑚𝐴1 𝑔𝑚𝐴2 (𝑟𝑜𝐴1 𝑟𝑜𝐼𝐵5 )(𝑟𝑜𝐴2 𝑟𝑜𝐼𝐵6 )]−1 (17)
Fig 5. VCII application as a) current buffer b) voltage buffer
Figs. 5a and 5b show the application of VCII as voltage and The impedance at Z terminal is given by [14]:
current buffer, respectively. The transfer function of a current
1
buffer is found as in (11). The input impedance is equal to Zy 𝑟𝑍 = (18)
𝑔𝑚 𝐴 1 𝑔𝑚 𝐴 2 𝑔𝑚 𝐴 3 (𝑟𝑜 𝐴 1 𝑟𝑜 𝐼𝐵 5 )(𝑟𝑜 𝐴 2 𝑟𝑜 𝐼𝐵 6 )
and the output impedance is Zx. For a voltage buffer, the
transfer function is found as in (12). For VCII-based voltage
buffer, the input impedance is equal to Zx and the output IV. SIMULATION RESULTS
impedance is Zz. In both the considered cases, α and β must be The VCII of Fig.6 is designed using 0.35µm CMOS
designed, at transistor level, as unitary. technology parameters and supply voltage of ±1.65V. The
transistors aspect ratios chosen for simulations are given in
𝐼𝑜𝑢𝑡
= ±𝛽 (11) Table-I. All the current sources are implemented by means of
𝐼𝑖𝑛
simple current mirrors whose dimensions have been chosen in
𝑉𝑜𝑢𝑡 order to provide the biasing currents shown in Table-II. Table-
=𝛼 (12)
𝑉𝑖𝑛 III summarizes the main characteristics of the proposed VCII.
Comparing classical CCII-based voltage and current As it is seen, it exhibits very low input impedances at Y and Z
buffers with VCII-based voltage and current buffers of Fig.5, terminals and high impedance at X terminal. The current and
it comes out that for these applications both CCII and VCII voltage transfer gains are very close to unity (with a load
show similar performances. impedance of 1pF//1kΩ). The frequency performance is high
while power consumption is only 330µW with a very low
nodes voltage offset.
III. CMOS IMPLEMENTATION As case study we have utilized the proposed VCII in the
A CMOS implementation of a VCII+ is shown in Fig.6. It is applications where VCII is the best candidate, i.e. I-to-V
composed of a current buffer between Y and X terminals and a converter, voltage differentiator, voltage integrator and
voltage buffer between X and Z terminals. The current buffer voltage amplifier. Figure 8 shows the frequency performance
is formed with transistors M1-M7 and current sources IB1-IB4, and step response of the VCII-based I-to-V converter which
while the voltage buffer is also made of M8, MA1-MA3 and IB5- results to be excellent for different values of gain. The VCII-
IB7 current sources. Negative feedback loop, established by based I-to-V converter also takes advantage of the very low
M1-M3, sets the offset voltage at Y terminal equal to ground input and output impedances (6.7Ω and 0.7Ω respectively) as
and reduces its impedance. The second negative feedback shown in Table-III. The Simulations of the VCII as V-to-I
loop, formed by M4-M7 transistors, further reduces the converter in frequency domain and time domain to a step
impedance at Y terminal and transfers input current to X response of 10 mV are shown in Fig.9. This circuit enjoys a
terminal. A small signal analysis, based on Fig.7 equivalent high output impedance of 1.2MΩ and very high frequency
circuit, gives the impedance at Y and X terminals and also the performance. Frequency and time domain performances of
current transfer gain β between X and Y terminal as follows: the VCII based voltage amplifier are shown in Fig 10. In this
1 case, the output impedance is only 0.7Ω and the circuit
𝑟𝑌 = (13)
𝑔𝑚3 𝑔𝑚1 (𝑟𝑜1 𝑟𝑜𝐼𝐵 1 ) 𝑔𝑚′4 (𝑟𝑜𝐼𝐵3 𝑟𝑜3 ) exhibits approximately constant bandwidth independent of
(𝑟𝑜7 + 𝑟𝑜6 + 𝑔𝑚6 𝑟𝑜6 𝑟𝑜7 )(𝑟𝑜𝐼𝐵4 + 1 𝑔𝑚8 )
gain. Finally, the simulations of VCII as voltage differentiator
𝑟𝑋 = (14) and integrator in time domain are shown in Fig.11 and Fig. 12
(𝑟𝑜7 + 𝑟𝑜6 + 𝑔𝑚6 𝑟𝑜6 𝑟𝑜7 + 𝑟𝑜𝐼𝐵4 + 1 𝑔𝑚8 )
respectively. Both of these circuits exhibit very low output
𝑖𝑥 𝑔𝑚′6 𝑟𝑜𝐼𝐵3 (𝑅𝑒𝑞 𝑟𝑜𝐼𝐵2 ) 𝑔𝑚′ 6 𝑔𝑚7 impedance of 0.7Ω.
𝛽= = ≈ = (15)
𝑖𝑦 1 + 𝑔𝑚′4 𝑟𝑜𝐼𝐵3 (𝑅𝑒𝑞 𝑟𝑜𝐼𝐵2 ) 𝑔𝑚′ 4 𝑔𝑚5
[Type text]
1549-7747 (c) 2018 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission. See http://www.ieee.org/publications_standards/publications/rights/index.html for more information.
This article has been accepted for publication in a future issue of this journal, but has not been fully edited. Content may change prior to final publication. Citation information: DOI 10.1109/TCSII.2018.2868744, IEEE
Transactions on Circuits and Systems II: Express Briefs
In this paper, the VCII as a new building block, its Current source Value (μA)
characteristics, applications and a possible implementation and IB1,B2 9.2
design of its internal circuit in a standard CMOS technology
have been presented. VCII is proved to be the dual of the more IB3 8.5
famous CCII and offers new solutions in applications where IB4,5 17.7
the latter is limited. Also, a CMOS implementation, at
IB6 8.2
transistor level, of this new block has been given. Simulation
results have been also provided to confirm the presented IB7 30
theory.
VDD TABLE-III The proposed VCII performance parameters
Parameter Value
IB3 IB4 IB5 IB6
rx, Cx 1.2MΩ, ~30fF
MA3
IB1 IB2
M8 MA2 ry, Ly 6.7Ω, ~1.5µH
M3 MA1
Z rz, Lz 0.7Ω, ~9µH
M1 M2 VoX=33 µV, VoY=27µV, VoZ=370µV
Super Offset Voltage
Transistor (0.997, 217MHz)
Y X α (DC value, -3dB BW)
IB7 β (DC value, -3dB BW) (0.988, 200MHz)
M4 M6
THD Vz (input Vx = 1
0.068% (-63dB)
Vp-p @1MHz, 10 harm)
M5 M7
THD Ix (input Iy = 20
Vss μAp-p @1MHz, 10 0.1% (-59dB)
harm)
Current Buffer Voltage Buffer Static Power
330µW (200µA)
Consumption
Fig 6. CMOS implementation of a VCII+
70
v2 i2
iX
Gain(dB)
50
Fig 7. Small signal equivalent circuit of Fig 6 circuit 100m 1.0 10 100 1.0K 10K 100K 1.0M 10M 100M 1.0G
Frequency (Hz)
(a)
15 15
10 10
M1,2,3 35 0.35 nMOS
Vout (mV)
Iin (μA)
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1549-7747 (c) 2018 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission. See http://www.ieee.org/publications_standards/publications/rights/index.html for more information.
This article has been accepted for publication in a future issue of this journal, but has not been fully edited. Content may change prior to final publication. Citation information: DOI 10.1109/TCSII.2018.2868744, IEEE
Transactions on Circuits and Systems II: Express Briefs
- 60 800
400
Vout
0
R1 = 10k, Gain=-80dB
- 80
-3dB BW=203.699MHz 400
- 90
800
20.0 20.2 20.4 20.6 20.8 21.0 21.2 21.4 21.6 21.8 22.0
Time (µs)
- 100
100m 1.0 10 100 1.0K 10K 100K 1.0M 10M 100M 1.0G Fig 11. Time Domain Response of VCII based voltage differentiator.
800
Frequency (Hz)
(a) Vin
400
12 12
- 800
4 4 20.0 20.2 20.4 20.6 20.8 21.0 21.2 21.4 21.6 21.8 22.0
Time (µs)
[Type text]
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